[llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)

[Florian Hahn via llvm-commits]

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@@ -1064,6 +1074,11 @@ void VPlan::execute(VPTransformState *State) {
       // consistent placement of all induction updates.
       Instruction *Inc = cast<Instruction>(Phi->getIncomingValue(1));
       Inc->moveBefore(VectorLatchBB->getTerminator()->getPrevNode());
+
+      // When the VPlan has been unrolled, chain together the steps of the
+      // unrolled parts together.
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fhahn wrote:

Updated to `  // Use the steps for the last part as backedge value for the induction.`

> This part backpatches values across the backedge, while this chaining connects an Inc to its feeding IV - should it be handled by forward VPlan def-use dependence?

This boils down to modeling the steps/bump explicitly in VPlan, drawing back to earlier conversations of having a VPlan variant closer to codegen later on, which would take care of that.

Ideally done after the transition to explicit unrolling.


https://github.com/llvm/llvm-project/pull/95842