[llvm] [RISCV] Add additional fence for amocas when required by recent ABI change (PR #101023)

[Craig Topper via llvm-commits]

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@@ -680,6 +680,10 @@ class RISCVTargetLowering : public TargetLowering {
 
   bool preferZeroCompareBranch() const override { return true; }
 
+  // Note that one specific case requires fence insertion for an
+  // AtomicCmpXchgInst but is handled via RISCVCodeGenPrepare rather than this
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topperc wrote:

Comment needs updating for new pass

https://github.com/llvm/llvm-project/pull/101023