[llvm] [RISCV][GISEL] Legalize G_INSERT_VECTOR_ELT (PR #108250)

[Thorsten Schütt via llvm-commits]

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@@ -802,6 +823,39 @@ bool RISCVLegalizerInfo::legalizeLoadStore(MachineInstr &MI,
   return true;
 }
 
+static LLT getLMUL1Ty(LLT VecTy) {
+  assert(VecTy.getElementType().getSizeInBits() <= 64 &&
+         "Unexpected vector LLT");
+  return LLT::scalable_vector(RISCV::RVVBitsPerBlock /
+                                  VecTy.getElementType().getSizeInBits(),
+                              VecTy.getElementType());
+}
+
+/// Given a scalable vector type and an index into it, returns the type for the
+/// smallest subvector that the index fits in. This can be used to reduce LMUL
+/// for operations like vslidedown.
+///
+/// E.g. With Zvl128b, index 3 in a nxv4i32 fits within the first nxv2i32.
+static std::optional<LLT>
+getSmallestLLTForIndex(LLT VecTy, unsigned MaxIdx,
+                       const RISCVSubtarget &Subtarget) {
+  assert(VecTy.isScalableVector());
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tschuett wrote:

&& "Expected scalable vector"

https://github.com/llvm/llvm-project/pull/108250