[llvm] [AMDGPU] Use std::optional in InstCombine of amdgcn_fmed3. NFC. (PR #108223)
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 11 07:20:47 PDT 2024
https://github.com/jayfoad updated https://github.com/llvm/llvm-project/pull/108223
>From a344ef5cd8b2cfb08618efdade36be3f65ad59c7 Mon Sep 17 00:00:00 2001
From: Jay Foad <jay.foad at amd.com>
Date: Wed, 11 Sep 2024 14:27:05 +0100
Subject: [PATCH 1/3] [AMDGPU] Use std::optional in InstCombine of
amdgcn_fmed3. NFC.
---
.../AMDGPU/AMDGPUInstCombineIntrinsic.cpp | 36 +++++++++----------
1 file changed, 17 insertions(+), 19 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
index 4da3618357c420..a2135fbc254c11 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
@@ -353,23 +353,20 @@ bool GCNTTIImpl::canSimplifyLegacyMulToMul(const Instruction &I,
}
/// Match an fpext from half to float, or a constant we can convert.
-static bool matchFPExtFromF16(Value *Arg, Value *&FPExtSrc) {
- if (match(Arg, m_OneUse(m_FPExt(m_Value(FPExtSrc)))))
- return FPExtSrc->getType()->isHalfTy();
-
+static std::optional<Value *> matchFPExtFromF16(Value *Arg) {
+ Value *Src;
ConstantFP *CFP;
- if (match(Arg, m_ConstantFP(CFP))) {
+ if (match(Arg, m_OneUse(m_FPExt(m_Value(Src))))) {
+ if (Src->getType()->isHalfTy())
+ return Src;
+ } else if (match(Arg, m_ConstantFP(CFP))) {
bool LosesInfo;
APFloat Val(CFP->getValueAPF());
Val.convert(APFloat::IEEEhalf(), APFloat::rmNearestTiesToEven, &LosesInfo);
- if (LosesInfo)
- return false;
-
- FPExtSrc = ConstantFP::get(Type::getHalfTy(Arg->getContext()), Val);
- return true;
+ if (!LosesInfo)
+ return ConstantFP::get(Type::getHalfTy(Arg->getContext()), Val);
}
-
- return false;
+ return {};
}
// Trim all zero components from the end of the vector \p UseV and return
@@ -839,15 +836,16 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {
if (!ST->hasMed3_16())
break;
- Value *X, *Y, *Z;
-
// Repeat floating-point width reduction done for minnum/maxnum.
// fmed3((fpext X), (fpext Y), (fpext Z)) -> fpext (fmed3(X, Y, Z))
- if (matchFPExtFromF16(Src0, X) && matchFPExtFromF16(Src1, Y) &&
- matchFPExtFromF16(Src2, Z)) {
- Value *NewCall = IC.Builder.CreateIntrinsic(IID, {X->getType()},
- {X, Y, Z}, &II, II.getName());
- return new FPExtInst(NewCall, II.getType());
+ if (auto X = matchFPExtFromF16(Src0)) {
+ if (auto Y = matchFPExtFromF16(Src1)) {
+ if (auto Z = matchFPExtFromF16(Src2)) {
+ Value *NewCall = IC.Builder.CreateIntrinsic(
+ IID, {(*X)->getType()}, {*X, *Y, *Z}, &II, II.getName());
+ return new FPExtInst(NewCall, II.getType());
+ }
+ }
}
break;
>From eebbb4c2b093d7166e3c8727932a9265b142217c Mon Sep 17 00:00:00 2001
From: Jay Foad <jay.foad at amd.com>
Date: Wed, 11 Sep 2024 14:49:03 +0100
Subject: [PATCH 2/3] address review comments
---
llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
index a2135fbc254c11..d6b953932a940b 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
@@ -354,8 +354,8 @@ bool GCNTTIImpl::canSimplifyLegacyMulToMul(const Instruction &I,
/// Match an fpext from half to float, or a constant we can convert.
static std::optional<Value *> matchFPExtFromF16(Value *Arg) {
- Value *Src;
- ConstantFP *CFP;
+ Value *Src = nullptr;
+ ConstantFP *CFP = nullptr;
if (match(Arg, m_OneUse(m_FPExt(m_Value(Src))))) {
if (Src->getType()->isHalfTy())
return Src;
@@ -366,7 +366,7 @@ static std::optional<Value *> matchFPExtFromF16(Value *Arg) {
if (!LosesInfo)
return ConstantFP::get(Type::getHalfTy(Arg->getContext()), Val);
}
- return {};
+ return std::nullopt;
}
// Trim all zero components from the end of the vector \p UseV and return
>From 488bde8e7a81c7cffae8be3959d9c85debf2e2c7 Mon Sep 17 00:00:00 2001
From: Jay Foad <jay.foad at amd.com>
Date: Wed, 11 Sep 2024 15:17:32 +0100
Subject: [PATCH 3/3] drop std::optional
---
.../lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
index d6b953932a940b..9f8926432d00ae 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
@@ -353,7 +353,7 @@ bool GCNTTIImpl::canSimplifyLegacyMulToMul(const Instruction &I,
}
/// Match an fpext from half to float, or a constant we can convert.
-static std::optional<Value *> matchFPExtFromF16(Value *Arg) {
+static Value *matchFPExtFromF16(Value *Arg) {
Value *Src = nullptr;
ConstantFP *CFP = nullptr;
if (match(Arg, m_OneUse(m_FPExt(m_Value(Src))))) {
@@ -366,7 +366,7 @@ static std::optional<Value *> matchFPExtFromF16(Value *Arg) {
if (!LosesInfo)
return ConstantFP::get(Type::getHalfTy(Arg->getContext()), Val);
}
- return std::nullopt;
+ return nullptr;
}
// Trim all zero components from the end of the vector \p UseV and return
@@ -838,11 +838,11 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {
// Repeat floating-point width reduction done for minnum/maxnum.
// fmed3((fpext X), (fpext Y), (fpext Z)) -> fpext (fmed3(X, Y, Z))
- if (auto X = matchFPExtFromF16(Src0)) {
- if (auto Y = matchFPExtFromF16(Src1)) {
- if (auto Z = matchFPExtFromF16(Src2)) {
+ if (Value *X = matchFPExtFromF16(Src0)) {
+ if (Value *Y = matchFPExtFromF16(Src1)) {
+ if (Value *Z = matchFPExtFromF16(Src2)) {
Value *NewCall = IC.Builder.CreateIntrinsic(
- IID, {(*X)->getType()}, {*X, *Y, *Z}, &II, II.getName());
+ IID, {X->getType()}, {X, Y, Z}, &II, II.getName());
return new FPExtInst(NewCall, II.getType());
}
}
More information about the llvm-commits
mailing list