[llvm] [M68k] allow 16-bit registers for MOVE to/from CCR (PR #107591)
Janis Heims via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 10 01:16:31 PDT 2024
https://github.com/TechnoElf updated https://github.com/llvm/llvm-project/pull/107591
>From 5356e6c775ad4b030525a4ce344279b71936acb4 Mon Sep 17 00:00:00 2001
From: TechnoElf <technoelf at undertheprinter.com>
Date: Fri, 6 Sep 2024 16:04:22 +0200
Subject: [PATCH] [M68k] allow 16-bit registers for MOVE to/from CCR
---
llvm/lib/Target/M68k/M68kInstrInfo.cpp | 26 ++++++++++++++++++++------
1 file changed, 20 insertions(+), 6 deletions(-)
diff --git a/llvm/lib/Target/M68k/M68kInstrInfo.cpp b/llvm/lib/Target/M68k/M68kInstrInfo.cpp
index 23c5c76a47479b..dac0663f2fa67e 100644
--- a/llvm/lib/Target/M68k/M68kInstrInfo.cpp
+++ b/llvm/lib/Target/M68k/M68kInstrInfo.cpp
@@ -709,13 +709,27 @@ void M68kInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
bool ToSR = DstReg == M68k::SR;
if (FromCCR) {
- assert(M68k::DR8RegClass.contains(DstReg) &&
- "Need DR8 register to copy CCR");
- Opc = M68k::MOV8dc;
+ if (M68k::DR8RegClass.contains(DstReg))
+ Opc = M68k::MOV8dc;
+ else if (M68k::DR16RegClass.contains(DstReg))
+ Opc = M68k::MOV16dc;
+ else if (M68k::DR32RegClass.contains(DstReg))
+ Opc = M68k::MOV16dc;
+ else {
+ LLVM_DEBUG(dbgs() << "Cannot copy CCR to " << RI.getName(DstReg) << '\n');
+ llvm_unreachable("Invalid register for MOVE from CCR");
+ }
} else if (ToCCR) {
- assert(M68k::DR8RegClass.contains(SrcReg) &&
- "Need DR8 register to copy CCR");
- Opc = M68k::MOV8cd;
+ if (M68k::DR8RegClass.contains(SrcReg))
+ Opc = M68k::MOV8cd;
+ else if (M68k::DR16RegClass.contains(SrcReg))
+ Opc = M68k::MOV16cd;
+ else if (M68k::DR32RegClass.contains(SrcReg))
+ Opc = M68k::MOV16cd;
+ else {
+ LLVM_DEBUG(dbgs() << "Cannot copy " << RI.getName(SrcReg) << " to CCR\n");
+ llvm_unreachable("Invalid register for MOVE to CCR");
+ }
} else if (FromSR || ToSR)
llvm_unreachable("Cannot emit SR copy instruction");
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