[llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)

[Philip Reames via llvm-commits]

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@@ -6574,7 +6611,7 @@ BoUpSLP::TreeEntry::EntryState BoUpSLP::getScalarsVectorizationState(
   case Instruction::ExtractElement: {
     bool Reuse = canReuseExtract(VL, VL0, CurrentOrder);
     // FIXME: Vectorizing is not supported yet for non-power-of-2 ops.
-    if (!has_single_bit(VL.size()))
+    if (!hasFullVectorsOnly(*TTI, VL0->getType(), VL.size()))
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preames wrote:

Again, have you audited the exposed code?

https://github.com/llvm/llvm-project/pull/107273