[clang] [llvm] [Clang][LLVM][AArch64] Add intrinsic for MOVT SME2 instruction (PR #97602)

[via llvm-commits]

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@@ -2899,6 +2899,15 @@ let TargetPrefix = "aarch64" in {
           [llvm_i32_ty],
           [IntrNoMem, IntrHasSideEffects]>;
 
+  def int_aarch64_sme_write_lane_zt
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SpencerAbson wrote:

`svzero_zt` is defined like this:

`def int_aarch64_sme_zero_zt : DefaultAttrsIntrinsic<[], [llvm_i32_ty], [ImmArg<ArgIndex<0>>, IntrWriteMem]>;`

Apologies if I've already asked this, but should these intrinsics not also model writing to ZT0 as memory in the same way? (rather than InrtNoMem, IntrHasSideEffects)?



https://github.com/llvm/llvm-project/pull/97602