[llvm] [AMDGPU][MC] Disallow null as saddr in flat instructions (PR #101730)

[Jun Wang via llvm-commits]

================
@@ -6205,6 +6205,12 @@ void SIInstrInfo::legalizeOperandsFLAT(MachineRegisterInfo &MRI,
     return;
 
   Register ToSGPR = readlaneVGPRToSGPR(SAddr->getReg(), MI, MRI);
+
+  const TargetRegisterClass *DeclaredRC =
+      getRegClass(MI.getDesc(), SAddr->getOperandNo(),
+                  MRI.getTargetRegisterInfo(), *MI.getParent()->getParent());
+
+  MRI.setRegClass(ToSGPR, DeclaredRC);
----------------
jwanggit86 wrote:

> This is the wrong way to fix this. readlaneVGPRToSGPR can already check the operand class directly, and then apply getCommonSubClass to the most general result getSGPRClassForBitWidth returned. You shouldn't let it create the wrong register class and then redo it after

To use `getCommonSubClass()` as you suggested, I need to add an extra parameter to `readlaneVGPRToSGPR()` which holds the RC I want with a default of nullptr, as follows:
```diff
 Register SIInstrInfo::readlaneVGPRToSGPR(Register SrcReg, MachineInstr &UseMI,
-                                         MachineRegisterInfo &MRI) const {
+             MachineRegisterInfo &MRI, const TargetRegisterClass *DstRC/*=nullptr*/) const {
   const TargetRegisterClass *VRC = MRI.getRegClass(SrcReg);
   const TargetRegisterClass *SRC = RI.getEquivalentSGPRClass(VRC);
+  if (DstRC) {
+    SRC = ST.getRegisterInfo()->getCommonSubClass(SRC, DstRC);
+  }
   Register DstReg = MRI.createVirtualRegister(SRC);
```
Pls let me know if this is what you had in mind.

https://github.com/llvm/llvm-project/pull/101730