[llvm] Reland "[NVPTX] Support copysign PTX instruction" (PR #108125)

[Artem Belevich via llvm-commits]

================
@@ -2560,6 +2561,23 @@ SDValue NVPTXTargetLowering::LowerShiftLeftParts(SDValue Op,
   }
 }
 
+/// Convert the generic copysign to the NVPTXISD version which guarantees that
+/// the types of the operands will match
+SDValue NVPTXTargetLowering::LowerFCOPYSIGN(SDValue Op,
+                                            SelectionDAG &DAG) const {
+  EVT VT = Op.getValueType();
+  SDLoc DL(Op);
+
+  SDValue In1 = Op.getOperand(0);
+  SDValue In2 = Op.getOperand(1);
+  EVT SrcVT = In2.getValueType();
+
+  if (!SrcVT.bitsEq(VT))
+    In2 = DAG.getFPExtendOrRound(In2, DL, VT);
----------------
Artem-B wrote:

I think that if we need to do a conversion, we may be better off just expanding the copysign to logical ops. I suspect that transplanting one bit would be cheaper than converting f16 <-> f32.

What happens when we bail out here on operand mismatch? Legalizer should be able to expand it.



https://github.com/llvm/llvm-project/pull/108125