[llvm] c6c3803 - [RISCV] Add documentation that Zvbc and Zvk* are supported through intrinsics. NFC (#108577)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 13 16:31:47 PDT 2024
Author: Craig Topper
Date: 2024-09-13T16:31:44-07:00
New Revision: c6c3803b7267d3e9e81e09fc23e56c58854e703e
URL: https://github.com/llvm/llvm-project/commit/c6c3803b7267d3e9e81e09fc23e56c58854e703e
DIFF: https://github.com/llvm/llvm-project/commit/c6c3803b7267d3e9e81e09fc23e56c58854e703e.diff
LOG: [RISCV] Add documentation that Zvbc and Zvk* are supported through intrinsics. NFC (#108577)
Added:
Modified:
llvm/docs/RISCVUsage.rst
Removed:
################################################################################
diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst
index 84784b9f6e6ee9..11e400cb0ea8e0 100644
--- a/llvm/docs/RISCVUsage.rst
+++ b/llvm/docs/RISCVUsage.rst
@@ -208,7 +208,7 @@ on support follow.
``Zmmul`` Supported
``Ztso`` Supported
``Zvbb`` Supported
- ``Zvbc`` Assembly Support
+ ``Zvbc`` Supported (`See note <#iscv-vector-crypto-note>`__)
``Zve32x`` (`Partially <#riscv-vlen-32-note>`__) Supported
``Zve32f`` (`Partially <#riscv-vlen-32-note>`__) Supported
``Zve64x`` Supported
@@ -219,19 +219,19 @@ on support follow.
``Zvfh`` Supported
``Zvfhmin`` Supported
``Zvkb`` Supported
- ``Zvkg`` Assembly Support
- ``Zvkn`` Assembly Support
- ``Zvknc`` Assembly Support
- ``Zvkned`` Assembly Support
- ``Zvkng`` Assembly Support
- ``Zvknha`` Assembly Support
- ``Zvknhb`` Assembly Support
- ``Zvks`` Assembly Support
- ``Zvksc`` Assembly Support
- ``Zvksed`` Assembly Support
- ``Zvksg`` Assembly Support
- ``Zvksh`` Assembly Support
- ``Zvkt`` Assembly Support
+ ``Zvkg`` Supported (`See note <#iscv-vector-crypto-note>`__)
+ ``Zvkn`` Supported (`See note <#iscv-vector-crypto-note>`__)
+ ``Zvknc`` Supported (`See note <#iscv-vector-crypto-note>`__)
+ ``Zvkned`` Supported (`See note <#iscv-vector-crypto-note>`__)
+ ``Zvkng`` Supported (`See note <#iscv-vector-crypto-note>`__)
+ ``Zvknha`` Supported (`See note <#iscv-vector-crypto-note>`__)
+ ``Zvknhb`` Supported (`See note <#iscv-vector-crypto-note>`__)
+ ``Zvks`` Supported (`See note <#iscv-vector-crypto-note>`__)
+ ``Zvksc`` Supported (`See note <#iscv-vector-crypto-note>`__)
+ ``Zvksed`` Supported (`See note <#iscv-vector-crypto-note>`__)
+ ``Zvksg`` Supported (`See note <#iscv-vector-crypto-note>`__)
+ ``Zvksh`` Supported (`See note <#iscv-vector-crypto-note>`__)
+ ``Zvkt`` Supported
``Zvl32b`` (`Partially <#riscv-vlen-32-note>`__) Supported
``Zvl64b`` Supported
``Zvl128b`` Supported
@@ -267,6 +267,11 @@ Supported
``Zknd``, ``Zkne``, ``Zknh``, ``Zksed``, ``Zksh``
No pattern matching exists. As a result, these instructions can only be used from assembler or via intrinsic calls.
+.. _riscv-vector-crypto-note:
+
+``Zvbc``, ``Zvkg``, ``Zvkn``, ``Zvknc``, ``Zvkned``, ``Zvkng``, ``Zvknha``, ``Zvknhb``, ``Zvks``, ``Zvks``, ``Zvks``, ``Zvksc``, ``Zvksed``, ``Zvksg``, ``Zvksh``.
+ No pattern matching exists. As a result, these instructions can only be used from assembler or via intrinsic calls.
+
.. _riscv-vlen-32-note:
``Zve32x``, ``Zve32f``, ``Zvl32b``
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