[llvm] [RISCV] Add additional fence for amocas when required by recent ABI change (PR #101023)

[Craig Topper via llvm-commits]

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@@ -0,0 +1,96 @@
+//===----- RISCVZacasABIFix.cpp -------------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This pass implements a fence insertion for an atomic cmpxchg in a case that
+// isn't easy to do with the current AtomicExpandPass hooks API.
+//
+//===----------------------------------------------------------------------===//
+
+#include "RISCV.h"
+#include "RISCVTargetMachine.h"
+#include "llvm/ADT/Statistic.h"
+#include "llvm/Analysis/ValueTracking.h"
+#include "llvm/CodeGen/TargetPassConfig.h"
+#include "llvm/IR/Dominators.h"
+#include "llvm/IR/IRBuilder.h"
+#include "llvm/IR/InstVisitor.h"
+#include "llvm/IR/Intrinsics.h"
+#include "llvm/IR/IntrinsicsRISCV.h"
+#include "llvm/IR/PatternMatch.h"
+#include "llvm/InitializePasses.h"
+#include "llvm/Pass.h"
+
+using namespace llvm;
+
+#define DEBUG_TYPE "riscv-zacas-abi-fix"
+#define PASS_NAME "RISC-V Zacas ABI fix"
+
+namespace {
+
+class RISCVZacasABIFix : public FunctionPass,
+                         public InstVisitor<RISCVZacasABIFix, bool> {
+  const RISCVSubtarget *ST;
+
+public:
+  static char ID;
+
+  RISCVZacasABIFix() : FunctionPass(ID) {}
+
+  bool runOnFunction(Function &F) override;
+
+  StringRef getPassName() const override { return PASS_NAME; }
+
+  void getAnalysisUsage(AnalysisUsage &AU) const override {
+    AU.setPreservesCFG();
+    AU.addRequired<TargetPassConfig>();
+  }
+
+  bool visitInstruction(Instruction &I) { return false; }
+  bool visitAtomicCmpXchgInst(AtomicCmpXchgInst &I);
+};
+
+} // end anonymous namespace
+
+// Insert a leading fence (needed for broadest atomics ABI compatibility)
+// only if the Zacas extension is enabled and the AtomicCmpXchgInst has a
+// SequentiallyConsistent failure ordering.
+bool RISCVZacasABIFix::visitAtomicCmpXchgInst(AtomicCmpXchgInst &I) {
+  IRBuilder<> Builder(&I);
+  if (!ST->hasStdExtZacas() ||
----------------
topperc wrote:

Zacas check can be done in runOnFunction to avoid the loop when it isn't enabled.

https://github.com/llvm/llvm-project/pull/101023