[llvm] [LoongArch] Eliminate the redundant sign extension of division (PR #107971)

[via llvm-commits]

================
@@ -637,6 +637,19 @@ static bool isSignExtendedW(Register SrcReg, const LoongArchSubtarget &ST,
         break;
       }
       return false;
+    // If all incoming values are sign-extended and all users only use
+    // the lower 32 bits, then convert them to W versions.
+    case LoongArch::DIV_D: {
----------------
heiher wrote:

It appears that `signext i32 mod.d(i32, i32)` has no redundant sign extension.

```llvm
define i32 @srem_i32(i32 %a, i32 %b) {
; LA64-LABEL: srem_i32:
; LA64:       # %bb.0: # %entry
; LA64-NEXT:    addi.w $a1, $a1, 0
; LA64-NEXT:    addi.w $a0, $a0, 0
; LA64-NEXT:    mod.d $a0, $a0, $a1
; LA64-NEXT:    ret
entry:
  %r = srem i32 %a, %b
  ret i32 %r
}
```

https://github.com/llvm/llvm-project/pull/107971