[llvm] 2395379 - [VirtRegMap] Remove unnecessary calls to Register::id() accessing IndexMaps.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sun Sep 15 10:18:19 PDT 2024
Author: Craig Topper
Date: 2024-09-15T09:59:34-07:00
New Revision: 23953798f3cf5d292947ca4e6e46db25921acd5e
URL: https://github.com/llvm/llvm-project/commit/23953798f3cf5d292947ca4e6e46db25921acd5e
DIFF: https://github.com/llvm/llvm-project/commit/23953798f3cf5d292947ca4e6e46db25921acd5e.diff
LOG: [VirtRegMap] Remove unnecessary calls to Register::id() accessing IndexMaps.
VirtReg2IndexFunctor already takes a Register.
Added:
Modified:
llvm/include/llvm/CodeGen/VirtRegMap.h
llvm/lib/CodeGen/VirtRegMap.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/VirtRegMap.h b/llvm/include/llvm/CodeGen/VirtRegMap.h
index c9998ba0b47a60..71e0cc87fed3b2 100644
--- a/llvm/include/llvm/CodeGen/VirtRegMap.h
+++ b/llvm/include/llvm/CodeGen/VirtRegMap.h
@@ -104,7 +104,7 @@ class TargetInstrInfo;
/// virtual register
MCRegister getPhys(Register virtReg) const {
assert(virtReg.isVirtual());
- return MCRegister::from(Virt2PhysMap[virtReg.id()]);
+ return MCRegister::from(Virt2PhysMap[virtReg]);
}
/// creates a mapping for the specified virtual register to
@@ -130,9 +130,9 @@ class TargetInstrInfo;
/// register mapping
void clearVirt(Register virtReg) {
assert(virtReg.isVirtual());
- assert(Virt2PhysMap[virtReg.id()] != NO_PHYS_REG &&
+ assert(Virt2PhysMap[virtReg] != NO_PHYS_REG &&
"attempt to clear a not assigned virtual register");
- Virt2PhysMap[virtReg.id()] = NO_PHYS_REG;
+ Virt2PhysMap[virtReg] = NO_PHYS_REG;
}
/// clears all virtual to physical register mappings
@@ -151,7 +151,7 @@ class TargetInstrInfo;
/// records virtReg is a split live interval from SReg.
void setIsSplitFromReg(Register virtReg, Register SReg) {
- Virt2SplitMap[virtReg.id()] = SReg;
+ Virt2SplitMap[virtReg] = SReg;
if (hasShape(SReg)) {
Virt2ShapeMap[virtReg] = getShape(SReg);
}
@@ -159,7 +159,7 @@ class TargetInstrInfo;
/// returns the live interval virtReg is split from.
Register getPreSplitReg(Register virtReg) const {
- return Virt2SplitMap[virtReg.id()];
+ return Virt2SplitMap[virtReg];
}
/// getOriginal - Return the original virtual register that VirtReg descends
@@ -178,15 +178,15 @@ class TargetInstrInfo;
return true;
// Split register can be assigned a physical register as well as a
// stack slot or remat id.
- return (Virt2SplitMap[virtReg.id()] &&
- Virt2PhysMap[virtReg.id()] != NO_PHYS_REG);
+ return (Virt2SplitMap[virtReg] &&
+ Virt2PhysMap[virtReg] != NO_PHYS_REG);
}
/// returns the stack slot mapped to the specified virtual
/// register
int getStackSlot(Register virtReg) const {
assert(virtReg.isVirtual());
- return Virt2StackSlotMap[virtReg.id()];
+ return Virt2StackSlotMap[virtReg];
}
/// create a mapping for the specifed virtual register to
diff --git a/llvm/lib/CodeGen/VirtRegMap.cpp b/llvm/lib/CodeGen/VirtRegMap.cpp
index 4acc4f845291d4..e3b7da69df46b1 100644
--- a/llvm/lib/CodeGen/VirtRegMap.cpp
+++ b/llvm/lib/CodeGen/VirtRegMap.cpp
@@ -84,12 +84,12 @@ void VirtRegMap::grow() {
void VirtRegMap::assignVirt2Phys(Register virtReg, MCPhysReg physReg) {
assert(virtReg.isVirtual() && Register::isPhysicalRegister(physReg));
- assert(Virt2PhysMap[virtReg.id()] == NO_PHYS_REG &&
+ assert(Virt2PhysMap[virtReg] == NO_PHYS_REG &&
"attempt to assign physical register to already mapped "
"virtual register");
assert(!getRegInfo().isReserved(physReg) &&
"Attempt to map virtReg to a reserved physReg");
- Virt2PhysMap[virtReg.id()] = physReg;
+ Virt2PhysMap[virtReg] = physReg;
}
unsigned VirtRegMap::createSpillSlot(const TargetRegisterClass *RC) {
@@ -126,20 +126,20 @@ bool VirtRegMap::hasKnownPreference(Register VirtReg) const {
int VirtRegMap::assignVirt2StackSlot(Register virtReg) {
assert(virtReg.isVirtual());
- assert(Virt2StackSlotMap[virtReg.id()] == NO_STACK_SLOT &&
+ assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
"attempt to assign stack slot to already spilled register");
const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtReg);
- return Virt2StackSlotMap[virtReg.id()] = createSpillSlot(RC);
+ return Virt2StackSlotMap[virtReg] = createSpillSlot(RC);
}
void VirtRegMap::assignVirt2StackSlot(Register virtReg, int SS) {
assert(virtReg.isVirtual());
- assert(Virt2StackSlotMap[virtReg.id()] == NO_STACK_SLOT &&
+ assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
"attempt to assign stack slot to already spilled register");
assert((SS >= 0 ||
(SS >= MF->getFrameInfo().getObjectIndexBegin())) &&
"illegal fixed frame index");
- Virt2StackSlotMap[virtReg.id()] = SS;
+ Virt2StackSlotMap[virtReg] = SS;
}
void VirtRegMap::print(raw_ostream &OS, const Module*) const {
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