[llvm] [llvm] Ensure that soft float targets don't emit `fma()` libcalls. (PR #106615)

Sat Sep 14 05:37:01 PDT 2024

https://github.com/alexrp updated https://github.com/llvm/llvm-project/pull/106615

>From 9d0471b377f5ecbc8dee07f5041d66d76baf54f7 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= <alex at alexrp.com>
Date: Thu, 29 Aug 2024 21:15:37 +0200
Subject: [PATCH] [llvm] Ensure that soft float targets don't emit fma()
 libcalls.

The previous behavior could be harmful in some edge cases, such as emitting a
call to fma() in the fma() implementation itself.

Do this by just being more accurate in isFMAFasterThanFMulAndFAdd(). This was
already done for PowerPC; this commit just extends that to Arm, z/Arch, and x86.
MIPS and SPARC already got it right, but I added tests for them too, for good
measure.
---
 llvm/include/llvm/CodeGen/TargetLowering.h    |    3 +
 llvm/lib/Target/ARM/ARMISelLowering.cpp       |    3 +
 .../Target/SystemZ/SystemZISelLowering.cpp    |    3 +
 llvm/lib/Target/X86/X86ISelLowering.cpp       |    3 +
 llvm/test/CodeGen/ARM/fmuladd-soft-float.ll   |  393 ++++
 llvm/test/CodeGen/Mips/fmuladd-soft-float.ll  |  912 +++++++++
 llvm/test/CodeGen/SPARC/fmuladd-soft-float.ll |  414 ++++
 .../CodeGen/SystemZ/fmuladd-soft-float.ll     |  225 +++
 llvm/test/CodeGen/X86/fmuladd-soft-float.ll   | 1662 +++++++++++++++++
 9 files changed, 3618 insertions(+)
 create mode 100644 llvm/test/CodeGen/ARM/fmuladd-soft-float.ll
 create mode 100644 llvm/test/CodeGen/Mips/fmuladd-soft-float.ll
 create mode 100644 llvm/test/CodeGen/SPARC/fmuladd-soft-float.ll
 create mode 100644 llvm/test/CodeGen/SystemZ/fmuladd-soft-float.ll
 create mode 100644 llvm/test/CodeGen/X86/fmuladd-soft-float.ll

diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index e17d68d2690c86..9753c55414af41 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -3240,6 +3240,9 @@ class TargetLoweringBase {
   /// not legal, but should return true if those types will eventually legalize
   /// to types that support FMAs. After legalization, it will only be called on
   /// types that support FMAs (via Legal or Custom actions)
+  ///
+  /// Targets that care about soft float support should return false when soft
+  /// float code is being generated (i.e. use-soft-float).
   virtual bool isFMAFasterThanFMulAndFAdd(const MachineFunction &MF,
                                           EVT) const {
     return false;
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 67653a17512d2c..04fd2258a523bc 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -19488,6 +19488,9 @@ bool ARMTargetLowering::allowTruncateForTailCall(Type *Ty1, Type *Ty2) const {
 /// patterns (and we don't have the non-fused floating point instruction).
 bool ARMTargetLowering::isFMAFasterThanFMulAndFAdd(const MachineFunction &MF,
                                                    EVT VT) const {
+  if (Subtarget->useSoftFloat())
+    return false;
+
   if (!VT.isSimple())
     return false;
 
diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
index 582a8c139b2937..6bc2c50c8cd1ee 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -786,6 +786,9 @@ EVT SystemZTargetLowering::getSetCCResultType(const DataLayout &DL,
 
 bool SystemZTargetLowering::isFMAFasterThanFMulAndFAdd(
     const MachineFunction &MF, EVT VT) const {
+  if (useSoftFloat())
+    return false;
+
   VT = VT.getScalarType();
 
   if (!VT.isSimple())
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 053b2354f6aeb6..5b77fcecb8e240 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -34737,6 +34737,9 @@ bool X86TargetLowering::isVectorLoadExtDesirable(SDValue ExtVal) const {
 
 bool X86TargetLowering::isFMAFasterThanFMulAndFAdd(const MachineFunction &MF,
                                                    EVT VT) const {
+  if (Subtarget.useSoftFloat())
+    return false;
+
   if (!Subtarget.hasAnyFMA())
     return false;
 
diff --git a/llvm/test/CodeGen/ARM/fmuladd-soft-float.ll b/llvm/test/CodeGen/ARM/fmuladd-soft-float.ll
new file mode 100644
index 00000000000000..8abfb38a7e5ca5
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/fmuladd-soft-float.ll
@@ -0,0 +1,393 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=arm --fp-contract off < %s | FileCheck %s -check-prefix=SOFT-FLOAT-FPC-OFF
+; RUN: llc -mtriple=arm --fp-contract on < %s | FileCheck %s -check-prefix=SOFT-FLOAT-FPC-ON
+; RUN: llc -mtriple=arm --fp-contract fast < %s | FileCheck %s -check-prefix=SOFT-FLOAT-FPC-FAST
+; RUN: llc -mtriple=arm -mattr=+vfp4d16sp --fp-contract off < %s | FileCheck %s -check-prefix=SOFT-FLOAT-VFP32-FPC-OFF
+; RUN: llc -mtriple=arm -mattr=+vfp4d16sp --fp-contract on < %s | FileCheck %s -check-prefix=SOFT-FLOAT-VFP32-FPC-ON
+; RUN: llc -mtriple=arm -mattr=+vfp4d16sp --fp-contract fast < %s | FileCheck %s -check-prefix=SOFT-FLOAT-VFP32-FPC-FAST
+; RUN: llc -mtriple=arm -mattr=+vfp4d16sp,+fp64 --fp-contract off < %s | FileCheck %s -check-prefix=SOFT-FLOAT-VFP64-FPC-OFF
+; RUN: llc -mtriple=arm -mattr=+vfp4d16sp,+fp64 --fp-contract on < %s | FileCheck %s -check-prefix=SOFT-FLOAT-VFP64-FPC-ON
+; RUN: llc -mtriple=arm -mattr=+vfp4d16sp,+fp64 --fp-contract fast < %s | FileCheck %s -check-prefix=SOFT-FLOAT-VFP64-FPC-FAST
+
+define float @fmuladd_intrinsic_f32(float %a, float %b, float %c) #0 {
+; SOFT-FLOAT-FPC-OFF-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-FPC-OFF:       @ %bb.0:
+; SOFT-FLOAT-FPC-OFF-NEXT:    push {r4, lr}
+; SOFT-FLOAT-FPC-OFF-NEXT:    mov r4, r2
+; SOFT-FLOAT-FPC-OFF-NEXT:    bl __mulsf3
+; SOFT-FLOAT-FPC-OFF-NEXT:    mov r1, r4
+; SOFT-FLOAT-FPC-OFF-NEXT:    bl __addsf3
+; SOFT-FLOAT-FPC-OFF-NEXT:    pop {r4, lr}
+; SOFT-FLOAT-FPC-OFF-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-FPC-ON-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-FPC-ON:       @ %bb.0:
+; SOFT-FLOAT-FPC-ON-NEXT:    push {r4, lr}
+; SOFT-FLOAT-FPC-ON-NEXT:    mov r4, r2
+; SOFT-FLOAT-FPC-ON-NEXT:    bl __mulsf3
+; SOFT-FLOAT-FPC-ON-NEXT:    mov r1, r4
+; SOFT-FLOAT-FPC-ON-NEXT:    bl __addsf3
+; SOFT-FLOAT-FPC-ON-NEXT:    pop {r4, lr}
+; SOFT-FLOAT-FPC-ON-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-FPC-FAST-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-FPC-FAST:       @ %bb.0:
+; SOFT-FLOAT-FPC-FAST-NEXT:    push {r4, lr}
+; SOFT-FLOAT-FPC-FAST-NEXT:    mov r4, r2
+; SOFT-FLOAT-FPC-FAST-NEXT:    bl __mulsf3
+; SOFT-FLOAT-FPC-FAST-NEXT:    mov r1, r4
+; SOFT-FLOAT-FPC-FAST-NEXT:    bl __addsf3
+; SOFT-FLOAT-FPC-FAST-NEXT:    pop {r4, lr}
+; SOFT-FLOAT-FPC-FAST-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-VFP32-FPC-OFF-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-VFP32-FPC-OFF:       @ %bb.0:
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    push {r4, lr}
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    mov r4, r2
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    bl __mulsf3
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    mov r1, r4
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    bl __addsf3
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    pop {r4, lr}
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-VFP32-FPC-ON-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-VFP32-FPC-ON:       @ %bb.0:
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    push {r4, lr}
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    mov r4, r2
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    bl __mulsf3
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    mov r1, r4
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    bl __addsf3
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    pop {r4, lr}
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-VFP32-FPC-FAST-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-VFP32-FPC-FAST:       @ %bb.0:
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    push {r4, lr}
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    mov r4, r2
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    bl __mulsf3
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    mov r1, r4
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    bl __addsf3
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    pop {r4, lr}
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-VFP64-FPC-OFF-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-VFP64-FPC-OFF:       @ %bb.0:
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    push {r4, lr}
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    mov r4, r2
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    bl __mulsf3
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    mov r1, r4
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    bl __addsf3
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    pop {r4, lr}
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-VFP64-FPC-ON-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-VFP64-FPC-ON:       @ %bb.0:
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    push {r4, lr}
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    mov r4, r2
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    bl __mulsf3
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    mov r1, r4
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    bl __addsf3
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    pop {r4, lr}
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-VFP64-FPC-FAST-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-VFP64-FPC-FAST:       @ %bb.0:
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    push {r4, lr}
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    mov r4, r2
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    bl __mulsf3
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    mov r1, r4
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    bl __addsf3
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    pop {r4, lr}
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    mov pc, lr
+    %result = call float @llvm.fmuladd.f32(float %a, float %b, float %c)
+    ret float %result
+}
+
+define double @fmuladd_intrinsic_f64(double %a, double %b, double %c) #0 {
+; SOFT-FLOAT-FPC-OFF-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-FPC-OFF:       @ %bb.0:
+; SOFT-FLOAT-FPC-OFF-NEXT:    push {r11, lr}
+; SOFT-FLOAT-FPC-OFF-NEXT:    bl __muldf3
+; SOFT-FLOAT-FPC-OFF-NEXT:    ldr r2, [sp, #8]
+; SOFT-FLOAT-FPC-OFF-NEXT:    ldr r3, [sp, #12]
+; SOFT-FLOAT-FPC-OFF-NEXT:    bl __adddf3
+; SOFT-FLOAT-FPC-OFF-NEXT:    pop {r11, lr}
+; SOFT-FLOAT-FPC-OFF-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-FPC-ON-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-FPC-ON:       @ %bb.0:
+; SOFT-FLOAT-FPC-ON-NEXT:    push {r11, lr}
+; SOFT-FLOAT-FPC-ON-NEXT:    bl __muldf3
+; SOFT-FLOAT-FPC-ON-NEXT:    ldr r2, [sp, #8]
+; SOFT-FLOAT-FPC-ON-NEXT:    ldr r3, [sp, #12]
+; SOFT-FLOAT-FPC-ON-NEXT:    bl __adddf3
+; SOFT-FLOAT-FPC-ON-NEXT:    pop {r11, lr}
+; SOFT-FLOAT-FPC-ON-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-FPC-FAST-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-FPC-FAST:       @ %bb.0:
+; SOFT-FLOAT-FPC-FAST-NEXT:    push {r11, lr}
+; SOFT-FLOAT-FPC-FAST-NEXT:    bl __muldf3
+; SOFT-FLOAT-FPC-FAST-NEXT:    ldr r2, [sp, #8]
+; SOFT-FLOAT-FPC-FAST-NEXT:    ldr r3, [sp, #12]
+; SOFT-FLOAT-FPC-FAST-NEXT:    bl __adddf3
+; SOFT-FLOAT-FPC-FAST-NEXT:    pop {r11, lr}
+; SOFT-FLOAT-FPC-FAST-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-VFP32-FPC-OFF-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-VFP32-FPC-OFF:       @ %bb.0:
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    push {r11, lr}
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    bl __muldf3
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    ldr r2, [sp, #8]
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    ldr r3, [sp, #12]
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    bl __adddf3
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    pop {r11, lr}
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-VFP32-FPC-ON-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-VFP32-FPC-ON:       @ %bb.0:
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    push {r11, lr}
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    bl __muldf3
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    ldr r2, [sp, #8]
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    ldr r3, [sp, #12]
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    bl __adddf3
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    pop {r11, lr}
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-VFP32-FPC-FAST-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-VFP32-FPC-FAST:       @ %bb.0:
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    push {r11, lr}
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    bl __muldf3
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    ldr r2, [sp, #8]
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    ldr r3, [sp, #12]
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    bl __adddf3
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    pop {r11, lr}
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-VFP64-FPC-OFF-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-VFP64-FPC-OFF:       @ %bb.0:
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    push {r11, lr}
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    bl __muldf3
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    ldr r2, [sp, #8]
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    ldr r3, [sp, #12]
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    bl __adddf3
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    pop {r11, lr}
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-VFP64-FPC-ON-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-VFP64-FPC-ON:       @ %bb.0:
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    push {r11, lr}
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    bl __muldf3
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    ldr r2, [sp, #8]
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    ldr r3, [sp, #12]
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    bl __adddf3
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    pop {r11, lr}
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-VFP64-FPC-FAST-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-VFP64-FPC-FAST:       @ %bb.0:
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    push {r11, lr}
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    bl __muldf3
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    ldr r2, [sp, #8]
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    ldr r3, [sp, #12]
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    bl __adddf3
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    pop {r11, lr}
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    mov pc, lr
+    %result = call double @llvm.fmuladd.f64(double %a, double %b, double %c)
+    ret double %result
+}
+
+define float @fmuladd_contract_f32(float %a, float %b, float %c) #0 {
+; SOFT-FLOAT-FPC-OFF-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-FPC-OFF:       @ %bb.0:
+; SOFT-FLOAT-FPC-OFF-NEXT:    push {r4, lr}
+; SOFT-FLOAT-FPC-OFF-NEXT:    mov r4, r2
+; SOFT-FLOAT-FPC-OFF-NEXT:    bl __mulsf3
+; SOFT-FLOAT-FPC-OFF-NEXT:    mov r1, r4
+; SOFT-FLOAT-FPC-OFF-NEXT:    bl __addsf3
+; SOFT-FLOAT-FPC-OFF-NEXT:    pop {r4, lr}
+; SOFT-FLOAT-FPC-OFF-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-FPC-ON-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-FPC-ON:       @ %bb.0:
+; SOFT-FLOAT-FPC-ON-NEXT:    push {r4, lr}
+; SOFT-FLOAT-FPC-ON-NEXT:    mov r4, r2
+; SOFT-FLOAT-FPC-ON-NEXT:    bl __mulsf3
+; SOFT-FLOAT-FPC-ON-NEXT:    mov r1, r4
+; SOFT-FLOAT-FPC-ON-NEXT:    bl __addsf3
+; SOFT-FLOAT-FPC-ON-NEXT:    pop {r4, lr}
+; SOFT-FLOAT-FPC-ON-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-FPC-FAST-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-FPC-FAST:       @ %bb.0:
+; SOFT-FLOAT-FPC-FAST-NEXT:    push {r4, lr}
+; SOFT-FLOAT-FPC-FAST-NEXT:    mov r4, r2
+; SOFT-FLOAT-FPC-FAST-NEXT:    bl __mulsf3
+; SOFT-FLOAT-FPC-FAST-NEXT:    mov r1, r4
+; SOFT-FLOAT-FPC-FAST-NEXT:    bl __addsf3
+; SOFT-FLOAT-FPC-FAST-NEXT:    pop {r4, lr}
+; SOFT-FLOAT-FPC-FAST-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-VFP32-FPC-OFF-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-VFP32-FPC-OFF:       @ %bb.0:
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    push {r4, lr}
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    mov r4, r2
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    bl __mulsf3
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    mov r1, r4
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    bl __addsf3
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    pop {r4, lr}
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-VFP32-FPC-ON-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-VFP32-FPC-ON:       @ %bb.0:
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    push {r4, lr}
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    mov r4, r2
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    bl __mulsf3
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    mov r1, r4
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    bl __addsf3
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    pop {r4, lr}
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-VFP32-FPC-FAST-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-VFP32-FPC-FAST:       @ %bb.0:
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    push {r4, lr}
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    mov r4, r2
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    bl __mulsf3
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    mov r1, r4
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    bl __addsf3
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    pop {r4, lr}
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-VFP64-FPC-OFF-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-VFP64-FPC-OFF:       @ %bb.0:
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    push {r4, lr}
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    mov r4, r2
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    bl __mulsf3
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    mov r1, r4
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    bl __addsf3
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    pop {r4, lr}
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-VFP64-FPC-ON-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-VFP64-FPC-ON:       @ %bb.0:
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    push {r4, lr}
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    mov r4, r2
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    bl __mulsf3
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    mov r1, r4
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    bl __addsf3
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    pop {r4, lr}
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-VFP64-FPC-FAST-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-VFP64-FPC-FAST:       @ %bb.0:
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    push {r4, lr}
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    mov r4, r2
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    bl __mulsf3
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    mov r1, r4
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    bl __addsf3
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    pop {r4, lr}
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    mov pc, lr
+    %product = fmul float %a, %b
+    %result = fadd float %product, %c
+    ret float %result
+}
+
+define double @fmuladd_contract_f64(double %a, double %b, double %c) #0 {
+; SOFT-FLOAT-FPC-OFF-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-FPC-OFF:       @ %bb.0:
+; SOFT-FLOAT-FPC-OFF-NEXT:    push {r11, lr}
+; SOFT-FLOAT-FPC-OFF-NEXT:    bl __muldf3
+; SOFT-FLOAT-FPC-OFF-NEXT:    ldr r2, [sp, #8]
+; SOFT-FLOAT-FPC-OFF-NEXT:    ldr r3, [sp, #12]
+; SOFT-FLOAT-FPC-OFF-NEXT:    bl __adddf3
+; SOFT-FLOAT-FPC-OFF-NEXT:    pop {r11, lr}
+; SOFT-FLOAT-FPC-OFF-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-FPC-ON-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-FPC-ON:       @ %bb.0:
+; SOFT-FLOAT-FPC-ON-NEXT:    push {r11, lr}
+; SOFT-FLOAT-FPC-ON-NEXT:    bl __muldf3
+; SOFT-FLOAT-FPC-ON-NEXT:    ldr r2, [sp, #8]
+; SOFT-FLOAT-FPC-ON-NEXT:    ldr r3, [sp, #12]
+; SOFT-FLOAT-FPC-ON-NEXT:    bl __adddf3
+; SOFT-FLOAT-FPC-ON-NEXT:    pop {r11, lr}
+; SOFT-FLOAT-FPC-ON-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-FPC-FAST-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-FPC-FAST:       @ %bb.0:
+; SOFT-FLOAT-FPC-FAST-NEXT:    push {r11, lr}
+; SOFT-FLOAT-FPC-FAST-NEXT:    bl __muldf3
+; SOFT-FLOAT-FPC-FAST-NEXT:    ldr r2, [sp, #8]
+; SOFT-FLOAT-FPC-FAST-NEXT:    ldr r3, [sp, #12]
+; SOFT-FLOAT-FPC-FAST-NEXT:    bl __adddf3
+; SOFT-FLOAT-FPC-FAST-NEXT:    pop {r11, lr}
+; SOFT-FLOAT-FPC-FAST-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-VFP32-FPC-OFF-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-VFP32-FPC-OFF:       @ %bb.0:
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    push {r11, lr}
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    bl __muldf3
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    ldr r2, [sp, #8]
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    ldr r3, [sp, #12]
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    bl __adddf3
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    pop {r11, lr}
+; SOFT-FLOAT-VFP32-FPC-OFF-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-VFP32-FPC-ON-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-VFP32-FPC-ON:       @ %bb.0:
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    push {r11, lr}
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    bl __muldf3
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    ldr r2, [sp, #8]
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    ldr r3, [sp, #12]
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    bl __adddf3
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    pop {r11, lr}
+; SOFT-FLOAT-VFP32-FPC-ON-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-VFP32-FPC-FAST-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-VFP32-FPC-FAST:       @ %bb.0:
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    push {r11, lr}
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    bl __muldf3
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    ldr r2, [sp, #8]
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    ldr r3, [sp, #12]
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    bl __adddf3
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    pop {r11, lr}
+; SOFT-FLOAT-VFP32-FPC-FAST-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-VFP64-FPC-OFF-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-VFP64-FPC-OFF:       @ %bb.0:
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    push {r11, lr}
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    bl __muldf3
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    ldr r2, [sp, #8]
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    ldr r3, [sp, #12]
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    bl __adddf3
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    pop {r11, lr}
+; SOFT-FLOAT-VFP64-FPC-OFF-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-VFP64-FPC-ON-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-VFP64-FPC-ON:       @ %bb.0:
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    push {r11, lr}
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    bl __muldf3
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    ldr r2, [sp, #8]
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    ldr r3, [sp, #12]
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    bl __adddf3
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    pop {r11, lr}
+; SOFT-FLOAT-VFP64-FPC-ON-NEXT:    mov pc, lr
+;
+; SOFT-FLOAT-VFP64-FPC-FAST-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-VFP64-FPC-FAST:       @ %bb.0:
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    push {r11, lr}
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    bl __muldf3
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    ldr r2, [sp, #8]
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    ldr r3, [sp, #12]
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    bl __adddf3
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    pop {r11, lr}
+; SOFT-FLOAT-VFP64-FPC-FAST-NEXT:    mov pc, lr
+    %product = fmul double %a, %b
+    %result = fadd double %product, %c
+    ret double %result
+}
+
+attributes #0 = { "use-soft-float"="true" }
+
+declare float @llvm.fmuladd.f32(float %a, float %b, float %c)
+declare double @llvm.fmuladd.f64(double %a, double %b, double %c)
diff --git a/llvm/test/CodeGen/Mips/fmuladd-soft-float.ll b/llvm/test/CodeGen/Mips/fmuladd-soft-float.ll
new file mode 100644
index 00000000000000..f6713283f9f954
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/fmuladd-soft-float.ll
@@ -0,0 +1,912 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=mips --fp-contract off < %s | FileCheck %s -check-prefix=SOFT-FLOAT-32-FPC-OFF
+; RUN: llc -mtriple=mips --fp-contract on < %s | FileCheck %s -check-prefix=SOFT-FLOAT-32-FPC-ON
+; RUN: llc -mtriple=mips --fp-contract fast < %s | FileCheck %s -check-prefix=SOFT-FLOAT-32-FPC-FAST
+; RUN: llc -mtriple=mips -mcpu mips32r2 --fp-contract off < %s | FileCheck %s -check-prefix=SOFT-FLOAT-32R2-FPC-OFF
+; RUN: llc -mtriple=mips -mcpu mips32r2 --fp-contract on < %s | FileCheck %s -check-prefix=SOFT-FLOAT-32R2-FPC-ON
+; RUN: llc -mtriple=mips -mcpu mips32r2 --fp-contract fast < %s | FileCheck %s -check-prefix=SOFT-FLOAT-32R2-FPC-FAST
+; RUN: llc -mtriple=mips64 --fp-contract off < %s | FileCheck %s -check-prefix=SOFT-FLOAT-64-FPC-OFF
+; RUN: llc -mtriple=mips64 --fp-contract on < %s | FileCheck %s -check-prefix=SOFT-FLOAT-64-FPC-ON
+; RUN: llc -mtriple=mips64 --fp-contract fast < %s | FileCheck %s -check-prefix=SOFT-FLOAT-64-FPC-FAST
+; RUN: llc -mtriple=mips64 -mcpu mips64r2 --fp-contract off < %s | FileCheck %s -check-prefix=SOFT-FLOAT-64R2-FPC-OFF
+; RUN: llc -mtriple=mips64 -mcpu mips64r2 --fp-contract on < %s | FileCheck %s -check-prefix=SOFT-FLOAT-64R2-FPC-ON
+; RUN: llc -mtriple=mips64 -mcpu mips64r2 --fp-contract fast < %s | FileCheck %s -check-prefix=SOFT-FLOAT-64R2-FPC-FAST
+
+define float @fmuladd_intrinsic_f32(float %a, float %b, float %c) #0 {
+; SOFT-FLOAT-32-FPC-OFF-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-32-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    addiu $sp, $sp, -24
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_def_cfa_offset 24
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    sw $16, 16($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_offset 31, -4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_offset 16, -8
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    jal __mulsf3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    move $16, $6
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    move $4, $2
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    jal __addsf3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    move $5, $16
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    lw $16, 16($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    jr $ra
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    addiu $sp, $sp, 24
+;
+; SOFT-FLOAT-32-FPC-ON-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-32-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-32-FPC-ON-NEXT:    addiu $sp, $sp, -24
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_def_cfa_offset 24
+; SOFT-FLOAT-32-FPC-ON-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32-FPC-ON-NEXT:    sw $16, 16($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_offset 31, -4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_offset 16, -8
+; SOFT-FLOAT-32-FPC-ON-NEXT:    jal __mulsf3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    move $16, $6
+; SOFT-FLOAT-32-FPC-ON-NEXT:    move $4, $2
+; SOFT-FLOAT-32-FPC-ON-NEXT:    jal __addsf3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    move $5, $16
+; SOFT-FLOAT-32-FPC-ON-NEXT:    lw $16, 16($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32-FPC-ON-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32-FPC-ON-NEXT:    jr $ra
+; SOFT-FLOAT-32-FPC-ON-NEXT:    addiu $sp, $sp, 24
+;
+; SOFT-FLOAT-32-FPC-FAST-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-32-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    addiu $sp, $sp, -24
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_def_cfa_offset 24
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    sw $16, 16($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_offset 31, -4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_offset 16, -8
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    jal __mulsf3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    move $16, $6
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    move $4, $2
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    jal __addsf3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    move $5, $16
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    lw $16, 16($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    jr $ra
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    addiu $sp, $sp, 24
+;
+; SOFT-FLOAT-32R2-FPC-OFF-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-32R2-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    addiu $sp, $sp, -24
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    .cfi_def_cfa_offset 24
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    sw $16, 16($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    .cfi_offset 31, -4
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    .cfi_offset 16, -8
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    jal __mulsf3
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    move $16, $6
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    move $4, $2
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    jal __addsf3
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    move $5, $16
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    lw $16, 16($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    jr $ra
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    addiu $sp, $sp, 24
+;
+; SOFT-FLOAT-32R2-FPC-ON-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-32R2-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    addiu $sp, $sp, -24
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    .cfi_def_cfa_offset 24
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    sw $16, 16($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    .cfi_offset 31, -4
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    .cfi_offset 16, -8
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    jal __mulsf3
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    move $16, $6
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    move $4, $2
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    jal __addsf3
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    move $5, $16
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    lw $16, 16($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    jr $ra
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    addiu $sp, $sp, 24
+;
+; SOFT-FLOAT-32R2-FPC-FAST-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-32R2-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    addiu $sp, $sp, -24
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    .cfi_def_cfa_offset 24
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    sw $16, 16($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    .cfi_offset 31, -4
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    .cfi_offset 16, -8
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    jal __mulsf3
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    move $16, $6
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    move $4, $2
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    jal __addsf3
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    move $5, $16
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    lw $16, 16($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    jr $ra
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    addiu $sp, $sp, 24
+;
+; SOFT-FLOAT-64-FPC-OFF-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-64-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    daddiu $sp, $sp, -16
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    sd $16, 0($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_offset 31, -8
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_offset 16, -16
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    move $16, $6
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    sll $4, $4, 0
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    jal __mulsf3
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    sll $5, $5, 0
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    sll $4, $2, 0
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    jal __addsf3
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    sll $5, $16, 0
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    ld $16, 0($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    jr $ra
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    daddiu $sp, $sp, 16
+;
+; SOFT-FLOAT-64-FPC-ON-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-64-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-64-FPC-ON-NEXT:    daddiu $sp, $sp, -16
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FPC-ON-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-FPC-ON-NEXT:    sd $16, 0($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_offset 31, -8
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_offset 16, -16
+; SOFT-FLOAT-64-FPC-ON-NEXT:    move $16, $6
+; SOFT-FLOAT-64-FPC-ON-NEXT:    sll $4, $4, 0
+; SOFT-FLOAT-64-FPC-ON-NEXT:    jal __mulsf3
+; SOFT-FLOAT-64-FPC-ON-NEXT:    sll $5, $5, 0
+; SOFT-FLOAT-64-FPC-ON-NEXT:    sll $4, $2, 0
+; SOFT-FLOAT-64-FPC-ON-NEXT:    jal __addsf3
+; SOFT-FLOAT-64-FPC-ON-NEXT:    sll $5, $16, 0
+; SOFT-FLOAT-64-FPC-ON-NEXT:    ld $16, 0($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-FPC-ON-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-FPC-ON-NEXT:    jr $ra
+; SOFT-FLOAT-64-FPC-ON-NEXT:    daddiu $sp, $sp, 16
+;
+; SOFT-FLOAT-64-FPC-FAST-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-64-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    daddiu $sp, $sp, -16
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    sd $16, 0($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_offset 31, -8
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_offset 16, -16
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    move $16, $6
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    sll $4, $4, 0
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    jal __mulsf3
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    sll $5, $5, 0
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    sll $4, $2, 0
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    jal __addsf3
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    sll $5, $16, 0
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    ld $16, 0($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    jr $ra
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    daddiu $sp, $sp, 16
+;
+; SOFT-FLOAT-64R2-FPC-OFF-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-64R2-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    daddiu $sp, $sp, -16
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    sd $16, 0($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    .cfi_offset 31, -8
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    .cfi_offset 16, -16
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    move $16, $6
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    sll $4, $4, 0
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    jal __mulsf3
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    sll $5, $5, 0
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    sll $4, $2, 0
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    jal __addsf3
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    sll $5, $16, 0
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    ld $16, 0($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    jr $ra
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    daddiu $sp, $sp, 16
+;
+; SOFT-FLOAT-64R2-FPC-ON-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-64R2-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    daddiu $sp, $sp, -16
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    sd $16, 0($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    .cfi_offset 31, -8
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    .cfi_offset 16, -16
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    move $16, $6
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    sll $4, $4, 0
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    jal __mulsf3
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    sll $5, $5, 0
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    sll $4, $2, 0
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    jal __addsf3
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    sll $5, $16, 0
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    ld $16, 0($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    jr $ra
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    daddiu $sp, $sp, 16
+;
+; SOFT-FLOAT-64R2-FPC-FAST-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-64R2-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    daddiu $sp, $sp, -16
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    sd $16, 0($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    .cfi_offset 31, -8
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    .cfi_offset 16, -16
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    move $16, $6
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    sll $4, $4, 0
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    jal __mulsf3
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    sll $5, $5, 0
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    sll $4, $2, 0
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    jal __addsf3
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    sll $5, $16, 0
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    ld $16, 0($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    jr $ra
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    daddiu $sp, $sp, 16
+    %result = call float @llvm.fmuladd.f32(float %a, float %b, float %c)
+    ret float %result
+}
+
+define double @fmuladd_intrinsic_f64(double %a, double %b, double %c) #0 {
+; SOFT-FLOAT-32-FPC-OFF-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-32-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    addiu $sp, $sp, -24
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_def_cfa_offset 24
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_offset 31, -4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    jal __muldf3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    nop
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    move $4, $2
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    lw $6, 40($sp)
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    lw $7, 44($sp)
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    jal __adddf3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    move $5, $3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    jr $ra
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    addiu $sp, $sp, 24
+;
+; SOFT-FLOAT-32-FPC-ON-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-32-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-32-FPC-ON-NEXT:    addiu $sp, $sp, -24
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_def_cfa_offset 24
+; SOFT-FLOAT-32-FPC-ON-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_offset 31, -4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    jal __muldf3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    nop
+; SOFT-FLOAT-32-FPC-ON-NEXT:    move $4, $2
+; SOFT-FLOAT-32-FPC-ON-NEXT:    lw $6, 40($sp)
+; SOFT-FLOAT-32-FPC-ON-NEXT:    lw $7, 44($sp)
+; SOFT-FLOAT-32-FPC-ON-NEXT:    jal __adddf3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    move $5, $3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32-FPC-ON-NEXT:    jr $ra
+; SOFT-FLOAT-32-FPC-ON-NEXT:    addiu $sp, $sp, 24
+;
+; SOFT-FLOAT-32-FPC-FAST-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-32-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    addiu $sp, $sp, -24
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_def_cfa_offset 24
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_offset 31, -4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    jal __muldf3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    nop
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    move $4, $2
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    lw $6, 40($sp)
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    lw $7, 44($sp)
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    jal __adddf3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    move $5, $3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    jr $ra
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    addiu $sp, $sp, 24
+;
+; SOFT-FLOAT-32R2-FPC-OFF-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-32R2-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    addiu $sp, $sp, -24
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    .cfi_def_cfa_offset 24
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    .cfi_offset 31, -4
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    jal __muldf3
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    nop
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    move $4, $2
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    lw $6, 40($sp)
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    lw $7, 44($sp)
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    jal __adddf3
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    move $5, $3
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    jr $ra
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    addiu $sp, $sp, 24
+;
+; SOFT-FLOAT-32R2-FPC-ON-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-32R2-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    addiu $sp, $sp, -24
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    .cfi_def_cfa_offset 24
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    .cfi_offset 31, -4
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    jal __muldf3
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    nop
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    move $4, $2
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    lw $6, 40($sp)
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    lw $7, 44($sp)
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    jal __adddf3
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    move $5, $3
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    jr $ra
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    addiu $sp, $sp, 24
+;
+; SOFT-FLOAT-32R2-FPC-FAST-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-32R2-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    addiu $sp, $sp, -24
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    .cfi_def_cfa_offset 24
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    .cfi_offset 31, -4
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    jal __muldf3
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    nop
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    move $4, $2
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    lw $6, 40($sp)
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    lw $7, 44($sp)
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    jal __adddf3
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    move $5, $3
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    jr $ra
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    addiu $sp, $sp, 24
+;
+; SOFT-FLOAT-64-FPC-OFF-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-64-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    daddiu $sp, $sp, -16
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    sd $16, 0($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_offset 31, -8
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_offset 16, -16
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    jal __muldf3
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    move $16, $6
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    move $4, $2
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    jal __adddf3
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    move $5, $16
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    ld $16, 0($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    jr $ra
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    daddiu $sp, $sp, 16
+;
+; SOFT-FLOAT-64-FPC-ON-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-64-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-64-FPC-ON-NEXT:    daddiu $sp, $sp, -16
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FPC-ON-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-FPC-ON-NEXT:    sd $16, 0($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_offset 31, -8
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_offset 16, -16
+; SOFT-FLOAT-64-FPC-ON-NEXT:    jal __muldf3
+; SOFT-FLOAT-64-FPC-ON-NEXT:    move $16, $6
+; SOFT-FLOAT-64-FPC-ON-NEXT:    move $4, $2
+; SOFT-FLOAT-64-FPC-ON-NEXT:    jal __adddf3
+; SOFT-FLOAT-64-FPC-ON-NEXT:    move $5, $16
+; SOFT-FLOAT-64-FPC-ON-NEXT:    ld $16, 0($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-FPC-ON-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-FPC-ON-NEXT:    jr $ra
+; SOFT-FLOAT-64-FPC-ON-NEXT:    daddiu $sp, $sp, 16
+;
+; SOFT-FLOAT-64-FPC-FAST-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-64-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    daddiu $sp, $sp, -16
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    sd $16, 0($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_offset 31, -8
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_offset 16, -16
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    jal __muldf3
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    move $16, $6
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    move $4, $2
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    jal __adddf3
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    move $5, $16
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    ld $16, 0($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    jr $ra
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    daddiu $sp, $sp, 16
+;
+; SOFT-FLOAT-64R2-FPC-OFF-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-64R2-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    daddiu $sp, $sp, -16
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    sd $16, 0($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    .cfi_offset 31, -8
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    .cfi_offset 16, -16
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    jal __muldf3
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    move $16, $6
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    move $4, $2
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    jal __adddf3
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    move $5, $16
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    ld $16, 0($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    jr $ra
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    daddiu $sp, $sp, 16
+;
+; SOFT-FLOAT-64R2-FPC-ON-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-64R2-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    daddiu $sp, $sp, -16
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    sd $16, 0($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    .cfi_offset 31, -8
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    .cfi_offset 16, -16
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    jal __muldf3
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    move $16, $6
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    move $4, $2
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    jal __adddf3
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    move $5, $16
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    ld $16, 0($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    jr $ra
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    daddiu $sp, $sp, 16
+;
+; SOFT-FLOAT-64R2-FPC-FAST-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-64R2-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    daddiu $sp, $sp, -16
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    sd $16, 0($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    .cfi_offset 31, -8
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    .cfi_offset 16, -16
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    jal __muldf3
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    move $16, $6
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    move $4, $2
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    jal __adddf3
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    move $5, $16
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    ld $16, 0($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    jr $ra
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    daddiu $sp, $sp, 16
+    %result = call double @llvm.fmuladd.f64(double %a, double %b, double %c)
+    ret double %result
+}
+
+define float @fmuladd_contract_f32(float %a, float %b, float %c) #0 {
+; SOFT-FLOAT-32-FPC-OFF-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-32-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    addiu $sp, $sp, -24
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_def_cfa_offset 24
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    sw $16, 16($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_offset 31, -4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_offset 16, -8
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    jal __mulsf3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    move $16, $6
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    move $4, $2
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    jal __addsf3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    move $5, $16
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    lw $16, 16($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    jr $ra
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    addiu $sp, $sp, 24
+;
+; SOFT-FLOAT-32-FPC-ON-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-32-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-32-FPC-ON-NEXT:    addiu $sp, $sp, -24
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_def_cfa_offset 24
+; SOFT-FLOAT-32-FPC-ON-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32-FPC-ON-NEXT:    sw $16, 16($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_offset 31, -4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_offset 16, -8
+; SOFT-FLOAT-32-FPC-ON-NEXT:    jal __mulsf3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    move $16, $6
+; SOFT-FLOAT-32-FPC-ON-NEXT:    move $4, $2
+; SOFT-FLOAT-32-FPC-ON-NEXT:    jal __addsf3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    move $5, $16
+; SOFT-FLOAT-32-FPC-ON-NEXT:    lw $16, 16($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32-FPC-ON-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32-FPC-ON-NEXT:    jr $ra
+; SOFT-FLOAT-32-FPC-ON-NEXT:    addiu $sp, $sp, 24
+;
+; SOFT-FLOAT-32-FPC-FAST-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-32-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    addiu $sp, $sp, -24
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_def_cfa_offset 24
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    sw $16, 16($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_offset 31, -4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_offset 16, -8
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    jal __mulsf3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    move $16, $6
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    move $4, $2
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    jal __addsf3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    move $5, $16
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    lw $16, 16($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    jr $ra
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    addiu $sp, $sp, 24
+;
+; SOFT-FLOAT-32R2-FPC-OFF-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-32R2-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    addiu $sp, $sp, -24
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    .cfi_def_cfa_offset 24
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    sw $16, 16($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    .cfi_offset 31, -4
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    .cfi_offset 16, -8
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    jal __mulsf3
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    move $16, $6
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    move $4, $2
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    jal __addsf3
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    move $5, $16
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    lw $16, 16($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    jr $ra
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    addiu $sp, $sp, 24
+;
+; SOFT-FLOAT-32R2-FPC-ON-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-32R2-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    addiu $sp, $sp, -24
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    .cfi_def_cfa_offset 24
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    sw $16, 16($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    .cfi_offset 31, -4
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    .cfi_offset 16, -8
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    jal __mulsf3
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    move $16, $6
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    move $4, $2
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    jal __addsf3
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    move $5, $16
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    lw $16, 16($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    jr $ra
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    addiu $sp, $sp, 24
+;
+; SOFT-FLOAT-32R2-FPC-FAST-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-32R2-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    addiu $sp, $sp, -24
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    .cfi_def_cfa_offset 24
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    sw $16, 16($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    .cfi_offset 31, -4
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    .cfi_offset 16, -8
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    jal __mulsf3
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    move $16, $6
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    move $4, $2
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    jal __addsf3
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    move $5, $16
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    lw $16, 16($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    jr $ra
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    addiu $sp, $sp, 24
+;
+; SOFT-FLOAT-64-FPC-OFF-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-64-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    daddiu $sp, $sp, -16
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    sd $16, 0($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_offset 31, -8
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_offset 16, -16
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    move $16, $6
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    sll $4, $4, 0
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    jal __mulsf3
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    sll $5, $5, 0
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    sll $4, $2, 0
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    jal __addsf3
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    sll $5, $16, 0
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    ld $16, 0($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    jr $ra
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    daddiu $sp, $sp, 16
+;
+; SOFT-FLOAT-64-FPC-ON-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-64-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-64-FPC-ON-NEXT:    daddiu $sp, $sp, -16
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FPC-ON-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-FPC-ON-NEXT:    sd $16, 0($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_offset 31, -8
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_offset 16, -16
+; SOFT-FLOAT-64-FPC-ON-NEXT:    move $16, $6
+; SOFT-FLOAT-64-FPC-ON-NEXT:    sll $4, $4, 0
+; SOFT-FLOAT-64-FPC-ON-NEXT:    jal __mulsf3
+; SOFT-FLOAT-64-FPC-ON-NEXT:    sll $5, $5, 0
+; SOFT-FLOAT-64-FPC-ON-NEXT:    sll $4, $2, 0
+; SOFT-FLOAT-64-FPC-ON-NEXT:    jal __addsf3
+; SOFT-FLOAT-64-FPC-ON-NEXT:    sll $5, $16, 0
+; SOFT-FLOAT-64-FPC-ON-NEXT:    ld $16, 0($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-FPC-ON-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-FPC-ON-NEXT:    jr $ra
+; SOFT-FLOAT-64-FPC-ON-NEXT:    daddiu $sp, $sp, 16
+;
+; SOFT-FLOAT-64-FPC-FAST-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-64-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    daddiu $sp, $sp, -16
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    sd $16, 0($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_offset 31, -8
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_offset 16, -16
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    move $16, $6
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    sll $4, $4, 0
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    jal __mulsf3
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    sll $5, $5, 0
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    sll $4, $2, 0
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    jal __addsf3
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    sll $5, $16, 0
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    ld $16, 0($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    jr $ra
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    daddiu $sp, $sp, 16
+;
+; SOFT-FLOAT-64R2-FPC-OFF-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-64R2-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    daddiu $sp, $sp, -16
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    sd $16, 0($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    .cfi_offset 31, -8
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    .cfi_offset 16, -16
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    move $16, $6
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    sll $4, $4, 0
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    jal __mulsf3
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    sll $5, $5, 0
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    sll $4, $2, 0
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    jal __addsf3
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    sll $5, $16, 0
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    ld $16, 0($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    jr $ra
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    daddiu $sp, $sp, 16
+;
+; SOFT-FLOAT-64R2-FPC-ON-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-64R2-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    daddiu $sp, $sp, -16
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    sd $16, 0($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    .cfi_offset 31, -8
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    .cfi_offset 16, -16
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    move $16, $6
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    sll $4, $4, 0
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    jal __mulsf3
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    sll $5, $5, 0
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    sll $4, $2, 0
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    jal __addsf3
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    sll $5, $16, 0
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    ld $16, 0($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    jr $ra
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    daddiu $sp, $sp, 16
+;
+; SOFT-FLOAT-64R2-FPC-FAST-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-64R2-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    daddiu $sp, $sp, -16
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    sd $16, 0($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    .cfi_offset 31, -8
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    .cfi_offset 16, -16
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    move $16, $6
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    sll $4, $4, 0
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    jal __mulsf3
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    sll $5, $5, 0
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    sll $4, $2, 0
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    jal __addsf3
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    sll $5, $16, 0
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    ld $16, 0($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    jr $ra
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    daddiu $sp, $sp, 16
+    %product = fmul float %a, %b
+    %result = fadd float %product, %c
+    ret float %result
+}
+
+define double @fmuladd_contract_f64(double %a, double %b, double %c) #0 {
+; SOFT-FLOAT-32-FPC-OFF-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-32-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    addiu $sp, $sp, -24
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_def_cfa_offset 24
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_offset 31, -4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    jal __muldf3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    nop
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    move $4, $2
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    lw $6, 40($sp)
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    lw $7, 44($sp)
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    jal __adddf3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    move $5, $3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    jr $ra
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    addiu $sp, $sp, 24
+;
+; SOFT-FLOAT-32-FPC-ON-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-32-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-32-FPC-ON-NEXT:    addiu $sp, $sp, -24
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_def_cfa_offset 24
+; SOFT-FLOAT-32-FPC-ON-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_offset 31, -4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    jal __muldf3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    nop
+; SOFT-FLOAT-32-FPC-ON-NEXT:    move $4, $2
+; SOFT-FLOAT-32-FPC-ON-NEXT:    lw $6, 40($sp)
+; SOFT-FLOAT-32-FPC-ON-NEXT:    lw $7, 44($sp)
+; SOFT-FLOAT-32-FPC-ON-NEXT:    jal __adddf3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    move $5, $3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32-FPC-ON-NEXT:    jr $ra
+; SOFT-FLOAT-32-FPC-ON-NEXT:    addiu $sp, $sp, 24
+;
+; SOFT-FLOAT-32-FPC-FAST-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-32-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    addiu $sp, $sp, -24
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_def_cfa_offset 24
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_offset 31, -4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    jal __muldf3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    nop
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    move $4, $2
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    lw $6, 40($sp)
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    lw $7, 44($sp)
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    jal __adddf3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    move $5, $3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    jr $ra
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    addiu $sp, $sp, 24
+;
+; SOFT-FLOAT-32R2-FPC-OFF-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-32R2-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    addiu $sp, $sp, -24
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    .cfi_def_cfa_offset 24
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    .cfi_offset 31, -4
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    jal __muldf3
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    nop
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    move $4, $2
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    lw $6, 40($sp)
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    lw $7, 44($sp)
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    jal __adddf3
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    move $5, $3
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    jr $ra
+; SOFT-FLOAT-32R2-FPC-OFF-NEXT:    addiu $sp, $sp, 24
+;
+; SOFT-FLOAT-32R2-FPC-ON-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-32R2-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    addiu $sp, $sp, -24
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    .cfi_def_cfa_offset 24
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    .cfi_offset 31, -4
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    jal __muldf3
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    nop
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    move $4, $2
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    lw $6, 40($sp)
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    lw $7, 44($sp)
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    jal __adddf3
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    move $5, $3
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    jr $ra
+; SOFT-FLOAT-32R2-FPC-ON-NEXT:    addiu $sp, $sp, 24
+;
+; SOFT-FLOAT-32R2-FPC-FAST-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-32R2-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    addiu $sp, $sp, -24
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    .cfi_def_cfa_offset 24
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    .cfi_offset 31, -4
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    jal __muldf3
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    nop
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    move $4, $2
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    lw $6, 40($sp)
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    lw $7, 44($sp)
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    jal __adddf3
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    move $5, $3
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    jr $ra
+; SOFT-FLOAT-32R2-FPC-FAST-NEXT:    addiu $sp, $sp, 24
+;
+; SOFT-FLOAT-64-FPC-OFF-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-64-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    daddiu $sp, $sp, -16
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    sd $16, 0($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_offset 31, -8
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_offset 16, -16
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    jal __muldf3
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    move $16, $6
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    move $4, $2
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    jal __adddf3
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    move $5, $16
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    ld $16, 0($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    jr $ra
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    daddiu $sp, $sp, 16
+;
+; SOFT-FLOAT-64-FPC-ON-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-64-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-64-FPC-ON-NEXT:    daddiu $sp, $sp, -16
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FPC-ON-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-FPC-ON-NEXT:    sd $16, 0($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_offset 31, -8
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_offset 16, -16
+; SOFT-FLOAT-64-FPC-ON-NEXT:    jal __muldf3
+; SOFT-FLOAT-64-FPC-ON-NEXT:    move $16, $6
+; SOFT-FLOAT-64-FPC-ON-NEXT:    move $4, $2
+; SOFT-FLOAT-64-FPC-ON-NEXT:    jal __adddf3
+; SOFT-FLOAT-64-FPC-ON-NEXT:    move $5, $16
+; SOFT-FLOAT-64-FPC-ON-NEXT:    ld $16, 0($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-FPC-ON-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-FPC-ON-NEXT:    jr $ra
+; SOFT-FLOAT-64-FPC-ON-NEXT:    daddiu $sp, $sp, 16
+;
+; SOFT-FLOAT-64-FPC-FAST-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-64-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    daddiu $sp, $sp, -16
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    sd $16, 0($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_offset 31, -8
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_offset 16, -16
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    jal __muldf3
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    move $16, $6
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    move $4, $2
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    jal __adddf3
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    move $5, $16
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    ld $16, 0($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    jr $ra
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    daddiu $sp, $sp, 16
+;
+; SOFT-FLOAT-64R2-FPC-OFF-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-64R2-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    daddiu $sp, $sp, -16
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    sd $16, 0($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    .cfi_offset 31, -8
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    .cfi_offset 16, -16
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    jal __muldf3
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    move $16, $6
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    move $4, $2
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    jal __adddf3
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    move $5, $16
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    ld $16, 0($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    jr $ra
+; SOFT-FLOAT-64R2-FPC-OFF-NEXT:    daddiu $sp, $sp, 16
+;
+; SOFT-FLOAT-64R2-FPC-ON-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-64R2-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    daddiu $sp, $sp, -16
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    sd $16, 0($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    .cfi_offset 31, -8
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    .cfi_offset 16, -16
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    jal __muldf3
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    move $16, $6
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    move $4, $2
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    jal __adddf3
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    move $5, $16
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    ld $16, 0($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    jr $ra
+; SOFT-FLOAT-64R2-FPC-ON-NEXT:    daddiu $sp, $sp, 16
+;
+; SOFT-FLOAT-64R2-FPC-FAST-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-64R2-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    daddiu $sp, $sp, -16
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    sd $16, 0($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    .cfi_offset 31, -8
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    .cfi_offset 16, -16
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    jal __muldf3
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    move $16, $6
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    move $4, $2
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    jal __adddf3
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    move $5, $16
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    ld $16, 0($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    jr $ra
+; SOFT-FLOAT-64R2-FPC-FAST-NEXT:    daddiu $sp, $sp, 16
+    %product = fmul double %a, %b
+    %result = fadd double %product, %c
+    ret double %result
+}
+
+attributes #0 = { "use-soft-float"="true" }
+
+declare float @llvm.fmuladd.f32(float %a, float %b, float %c)
+declare double @llvm.fmuladd.f64(double %a, double %b, double %c)
diff --git a/llvm/test/CodeGen/SPARC/fmuladd-soft-float.ll b/llvm/test/CodeGen/SPARC/fmuladd-soft-float.ll
new file mode 100644
index 00000000000000..15fac757facf9d
--- /dev/null
+++ b/llvm/test/CodeGen/SPARC/fmuladd-soft-float.ll
@@ -0,0 +1,414 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=sparc --fp-contract off < %s | FileCheck %s -check-prefix=SOFT-FLOAT-32-FPC-OFF
+; RUN: llc -mtriple=sparc --fp-contract on < %s | FileCheck %s -check-prefix=SOFT-FLOAT-32-FPC-ON
+; RUN: llc -mtriple=sparc --fp-contract fast < %s | FileCheck %s -check-prefix=SOFT-FLOAT-32-FPC-FAST
+; RUN: llc -mtriple=sparc64 --fp-contract off < %s | FileCheck %s -check-prefix=SOFT-FLOAT-64-FPC-OFF
+; RUN: llc -mtriple=sparc64 --fp-contract on < %s | FileCheck %s -check-prefix=SOFT-FLOAT-64-FPC-ON
+; RUN: llc -mtriple=sparc64 --fp-contract fast < %s | FileCheck %s -check-prefix=SOFT-FLOAT-64-FPC-FAST
+
+define float @fmuladd_intrinsic_f32(float %a, float %b, float %c) #0 {
+; SOFT-FLOAT-32-FPC-OFF-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-32-FPC-OFF:         .cfi_startproc
+; SOFT-FLOAT-32-FPC-OFF-NEXT:  ! %bb.0:
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    save %sp, -96, %sp
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_def_cfa_register %fp
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_window_save
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_register %o7, %i7
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    mov %i0, %o0
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    call __mulsf3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    mov %i1, %o1
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    call __addsf3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    mov %i2, %o1
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    ret
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    restore %g0, %o0, %o0
+;
+; SOFT-FLOAT-32-FPC-ON-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-32-FPC-ON:         .cfi_startproc
+; SOFT-FLOAT-32-FPC-ON-NEXT:  ! %bb.0:
+; SOFT-FLOAT-32-FPC-ON-NEXT:    save %sp, -96, %sp
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_def_cfa_register %fp
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_window_save
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_register %o7, %i7
+; SOFT-FLOAT-32-FPC-ON-NEXT:    mov %i0, %o0
+; SOFT-FLOAT-32-FPC-ON-NEXT:    call __mulsf3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    mov %i1, %o1
+; SOFT-FLOAT-32-FPC-ON-NEXT:    call __addsf3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    mov %i2, %o1
+; SOFT-FLOAT-32-FPC-ON-NEXT:    ret
+; SOFT-FLOAT-32-FPC-ON-NEXT:    restore %g0, %o0, %o0
+;
+; SOFT-FLOAT-32-FPC-FAST-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-32-FPC-FAST:         .cfi_startproc
+; SOFT-FLOAT-32-FPC-FAST-NEXT:  ! %bb.0:
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    save %sp, -96, %sp
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_def_cfa_register %fp
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_window_save
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_register %o7, %i7
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    mov %i0, %o0
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    call __mulsf3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    mov %i1, %o1
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    call __addsf3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    mov %i2, %o1
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    ret
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    restore %g0, %o0, %o0
+;
+; SOFT-FLOAT-64-FPC-OFF-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-64-FPC-OFF:         .cfi_startproc
+; SOFT-FLOAT-64-FPC-OFF-NEXT:  ! %bb.0:
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    save %sp, -176, %sp
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_def_cfa_register %fp
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_window_save
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_register %o7, %i7
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    srl %i0, 0, %o0
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    call __mulsf3
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    srl %i1, 0, %o1
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    call __addsf3
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    srl %i2, 0, %o1
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    ret
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    restore %g0, %o0, %o0
+;
+; SOFT-FLOAT-64-FPC-ON-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-64-FPC-ON:         .cfi_startproc
+; SOFT-FLOAT-64-FPC-ON-NEXT:  ! %bb.0:
+; SOFT-FLOAT-64-FPC-ON-NEXT:    save %sp, -176, %sp
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_def_cfa_register %fp
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_window_save
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_register %o7, %i7
+; SOFT-FLOAT-64-FPC-ON-NEXT:    srl %i0, 0, %o0
+; SOFT-FLOAT-64-FPC-ON-NEXT:    call __mulsf3
+; SOFT-FLOAT-64-FPC-ON-NEXT:    srl %i1, 0, %o1
+; SOFT-FLOAT-64-FPC-ON-NEXT:    call __addsf3
+; SOFT-FLOAT-64-FPC-ON-NEXT:    srl %i2, 0, %o1
+; SOFT-FLOAT-64-FPC-ON-NEXT:    ret
+; SOFT-FLOAT-64-FPC-ON-NEXT:    restore %g0, %o0, %o0
+;
+; SOFT-FLOAT-64-FPC-FAST-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-64-FPC-FAST:         .cfi_startproc
+; SOFT-FLOAT-64-FPC-FAST-NEXT:  ! %bb.0:
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    save %sp, -176, %sp
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_def_cfa_register %fp
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_window_save
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_register %o7, %i7
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    srl %i0, 0, %o0
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    call __mulsf3
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    srl %i1, 0, %o1
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    call __addsf3
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    srl %i2, 0, %o1
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    ret
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    restore %g0, %o0, %o0
+    %result = call float @llvm.fmuladd.f32(float %a, float %b, float %c)
+    ret float %result
+}
+
+define double @fmuladd_intrinsic_f64(double %a, double %b, double %c) #0 {
+; SOFT-FLOAT-32-FPC-OFF-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-32-FPC-OFF:         .cfi_startproc
+; SOFT-FLOAT-32-FPC-OFF-NEXT:  ! %bb.0:
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    save %sp, -96, %sp
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_def_cfa_register %fp
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_window_save
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_register %o7, %i7
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    mov %i0, %o0
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    mov %i1, %o1
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    mov %i2, %o2
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    call __muldf3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    mov %i3, %o3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    mov %i4, %o2
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    call __adddf3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    mov %i5, %o3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    mov %o0, %i0
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    ret
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    restore %g0, %o1, %o1
+;
+; SOFT-FLOAT-32-FPC-ON-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-32-FPC-ON:         .cfi_startproc
+; SOFT-FLOAT-32-FPC-ON-NEXT:  ! %bb.0:
+; SOFT-FLOAT-32-FPC-ON-NEXT:    save %sp, -96, %sp
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_def_cfa_register %fp
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_window_save
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_register %o7, %i7
+; SOFT-FLOAT-32-FPC-ON-NEXT:    mov %i0, %o0
+; SOFT-FLOAT-32-FPC-ON-NEXT:    mov %i1, %o1
+; SOFT-FLOAT-32-FPC-ON-NEXT:    mov %i2, %o2
+; SOFT-FLOAT-32-FPC-ON-NEXT:    call __muldf3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    mov %i3, %o3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    mov %i4, %o2
+; SOFT-FLOAT-32-FPC-ON-NEXT:    call __adddf3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    mov %i5, %o3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    mov %o0, %i0
+; SOFT-FLOAT-32-FPC-ON-NEXT:    ret
+; SOFT-FLOAT-32-FPC-ON-NEXT:    restore %g0, %o1, %o1
+;
+; SOFT-FLOAT-32-FPC-FAST-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-32-FPC-FAST:         .cfi_startproc
+; SOFT-FLOAT-32-FPC-FAST-NEXT:  ! %bb.0:
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    save %sp, -96, %sp
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_def_cfa_register %fp
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_window_save
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_register %o7, %i7
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    mov %i0, %o0
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    mov %i1, %o1
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    mov %i2, %o2
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    call __muldf3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    mov %i3, %o3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    mov %i4, %o2
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    call __adddf3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    mov %i5, %o3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    mov %o0, %i0
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    ret
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    restore %g0, %o1, %o1
+;
+; SOFT-FLOAT-64-FPC-OFF-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-64-FPC-OFF:         .cfi_startproc
+; SOFT-FLOAT-64-FPC-OFF-NEXT:  ! %bb.0:
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    save %sp, -176, %sp
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_def_cfa_register %fp
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_window_save
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_register %o7, %i7
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    mov %i0, %o0
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    call __muldf3
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    mov %i1, %o1
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    call __adddf3
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    mov %i2, %o1
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    ret
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    restore %g0, %o0, %o0
+;
+; SOFT-FLOAT-64-FPC-ON-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-64-FPC-ON:         .cfi_startproc
+; SOFT-FLOAT-64-FPC-ON-NEXT:  ! %bb.0:
+; SOFT-FLOAT-64-FPC-ON-NEXT:    save %sp, -176, %sp
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_def_cfa_register %fp
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_window_save
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_register %o7, %i7
+; SOFT-FLOAT-64-FPC-ON-NEXT:    mov %i0, %o0
+; SOFT-FLOAT-64-FPC-ON-NEXT:    call __muldf3
+; SOFT-FLOAT-64-FPC-ON-NEXT:    mov %i1, %o1
+; SOFT-FLOAT-64-FPC-ON-NEXT:    call __adddf3
+; SOFT-FLOAT-64-FPC-ON-NEXT:    mov %i2, %o1
+; SOFT-FLOAT-64-FPC-ON-NEXT:    ret
+; SOFT-FLOAT-64-FPC-ON-NEXT:    restore %g0, %o0, %o0
+;
+; SOFT-FLOAT-64-FPC-FAST-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-64-FPC-FAST:         .cfi_startproc
+; SOFT-FLOAT-64-FPC-FAST-NEXT:  ! %bb.0:
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    save %sp, -176, %sp
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_def_cfa_register %fp
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_window_save
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_register %o7, %i7
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    mov %i0, %o0
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    call __muldf3
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    mov %i1, %o1
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    call __adddf3
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    mov %i2, %o1
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    ret
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    restore %g0, %o0, %o0
+    %result = call double @llvm.fmuladd.f64(double %a, double %b, double %c)
+    ret double %result
+}
+
+define float @fmuladd_contract_f32(float %a, float %b, float %c) #0 {
+; SOFT-FLOAT-32-FPC-OFF-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-32-FPC-OFF:         .cfi_startproc
+; SOFT-FLOAT-32-FPC-OFF-NEXT:  ! %bb.0:
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    save %sp, -96, %sp
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_def_cfa_register %fp
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_window_save
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_register %o7, %i7
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    mov %i0, %o0
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    call __mulsf3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    mov %i1, %o1
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    call __addsf3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    mov %i2, %o1
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    ret
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    restore %g0, %o0, %o0
+;
+; SOFT-FLOAT-32-FPC-ON-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-32-FPC-ON:         .cfi_startproc
+; SOFT-FLOAT-32-FPC-ON-NEXT:  ! %bb.0:
+; SOFT-FLOAT-32-FPC-ON-NEXT:    save %sp, -96, %sp
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_def_cfa_register %fp
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_window_save
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_register %o7, %i7
+; SOFT-FLOAT-32-FPC-ON-NEXT:    mov %i0, %o0
+; SOFT-FLOAT-32-FPC-ON-NEXT:    call __mulsf3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    mov %i1, %o1
+; SOFT-FLOAT-32-FPC-ON-NEXT:    call __addsf3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    mov %i2, %o1
+; SOFT-FLOAT-32-FPC-ON-NEXT:    ret
+; SOFT-FLOAT-32-FPC-ON-NEXT:    restore %g0, %o0, %o0
+;
+; SOFT-FLOAT-32-FPC-FAST-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-32-FPC-FAST:         .cfi_startproc
+; SOFT-FLOAT-32-FPC-FAST-NEXT:  ! %bb.0:
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    save %sp, -96, %sp
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_def_cfa_register %fp
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_window_save
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_register %o7, %i7
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    mov %i0, %o0
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    call __mulsf3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    mov %i1, %o1
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    call __addsf3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    mov %i2, %o1
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    ret
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    restore %g0, %o0, %o0
+;
+; SOFT-FLOAT-64-FPC-OFF-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-64-FPC-OFF:         .cfi_startproc
+; SOFT-FLOAT-64-FPC-OFF-NEXT:  ! %bb.0:
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    save %sp, -176, %sp
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_def_cfa_register %fp
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_window_save
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_register %o7, %i7
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    srl %i0, 0, %o0
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    call __mulsf3
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    srl %i1, 0, %o1
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    call __addsf3
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    srl %i2, 0, %o1
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    ret
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    restore %g0, %o0, %o0
+;
+; SOFT-FLOAT-64-FPC-ON-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-64-FPC-ON:         .cfi_startproc
+; SOFT-FLOAT-64-FPC-ON-NEXT:  ! %bb.0:
+; SOFT-FLOAT-64-FPC-ON-NEXT:    save %sp, -176, %sp
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_def_cfa_register %fp
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_window_save
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_register %o7, %i7
+; SOFT-FLOAT-64-FPC-ON-NEXT:    srl %i0, 0, %o0
+; SOFT-FLOAT-64-FPC-ON-NEXT:    call __mulsf3
+; SOFT-FLOAT-64-FPC-ON-NEXT:    srl %i1, 0, %o1
+; SOFT-FLOAT-64-FPC-ON-NEXT:    call __addsf3
+; SOFT-FLOAT-64-FPC-ON-NEXT:    srl %i2, 0, %o1
+; SOFT-FLOAT-64-FPC-ON-NEXT:    ret
+; SOFT-FLOAT-64-FPC-ON-NEXT:    restore %g0, %o0, %o0
+;
+; SOFT-FLOAT-64-FPC-FAST-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-64-FPC-FAST:         .cfi_startproc
+; SOFT-FLOAT-64-FPC-FAST-NEXT:  ! %bb.0:
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    save %sp, -176, %sp
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_def_cfa_register %fp
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_window_save
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_register %o7, %i7
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    srl %i0, 0, %o0
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    call __mulsf3
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    srl %i1, 0, %o1
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    call __addsf3
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    srl %i2, 0, %o1
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    ret
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    restore %g0, %o0, %o0
+    %product = fmul float %a, %b
+    %result = fadd float %product, %c
+    ret float %result
+}
+
+define double @fmuladd_contract_f64(double %a, double %b, double %c) #0 {
+; SOFT-FLOAT-32-FPC-OFF-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-32-FPC-OFF:         .cfi_startproc
+; SOFT-FLOAT-32-FPC-OFF-NEXT:  ! %bb.0:
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    save %sp, -96, %sp
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_def_cfa_register %fp
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_window_save
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_register %o7, %i7
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    mov %i0, %o0
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    mov %i1, %o1
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    mov %i2, %o2
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    call __muldf3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    mov %i3, %o3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    mov %i4, %o2
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    call __adddf3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    mov %i5, %o3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    mov %o0, %i0
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    ret
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    restore %g0, %o1, %o1
+;
+; SOFT-FLOAT-32-FPC-ON-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-32-FPC-ON:         .cfi_startproc
+; SOFT-FLOAT-32-FPC-ON-NEXT:  ! %bb.0:
+; SOFT-FLOAT-32-FPC-ON-NEXT:    save %sp, -96, %sp
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_def_cfa_register %fp
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_window_save
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_register %o7, %i7
+; SOFT-FLOAT-32-FPC-ON-NEXT:    mov %i0, %o0
+; SOFT-FLOAT-32-FPC-ON-NEXT:    mov %i1, %o1
+; SOFT-FLOAT-32-FPC-ON-NEXT:    mov %i2, %o2
+; SOFT-FLOAT-32-FPC-ON-NEXT:    call __muldf3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    mov %i3, %o3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    mov %i4, %o2
+; SOFT-FLOAT-32-FPC-ON-NEXT:    call __adddf3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    mov %i5, %o3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    mov %o0, %i0
+; SOFT-FLOAT-32-FPC-ON-NEXT:    ret
+; SOFT-FLOAT-32-FPC-ON-NEXT:    restore %g0, %o1, %o1
+;
+; SOFT-FLOAT-32-FPC-FAST-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-32-FPC-FAST:         .cfi_startproc
+; SOFT-FLOAT-32-FPC-FAST-NEXT:  ! %bb.0:
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    save %sp, -96, %sp
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_def_cfa_register %fp
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_window_save
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_register %o7, %i7
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    mov %i0, %o0
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    mov %i1, %o1
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    mov %i2, %o2
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    call __muldf3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    mov %i3, %o3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    mov %i4, %o2
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    call __adddf3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    mov %i5, %o3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    mov %o0, %i0
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    ret
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    restore %g0, %o1, %o1
+;
+; SOFT-FLOAT-64-FPC-OFF-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-64-FPC-OFF:         .cfi_startproc
+; SOFT-FLOAT-64-FPC-OFF-NEXT:  ! %bb.0:
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    save %sp, -176, %sp
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_def_cfa_register %fp
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_window_save
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_register %o7, %i7
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    mov %i0, %o0
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    call __muldf3
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    mov %i1, %o1
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    call __adddf3
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    mov %i2, %o1
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    ret
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    restore %g0, %o0, %o0
+;
+; SOFT-FLOAT-64-FPC-ON-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-64-FPC-ON:         .cfi_startproc
+; SOFT-FLOAT-64-FPC-ON-NEXT:  ! %bb.0:
+; SOFT-FLOAT-64-FPC-ON-NEXT:    save %sp, -176, %sp
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_def_cfa_register %fp
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_window_save
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_register %o7, %i7
+; SOFT-FLOAT-64-FPC-ON-NEXT:    mov %i0, %o0
+; SOFT-FLOAT-64-FPC-ON-NEXT:    call __muldf3
+; SOFT-FLOAT-64-FPC-ON-NEXT:    mov %i1, %o1
+; SOFT-FLOAT-64-FPC-ON-NEXT:    call __adddf3
+; SOFT-FLOAT-64-FPC-ON-NEXT:    mov %i2, %o1
+; SOFT-FLOAT-64-FPC-ON-NEXT:    ret
+; SOFT-FLOAT-64-FPC-ON-NEXT:    restore %g0, %o0, %o0
+;
+; SOFT-FLOAT-64-FPC-FAST-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-64-FPC-FAST:         .cfi_startproc
+; SOFT-FLOAT-64-FPC-FAST-NEXT:  ! %bb.0:
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    save %sp, -176, %sp
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_def_cfa_register %fp
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_window_save
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_register %o7, %i7
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    mov %i0, %o0
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    call __muldf3
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    mov %i1, %o1
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    call __adddf3
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    mov %i2, %o1
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    ret
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    restore %g0, %o0, %o0
+    %product = fmul double %a, %b
+    %result = fadd double %product, %c
+    ret double %result
+}
+
+attributes #0 = { "use-soft-float"="true" }
+
+declare float @llvm.fmuladd.f32(float %a, float %b, float %c)
+declare double @llvm.fmuladd.f64(double %a, double %b, double %c)
diff --git a/llvm/test/CodeGen/SystemZ/fmuladd-soft-float.ll b/llvm/test/CodeGen/SystemZ/fmuladd-soft-float.ll
new file mode 100644
index 00000000000000..e0a1e38f9b1e88
--- /dev/null
+++ b/llvm/test/CodeGen/SystemZ/fmuladd-soft-float.ll
@@ -0,0 +1,225 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=s390x --fp-contract off < %s | FileCheck %s -check-prefix=SOFT-FLOAT-FPC-OFF
+; RUN: llc -mtriple=s390x --fp-contract on < %s | FileCheck %s -check-prefix=SOFT-FLOAT-FPC-ON
+; RUN: llc -mtriple=s390x --fp-contract fast < %s | FileCheck %s -check-prefix=SOFT-FLOAT-FPC-FAST
+
+define float @fmuladd_intrinsic_f32(float %a, float %b, float %c) #0 {
+; SOFT-FLOAT-FPC-OFF-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-FPC-OFF-NEXT:    stmg %r13, %r15, 104(%r15)
+; SOFT-FLOAT-FPC-OFF-NEXT:    .cfi_offset %r13, -56
+; SOFT-FLOAT-FPC-OFF-NEXT:    .cfi_offset %r14, -48
+; SOFT-FLOAT-FPC-OFF-NEXT:    .cfi_offset %r15, -40
+; SOFT-FLOAT-FPC-OFF-NEXT:    aghi %r15, -160
+; SOFT-FLOAT-FPC-OFF-NEXT:    .cfi_def_cfa_offset 320
+; SOFT-FLOAT-FPC-OFF-NEXT:    llgfr %r2, %r2
+; SOFT-FLOAT-FPC-OFF-NEXT:    llgfr %r3, %r3
+; SOFT-FLOAT-FPC-OFF-NEXT:    lr %r13, %r4
+; SOFT-FLOAT-FPC-OFF-NEXT:    brasl %r14, __mulsf3 at PLT
+; SOFT-FLOAT-FPC-OFF-NEXT:    llgfr %r3, %r13
+; SOFT-FLOAT-FPC-OFF-NEXT:    brasl %r14, __addsf3 at PLT
+; SOFT-FLOAT-FPC-OFF-NEXT:    # kill: def $r2l killed $r2l killed $r2d
+; SOFT-FLOAT-FPC-OFF-NEXT:    lmg %r13, %r15, 264(%r15)
+; SOFT-FLOAT-FPC-OFF-NEXT:    br %r14
+;
+; SOFT-FLOAT-FPC-ON-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-FPC-ON-NEXT:    stmg %r13, %r15, 104(%r15)
+; SOFT-FLOAT-FPC-ON-NEXT:    .cfi_offset %r13, -56
+; SOFT-FLOAT-FPC-ON-NEXT:    .cfi_offset %r14, -48
+; SOFT-FLOAT-FPC-ON-NEXT:    .cfi_offset %r15, -40
+; SOFT-FLOAT-FPC-ON-NEXT:    aghi %r15, -160
+; SOFT-FLOAT-FPC-ON-NEXT:    .cfi_def_cfa_offset 320
+; SOFT-FLOAT-FPC-ON-NEXT:    llgfr %r2, %r2
+; SOFT-FLOAT-FPC-ON-NEXT:    llgfr %r3, %r3
+; SOFT-FLOAT-FPC-ON-NEXT:    lr %r13, %r4
+; SOFT-FLOAT-FPC-ON-NEXT:    brasl %r14, __mulsf3 at PLT
+; SOFT-FLOAT-FPC-ON-NEXT:    llgfr %r3, %r13
+; SOFT-FLOAT-FPC-ON-NEXT:    brasl %r14, __addsf3 at PLT
+; SOFT-FLOAT-FPC-ON-NEXT:    # kill: def $r2l killed $r2l killed $r2d
+; SOFT-FLOAT-FPC-ON-NEXT:    lmg %r13, %r15, 264(%r15)
+; SOFT-FLOAT-FPC-ON-NEXT:    br %r14
+;
+; SOFT-FLOAT-FPC-FAST-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-FPC-FAST-NEXT:    stmg %r13, %r15, 104(%r15)
+; SOFT-FLOAT-FPC-FAST-NEXT:    .cfi_offset %r13, -56
+; SOFT-FLOAT-FPC-FAST-NEXT:    .cfi_offset %r14, -48
+; SOFT-FLOAT-FPC-FAST-NEXT:    .cfi_offset %r15, -40
+; SOFT-FLOAT-FPC-FAST-NEXT:    aghi %r15, -160
+; SOFT-FLOAT-FPC-FAST-NEXT:    .cfi_def_cfa_offset 320
+; SOFT-FLOAT-FPC-FAST-NEXT:    llgfr %r2, %r2
+; SOFT-FLOAT-FPC-FAST-NEXT:    llgfr %r3, %r3
+; SOFT-FLOAT-FPC-FAST-NEXT:    lr %r13, %r4
+; SOFT-FLOAT-FPC-FAST-NEXT:    brasl %r14, __mulsf3 at PLT
+; SOFT-FLOAT-FPC-FAST-NEXT:    llgfr %r3, %r13
+; SOFT-FLOAT-FPC-FAST-NEXT:    brasl %r14, __addsf3 at PLT
+; SOFT-FLOAT-FPC-FAST-NEXT:    # kill: def $r2l killed $r2l killed $r2d
+; SOFT-FLOAT-FPC-FAST-NEXT:    lmg %r13, %r15, 264(%r15)
+; SOFT-FLOAT-FPC-FAST-NEXT:    br %r14
+    %result = call float @llvm.fmuladd.f32(float %a, float %b, float %c)
+    ret float %result
+}
+
+define double @fmuladd_intrinsic_f64(double %a, double %b, double %c) #0 {
+; SOFT-FLOAT-FPC-OFF-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-FPC-OFF-NEXT:    stmg %r13, %r15, 104(%r15)
+; SOFT-FLOAT-FPC-OFF-NEXT:    .cfi_offset %r13, -56
+; SOFT-FLOAT-FPC-OFF-NEXT:    .cfi_offset %r14, -48
+; SOFT-FLOAT-FPC-OFF-NEXT:    .cfi_offset %r15, -40
+; SOFT-FLOAT-FPC-OFF-NEXT:    aghi %r15, -160
+; SOFT-FLOAT-FPC-OFF-NEXT:    .cfi_def_cfa_offset 320
+; SOFT-FLOAT-FPC-OFF-NEXT:    lgr %r13, %r4
+; SOFT-FLOAT-FPC-OFF-NEXT:    brasl %r14, __muldf3 at PLT
+; SOFT-FLOAT-FPC-OFF-NEXT:    lgr %r3, %r13
+; SOFT-FLOAT-FPC-OFF-NEXT:    brasl %r14, __adddf3 at PLT
+; SOFT-FLOAT-FPC-OFF-NEXT:    lmg %r13, %r15, 264(%r15)
+; SOFT-FLOAT-FPC-OFF-NEXT:    br %r14
+;
+; SOFT-FLOAT-FPC-ON-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-FPC-ON-NEXT:    stmg %r13, %r15, 104(%r15)
+; SOFT-FLOAT-FPC-ON-NEXT:    .cfi_offset %r13, -56
+; SOFT-FLOAT-FPC-ON-NEXT:    .cfi_offset %r14, -48
+; SOFT-FLOAT-FPC-ON-NEXT:    .cfi_offset %r15, -40
+; SOFT-FLOAT-FPC-ON-NEXT:    aghi %r15, -160
+; SOFT-FLOAT-FPC-ON-NEXT:    .cfi_def_cfa_offset 320
+; SOFT-FLOAT-FPC-ON-NEXT:    lgr %r13, %r4
+; SOFT-FLOAT-FPC-ON-NEXT:    brasl %r14, __muldf3 at PLT
+; SOFT-FLOAT-FPC-ON-NEXT:    lgr %r3, %r13
+; SOFT-FLOAT-FPC-ON-NEXT:    brasl %r14, __adddf3 at PLT
+; SOFT-FLOAT-FPC-ON-NEXT:    lmg %r13, %r15, 264(%r15)
+; SOFT-FLOAT-FPC-ON-NEXT:    br %r14
+;
+; SOFT-FLOAT-FPC-FAST-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-FPC-FAST-NEXT:    stmg %r13, %r15, 104(%r15)
+; SOFT-FLOAT-FPC-FAST-NEXT:    .cfi_offset %r13, -56
+; SOFT-FLOAT-FPC-FAST-NEXT:    .cfi_offset %r14, -48
+; SOFT-FLOAT-FPC-FAST-NEXT:    .cfi_offset %r15, -40
+; SOFT-FLOAT-FPC-FAST-NEXT:    aghi %r15, -160
+; SOFT-FLOAT-FPC-FAST-NEXT:    .cfi_def_cfa_offset 320
+; SOFT-FLOAT-FPC-FAST-NEXT:    lgr %r13, %r4
+; SOFT-FLOAT-FPC-FAST-NEXT:    brasl %r14, __muldf3 at PLT
+; SOFT-FLOAT-FPC-FAST-NEXT:    lgr %r3, %r13
+; SOFT-FLOAT-FPC-FAST-NEXT:    brasl %r14, __adddf3 at PLT
+; SOFT-FLOAT-FPC-FAST-NEXT:    lmg %r13, %r15, 264(%r15)
+; SOFT-FLOAT-FPC-FAST-NEXT:    br %r14
+    %result = call double @llvm.fmuladd.f64(double %a, double %b, double %c)
+    ret double %result
+}
+
+define float @fmuladd_contract_f32(float %a, float %b, float %c) #0 {
+; SOFT-FLOAT-FPC-OFF-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-FPC-OFF-NEXT:    stmg %r13, %r15, 104(%r15)
+; SOFT-FLOAT-FPC-OFF-NEXT:    .cfi_offset %r13, -56
+; SOFT-FLOAT-FPC-OFF-NEXT:    .cfi_offset %r14, -48
+; SOFT-FLOAT-FPC-OFF-NEXT:    .cfi_offset %r15, -40
+; SOFT-FLOAT-FPC-OFF-NEXT:    aghi %r15, -160
+; SOFT-FLOAT-FPC-OFF-NEXT:    .cfi_def_cfa_offset 320
+; SOFT-FLOAT-FPC-OFF-NEXT:    llgfr %r2, %r2
+; SOFT-FLOAT-FPC-OFF-NEXT:    llgfr %r3, %r3
+; SOFT-FLOAT-FPC-OFF-NEXT:    lr %r13, %r4
+; SOFT-FLOAT-FPC-OFF-NEXT:    brasl %r14, __mulsf3 at PLT
+; SOFT-FLOAT-FPC-OFF-NEXT:    llgfr %r3, %r13
+; SOFT-FLOAT-FPC-OFF-NEXT:    brasl %r14, __addsf3 at PLT
+; SOFT-FLOAT-FPC-OFF-NEXT:    # kill: def $r2l killed $r2l killed $r2d
+; SOFT-FLOAT-FPC-OFF-NEXT:    lmg %r13, %r15, 264(%r15)
+; SOFT-FLOAT-FPC-OFF-NEXT:    br %r14
+;
+; SOFT-FLOAT-FPC-ON-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-FPC-ON-NEXT:    stmg %r13, %r15, 104(%r15)
+; SOFT-FLOAT-FPC-ON-NEXT:    .cfi_offset %r13, -56
+; SOFT-FLOAT-FPC-ON-NEXT:    .cfi_offset %r14, -48
+; SOFT-FLOAT-FPC-ON-NEXT:    .cfi_offset %r15, -40
+; SOFT-FLOAT-FPC-ON-NEXT:    aghi %r15, -160
+; SOFT-FLOAT-FPC-ON-NEXT:    .cfi_def_cfa_offset 320
+; SOFT-FLOAT-FPC-ON-NEXT:    llgfr %r2, %r2
+; SOFT-FLOAT-FPC-ON-NEXT:    llgfr %r3, %r3
+; SOFT-FLOAT-FPC-ON-NEXT:    lr %r13, %r4
+; SOFT-FLOAT-FPC-ON-NEXT:    brasl %r14, __mulsf3 at PLT
+; SOFT-FLOAT-FPC-ON-NEXT:    llgfr %r3, %r13
+; SOFT-FLOAT-FPC-ON-NEXT:    brasl %r14, __addsf3 at PLT
+; SOFT-FLOAT-FPC-ON-NEXT:    # kill: def $r2l killed $r2l killed $r2d
+; SOFT-FLOAT-FPC-ON-NEXT:    lmg %r13, %r15, 264(%r15)
+; SOFT-FLOAT-FPC-ON-NEXT:    br %r14
+;
+; SOFT-FLOAT-FPC-FAST-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-FPC-FAST-NEXT:    stmg %r13, %r15, 104(%r15)
+; SOFT-FLOAT-FPC-FAST-NEXT:    .cfi_offset %r13, -56
+; SOFT-FLOAT-FPC-FAST-NEXT:    .cfi_offset %r14, -48
+; SOFT-FLOAT-FPC-FAST-NEXT:    .cfi_offset %r15, -40
+; SOFT-FLOAT-FPC-FAST-NEXT:    aghi %r15, -160
+; SOFT-FLOAT-FPC-FAST-NEXT:    .cfi_def_cfa_offset 320
+; SOFT-FLOAT-FPC-FAST-NEXT:    llgfr %r2, %r2
+; SOFT-FLOAT-FPC-FAST-NEXT:    llgfr %r3, %r3
+; SOFT-FLOAT-FPC-FAST-NEXT:    lr %r13, %r4
+; SOFT-FLOAT-FPC-FAST-NEXT:    brasl %r14, __mulsf3 at PLT
+; SOFT-FLOAT-FPC-FAST-NEXT:    llgfr %r3, %r13
+; SOFT-FLOAT-FPC-FAST-NEXT:    brasl %r14, __addsf3 at PLT
+; SOFT-FLOAT-FPC-FAST-NEXT:    # kill: def $r2l killed $r2l killed $r2d
+; SOFT-FLOAT-FPC-FAST-NEXT:    lmg %r13, %r15, 264(%r15)
+; SOFT-FLOAT-FPC-FAST-NEXT:    br %r14
+    %product = fmul float %a, %b
+    %result = fadd float %product, %c
+    ret float %result
+}
+
+define double @fmuladd_contract_f64(double %a, double %b, double %c) #0 {
+; SOFT-FLOAT-FPC-OFF-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-FPC-OFF-NEXT:    stmg %r13, %r15, 104(%r15)
+; SOFT-FLOAT-FPC-OFF-NEXT:    .cfi_offset %r13, -56
+; SOFT-FLOAT-FPC-OFF-NEXT:    .cfi_offset %r14, -48
+; SOFT-FLOAT-FPC-OFF-NEXT:    .cfi_offset %r15, -40
+; SOFT-FLOAT-FPC-OFF-NEXT:    aghi %r15, -160
+; SOFT-FLOAT-FPC-OFF-NEXT:    .cfi_def_cfa_offset 320
+; SOFT-FLOAT-FPC-OFF-NEXT:    lgr %r13, %r4
+; SOFT-FLOAT-FPC-OFF-NEXT:    brasl %r14, __muldf3 at PLT
+; SOFT-FLOAT-FPC-OFF-NEXT:    lgr %r3, %r13
+; SOFT-FLOAT-FPC-OFF-NEXT:    brasl %r14, __adddf3 at PLT
+; SOFT-FLOAT-FPC-OFF-NEXT:    lmg %r13, %r15, 264(%r15)
+; SOFT-FLOAT-FPC-OFF-NEXT:    br %r14
+;
+; SOFT-FLOAT-FPC-ON-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-FPC-ON-NEXT:    stmg %r13, %r15, 104(%r15)
+; SOFT-FLOAT-FPC-ON-NEXT:    .cfi_offset %r13, -56
+; SOFT-FLOAT-FPC-ON-NEXT:    .cfi_offset %r14, -48
+; SOFT-FLOAT-FPC-ON-NEXT:    .cfi_offset %r15, -40
+; SOFT-FLOAT-FPC-ON-NEXT:    aghi %r15, -160
+; SOFT-FLOAT-FPC-ON-NEXT:    .cfi_def_cfa_offset 320
+; SOFT-FLOAT-FPC-ON-NEXT:    lgr %r13, %r4
+; SOFT-FLOAT-FPC-ON-NEXT:    brasl %r14, __muldf3 at PLT
+; SOFT-FLOAT-FPC-ON-NEXT:    lgr %r3, %r13
+; SOFT-FLOAT-FPC-ON-NEXT:    brasl %r14, __adddf3 at PLT
+; SOFT-FLOAT-FPC-ON-NEXT:    lmg %r13, %r15, 264(%r15)
+; SOFT-FLOAT-FPC-ON-NEXT:    br %r14
+;
+; SOFT-FLOAT-FPC-FAST-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-FPC-FAST-NEXT:    stmg %r13, %r15, 104(%r15)
+; SOFT-FLOAT-FPC-FAST-NEXT:    .cfi_offset %r13, -56
+; SOFT-FLOAT-FPC-FAST-NEXT:    .cfi_offset %r14, -48
+; SOFT-FLOAT-FPC-FAST-NEXT:    .cfi_offset %r15, -40
+; SOFT-FLOAT-FPC-FAST-NEXT:    aghi %r15, -160
+; SOFT-FLOAT-FPC-FAST-NEXT:    .cfi_def_cfa_offset 320
+; SOFT-FLOAT-FPC-FAST-NEXT:    lgr %r13, %r4
+; SOFT-FLOAT-FPC-FAST-NEXT:    brasl %r14, __muldf3 at PLT
+; SOFT-FLOAT-FPC-FAST-NEXT:    lgr %r3, %r13
+; SOFT-FLOAT-FPC-FAST-NEXT:    brasl %r14, __adddf3 at PLT
+; SOFT-FLOAT-FPC-FAST-NEXT:    lmg %r13, %r15, 264(%r15)
+; SOFT-FLOAT-FPC-FAST-NEXT:    br %r14
+    %product = fmul double %a, %b
+    %result = fadd double %product, %c
+    ret double %result
+}
+
+attributes #0 = { "use-soft-float"="true" }
+
+declare float @llvm.fmuladd.f32(float %a, float %b, float %c)
+declare double @llvm.fmuladd.f64(double %a, double %b, double %c)
diff --git a/llvm/test/CodeGen/X86/fmuladd-soft-float.ll b/llvm/test/CodeGen/X86/fmuladd-soft-float.ll
new file mode 100644
index 00000000000000..d0fb3ba7736d19
--- /dev/null
+++ b/llvm/test/CodeGen/X86/fmuladd-soft-float.ll
@@ -0,0 +1,1662 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=i386 --fp-contract off < %s | FileCheck %s -check-prefix=SOFT-FLOAT-32-FPC-OFF
+; RUN: llc -mtriple=i386 --fp-contract on < %s | FileCheck %s -check-prefix=SOFT-FLOAT-32-FPC-ON
+; RUN: llc -mtriple=i386 --fp-contract fast < %s | FileCheck %s -check-prefix=SOFT-FLOAT-32-FPC-FAST
+; RUN: llc -mtriple=i386 -mattr +fma --fp-contract off < %s | FileCheck %s -check-prefix=SOFT-FLOAT-32-FMA-FPC-OFF
+; RUN: llc -mtriple=i386 -mattr +fma --fp-contract on < %s | FileCheck %s -check-prefix=SOFT-FLOAT-32-FMA-FPC-ON
+; RUN: llc -mtriple=i386 -mattr +fma --fp-contract fast < %s | FileCheck %s -check-prefix=SOFT-FLOAT-32-FMA-FPC-FAST
+; RUN: llc -mtriple=i386 -mattr +fma4 --fp-contract off < %s | FileCheck %s -check-prefix=SOFT-FLOAT-32-FMA4-FPC-OFF
+; RUN: llc -mtriple=i386 -mattr +fma4 --fp-contract on < %s | FileCheck %s -check-prefix=SOFT-FLOAT-32-FMA4-FPC-ON
+; RUN: llc -mtriple=i386 -mattr +fma4 --fp-contract fast < %s | FileCheck %s -check-prefix=SOFT-FLOAT-32-FMA4-FPC-FAST
+; RUN: llc -mtriple=x86_64 --fp-contract off < %s | FileCheck %s -check-prefix=SOFT-FLOAT-64-FPC-OFF
+; RUN: llc -mtriple=x86_64 --fp-contract on < %s | FileCheck %s -check-prefix=SOFT-FLOAT-64-FPC-ON
+; RUN: llc -mtriple=x86_64 --fp-contract fast < %s | FileCheck %s -check-prefix=SOFT-FLOAT-64-FPC-FAST
+; RUN: llc -mtriple=x86_64 -mattr +fma --fp-contract off < %s | FileCheck %s -check-prefix=SOFT-FLOAT-64-FMA-FPC-OFF
+; RUN: llc -mtriple=x86_64 -mattr +fma --fp-contract on < %s | FileCheck %s -check-prefix=SOFT-FLOAT-64-FMA-FPC-ON
+; RUN: llc -mtriple=x86_64 -mattr +fma --fp-contract fast < %s | FileCheck %s -check-prefix=SOFT-FLOAT-64-FMA-FPC-FAST
+; RUN: llc -mtriple=x86_64 -mattr +fma4 --fp-contract off < %s | FileCheck %s -check-prefix=SOFT-FLOAT-64-FMA4-FPC-OFF
+; RUN: llc -mtriple=x86_64 -mattr +fma4 --fp-contract on < %s | FileCheck %s -check-prefix=SOFT-FLOAT-64-FMA4-FPC-ON
+; RUN: llc -mtriple=x86_64 -mattr +fma4 --fp-contract fast < %s | FileCheck %s -check-prefix=SOFT-FLOAT-64-FMA4-FPC-FAST
+
+define float @fmuladd_intrinsic_f32(float %a, float %b, float %c) #0 {
+; SOFT-FLOAT-32-FPC-OFF-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-32-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_offset %esi, -8
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    calll __mulsf3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    calll __addsf3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    popl %esi
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    retl
+;
+; SOFT-FLOAT-32-FPC-ON-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-32-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_offset %esi, -8
+; SOFT-FLOAT-32-FPC-ON-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    calll __mulsf3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    calll __addsf3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FPC-ON-NEXT:    popl %esi
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    retl
+;
+; SOFT-FLOAT-32-FPC-FAST-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-32-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_offset %esi, -8
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    calll __mulsf3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    calll __addsf3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    popl %esi
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    retl
+;
+; SOFT-FLOAT-32-FMA-FPC-OFF-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-32-FMA-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_offset %esi, -8
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    calll __mulsf3
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    calll __addsf3
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    popl %esi
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    retl
+;
+; SOFT-FLOAT-32-FMA-FPC-ON-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-32-FMA-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_offset %esi, -8
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    calll __mulsf3
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    calll __addsf3
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    popl %esi
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    retl
+;
+; SOFT-FLOAT-32-FMA-FPC-FAST-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-32-FMA-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_offset %esi, -8
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    calll __mulsf3
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    calll __addsf3
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    popl %esi
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    retl
+;
+; SOFT-FLOAT-32-FMA4-FPC-OFF-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-32-FMA4-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_offset %esi, -8
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    calll __mulsf3
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    calll __addsf3
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    popl %esi
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    retl
+;
+; SOFT-FLOAT-32-FMA4-FPC-ON-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-32-FMA4-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_offset %esi, -8
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    calll __mulsf3
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    calll __addsf3
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    popl %esi
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    retl
+;
+; SOFT-FLOAT-32-FMA4-FPC-FAST-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-32-FMA4-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_offset %esi, -8
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    calll __mulsf3
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    calll __addsf3
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    popl %esi
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    retl
+;
+; SOFT-FLOAT-64-FPC-OFF-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-64-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    movl %edx, %ebx
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    callq __mulsf3 at PLT
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    movl %eax, %edi
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    movl %ebx, %esi
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    callq __addsf3 at PLT
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    retq
+;
+; SOFT-FLOAT-64-FPC-ON-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-64-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-64-FPC-ON-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FPC-ON-NEXT:    movl %edx, %ebx
+; SOFT-FLOAT-64-FPC-ON-NEXT:    callq __mulsf3 at PLT
+; SOFT-FLOAT-64-FPC-ON-NEXT:    movl %eax, %edi
+; SOFT-FLOAT-64-FPC-ON-NEXT:    movl %ebx, %esi
+; SOFT-FLOAT-64-FPC-ON-NEXT:    callq __addsf3 at PLT
+; SOFT-FLOAT-64-FPC-ON-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FPC-ON-NEXT:    retq
+;
+; SOFT-FLOAT-64-FPC-FAST-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-64-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    movl %edx, %ebx
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    callq __mulsf3 at PLT
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    movl %eax, %edi
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    movl %ebx, %esi
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    callq __addsf3 at PLT
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    retq
+;
+; SOFT-FLOAT-64-FMA-FPC-OFF-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-64-FMA-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    movl %edx, %ebx
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    callq __mulsf3 at PLT
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    movl %eax, %edi
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    movl %ebx, %esi
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    callq __addsf3 at PLT
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    retq
+;
+; SOFT-FLOAT-64-FMA-FPC-ON-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-64-FMA-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    movl %edx, %ebx
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    callq __mulsf3 at PLT
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    movl %eax, %edi
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    movl %ebx, %esi
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    callq __addsf3 at PLT
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    retq
+;
+; SOFT-FLOAT-64-FMA-FPC-FAST-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-64-FMA-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    movl %edx, %ebx
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    callq __mulsf3 at PLT
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    movl %eax, %edi
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    movl %ebx, %esi
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    callq __addsf3 at PLT
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    retq
+;
+; SOFT-FLOAT-64-FMA4-FPC-OFF-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-64-FMA4-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    movl %edx, %ebx
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    callq __mulsf3 at PLT
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    movl %eax, %edi
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    movl %ebx, %esi
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    callq __addsf3 at PLT
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    retq
+;
+; SOFT-FLOAT-64-FMA4-FPC-ON-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-64-FMA4-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    movl %edx, %ebx
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    callq __mulsf3 at PLT
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    movl %eax, %edi
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    movl %ebx, %esi
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    callq __addsf3 at PLT
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    retq
+;
+; SOFT-FLOAT-64-FMA4-FPC-FAST-LABEL: fmuladd_intrinsic_f32:
+; SOFT-FLOAT-64-FMA4-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    movl %edx, %ebx
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    callq __mulsf3 at PLT
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    movl %eax, %edi
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    movl %ebx, %esi
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    callq __addsf3 at PLT
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    retq
+    %result = call float @llvm.fmuladd.f32(float %a, float %b, float %c)
+    ret float %result
+}
+
+define double @fmuladd_intrinsic_f64(double %a, double %b, double %c) #0 {
+; SOFT-FLOAT-32-FPC-OFF-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-32-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_def_cfa_offset 12
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_offset %esi, -12
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_offset %edi, -8
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    calll __muldf3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl %edx
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    calll __adddf3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    popl %esi
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    popl %edi
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    retl
+;
+; SOFT-FLOAT-32-FPC-ON-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-32-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_def_cfa_offset 12
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_offset %esi, -12
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_offset %edi, -8
+; SOFT-FLOAT-32-FPC-ON-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FPC-ON-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    calll __muldf3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl %edx
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    calll __adddf3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FPC-ON-NEXT:    popl %esi
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FPC-ON-NEXT:    popl %edi
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    retl
+;
+; SOFT-FLOAT-32-FPC-FAST-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-32-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_def_cfa_offset 12
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_offset %esi, -12
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_offset %edi, -8
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    calll __muldf3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl %edx
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    calll __adddf3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    popl %esi
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    popl %edi
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    retl
+;
+; SOFT-FLOAT-32-FMA-FPC-OFF-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-32-FMA-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_def_cfa_offset 12
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_offset %esi, -12
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_offset %edi, -8
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    calll __muldf3
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl %edx
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    calll __adddf3
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    popl %esi
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    popl %edi
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    retl
+;
+; SOFT-FLOAT-32-FMA-FPC-ON-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-32-FMA-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_def_cfa_offset 12
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_offset %esi, -12
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_offset %edi, -8
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    calll __muldf3
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl %edx
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    calll __adddf3
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    popl %esi
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    popl %edi
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    retl
+;
+; SOFT-FLOAT-32-FMA-FPC-FAST-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-32-FMA-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_def_cfa_offset 12
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_offset %esi, -12
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_offset %edi, -8
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    calll __muldf3
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl %edx
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    calll __adddf3
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    popl %esi
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    popl %edi
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    retl
+;
+; SOFT-FLOAT-32-FMA4-FPC-OFF-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-32-FMA4-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_def_cfa_offset 12
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_offset %esi, -12
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_offset %edi, -8
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    calll __muldf3
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl %edx
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    calll __adddf3
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    popl %esi
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    popl %edi
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    retl
+;
+; SOFT-FLOAT-32-FMA4-FPC-ON-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-32-FMA4-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_def_cfa_offset 12
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_offset %esi, -12
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_offset %edi, -8
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    calll __muldf3
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl %edx
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    calll __adddf3
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    popl %esi
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    popl %edi
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    retl
+;
+; SOFT-FLOAT-32-FMA4-FPC-FAST-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-32-FMA4-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_def_cfa_offset 12
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_offset %esi, -12
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_offset %edi, -8
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    calll __muldf3
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl %edx
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    calll __adddf3
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    popl %esi
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    popl %edi
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    retl
+;
+; SOFT-FLOAT-64-FPC-OFF-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-64-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    movq %rdx, %rbx
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    callq __muldf3 at PLT
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    movq %rax, %rdi
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    movq %rbx, %rsi
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    callq __adddf3 at PLT
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    retq
+;
+; SOFT-FLOAT-64-FPC-ON-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-64-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-64-FPC-ON-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FPC-ON-NEXT:    movq %rdx, %rbx
+; SOFT-FLOAT-64-FPC-ON-NEXT:    callq __muldf3 at PLT
+; SOFT-FLOAT-64-FPC-ON-NEXT:    movq %rax, %rdi
+; SOFT-FLOAT-64-FPC-ON-NEXT:    movq %rbx, %rsi
+; SOFT-FLOAT-64-FPC-ON-NEXT:    callq __adddf3 at PLT
+; SOFT-FLOAT-64-FPC-ON-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FPC-ON-NEXT:    retq
+;
+; SOFT-FLOAT-64-FPC-FAST-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-64-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    movq %rdx, %rbx
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    callq __muldf3 at PLT
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    movq %rax, %rdi
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    movq %rbx, %rsi
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    callq __adddf3 at PLT
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    retq
+;
+; SOFT-FLOAT-64-FMA-FPC-OFF-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-64-FMA-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    movq %rdx, %rbx
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    callq __muldf3 at PLT
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    movq %rax, %rdi
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    movq %rbx, %rsi
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    callq __adddf3 at PLT
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    retq
+;
+; SOFT-FLOAT-64-FMA-FPC-ON-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-64-FMA-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    movq %rdx, %rbx
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    callq __muldf3 at PLT
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    movq %rax, %rdi
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    movq %rbx, %rsi
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    callq __adddf3 at PLT
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    retq
+;
+; SOFT-FLOAT-64-FMA-FPC-FAST-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-64-FMA-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    movq %rdx, %rbx
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    callq __muldf3 at PLT
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    movq %rax, %rdi
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    movq %rbx, %rsi
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    callq __adddf3 at PLT
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    retq
+;
+; SOFT-FLOAT-64-FMA4-FPC-OFF-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-64-FMA4-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    movq %rdx, %rbx
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    callq __muldf3 at PLT
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    movq %rax, %rdi
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    movq %rbx, %rsi
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    callq __adddf3 at PLT
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    retq
+;
+; SOFT-FLOAT-64-FMA4-FPC-ON-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-64-FMA4-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    movq %rdx, %rbx
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    callq __muldf3 at PLT
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    movq %rax, %rdi
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    movq %rbx, %rsi
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    callq __adddf3 at PLT
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    retq
+;
+; SOFT-FLOAT-64-FMA4-FPC-FAST-LABEL: fmuladd_intrinsic_f64:
+; SOFT-FLOAT-64-FMA4-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    movq %rdx, %rbx
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    callq __muldf3 at PLT
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    movq %rax, %rdi
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    movq %rbx, %rsi
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    callq __adddf3 at PLT
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    retq
+    %result = call double @llvm.fmuladd.f64(double %a, double %b, double %c)
+    ret double %result
+}
+
+define float @fmuladd_contract_f32(float %a, float %b, float %c) #0 {
+; SOFT-FLOAT-32-FPC-OFF-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-32-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_offset %esi, -8
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    calll __mulsf3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    calll __addsf3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    popl %esi
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    retl
+;
+; SOFT-FLOAT-32-FPC-ON-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-32-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_offset %esi, -8
+; SOFT-FLOAT-32-FPC-ON-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    calll __mulsf3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    calll __addsf3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FPC-ON-NEXT:    popl %esi
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    retl
+;
+; SOFT-FLOAT-32-FPC-FAST-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-32-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_offset %esi, -8
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    calll __mulsf3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    calll __addsf3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    popl %esi
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    retl
+;
+; SOFT-FLOAT-32-FMA-FPC-OFF-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-32-FMA-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_offset %esi, -8
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    calll __mulsf3
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    calll __addsf3
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    popl %esi
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    retl
+;
+; SOFT-FLOAT-32-FMA-FPC-ON-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-32-FMA-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_offset %esi, -8
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    calll __mulsf3
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    calll __addsf3
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    popl %esi
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    retl
+;
+; SOFT-FLOAT-32-FMA-FPC-FAST-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-32-FMA-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_offset %esi, -8
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    calll __mulsf3
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    calll __addsf3
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    popl %esi
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    retl
+;
+; SOFT-FLOAT-32-FMA4-FPC-OFF-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-32-FMA4-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_offset %esi, -8
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    calll __mulsf3
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    calll __addsf3
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    popl %esi
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    retl
+;
+; SOFT-FLOAT-32-FMA4-FPC-ON-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-32-FMA4-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_offset %esi, -8
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    calll __mulsf3
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    calll __addsf3
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    popl %esi
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    retl
+;
+; SOFT-FLOAT-32-FMA4-FPC-FAST-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-32-FMA4-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_offset %esi, -8
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    calll __mulsf3
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    calll __addsf3
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    addl $8, %esp
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset -8
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    popl %esi
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    retl
+;
+; SOFT-FLOAT-64-FPC-OFF-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-64-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    movl %edx, %ebx
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    callq __mulsf3 at PLT
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    movl %eax, %edi
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    movl %ebx, %esi
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    callq __addsf3 at PLT
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    retq
+;
+; SOFT-FLOAT-64-FPC-ON-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-64-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-64-FPC-ON-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FPC-ON-NEXT:    movl %edx, %ebx
+; SOFT-FLOAT-64-FPC-ON-NEXT:    callq __mulsf3 at PLT
+; SOFT-FLOAT-64-FPC-ON-NEXT:    movl %eax, %edi
+; SOFT-FLOAT-64-FPC-ON-NEXT:    movl %ebx, %esi
+; SOFT-FLOAT-64-FPC-ON-NEXT:    callq __addsf3 at PLT
+; SOFT-FLOAT-64-FPC-ON-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FPC-ON-NEXT:    retq
+;
+; SOFT-FLOAT-64-FPC-FAST-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-64-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    movl %edx, %ebx
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    callq __mulsf3 at PLT
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    movl %eax, %edi
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    movl %ebx, %esi
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    callq __addsf3 at PLT
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    retq
+;
+; SOFT-FLOAT-64-FMA-FPC-OFF-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-64-FMA-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    movl %edx, %ebx
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    callq __mulsf3 at PLT
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    movl %eax, %edi
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    movl %ebx, %esi
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    callq __addsf3 at PLT
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    retq
+;
+; SOFT-FLOAT-64-FMA-FPC-ON-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-64-FMA-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    movl %edx, %ebx
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    callq __mulsf3 at PLT
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    movl %eax, %edi
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    movl %ebx, %esi
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    callq __addsf3 at PLT
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    retq
+;
+; SOFT-FLOAT-64-FMA-FPC-FAST-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-64-FMA-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    movl %edx, %ebx
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    callq __mulsf3 at PLT
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    movl %eax, %edi
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    movl %ebx, %esi
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    callq __addsf3 at PLT
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    retq
+;
+; SOFT-FLOAT-64-FMA4-FPC-OFF-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-64-FMA4-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    movl %edx, %ebx
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    callq __mulsf3 at PLT
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    movl %eax, %edi
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    movl %ebx, %esi
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    callq __addsf3 at PLT
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    retq
+;
+; SOFT-FLOAT-64-FMA4-FPC-ON-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-64-FMA4-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    movl %edx, %ebx
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    callq __mulsf3 at PLT
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    movl %eax, %edi
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    movl %ebx, %esi
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    callq __addsf3 at PLT
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    retq
+;
+; SOFT-FLOAT-64-FMA4-FPC-FAST-LABEL: fmuladd_contract_f32:
+; SOFT-FLOAT-64-FMA4-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    movl %edx, %ebx
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    callq __mulsf3 at PLT
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    movl %eax, %edi
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    movl %ebx, %esi
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    callq __addsf3 at PLT
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    retq
+    %product = fmul float %a, %b
+    %result = fadd float %product, %c
+    ret float %result
+}
+
+define double @fmuladd_contract_f64(double %a, double %b, double %c) #0 {
+; SOFT-FLOAT-32-FPC-OFF-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-32-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_def_cfa_offset 12
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_offset %esi, -12
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_offset %edi, -8
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    calll __muldf3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl %edx
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    calll __adddf3
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    popl %esi
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    popl %edi
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FPC-OFF-NEXT:    retl
+;
+; SOFT-FLOAT-32-FPC-ON-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-32-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_def_cfa_offset 12
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_offset %esi, -12
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_offset %edi, -8
+; SOFT-FLOAT-32-FPC-ON-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FPC-ON-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    calll __muldf3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl %edx
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    calll __adddf3
+; SOFT-FLOAT-32-FPC-ON-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FPC-ON-NEXT:    popl %esi
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FPC-ON-NEXT:    popl %edi
+; SOFT-FLOAT-32-FPC-ON-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FPC-ON-NEXT:    retl
+;
+; SOFT-FLOAT-32-FPC-FAST-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-32-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_def_cfa_offset 12
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_offset %esi, -12
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_offset %edi, -8
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    calll __muldf3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl %edx
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    calll __adddf3
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    popl %esi
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    popl %edi
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FPC-FAST-NEXT:    retl
+;
+; SOFT-FLOAT-32-FMA-FPC-OFF-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-32-FMA-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_def_cfa_offset 12
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_offset %esi, -12
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_offset %edi, -8
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    calll __muldf3
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl %edx
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    calll __adddf3
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    popl %esi
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    popl %edi
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-OFF-NEXT:    retl
+;
+; SOFT-FLOAT-32-FMA-FPC-ON-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-32-FMA-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_def_cfa_offset 12
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_offset %esi, -12
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_offset %edi, -8
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    calll __muldf3
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl %edx
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    calll __adddf3
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    popl %esi
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    popl %edi
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-ON-NEXT:    retl
+;
+; SOFT-FLOAT-32-FMA-FPC-FAST-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-32-FMA-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_def_cfa_offset 12
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_offset %esi, -12
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_offset %edi, -8
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    calll __muldf3
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl %edx
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    calll __adddf3
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    popl %esi
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    popl %edi
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FMA-FPC-FAST-NEXT:    retl
+;
+; SOFT-FLOAT-32-FMA4-FPC-OFF-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-32-FMA4-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_def_cfa_offset 12
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_offset %esi, -12
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_offset %edi, -8
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    calll __muldf3
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl %edx
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    calll __adddf3
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    popl %esi
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    popl %edi
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-OFF-NEXT:    retl
+;
+; SOFT-FLOAT-32-FMA4-FPC-ON-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-32-FMA4-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_def_cfa_offset 12
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_offset %esi, -12
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_offset %edi, -8
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    calll __muldf3
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl %edx
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    calll __adddf3
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    popl %esi
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    popl %edi
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-ON-NEXT:    retl
+;
+; SOFT-FLOAT-32-FMA4-FPC-FAST-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-32-FMA4-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_def_cfa_offset 12
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_offset %esi, -12
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_offset %edi, -8
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl {{[0-9]+}}(%esp)
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    calll __muldf3
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl %edi
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl %esi
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl %edx
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    pushl %eax
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    calll __adddf3
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    addl $16, %esp
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_adjust_cfa_offset -16
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    popl %esi
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    popl %edi
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    .cfi_def_cfa_offset 4
+; SOFT-FLOAT-32-FMA4-FPC-FAST-NEXT:    retl
+;
+; SOFT-FLOAT-64-FPC-OFF-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-64-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    movq %rdx, %rbx
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    callq __muldf3 at PLT
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    movq %rax, %rdi
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    movq %rbx, %rsi
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    callq __adddf3 at PLT
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FPC-OFF-NEXT:    retq
+;
+; SOFT-FLOAT-64-FPC-ON-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-64-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-64-FPC-ON-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FPC-ON-NEXT:    movq %rdx, %rbx
+; SOFT-FLOAT-64-FPC-ON-NEXT:    callq __muldf3 at PLT
+; SOFT-FLOAT-64-FPC-ON-NEXT:    movq %rax, %rdi
+; SOFT-FLOAT-64-FPC-ON-NEXT:    movq %rbx, %rsi
+; SOFT-FLOAT-64-FPC-ON-NEXT:    callq __adddf3 at PLT
+; SOFT-FLOAT-64-FPC-ON-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FPC-ON-NEXT:    retq
+;
+; SOFT-FLOAT-64-FPC-FAST-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-64-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    movq %rdx, %rbx
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    callq __muldf3 at PLT
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    movq %rax, %rdi
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    movq %rbx, %rsi
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    callq __adddf3 at PLT
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FPC-FAST-NEXT:    retq
+;
+; SOFT-FLOAT-64-FMA-FPC-OFF-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-64-FMA-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    movq %rdx, %rbx
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    callq __muldf3 at PLT
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    movq %rax, %rdi
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    movq %rbx, %rsi
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    callq __adddf3 at PLT
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FMA-FPC-OFF-NEXT:    retq
+;
+; SOFT-FLOAT-64-FMA-FPC-ON-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-64-FMA-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    movq %rdx, %rbx
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    callq __muldf3 at PLT
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    movq %rax, %rdi
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    movq %rbx, %rsi
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    callq __adddf3 at PLT
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FMA-FPC-ON-NEXT:    retq
+;
+; SOFT-FLOAT-64-FMA-FPC-FAST-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-64-FMA-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    movq %rdx, %rbx
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    callq __muldf3 at PLT
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    movq %rax, %rdi
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    movq %rbx, %rsi
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    callq __adddf3 at PLT
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FMA-FPC-FAST-NEXT:    retq
+;
+; SOFT-FLOAT-64-FMA4-FPC-OFF-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-64-FMA4-FPC-OFF:       # %bb.0:
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    movq %rdx, %rbx
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    callq __muldf3 at PLT
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    movq %rax, %rdi
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    movq %rbx, %rsi
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    callq __adddf3 at PLT
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FMA4-FPC-OFF-NEXT:    retq
+;
+; SOFT-FLOAT-64-FMA4-FPC-ON-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-64-FMA4-FPC-ON:       # %bb.0:
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    movq %rdx, %rbx
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    callq __muldf3 at PLT
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    movq %rax, %rdi
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    movq %rbx, %rsi
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    callq __adddf3 at PLT
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FMA4-FPC-ON-NEXT:    retq
+;
+; SOFT-FLOAT-64-FMA4-FPC-FAST-LABEL: fmuladd_contract_f64:
+; SOFT-FLOAT-64-FMA4-FPC-FAST:       # %bb.0:
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    pushq %rbx
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    .cfi_def_cfa_offset 16
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    .cfi_offset %rbx, -16
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    movq %rdx, %rbx
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    callq __muldf3 at PLT
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    movq %rax, %rdi
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    movq %rbx, %rsi
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    callq __adddf3 at PLT
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    popq %rbx
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    .cfi_def_cfa_offset 8
+; SOFT-FLOAT-64-FMA4-FPC-FAST-NEXT:    retq
+    %product = fmul double %a, %b
+    %result = fadd double %product, %c
+    ret double %result
+}
+
+attributes #0 = { "use-soft-float"="true" }
+
+declare float @llvm.fmuladd.f32(float %a, float %b, float %c)
+declare double @llvm.fmuladd.f64(double %a, double %b, double %c)

