[clang] [llvm] [Clang][LLVM][AArch64] Add intrinsic for LUTI4 SME2 instruction (PR #97755)

[via llvm-commits]

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@@ -410,7 +410,7 @@ class AArch64DAGToDAGISel : public SelectionDAGISel {
   }
 
   void SelectMultiVectorLuti(SDNode *Node, unsigned NumOutVecs, unsigned Opc,
-                             uint32_t MaxImm);
+                             uint32_t MaxImm, bool IsMultiVector = false);
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SpencerAbson wrote:

nit: Could this `bool` be renamed to something like `AreIndicesMultiVector`?

https://github.com/llvm/llvm-project/pull/97755