The Week Of Monday 1 December 2025 Archives by author

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Starting: Mon Dec 1 00:09:36 PST 2025
Ending: Sun Dec 7 23:59:30 PST 2025
Messages: 5290

• [llvm] [SPIRV] Support for the extension SPV_EXT_image_raw10_raw12 (PR #160032)   Aadesh Premkumar via llvm-commits
• [llvm] [SPIRV] Support for the extension SPV_EXT_image_raw10_raw12 (PR #160032)   Aadesh Premkumar via llvm-commits
• [llvm] [SPIRV] Addition of extension SPV_KHR_non_semantic_info and SPV_KHR_relaxed_extended_instruction (PR #169643)   Aadesh Premkumar via llvm-commits
• [llvm] [SPIRV] Added support for extension SPV_INTEL_fpga_buffer_location (PR #133679)   Aadesh Premkumar via llvm-commits
• [llvm] [SPIRV] Added support for extension SPV_INTEL_fpga_buffer_location (PR #133679)   Aadesh Premkumar via llvm-commits
• [llvm] [SPIRV] Support for the extension SPV_INTEL_fpga_argument_interfaces (PR #140231)   Aadesh Premkumar via llvm-commits
• [llvm] [SPIRV] Support for the extension SPV_ALTERA_fpga_argument_interfaces (PR #140231)   Aadesh Premkumar via llvm-commits
• [llvm] [SPIRV] Added support for extension SPV_ALTERA_fpga_buffer_location (PR #133679)   Aadesh Premkumar via llvm-commits
• [llvm] [SPIRV] Added support for extension SPV_ALTERA_fpga_buffer_location (PR #133679)   Aadesh Premkumar via llvm-commits
• [llvm] [SPIRV] Support for the extension SPV_ALTERA_fpga_argument_interfaces (PR #140231)   Aadesh Premkumar via llvm-commits
• [llvm] [SPIRV] Added support for extension SPV_ALTERA_fpga_buffer_location (PR #133679)   Aadesh Premkumar via llvm-commits
• [llvm] [SPIRV] Support for the extension SPV_ALTERA_fpga_argument_interfaces (PR #140231)   Aadesh Premkumar via llvm-commits
• [llvm] [SPIRV] Addition of extension SPV_KHR_non_semantic_info and SPV_KHR_relaxed_extended_instruction (PR #169643)   Aadesh Premkumar via llvm-commits
• [llvm] [SPIRV] Addition of extension SPV_KHR_non_semantic_info and SPV_KHR_relaxed_extended_instruction (PR #169643)   Aadesh Premkumar via llvm-commits
• [llvm] [SPIRV] Addition of extension SPV_KHR_non_semantic_info and SPV_KHR_relaxed_extended_instruction (PR #169643)   Aadesh Premkumar via llvm-commits
• [llvm] [SPIRV] Support for the extension SPV_EXT_image_raw10_raw12 (PR #160032)   Aadesh Premkumar via llvm-commits
• [llvm] [SPIRV] Addition of extension SPV_KHR_non_semantic_info and SPV_KHR_relaxed_extended_instruction (PR #169643)   Aadesh Premkumar via llvm-commits
• [llvm] [SPIRV] Addition of extension SPV_KHR_non_semantic_info and SPV_KHR_relaxed_extended_instruction (PR #169643)   Aadesh Premkumar via llvm-commits
• [llvm] Add CMake configure preset building blocks (PR #170019)   Aaron Ballman via llvm-commits
• [clang] [compiler-rt] [llvm] [LFI] Introduce AArch64 LFI Target (PR #167061)   Aaron Ballman via llvm-commits
• [llvm] Document the community RFC process (PR #116386)   Aaron Ballman via llvm-commits
• [llvm] [Support][Windows] disk_space handle unicode paths (PR #170716)   Aaron Ballman via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Abhinav Gaba via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Abhinav Gaba via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Abhinav Gaba via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Abhinav Gaba via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Abhinav Gaba via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Abhinav Gaba via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Abhinav Gaba via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Abhinav Gaba via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Abhinav Gaba via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Abhinav Gaba via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Abhinav Gaba via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Abhinav Gaba via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Abhinav Gaba via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Abhinav Gaba via llvm-commits
• [llvm] [NFC][OpenMP][Offload] Add tests for `use_device_ptr(fb_preserve/nullify)`. (PR #170948)   Abhinav Gaba via llvm-commits
• [llvm] [NFC][OpenMP][Offload] Add tests for `use_device_ptr(fb_preserve/nullify)`. (PR #170948)   Abhinav Gaba via llvm-commits
• [llvm] [AMDGPU][NPM] Preserve analyses in AMDGPURewriteAGPRCopyMFMA for NPM (PR #170130)   Abhinav Garg via llvm-commits
• [llvm] Adding support for G_STRICT_FMA in new reg bank select (PR #170330)   Abhinav Garg via llvm-commits
• [llvm] [HEXAGON] [MachinePipeliner] Fix the DAG in case of dependent phis. (PR #135925)   Abinaya Saravanan via llvm-commits
• [llvm] [HEXAGON] [MachinePipeliner] Fix the DAG in case of dependent phis. (PR #135925)   Abinaya Saravanan via llvm-commits
• [llvm] [HEXAGON] [MachinePipeliner] Fix the DAG in case of dependent phis. (PR #135925)   Abinaya Saravanan via llvm-commits
• [llvm] [HEXAGON] [MachinePipeliner] Fix the DAG in case of dependent phis. (PR #135925)   Abinaya Saravanan via llvm-commits
• [llvm] [AMDGPU][DAGCombiner][GlobalISel] Prevent FMA contraction when multiply cannot be eliminated (PR #169735)   Adel Ejjeh via llvm-commits
• [llvm] [AMDGPU][DAGCombiner][GlobalISel] Prevent FMA contraction when multiply cannot be eliminated (PR #169735)   Adel Ejjeh via llvm-commits
• [llvm] [AMDGPU] Update log lowering to remove contract for AMDGCN backend (PR #168916)   Adel Ejjeh via llvm-commits
• [llvm] [AMDGPU][DAGCombiner][GlobalISel] Prevent FMA contraction when multiply cannot be eliminated (PR #169735)   Adel Ejjeh via llvm-commits
• [llvm] [AMDGPU][DAGCombiner][GlobalISel] Prevent FMA contraction when multiply cannot be eliminated (PR #169735)   Adel Ejjeh via llvm-commits
• [llvm] [AMDGPU] Update log lowering to remove contract for AMDGCN backend (PR #168916)   Adel Ejjeh via llvm-commits
• [clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)   Aditi Medhane via llvm-commits
• [clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)   Aditi Medhane via llvm-commits
• [clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)   Aditi Medhane via llvm-commits
• [llvm] 4978cd3 - Revert "Fix LLVM test to use %python instead of python"   Aiden Grossman via llvm-commits
• [llvm] Update actions/upload-artifact action to v5 (PR #170058)   Aiden Grossman via llvm-commits
• [llvm] Update actions/upload-artifact action to v5 (PR #170058)   Aiden Grossman via llvm-commits
• [llvm] [Github] Update actions/upload-artifact action to v5 (PR #170058)   Aiden Grossman via llvm-commits
• [llvm] [Github] Update actions/upload-artifact action to v5 (PR #170058)   Aiden Grossman via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #170057)   Aiden Grossman via llvm-commits
• [llvm] [Github] Update GHA Dependencies (PR #170057)   Aiden Grossman via llvm-commits
• [llvm] [Github] Update GHA Dependencies (PR #170057)   Aiden Grossman via llvm-commits
• [llvm] [Github] Update GHA Dependencies (PR #170057)   Aiden Grossman via llvm-commits
• [llvm] [llvm-exegesis] Add CLI Option to set Fixed RNG seed (PR #170013)   Aiden Grossman via llvm-commits
• [llvm] [llvm-exegesis] Add CLI Option to set Fixed RNG seed (PR #170013)   Aiden Grossman via llvm-commits
• [llvm] [WPD] Change Devirt Cutoff to use DebugCounter (PR #170009)   Aiden Grossman via llvm-commits
• [llvm] [WPD] Change Devirt Cutoff to use DebugCounter (PR #170009)   Aiden Grossman via llvm-commits
• [llvm] [WPD] Change Devirt Cutoff to use DebugCounter (PR #170009)   Aiden Grossman via llvm-commits
• [llvm] [WPD] Change Devirt Cutoff to use DebugCounter (PR #170009)   Aiden Grossman via llvm-commits
• [llvm] [WPD] Change Devirt Cutoff to use DebugCounter (PR #170009)   Aiden Grossman via llvm-commits
• [llvm] [WPD] Change Devirt Cutoff to use DebugCounter (PR #170009)   Aiden Grossman via llvm-commits
• [llvm] [llvm-exegesis] Add CLI Option to set Fixed RNG seed (PR #170013)   Aiden Grossman via llvm-commits
• [llvm] [llvm-exegesis] Make rvv/filter.test deterministic (PR #170014)   Aiden Grossman via llvm-commits
• [llvm] [llvm-exegesis] Make rvv/filter.test deterministic (PR #170014)   Aiden Grossman via llvm-commits
• [llvm] [llvm-exegesis] Add AArch64 operand initializers, SetRegTo (PR #169912)   Aiden Grossman via llvm-commits
• [llvm] [llvm-exegesis] Add AArch64 operand initializers, SetRegTo (PR #169912)   Aiden Grossman via llvm-commits
• [llvm] [llvm-exegesis] Add AArch64 operand initializers, SetRegTo (PR #169912)   Aiden Grossman via llvm-commits
• [llvm] workflows: Factor out artifact attestation and upload into a composite action (PR #169621)   Aiden Grossman via llvm-commits
• [llvm] workflows: Factor out artifact attestation and upload into a composite action (PR #169621)   Aiden Grossman via llvm-commits
• [llvm] workflows: Factor out artifact attestation and upload into a composite action (PR #169621)   Aiden Grossman via llvm-commits
• [llvm] [WPD] Change Devirt Cutoff to use DebugCounter (PR #170009)   Aiden Grossman via llvm-commits
• [llvm] [libclang/python][ci] Add release Clang Python Bindings CI workflow (PR #168234)   Aiden Grossman via llvm-commits
• [llvm] workflows: Factor out artifact attestation and upload into a composite action (PR #169621)   Aiden Grossman via llvm-commits
• [llvm] [llvm] Issues found PVS studio static analyzer. LoopUnrollAndJam.cpp (PR #170162)   Aiden Grossman via llvm-commits
• [llvm] [WPD] Remove undef from tests (PR #170179)   Aiden Grossman via llvm-commits
• [llvm] [CI] Add checkmark emojis for passing builds (PR #170183)   Aiden Grossman via llvm-commits
• [llvm] [CI] Add checkmark emojis for passing builds (PR #170183)   Aiden Grossman via llvm-commits
• [llvm] [Github] Add workflow to test the issue write workflow (PR #170209)   Aiden Grossman via llvm-commits
• [llvm] [Github] Add workflow to test the issue write workflow (PR #170209)   Aiden Grossman via llvm-commits
• [compiler-rt] f3501d7 - [XRay] Mark default-options.cpp unsupported on ppc   Aiden Grossman via llvm-commits
• [compiler-rt] d6f9205 - [XRay] Mark test unsupported on armhf   Aiden Grossman via llvm-commits
• [llvm] [LLT] mark the CFI jumptable naked on Windows (PR #170371)   Aiden Grossman via llvm-commits
• [llvm] [llvm-exegesis] Make rvv/filter.test deterministic (PR #170014)   Aiden Grossman via llvm-commits
• [llvm] [CI] Report real results for aarch64 (PR #170535)   Aiden Grossman via llvm-commits
• [llvm] [Github] Add workflow to test the issue write workflow (PR #170209)   Aiden Grossman via llvm-commits
• [llvm] [Github] Add workflow to test the issue write workflow (PR #170209)   Aiden Grossman via llvm-commits
• [llvm] [Github] Make unprivileged-download-artifact download multiple artifacts (PR #170216)   Aiden Grossman via llvm-commits
• [llvm] [Github] Make unprivileged-download-artifact download multiple artifacts (PR #170216)   Aiden Grossman via llvm-commits
• [llvm] [Github] Make issue-write workflow support reading from multiple files (PR #170411)   Aiden Grossman via llvm-commits
• [llvm] [Github] Make issue-write workflow support reading from multiple files (PR #170411)   Aiden Grossman via llvm-commits
• [llvm] Multi platofmr test fork (PR #170554)   Aiden Grossman via llvm-commits
• [llvm] Multi platofmr test fork (PR #170554)   Aiden Grossman via llvm-commits
• [llvm] Multi platofmr test fork (PR #170554)   Aiden Grossman via llvm-commits
• [llvm] [Github] Make issue-write workflow support reading from multiple files (PR #170411)   Aiden Grossman via llvm-commits
• [llvm] [Github] Make issue-write workflow support reading from multiple files (PR #170411)   Aiden Grossman via llvm-commits
• [llvm] [Github][CI] Make premerge upload results on Linux and Windows (PR #170414)   Aiden Grossman via llvm-commits
• [llvm] [Github][CI] Make premerge upload results on Linux and Windows (PR #170414)   Aiden Grossman via llvm-commits
• [llvm] [Github][CI] Make premerge upload results on Linux and Windows (PR #170414)   Aiden Grossman via llvm-commits
• [llvm] [IR] Fix User use-after-destroy by zapping in ~User (PR #170575)   Aiden Grossman via llvm-commits
• [llvm] 5b30750 - [AMDGPU] Readd assertions requirement to test after #170468   Aiden Grossman via llvm-commits
• [llvm] [Support] Support debug counters in non-assertion builds (PR #170468)   Aiden Grossman via llvm-commits
• [llvm] [KCFI][NFC] Remove unused header (PR #170599)   Aiden Grossman via llvm-commits
• [llvm] [CI] Parse preceeding lines in mismatched failure messages (PR #170703)   Aiden Grossman via llvm-commits
• [llvm] [profcheck] Don't verify generated global ctors/dtors (PR #170597)   Aiden Grossman via llvm-commits
• [llvm] [profcheck] Don't verify generated global ctors/dtors (PR #170597)   Aiden Grossman via llvm-commits
• [llvm] [profcheck] Don't verify generated global ctors/dtors (PR #170597)   Aiden Grossman via llvm-commits
• [llvm] [profcheck] Don't verify generated global ctors/dtors (PR #170597)   Aiden Grossman via llvm-commits
• [llvm] [profcheck] Don't verify generated global ctors/dtors (PR #170597)   Aiden Grossman via llvm-commits
• [llvm] [CI] Parse preceeding lines in mismatched failure messages (PR #170703)   Aiden Grossman via llvm-commits
• [llvm] [InstCombine] Fix profile metadata when folding implied conditionals (PR #170756)   Aiden Grossman via llvm-commits
• [llvm] [NFC] Run UTC --check-globals on LowerTypeTests/import.ll (PR #170755)   Aiden Grossman via llvm-commits
• [llvm] [NFC] Run UTC --check-globals on LowerTypeTests/import.ll (PR #170755)   Aiden Grossman via llvm-commits
• [compiler-rt] [ASan] Disable test that sets call stack on Darwin (PR #170786)   Aiden Grossman via llvm-commits
• [compiler-rt] [ASan] Disable test that sets call stack on Darwin (PR #170786)   Aiden Grossman via llvm-commits
• [llvm] [profcheck] Remove the expected failed test cases. (PR #170787)   Aiden Grossman via llvm-commits
• [llvm] [InstCombine] Fix profile metadata when folding implied conditionals (PR #170756)   Aiden Grossman via llvm-commits
• [compiler-rt] [ASan] Disable test that sets call stack on Darwin (PR #170786)   Aiden Grossman via llvm-commits
• [compiler-rt] [ASan] Disable test that sets call stack on Darwin (PR #170786)   Aiden Grossman via llvm-commits
• [llvm] workflows/release-binaries: Use upload-release-artifact action for uploading (PR #170528)   Aiden Grossman via llvm-commits
• [compiler-rt] [ASan] Do not return from void functions in asan_abi_shim.cpp (PR #170897)   Aiden Grossman via llvm-commits
• [compiler-rt] Add API to temporalily suppress usage of ASAN's fake stack (PR #160135)   Aiden Grossman via llvm-commits
• [compiler-rt] [ASan] Do not return from void functions in asan_abi_shim.cpp (PR #170897)   Aiden Grossman via llvm-commits
• [compiler-rt] [ASan] Do not return from void functions in asan_abi_shim.cpp (PR #170897)   Aiden Grossman via llvm-commits
• [compiler-rt] [ASan] Do not return from void functions in asan_abi_shim.cpp (PR #170897)   Aiden Grossman via llvm-commits
• [compiler-rt] [ASan] Do not return from void functions in asan_abi_shim.cpp (PR #170897)   Aiden Grossman via llvm-commits
• [compiler-rt] [ASan] Do not return from void functions in asan_abi_shim.cpp (PR #170897)   Aiden Grossman via llvm-commits
• [compiler-rt] [ASan] Do not return from void functions in asan_abi_shim.cpp (PR #170897)   Aiden Grossman via llvm-commits
• [compiler-rt] 94984d5 - Reapply "[compiler-rt] Default to Lit's Internal Shell (#168232)"   Aiden Grossman via llvm-commits
• [compiler-rt] [Sanitizer] Bump soft_rss_limit_mb in test (PR #170911)   Aiden Grossman via llvm-commits
• [compiler-rt] Add API to temporalily suppress usage of ASAN's fake stack (PR #160135)   Aiden Grossman via llvm-commits
• [compiler-rt] [Sanitizer] Bump soft_rss_limit_mb in test (PR #170911)   Aiden Grossman via llvm-commits
• [compiler-rt] [Sanitizer] Bump soft_rss_limit_mb in test (PR #170911)   Aiden Grossman via llvm-commits
• [compiler-rt] [llvm] [compiler-rt] Add check-builtins target for LLVM_ENABLE_RUNTIMES builds (PR #166837)   Aiden Grossman via llvm-commits
• [compiler-rt] 7982688 - [Profile] Fix debuginfod test with internal shell   Aiden Grossman via llvm-commits
• [llvm] [Docs] Add documentation for LLVM_ENABLE_CURL (PR #170928)   Aiden Grossman via llvm-commits
• [compiler-rt] 75aa7bd - [ASan] Disable another test on Darwin due to ulimit stack issues   Aiden Grossman via llvm-commits
• [llvm] workflows/release-binaries: Use upload-release-artifact action for uploading (PR #170528)   Aiden Grossman via llvm-commits
• [compiler-rt] Reapply "[compiler-rt] Default to Lit's Internal Shell" (PR #168232)   Aiden Grossman via llvm-commits
• [llvm] 7bfdaa5 - [VPlan] Fix unused variable warning   Aiden Grossman via llvm-commits
• [clang] [llvm] CodeGen: Add LibcallLoweringInfo analysis pass (PR #168622)   Aiden Grossman via llvm-commits
• [clang] [llvm] CodeGen: Add LibcallLoweringInfo analysis pass (PR #168622)   Aiden Grossman via llvm-commits
• [llvm] Update actions/checkout action to v6 (PR #171065)   Aiden Grossman via llvm-commits
• [llvm] Update actions/checkout action to v6 (PR #171065)   Aiden Grossman via llvm-commits
• [llvm] Update actions/checkout action to v6 (PR #171065)   Aiden Grossman via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #171064)   Aiden Grossman via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Add lowering support for is_device_ptr clause (PR #169331)   Akash Banerjee via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Add lowering support for is_device_ptr clause (PR #169331)   Akash Banerjee via llvm-commits
• [flang] [llvm] [mlir] Reland "[Flang][OpenMP] Add lowering support for is_device_ptr clause (#169331)" (PR #170851)   Akash Banerjee via llvm-commits
• [llvm] [CAS] Add UnifiedOnDiskCache and OnDiskCAS (PR #114103)   Akshay Deodhar via llvm-commits
• [llvm] Reland "Redesign Straight-Line Strength Reduction (SLSR) (#162930)" (PR #169614)   Alan Li via llvm-commits
• [llvm] [AMDGPU] Propagate debug locations to compiler-generated instructions (PR #168573)   Aleksandar Spasojevic via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   Alessandro Decina via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   Alessandro Decina via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   Alessandro Decina via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   Alessandro Decina via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   Alessandro Decina via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   Alessandro Decina via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   Alessandro Decina via llvm-commits
• [llvm] [LIT] Workaround the 60 processed limit on Windows (PR #157759)   Alex Bradbury via llvm-commits
• [llvm] [LIT] Workaround the 60 processed limit on Windows (PR #157759)   Alex Bradbury via llvm-commits
• [llvm] [Draft] Support save/restore point splitting in shrink-wrap (PR #119359)   Alex Bradbury via llvm-commits
• [llvm] [Draft] Support save/restore point splitting in shrink-wrap (PR #119359)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Sources of vmerge shouldn't overlap V0 (PR #170070)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Introduce new AND combine to expose additional load narrowing opportunities (PR #170483)   Alex Bradbury via llvm-commits
• [llvm] [RISCV64] liveness analysis (PR #167454)   Alex Bradbury via llvm-commits
• [llvm] [RISCV64] liveness analysis (PR #167454)   Alex Bradbury via llvm-commits
• [llvm] [RISCV64] liveness analysis (PR #167454)   Alex Bradbury via llvm-commits
• [llvm] [OFFLOAD][LIBOMPTARGET] Start to update debug messages in libomptarget (PR #170265)   Alex Duran via llvm-commits
• [llvm] [OpenMP][Offload] Continue to update libomptarget debug messages (PR #170425)   Alex Duran via llvm-commits
• [llvm] [OpenMP][Offload] Continue to update libomptarget debug messages (PR #170425)   Alex Duran via llvm-commits
• [clang] [llvm] [clang][NVPTX] Add support for mixed-precision FP arithmetic (PR #168359)   Alex MacLean via llvm-commits
• [clang] [llvm] [clang][NVPTX] Add missing half-precision add/mul/fma intrinsics (PR #170079)   Alex MacLean via llvm-commits
• [llvm] [NFC][SROA] Clean up rewritePartition type selection process (PR #169106)   Alex MacLean via llvm-commits
• [clang] [llvm] [clang][NVPTX] Add missing half-precision add/mul/fma intrinsics (PR #170079)   Alex MacLean via llvm-commits
• [clang] [llvm] [clang][NVPTX] Add missing half-precision add/mul/fma intrinsics (PR #170079)   Alex MacLean via llvm-commits
• [clang] [llvm] [clang][NVPTX] Add missing half-precision add/mul/fma intrinsics (PR #170079)   Alex MacLean via llvm-commits
• [clang] [llvm] [clang][NVPTX] Add missing half-precision add/mul/fma intrinsics (PR #170079)   Alex MacLean via llvm-commits
• [clang] [llvm] [clang][NVPTX] Add missing half-precision add/mul/fma intrinsics (PR #170079)   Alex MacLean via llvm-commits
• [clang] [llvm] [clang][NVPTX] Add missing half-precision add/mul/fma intrinsics (PR #170079)   Alex MacLean via llvm-commits
• [clang] [llvm] [clang][NVPTX] Add missing half-precision add/mul/fma intrinsics (PR #170079)   Alex MacLean via llvm-commits
• [clang] [llvm] [clang][NVPTX] Add missing half-precision add/mul/fma intrinsics (PR #170079)   Alex MacLean via llvm-commits
• [llvm] [NFC][SROA] Clean up rewritePartition type selection process (PR #169106)   Alex MacLean via llvm-commits
• [clang] [llvm] [llvm][Triple] Add libc-less variants of some environments (PR #168042)   Alex Rønne Petersen via llvm-commits
• [llvm] [mlir] [MLIR][Python] reland (narrower) type stub generation (PR #157930)   Alex Trotta via llvm-commits
• [llvm] [mlir] [MLIR][Python] reland (narrower) type stub generation (PR #157930)   Alex Trotta via llvm-commits
• [llvm] [SPIRV] Add support for pointers to functions with aggregate args/returns as global variables / constant initialisers (PR #169595)   Alex Voicu via llvm-commits
• [llvm] [SPIRV] Add support for pointers to functions with aggregate args/returns as global variables / constant initialisers (PR #169595)   Alex Voicu via llvm-commits
• [clang] [llvm] [SPIRV] Use AMDGPU ABI for AMDGCN flavoured SPIRV (PR #169865)   Alex Voicu via llvm-commits
• [clang] [llvm] [SPIRV] Use AMDGPU ABI for AMDGCN flavoured SPIRV (PR #169865)   Alex Voicu via llvm-commits
• [llvm] [SPIRV] Add `<2 x half>` and `<4 x half>` atomics via `SPV_NV_shader_atomic_fp16_vector` (PR #170213)   Alex Voicu via llvm-commits
• [llvm] [SPIRV] Add support for pointers to functions with aggregate args/returns as global variables / constant initialisers (PR #169595)   Alex Voicu via llvm-commits
• [llvm] [SPIRV] Add support for pointers to functions with aggregate args/returns as global variables / constant initialisers (PR #169595)   Alex Voicu via llvm-commits
• [llvm] [SPIRV] Add support for pointers to functions with aggregate args/returns as global variables / constant initialisers (PR #169595)   Alex Voicu via llvm-commits
• [llvm] [SPIRV] Add support for pointers to functions with aggregate args/returns as global variables / constant initialisers (PR #169595)   Alex Voicu via llvm-commits
• [llvm] [SPIRV] Add support for pointers to functions with aggregate args/returns as global variables / constant initialisers (PR #169595)   Alex Voicu via llvm-commits
• [llvm] [SPIRV] Start adding support for `int128` (PR #170798)   Alex Voicu via llvm-commits
• [llvm] [SPIRV] Start adding support for `int128` (PR #170798)   Alex Voicu via llvm-commits
• [llvm] [SPIRV] Add `<2 x half>` and `<4 x half>` atomics via `SPV_NV_shader_atomic_fp16_vector` (PR #170213)   Alex Voicu via llvm-commits
• [llvm] [SPIRV] Start adding support for `int128` (PR #170798)   Alex Voicu via llvm-commits
• [llvm] [SPIRV] Start adding support for `int128` (PR #170798)   Alex Voicu via llvm-commits
• [clang] [llvm] [SPIRV] Use AMDGPU ABI for AMDGCN flavoured SPIRV (PR #169865)   Alex Voicu via llvm-commits
• [llvm] [SPIRV] Add support for pointers to functions with aggregate args/returns as global variables / constant initialisers (PR #169595)   Alex Voicu via llvm-commits
• [llvm] [SPIRV] Add support for pointers to functions with aggregate args/returns as global variables / constant initialisers (PR #169595)   Alex Voicu via llvm-commits
• [clang] [llvm] [HLSL] Implement ddx and ddy HLSL intrinsics (PR #168887)   Alexander Johnston via llvm-commits
• [libcxx] [llvm] [LIT] remove `to_unicode`, `to_string`, and `to_bytes` helpers (PR #165950)   Alexander Richardson via llvm-commits
• [llvm] [RISCV][NFC] Simplify Imm range checks (PR #170497)   Alexander Richardson via llvm-commits
• [llvm] [RISCV][NFC] Simplify Imm range checks (PR #170497)   Alexander Richardson via llvm-commits
• [llvm] [RISCV][NFC] Simplify Imm range checks (PR #170497)   Alexander Richardson via llvm-commits
• [llvm] [RISCV][NFC] Simplify Imm range checks (PR #170497)   Alexander Richardson via llvm-commits
• [llvm] [LLVM][IR] Add support for address space names in DataLayout (PR #170559)   Alexander Richardson via llvm-commits
• [llvm] [LLVM][IR] Add support for address space names in DataLayout (PR #170559)   Alexander Richardson via llvm-commits
• [llvm] [LLVM][IR] Add support for address space names in DataLayout (PR #170559)   Alexander Richardson via llvm-commits
• [llvm] [LLVM][IR] Add support for address space names in DataLayout (PR #170559)   Alexander Richardson via llvm-commits
• [llvm] [LLVM][IR] Add support for address space names in DataLayout (PR #170559)   Alexander Richardson via llvm-commits
• [llvm] [TableGen] Report a better error when an InstAlias does not use a RegClass (PR #168444)   Alexander Richardson via llvm-commits
• [llvm] [TableGen] CodeGenInstAlias: reduce calls to isSubClassOf. NFCI (PR #170767)   Alexander Richardson via llvm-commits
• [llvm] [llvm-dwp] Fix FoundCUUnit problem on soft-stop with DWARF5 (PR #169783)   Alexander Yermolovich via llvm-commits
• [llvm] [llvm-dwp] Fix FoundCUUnit problem on soft-stop with DWARF5 (PR #169783)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT] Make safe ICF work with relative vtable (PR #170629)   Alexander Yermolovich via llvm-commits
• [lld] [llvm] [LLD][COFF] Prefetch inputs early-on to improve link times (PR #169224)   Alexandre Ganea via llvm-commits
• [lld] [llvm] [LLD][COFF] Prefetch inputs early-on to improve link times (PR #169224)   Alexandre Ganea via llvm-commits
• [lld] [llvm] [LLD][COFF] Prefetch inputs early-on to improve link times (PR #169224)   Alexandre Ganea via llvm-commits
• [lld] [llvm] [LLD][COFF] Prefetch inputs early-on to improve link times (PR #169224)   Alexandre Ganea via llvm-commits
• [llvm] [SYCL] Add platform enumeration and info query using liboffload (PR #166927)   Alexey Bader via llvm-commits
• [llvm] [SYCL] Add platform enumeration and info query using liboffload (PR #166927)   Alexey Bader via llvm-commits
• [llvm] [SYCL] Add platform enumeration and info query using liboffload (PR #166927)   Alexey Bader via llvm-commits
• [llvm] [SYCL] Add platform enumeration and info query using liboffload (PR #166927)   Alexey Bader via llvm-commits
• [llvm] [SYCL] Add platform enumeration and info query using liboffload (PR #166927)   Alexey Bader via llvm-commits
• [clang] [llvm] Make OpenCL an OSType rather than an EnvironmentType. (PR #170297)   Alexey Bader via llvm-commits
• [clang] [llvm] Make OpenCL an OSType rather than an EnvironmentType. (PR #170297)   Alexey Bader via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Alexey Bataev via llvm-commits
• [llvm] [SLP][NFC]Simplify analysis of the scalars, NFC. (PR #170382)   Alexey Bataev via llvm-commits
• [llvm] [SLP][NFC]Simplify analysis of the scalars, NFC. (PR #170382)   Alexey Bataev via llvm-commits
• [llvm] [DA] Add batch delinearization support for improved precision (PR #170519)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Enable float point math ops as copyables elements. (PR #169857)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Enable float point math ops as copyables elements. (PR #169857)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Enable float point math ops as copyables elements. (PR #169857)   Alexey Bataev via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Alexey Bataev via llvm-commits
• [clang] [llvm] CodeGen: Add LibcallLoweringInfo analysis pass (PR #168622)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP][clang] Register Vtables on device for indirect calls (PR #159856)   Alexey Bataev via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Handle check for non-contiguous mapping in pointer-based array sections (PR #157443)   Alexey Bataev via llvm-commits
• [llvm] [LowerMemIntrinsics] Factor control flow generation out of the memcpy lowering (PR #169039)   Alexey Bataev via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Alexey Bataev via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP][clang] Register Vtables on device for indirect calls (PR #159856)   Alexey Bataev via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   Alexey Moksyakov via llvm-commits
• [llvm] [BOLT] Allow missing DT_FINI{,_ARRAY} if instrumentation-sleep-time is used (PR #170086)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   Alexey Moksyakov via llvm-commits
• [llvm] Revert "[BOLT][AArch64] Fixed indirect call instrumentation snippet" (PR #170874)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   Alexey Moksyakov via llvm-commits
• [libc] [llvm] [libc] Templatize strtointeger implementation. (PR #165884)   Alexey Samsonov via llvm-commits
• [llvm] Add a filegroup containing _all_ sources to the libc build rules (PR #169155)   Alexey Samsonov via llvm-commits
• [llvm] Add a filegroup containing _all_ sources to the libc build rules (PR #169155)   Alexey Samsonov via llvm-commits
• [llvm] [IR] Don't store switch case values as operands (PR #166842)   Alexis Engelke via llvm-commits
• [clang] [llvm] [RFC][LLVM][Clang] Add LLVM plugin hook for back-ends (PR #170846)   Alexis Engelke via llvm-commits
• [llvm] [IR] Don't store switch case values as operands (PR #166842)   Alexis Engelke via llvm-commits
• [clang] [llvm] [RFC][LLVM][Clang] Add LLVM plugin hook for back-ends (PR #170846)   Alexis Engelke via llvm-commits
• [llvm] [IR] Don't store switch case values as operands (PR #170984)   Alexis Engelke via llvm-commits
• [llvm] [IR] Don't store switch case values as operands (PR #166842)   Alexis Engelke via llvm-commits
• [llvm] [IR] Don't store switch case values as operands (PR #170984)   Alexis Engelke via llvm-commits
• [llvm] [IR] Don't store switch case values as operands (PR #170984)   Alexis Engelke via llvm-commits
• [llvm] [IR] Don't store switch case values as operands (PR #170984)   Alexis Engelke via llvm-commits
• [llvm] [SROA] Unify the names of new instructions created in SROA. (PR #167917)   Alina Sbirlea via llvm-commits
• [llvm] [AArch64][GISel] Add legalizer support for @llvm.umul.with.overflow.i128 (PR #170101)   Amara Emerson via llvm-commits
• [llvm] [AArch64][GlobalISel] Don't crash when legalising G_*MIN/G_*MAX of pointer vector (PR #168872)   Amara Emerson via llvm-commits
• [llvm] [AArch64][GlobalISel] Don't crash when legalising G_*MIN/G_*MAX of pointer vector (PR #168872)   Amara Emerson via llvm-commits
• [llvm] [AArch64] Fold scalar-to-vector shuffles into DUP/FMOV (PR #166962)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Fold scalar-to-vector shuffles into DUP/FMOV (PR #166962)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Fold scalar-to-vector shuffles into DUP/FMOV (PR #166962)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Fold scalar-to-vector shuffles into DUP/FMOV (PR #166962)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Fold scalar-to-vector shuffles into DUP/FMOV (PR #166962)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Fold scalar-to-vector shuffles into DUP/FMOV (PR #166962)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Fold scalar-to-vector shuffles into DUP/FMOV (PR #166962)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Fold scalar-to-vector shuffles into DUP/FMOV (PR #166962)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Fold scalar-to-vector shuffles into DUP/FMOV (PR #166962)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Fold scalar-to-vector shuffles into DUP/FMOV (PR #166962)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Fold scalar-to-vector shuffles into DUP/FMOV (PR #166962)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Allow single-element vector FP converts with +fprcvt (PR #169692)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Allow single-element vector FP converts with +fprcvt (PR #169692)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Allow single-element vector FP converts with +fprcvt (PR #169692)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Allow single-element vector FP converts with +fprcvt (PR #169692)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Allow single-element vector FP converts with +fprcvt (PR #169692)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Allow single-element vector FP converts with +fprcvt (PR #169692)   Amina Chabane via llvm-commits
• [clang] [llvm] [Offload][Tests] Non-contiguous_update_to_tests (PR #169623)   Amit Tiwari via llvm-commits
• [clang] [llvm] Testing checks (PR #170087)   Amit Tiwari via llvm-commits
• [clang] [llvm] [Offload][Tests] Non-contiguous_update_to_tests (PR #169623)   Amit Tiwari via llvm-commits
• [clang] [llvm] [Offload][Tests] Non-contiguous_update_to_tests (PR #169623)   Amit Tiwari via llvm-commits
• [clang] [llvm] [Offload][Tests] Non-contiguous_update_to_tests (PR #169623)   Amit Tiwari via llvm-commits
• [clang] [llvm] [Offload][Tests] Non-contiguous_update_to_tests (PR #169623)   Amit Tiwari via llvm-commits
• [clang] [llvm] [Offload][Tests] Non-contiguous_update_to_tests (PR #169623)   Amit Tiwari via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Handle check for non-contiguous mapping in pointer-based array sections (PR #157443)   Amit Tiwari via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Handle check for non-contiguous mapping in pointer-based array sections (PR #157443)   Amit Tiwari via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Handle check for non-contiguous mapping in pointer-based array sections (PR #157443)   Amit Tiwari via llvm-commits
• [clang] [llvm] Testing handle (PR #170287)   Amit Tiwari via llvm-commits
• [clang] [llvm] Testing handle (PR #170287)   Amit Tiwari via llvm-commits
• [clang] [llvm] Testing handle (PR #170287)   Amit Tiwari via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Handle check for non-contiguous mapping in pointer-based array sections (PR #157443)   Amit Tiwari via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Handle check for non-contiguous mapping in pointer-based array sections (PR #157443)   Amit Tiwari via llvm-commits
• [clang] [llvm] [CIR] Support x86 builtin rotate (PR #169566)   Amr Hesham via llvm-commits
• [llvm] [AArch64][PAC] Refactor discriminator emission in AsmPrinter (NFC) (PR #160900)   Anatoly Trosinenko via llvm-commits
• [llvm] [AArch64][PAC] Refactor discriminator emission in AsmPrinter (NFC) (PR #160900)   Anatoly Trosinenko via llvm-commits
• [llvm] [AArch64][PAC] Refactor discriminator emission in AsmPrinter (NFC) (PR #160900)   Anatoly Trosinenko via llvm-commits
• [llvm] [AArch64][PAC] Refactor discriminator emission in AsmPrinter (NFC) (PR #160900)   Anatoly Trosinenko via llvm-commits
• [llvm] [ADT] BitVector: give `subsetOf(RHS)` name to `!test(RHS)` (NFC) (PR #170875)   Anatoly Trosinenko via llvm-commits
• [llvm] [ADT] BitVector: give `subsetOf(RHS)` name to `!test(RHS)` (NFC) (PR #170875)   Anatoly Trosinenko via llvm-commits
• [llvm] [ADT] BitVector: give `subsetOf(RHS)` name to `!test(RHS)` (NFC) (PR #170875)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Gadget scanner: optionally assume auth traps on failure (PR #139778)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Gadget scanner: detect non-protected indirect calls (PR #131899)   Anatoly Trosinenko via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Andreas Jonson via llvm-commits
• [compiler-rt] [sanitizer_common] [Darwin] Replace pty with pipe on posix_spawn path for spawning symbolizer (PR #170809)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [sanitizer_common] [Darwin] Replace pty with pipe on posix_spawn path for spawning symbolizer (PR #170809)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [sanitizer_common] [Darwin] Replace pty with pipe on posix_spawn path for spawning symbolizer (PR #170809)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [sanitizer_common] [Darwin] Add inline frame support for AtosSymbolizer (PR #170815)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [sanitizer_common] [Darwin] Add inline frame support for AtosSymbolizer (PR #170815)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [sanitizer_common] [Darwin] Add inline frame support for AtosSymbolizer (PR #170815)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [sanitizer_common] [Darwin] Add inline frame support for AtosSymbolizer (PR #170815)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [sanitizer_common] Fix missing `check-sanitizer` deps under LLVM_ENABLE_RUNTIMES (PR #170817)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [sanitizer_common] [Darwin] Replace pty with pipe on posix_spawn path for spawning symbolizer (PR #170809)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [sanitizer_common] Fix missing `check-sanitizer` deps under LLVM_ENABLE_RUNTIMES (PR #170817)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [ASan] Disable test that sets call stack on Darwin (PR #170786)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [ASan] Disable test that sets call stack on Darwin (PR #170786)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [llvm] [compiler-rt] Add check-builtins target for LLVM_ENABLE_RUNTIMES builds (PR #166837)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [sanitizer_common] [Darwin] Replace pty with pipe on posix_spawn path for spawning symbolizer (PR #170809)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [sanitizer_common] [Darwin] Replace pty with pipe on posix_spawn path for spawning symbolizer (PR #170809)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [sanitizer_common] [Darwin] Replace pty with pipe on posix_spawn path for spawning symbolizer (PR #170809)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [llvm] [compiler-rt] Add check-builtins target for LLVM_ENABLE_RUNTIMES builds (PR #166837)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [llvm] [compiler-rt] Add check-builtins target for LLVM_ENABLE_RUNTIMES builds (PR #166837)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [llvm] [compiler-rt] Add check-builtins target for LLVM_ENABLE_RUNTIMES builds (PR #166837)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [llvm] [compiler-rt] Add check-builtins target for LLVM_ENABLE_RUNTIMES builds (PR #166837)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [llvm] [compiler-rt] Add check-builtins target for LLVM_ENABLE_RUNTIMES builds (PR #166837)   Andrew Haberlandt via llvm-commits
• [clang] [llvm] [clang/LLVM] Add function level flatten_depth attribute for depth-limited inlining (PR #165777)   Andrew Pinski via llvm-commits
• [llvm] Remove LLVM_ABI from members of RuntimeLibraryAnalysis (NFC) (PR #170850)   Andrew Rogers via llvm-commits
• [clang] [llvm] [CIR] Support x86 builtin rotate (PR #169566)   Andy Kaylor via llvm-commits
• [clang] [llvm] [CIR] Support x86 builtin rotate (PR #169566)   Andy Kaylor via llvm-commits
• [clang] [llvm] [CIR] Support x86 builtin rotate (PR #169566)   Andy Kaylor via llvm-commits
• [clang] [llvm] [CIR] Support x86 builtin rotate (PR #169566)   Andy Kaylor via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Andy Kaylor via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Andy Kaylor via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Andy Kaylor via llvm-commits
• [clang] [llvm] [CIR] Support x86 builtin rotate (PR #169566)   Andy Kaylor via llvm-commits
• [clang] [llvm] [CIR] Support x86 builtin rotate (PR #169566)   Andy Kaylor via llvm-commits
• [clang] [llvm] [CIR] X86 vector masked load builtins (PR #169464)   Andy Kaylor via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Andy Kaylor via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Andy Kaylor via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Andy Kaylor via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Andy Kaylor via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Andy Kaylor via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Andy Kaylor via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Andy Kaylor via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Andy Kaylor via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Andy Kaylor via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Andy Kaylor via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Andy Kaylor via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Andy Kaylor via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Andy Kaylor via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Andy Kaylor via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - ICMP_SLT(X, 0) - only sign mask of X is required (PR #164946)   Anikesh Parashar via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - ICMP_SLT(X, 0) - only sign mask of X is required (PR #164946)   Anikesh Parashar via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - ICMP_SLT(X, 0) - only sign mask of X is required (PR #164946)   Anikesh Parashar via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - ICMP_SLT(X, 0) - only sign mask of X is required (PR #164946)   Anikesh Parashar via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - ICMP_SLT(X, 0) - only sign mask of X is required (PR #164946)   Anikesh Parashar via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - ICMP_SLT(X, 0) - only sign mask of X is required (PR #164946)   Anikesh Parashar via llvm-commits
• [llvm] [DAG] Precommit test for PR #164946 - Update Tests SimplifyDemandedBits - ICMP_SLT(X,0) - only sign mask of X is required (PR #171030)   Anikesh Parashar via llvm-commits
• [llvm] [DAG] Precommit test for PR #164946 - Update Tests SimplifyDemandedBits - ICMP_SLT(X,0) - only sign mask of X is required (PR #171030)   Anikesh Parashar via llvm-commits
• [llvm] [DAG] Precommit test for PR #164946 - Update Tests SimplifyDemandedBits - ICMP_SLT(X,0) - only sign mask of X is required (PR #171030)   Anikesh Parashar via llvm-commits
• [llvm] [DAG] Precommit test for PR #164946 - Update Tests SimplifyDemandedBits - ICMP_SLT(X,0) - only sign mask of X is required (PR #171030)   Anikesh Parashar via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - ICMP_SLT(X, 0) - only sign mask of X is required (PR #164946)   Anikesh Parashar via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - ICMP_SLT(X, 0) - only sign mask of X is required (PR #164946)   Anikesh Parashar via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - ICMP_SLT(X, 0) - only sign mask of X is required (PR #164946)   Anikesh Parashar via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - ICMP_SLT(X, 0) - only sign mask of X is required (PR #164946)   Anikesh Parashar via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Anshil Gandhi via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Serialize disjoint MFMA chains to hide DS_READ latency (PR #170242)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Serialize disjoint MFMA chains to hide DS_READ latency (PR #170242)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Serialize disjoint MFMA chains to hide DS_READ latency (PR #170242)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Serialize disjoint MFMA chains to hide DS_READ latency (PR #170242)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Serialize disjoint MFMA chains to hide DS_READ latency (PR #170242)   Anshil Gandhi via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Anshil Gandhi via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Anshil Gandhi via llvm-commits
• [llvm] Revert "[LSV] Merge contiguous chains across scalar types" (PR #170381)   Anshil Gandhi via llvm-commits
• [llvm] Revert "[LSV] Merge contiguous chains across scalar types" (PR #170381)   Anshil Gandhi via llvm-commits
• [llvm] Revert "[LSV] Merge contiguous chains across scalar types" (PR #170381)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Allow negative offsets in scratch instructions (PR #166979)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Allow negative offsets in scratch instructions (PR #166979)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Allow negative offsets in scratch instructions (PR #166979)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Allow negative offsets in scratch instructions (PR #166979)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Allow negative offsets in scratch instructions (PR #166979)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Allow negative offsets in scratch instructions (PR #166979)   Anshil Gandhi via llvm-commits
• [llvm] [CodeGen] Consider imm offsets when sorting framerefs (PR #166979)   Anshil Gandhi via llvm-commits
• [llvm] [CodeGen] Consider imm offsets when sorting framerefs (PR #166979)   Anshil Gandhi via llvm-commits
• [llvm] [CodeGen] Consider imm offsets when sorting framerefs (PR #166979)   Anshil Gandhi via llvm-commits
• [llvm] [CodeGen] Consider imm offsets when sorting framerefs (PR #166979)   Anshil Gandhi via llvm-commits
• [llvm] [CodeGen] Consider imm offsets when sorting framerefs (PR #166979)   Anshil Gandhi via llvm-commits
• [llvm] [CodeGen] Consider imm offsets when sorting framerefs (PR #166979)   Anshil Gandhi via llvm-commits
• [llvm] [CodeGen] Consider imm offsets when sorting framerefs (PR #166979)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Scavenge a VGPR to eliminate a frame index (PR #166979)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Scavenge a VGPR to eliminate a frame index (PR #166979)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Scavenge a VGPR to eliminate a frame index (PR #166979)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Scavenge a VGPR to eliminate a frame index (PR #166979)   Anshil Gandhi via llvm-commits
• [llvm] [CodeGen] Consider imm offsets when sorting framerefs (PR #171012)   Anshil Gandhi via llvm-commits
• [llvm] Precommit test for PR #171012 (PR #171013)   Anshil Gandhi via llvm-commits
• [llvm] [BasicAA][TLI] Local-linkage or non-thread-local globals may not alias errno (PR #170290)   Antonio Frighetto via llvm-commits
• [llvm] [BasicAA][TLI] Local-linkage or non-thread-local globals may not alias errno (PR #170290)   Antonio Frighetto via llvm-commits
• [llvm] [BasicAA][TLI] Local-linkage or non-thread-local globals may not alias errno (PR #170290)   Antonio Frighetto via llvm-commits
• [llvm] [BasicAA][TLI] Local-linkage or non-thread-local globals may not alias errno (PR #170290)   Antonio Frighetto via llvm-commits
• [llvm] [BasicAA][TLI] Local-linkage or non-thread-local globals may not alias errno (PR #170290)   Antonio Frighetto via llvm-commits
• [llvm] [BasicAA][TLI] Local-linkage or non-thread-local globals may not alias errno (PR #170290)   Antonio Frighetto via llvm-commits
• [llvm] [BasicAA][TLI] Treat local-linkage globals or known environments as not aliasing errno (PR #170290)   Antonio Frighetto via llvm-commits
• [llvm] [BasicAA][TLI] Treat local-linkage globals or known environments as not aliasing errno (PR #170290)   Antonio Frighetto via llvm-commits
• [llvm] Avoid maxnum(sNaN, x) optimizations / folds (PR #170181)   Artem Belevich via llvm-commits
• [llvm] Avoid maxnum(sNaN, x) optimizations / folds (PR #170181)   Artem Belevich via llvm-commits
• [llvm] Avoid maxnum(sNaN, x) optimizations / folds (PR #170181)   Artem Belevich via llvm-commits
• [clang] [llvm] [clang][NVPTX] Add missing half-precision add/sub/fma intrinsics (PR #170079)   Artem Belevich via llvm-commits
• [clang] [llvm] [clang][NVPTX] Add missing half-precision add/sub/fma intrinsics (PR #170079)   Artem Belevich via llvm-commits
• [clang] [llvm] [clang][NVPTX] Add missing half-precision add/mul/fma intrinsics (PR #170079)   Artem Belevich via llvm-commits
• [llvm] [MachineBasicBlock] Don't split loop header successor if the terminator is unanalyzable (PR #170146)   Artem Belevich via llvm-commits
• [llvm] [MachineBasicBlock] Don't split loop header successor if the terminator is unanalyzable (PR #170146)   Artem Belevich via llvm-commits
• [llvm] [MachineBasicBlock] Don't split loop header successor if the terminator is unanalyzable (PR #170146)   Artem Belevich via llvm-commits
• [llvm] [MachineBasicBlock] Don't split loop header successor if the terminator is unanalyzable (PR #170146)   Artem Belevich via llvm-commits
• [llvm] [LoadStoreVectorizer] Fill gaps in load/store chains to enable vectorization (PR #159388)   Artem Belevich via llvm-commits
• [llvm] [LoadStoreVectorizer] Fill gaps in load/store chains to enable vectorization (PR #159388)   Artem Belevich via llvm-commits
• [llvm] [LoadStoreVectorizer] Allow redundant stores (PR #169946)   Artem Belevich via llvm-commits
• [llvm] Add regression tests (PR #170972)   Artemiy Romanov via llvm-commits
• [llvm] Add regression tests (PR #170972)   Artemiy Romanov via llvm-commits
• [llvm] Add regression tests (PR #170972)   Artemiy Romanov via llvm-commits
• [llvm] Add regression tests (PR #170972)   Artemiy Romanov via llvm-commits
• [llvm] Add regression tests (PR #170972)   Artemiy Romanov via llvm-commits
• [llvm] Add regression tests (PR #170972)   Artemiy Romanov via llvm-commits
• [llvm] llvm-reduce: Add pass to sink defs to uses (PR #170317)   Arthur Eubanks via llvm-commits
• [llvm] [DAG] SDPatternMatch - Fix m_Reassociatable mismatching (PR #170061)   Artur Bermond Torres via llvm-commits
• [llvm] [DAG] SDPatternMatch - Fix m_Reassociatable mismatching (PR #170061)   Artur Bermond Torres via llvm-commits
• [llvm] [DAG] SDPatternMatch - Fix m_Reassociatable mismatching (PR #170061)   Artur Bermond Torres via llvm-commits
• [llvm] [DAG] SDPatternMatch - Fix m_Reassociatable mismatching (PR #170061)   Artur Bermond Torres via llvm-commits
• [llvm] [DAG] SDPatternMatch - Fix m_Reassociatable mismatching (PR #170061)   Artur Bermond Torres via llvm-commits
• [llvm] [DAG] SDPatternMatch - Fix m_Reassociatable mismatching (PR #170061)   Artur Bermond Torres via llvm-commits
• [llvm] [DAG] SDPatternMatch - Fix m_Reassociatable mismatching (PR #170061)   Artur Bermond Torres via llvm-commits
• [llvm] [DAG] SDPatternMatch - Fix m_Reassociatable mismatching (PR #170061)   Artur Bermond Torres via llvm-commits
• [llvm] [DAG] SDPatternMatch - Fix m_Reassociatable mismatching (PR #170061)   Artur Bermond Torres via llvm-commits
• [llvm] [DAG] SDPatternMatch - Fix m_Reassociatable mismatching (PR #170061)   Artur Bermond Torres via llvm-commits
• [llvm] [DAG] SDPatternMatch - Fix m_Reassociatable mismatching (PR #170061)   Artur Bermond Torres via llvm-commits
• [llvm] [BOLT] Check if symbol is in data area of function (PR #160143)   Asher Dobrescu via llvm-commits
• [llvm] [BOLT] Check if symbol is in data area of function (PR #160143)   Asher Dobrescu via llvm-commits
• [llvm] [llvm-mca][AArch64] Refactor Neoverse tests to split out common inputs (NFC) (PR #170324)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Compare and branch set twice in Neoverse V1/N1 sched (NFC) (PR #170498)   Asher Dobrescu via llvm-commits
• [llvm] [AMDGPU] Add scaffolding for ML focused scheduling strategy (PR #169616)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU] Add scaffolding for ML focused scheduling strategy (PR #169616)   Austin Kerbow via llvm-commits
• [clang-tools-extra] [llvm] [Github][CI] Add `doc8` for clang-tidy documentation formatting (PR #168827)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [Github][CI] Add `doc8` for clang-tidy documentation formatting (PR #168827)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [Github][CI] Add `doc8` for clang-tidy documentation formatting (PR #168827)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [Github][CI] Add `doc8` for clang-tidy documentation formatting (PR #168827)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [Github][CI] Add `doc8` for clang-tidy documentation formatting (PR #168827)   Baranov Victor via llvm-commits
• [clang-tools-extra] [llvm] [Github][CI] Introduce `LintHelper` class in `code-lint-helper.py` (PR #168827)   Baranov Victor via llvm-commits
• [lld] [llvm] [DTLTO][ELF][COFF] Add archive support for DTLTO. (PR #157043)   Ben Dunbobbin via llvm-commits
• [llvm] [AArch64][SME] Support saving/restoring ZT0 in the MachineSMEABIPass (PR #166362)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Avoid clobbering X0 in the MachineSMEABIPass (PR #170131)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Avoid clobbering X0 in the MachineSMEABIPass (PR #170131)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] recognise trn1/trn2 with flipped operands (PR #169858)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] recognise trn1/trn2 with flipped operands (PR #169858)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] recognise trn1/trn2 with flipped operands (PR #169858)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] recognise trn1/trn2 with flipped operands (PR #169858)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] recognise trn1/trn2 with flipped operands (PR #169858)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Lower memchr to __arm_sc_memchr in streaming[-compatible] functions (PR #168896)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Lower memchr to __arm_sc_memchr in streaming[-compatible] functions (PR #168896)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Lower memchr to __arm_sc_memchr in streaming[-compatible] functions (PR #168896)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Disable illegal extract_subvector splitting for scalable vectors (PR #170315)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Disable illegal extract_subvector splitting for scalable vectors (PR #170315)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Benjamin Maxwell via llvm-commits
• [llvm] Reduced neon non-const strided load cost (PR #169731)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Fix Windows prologue handling to pair more registers. (PR #170214)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Fix Windows prologue handling to pair more registers. (PR #170214)   Benjamin Maxwell via llvm-commits
• [llvm] Add `llvm.vector.partial.reduce.fadd` intrinsic (PR #159776)   Benjamin Maxwell via llvm-commits
• [llvm] Add `llvm.vector.partial.reduce.fadd` intrinsic (PR #159776)   Benjamin Maxwell via llvm-commits
• [llvm] Add LoopVectorizer support for `llvm.vector.partial.reduce.fadd` (PR #163975)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Enable maximising scalable vector bandwidth (PR #166748)   Benjamin Maxwell via llvm-commits
• [llvm] [SelectionDAG] Fix unsafe cases for loop.dependence.{war/raw}.mask (PR #168565)   Benjamin Maxwell via llvm-commits
• [llvm] [SelectionDAG] Fix unsafe cases for loop.dependence.{war/raw}.mask (PR #168565)   Benjamin Maxwell via llvm-commits
• [llvm] [SelectionDAG] Fix unsafe cases for loop.dependence.{war/raw}.mask (PR #168565)   Benjamin Maxwell via llvm-commits
• [llvm] [SelectionDAG] Fix unsafe cases for loop.dependence.{war/raw}.mask (PR #168565)   Benjamin Maxwell via llvm-commits
• [llvm] [SelectionDAG] Fix unsafe cases for loop.dependence.{war/raw}.mask (PR #168565)   Benjamin Maxwell via llvm-commits
• [llvm] [SelectionDAG] Fix unsafe cases for loop.dependence.{war/raw}.mask (PR #168565)   Benjamin Maxwell via llvm-commits
• [llvm] [SelectionDAG] Fix unsafe cases for loop.dependence.{war/raw}.mask (PR #168565)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Lower v8bf16 FMUL to BFMLAL top/bottom with +sve (PR #169655)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Lower v8bf16 FMUL to BFMLAL top/bottom with +sve (PR #169655)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Fix Windows prologue handling to pair more registers. (PR #170214)   Benjamin Maxwell via llvm-commits
• [llvm] [CodeGen] Replace (Min,Max)CSFrameIndex with flag on frame object [NFCI] (PR #170905)   Benjamin Maxwell via llvm-commits
• [llvm] [CodeGen] Replace (Min,Max)CSFrameIndex with flag on frame object [NFCI] (PR #170905)   Benjamin Maxwell via llvm-commits
• [llvm] [CodeGen] Replace (Min,Max)CSFrameIndex with flag on frame object [NFCI] (PR #170905)   Benjamin Maxwell via llvm-commits
• [llvm] [CodeGen] Replace (Min,Max)CSFrameIndex with flag on frame object [NFCI] (PR #170905)   Benjamin Maxwell via llvm-commits
• [llvm] [CodeGen] Replace (Min,Max)CSFrameIndex with flag on frame object [NFCI] (PR #170905)   Benjamin Maxwell via llvm-commits
• [llvm] [ADT] Add `llvm::conditionally_reverse()` iterator (PR #171040)   Benjamin Maxwell via llvm-commits
• [llvm] [ADT] Add `llvm::conditionally_reverse()` iterator (PR #171040)   Benjamin Maxwell via llvm-commits
• [llvm] [ADT] Add `llvm::conditionally_reverse()` iterator (PR #171040)   Benjamin Maxwell via llvm-commits
• [llvm] [ADT] Add `llvm::conditionally_reverse()` iterator (PR #171040)   Benjamin Maxwell via llvm-commits
• [llvm] [ADT] Add `llvm::conditionally_reverse()` iterator (PR #171040)   Benjamin Maxwell via llvm-commits
• [llvm] [ADT] Add `llvm::conditionally_reverse()` iterator (PR #171040)   Benjamin Maxwell via llvm-commits
• [llvm] [ADT] Add `llvm::conditionally_reverse()` iterator (PR #171040)   Benjamin Maxwell via llvm-commits
• [llvm] [ADT] Add `llvm::conditionally_reverse()` iterator (PR #171040)   Benjamin Maxwell via llvm-commits
• [llvm] [ADT] Add `llvm::conditionally_reverse()` iterator (PR #171040)   Benjamin Maxwell via llvm-commits
• [llvm] [ADT] Add `llvm::conditionally_reverse()` iterator (PR #171040)   Benjamin Maxwell via llvm-commits
• [llvm] [ADT] Add `llvm::conditionally_reverse()` iterator (PR #171040)   Benjamin Maxwell via llvm-commits
• [llvm] [ADT] Add `llvm::reverse_conditionally()` iterator (PR #171040)   Benjamin Maxwell via llvm-commits
• [llvm] [ADT] Add `llvm::reverse_conditionally()` iterator (PR #171040)   Benjamin Maxwell via llvm-commits
• [llvm] [ADT] Add `llvm::reverse_conditionally()` iterator (PR #171040)   Benjamin Maxwell via llvm-commits
• [llvm] [ADT] Add `llvm::reverse_conditionally()` iterator (PR #171040)   Benjamin Maxwell via llvm-commits
• [llvm] [ADT] Add `llvm::reverse_conditionally()` iterator (PR #171040)   Benjamin Maxwell via llvm-commits
• [llvm] [LowerConstantIntrinsics] Improve tests related to llvm.objectsize. NFC (PR #132364)   Björn Pettersson via llvm-commits
• [llvm] [LowerConstantIntrinsics] Improve tests related to llvm.objectsize. NFC (PR #132364)   Björn Pettersson via llvm-commits
• [llvm] [LowerConstantIntrinsics] Improve tests related to llvm.objectsize. NFC (PR #132364)   Björn Pettersson via llvm-commits
• [llvm] [SPARC] Remove CCIfConsecutiveRegs for f128 returns (PR #170133)   Brad Smith via llvm-commits
• [llvm] [SPARC] Remove CCIfConsecutiveRegs for f128 returns (PR #170133)   Brad Smith via llvm-commits
• [llvm] [Mips] Mark function calls as possibly changing FCSR (FCR31) (PR #170314)   Brad Smith via llvm-commits
• [llvm] [mips][micromips] Add mayRaiseFPException to appropriate instructions, mark all instructions that read FCSR (FCR31) rounding bits as doing so (PR #170322)   Brad Smith via llvm-commits
• [llvm] [Mips] Support "$sp" named register (PR #136821)   Brad Smith via llvm-commits
• [compiler-rt] Revert "[FMV][AArch64] Add initial AT_HWCAP3 / AT_HWCAP4 support (#161595)" (PR #171071)   Brad Smith via llvm-commits
• [compiler-rt] Revert "[FMV][AArch64] Add initial AT_HWCAP3 / AT_HWCAP4 support (#161595)" (PR #171071)   Brad Smith via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] fix i386 build for Haiku (PR #171075)   Brad Smith via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] fix i386 build for Haiku (PR #171075)   Brad Smith via llvm-commits
• [llvm] [NFC][RISCV] Correct fminimumnum test case (PR #170169)   Brandon Wu via llvm-commits
• [clang] [llvm] [RISCV] Update P extension to the 018 version of the spec. (PR #170399)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Remove zvfh and experimental-zvfbfmin from the tests for xsfmm. (PR #170589)   Brandon Wu via llvm-commits
• [llvm] [NFC][RISCV] Cleanup unused attributes in xsfmm tests (PR #170601)   Brandon Wu via llvm-commits
• [llvm] [NFC][RISCV] Cleanup unused attributes in xsfmm tests (PR #170601)   Brandon Wu via llvm-commits
• [llvm] [NFC][RISCV] Cleanup unused attributes in xsfmm tests (PR #170601)   Brandon Wu via llvm-commits
• [llvm] [RISCV][llvm] Support VFADD, VFSUB, VFMUL codegen for Zvfbfa (PR #170612)   Brandon Wu via llvm-commits
• [llvm] [NFC][RISCV] Cleanup unused attributes in xsfmm tests (PR #170601)   Brandon Wu via llvm-commits
• [llvm] [RISCV][llvm] Support VFADD, VFSUB, VFMUL codegen for Zvfbfa (PR #170612)   Brandon Wu via llvm-commits
• [llvm] [RISCV][llvm] Support VFADD, VFSUB, VFMUL codegen for Zvfbfa (PR #170612)   Brandon Wu via llvm-commits
• [llvm] [RISCV][llvm] Support VFADD, VFSUB, VFMUL codegen for Zvfbfa (PR #170612)   Brandon Wu via llvm-commits
• [llvm] [RISCV][llvm] Support VFADD, VFSUB, VFMUL codegen for Zvfbfa (PR #170612)   Brandon Wu via llvm-commits
• [llvm] [RISCV][llvm] Support VFADD, VFSUB, VFMUL codegen for Zvfbfa (PR #170612)   Brandon Wu via llvm-commits
• [llvm] [RISCV][llvm] Support VFADD, VFSUB, VFMUL codegen for Zvfbfa (PR #170612)   Brandon Wu via llvm-commits
• [llvm] [RISCV][llvm] Support VFADD, VFSUB, VFMUL codegen for Zvfbfa (PR #170612)   Brandon Wu via llvm-commits
• [llvm] [RISCV][llvm] Support PSLL codegen for P extension (PR #170074)   Brandon Wu via llvm-commits
• [llvm] [RISCV][llvm] Support VFADD, VFSUB, VFMUL codegen for Zvfbfa (PR #170612)   Brandon Wu via llvm-commits
• [llvm] [NFC][RISCV] Unify all zvfbfa vl patterns and sd node patterns (PR #171072)   Brandon Wu via llvm-commits
• [llvm] [NFC][RISCV] Unify all zvfbfa vl patterns and sd node patterns (PR #171072)   Brandon Wu via llvm-commits
• [llvm] [NFC][RISCV] Unify all zvfbfa vl patterns and sd node patterns (PR #171072)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Use GPRNoX0 instead of AVL for Xsfmm pseudos. NFC (PR #170726)   Brandon Wu via llvm-commits
• [clang] [llvm] [RISCV] Update P extension to the 018 version of the spec. (PR #170399)   Brandon Wu via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Bruno Cardoso Lopes via llvm-commits
• [clang] [llvm] [CIR] Support x86 builtin rotate (PR #169566)   Bruno Cardoso Lopes via llvm-commits
• [clang] [llvm] [CIR] X86 vector masked load builtins (PR #169464)   Bruno Cardoso Lopes via llvm-commits
• [clang] [llvm] [CIR] X86 vector masked load builtins (PR #169464)   Bruno Cardoso Lopes via llvm-commits
• [llvm] [AMDGPU] Limit promoting allocas that have users with dynamic index above a threshold on number of elements (PR #170327)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Limit promoting allocas that have users with dynamic index above a threshold on number of elements (PR #170327)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Limit promoting allocas that have users with dynamic index above a threshold on number of elements (PR #170327)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Limit promoting allocas that have users with dynamic index above a threshold on number of elements (PR #170327)   Carl Ritson via llvm-commits
• [llvm] [PHIElimination] Declare MachineLoopInfo dependency for Legacy PM (PR #169693)   Carl Ritson via llvm-commits
• [llvm] [MsgPack] Use JSON schema boolean resolution rules (PR #170561)   Carl Ritson via llvm-commits
• [llvm] [MsgPack] Use JSON schema boolean resolution rules (PR #170561)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Enable reordering of VMEM loads during clustering (PR #107986)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Enable reordering of VMEM loads during clustering (PR #107986)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Enable reordering of VMEM loads during clustering (PR #107986)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Enable reordering of VMEM loads during clustering (PR #107986)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Add scheduling DAG mutation for hazard latencies (PR #170075)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Enable reordering of VMEM loads during clustering (PR #107986)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU][NFC] Put gfx125x common features into 12_50_Common (PR #170338)   Changpeng Fang via llvm-commits
• [llvm] [AMDGPU][NFC] Put gfx125x common features into 12_50_Common (PR #170338)   Changpeng Fang via llvm-commits
• [llvm] [AMDGPU][NFC] Add occupancy checks for gfx950 and gfx1250 (PR #170392)   Changpeng Fang via llvm-commits
• [llvm] [AMDGPU][NFC] Add occupancy checks for gfx950 and gfx1250 (PR #170392)   Changpeng Fang via llvm-commits
• [llvm] [AMDGPU] Prevent folding of flat_scr_base_hi into a 64-bit SALU (PR #170373)   Changpeng Fang via llvm-commits
• [llvm] [AMDGPU][NFC] Add occupancy checks for gfx950 and gfx1250 (PR #170392)   Changpeng Fang via llvm-commits
• [lldb] [llvm] [lldb][windows] add Windows Virtual Console support (PR #168729)   Charles Zablit via llvm-commits
• [lldb] [llvm] [lldb][windows] add Windows Virtual Console support (PR #168729)   Charles Zablit via llvm-commits
• [llvm] [AArch64] Fix the assertion failure on `RegisterVT == PartVT && "Part… (PR #170632)   Cheng Lingfei via llvm-commits
• [llvm] [AArch64] Fix the assertion failure on `RegisterVT == PartVT && "Part… (PR #170632)   Cheng Lingfei via llvm-commits
• [llvm] [AArch64] Fix the assertion failure on `RegisterVT == PartVT && "Part… (PR #170632)   Cheng Lingfei via llvm-commits
• [llvm] [AArch64] Fix the assertion failure on `RegisterVT == PartVT && "Part… (PR #170632)   Cheng Lingfei via llvm-commits
• [llvm] [WebAssembly] Remove FAKE_USEs before ExplicitLocals (PR #160768)   Cheng Shao via llvm-commits
• [llvm] [AMDGPU][GISel] Add RegBankLegalize support for G_STRICT_{FADD|FMUL} (PR #169406)   Chinmay Deshpande via llvm-commits
• [compiler-rt] [scudo] Show the resident pages from the secondary cache. (PR #170568)   Christopher Ferris via llvm-commits
• [llvm] [AMDGPU][NPM] Preserve analyses in AMDGPURewriteAGPRCopyMFMA for NPM (PR #170130)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU][NPM] Preserve analyses in AMDGPURewriteAGPRCopyMFMA for NPM (PR #170130)   Christudasan Devadasan via llvm-commits
• [llvm] [RISCV][GISel] Legalize the G_FCANONICALIZE instruction (PR #166162)   Chuan-Yue Yuan via llvm-commits
• [llvm] [ORC][x64] Respect `JITDUMP_USE_ARCH_TIMESTAMP` environment variable (PR #146085)   Cody Tapscott via llvm-commits
• [llvm] Fixed build with C++20 standard (PR #169772)   Corentin Jabot via llvm-commits
• [llvm] [NFC][RISCV] Correct fminimumnum test case (PR #170169)   Craig Topper via llvm-commits
• [llvm] [RISCV][llvm] Support PSLL codegen for P extension (PR #170074)   Craig Topper via llvm-commits
• [llvm] [RISCV] Sources of vmerge shouldn't overlap V0 (PR #170070)   Craig Topper via llvm-commits
• [llvm] [RISCV] Moving tuning features below non-tuning features. Put CPU family in their own section. NFC (PR #170352)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Fix legalize G_EXTRACT_SUBVECTOR (PR #169877)   Craig Topper via llvm-commits
• [llvm] [RISCV] Introduce a new tune feature string syntax and its parser (PR #168160)   Craig Topper via llvm-commits
• [llvm] [RISCV] Introduce a new tune feature string syntax and its parser (PR #168160)   Craig Topper via llvm-commits
• [llvm] [RISCV] Introduce a new tune feature string syntax and its parser (PR #168160)   Craig Topper via llvm-commits
• [llvm] [RISCV] LMUL lists for indexed and strided loads (PR #169756)   Craig Topper via llvm-commits
• [llvm] [RISCV] Introduce a new tune feature string syntax and its parser (PR #168160)   Craig Topper via llvm-commits
• [llvm] [RISCV] Move tuning features below non-tuning features. Put CPU family in their own section. NFC (PR #170352)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use vsetivli instead of `x0,x0` form to retain SEW/LMUL when AVL is imm (PR #169307)   Craig Topper via llvm-commits
• [llvm] [RISCV] Update P extension to the 018 version of the spec. (PR #170399)   Craig Topper via llvm-commits
• [llvm] [RISCV] Update P extension to the 018 version of the spec. (PR #170399)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Support select G_EXTRACT_SUBVECTOR (PR #169789)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Support select G_EXTRACT_SUBVECTOR (PR #169789)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Update P extension to the 018 version of the spec. (PR #170399)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Lowering usub.sat(a, 1) to a - (a != 0) (PR #170076)   Craig Topper via llvm-commits
• [llvm] [ValueTracking] Support scalable vector splats in computeKnownBits (PR #170345)   Craig Topper via llvm-commits
• [llvm] [X86][GlobalISel] Set Dst register correctly when narrowing G_ICMP (PR #169947)   Craig Topper via llvm-commits
• [llvm] [X86][GlobalISel] Set Dst register correctly when narrowing G_ICMP (PR #169947)   Craig Topper via llvm-commits
• [llvm] [RISCV][NFC] Simplify Imm range checks (PR #170497)   Craig Topper via llvm-commits
• [llvm] [RISCV] Move tuning features below non-tuning features. Put CPU family in their own section. NFC (PR #170352)   Craig Topper via llvm-commits
• [llvm] [RISCV]: Implemented softening of `FCANONICALIZE` (PR #169234)   Craig Topper via llvm-commits
• [llvm] [RISCV] Emit lpad for function with returns-twice attribute (PR #170520)   Craig Topper via llvm-commits
• [llvm] [RISCV] Emit lpad for function with returns-twice attribute (PR #170520)   Craig Topper via llvm-commits
• [llvm] [RISCV] Emit lpad for function with returns-twice attribute (PR #170520)   Craig Topper via llvm-commits
• [llvm] [RISCV] Emit lpad for function with returns-twice attribute (PR #170520)   Craig Topper via llvm-commits
• [llvm] [RISCV] Emit lpad for function with returns-twice attribute (PR #170520)   Craig Topper via llvm-commits
• [llvm] [RISCV] Emit lpad for function with returns-twice attribute (PR #170520)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Lowering usub.sat(a, 1) to a - (a != 0) (PR #170076)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Lowering usub.sat(a, 1) to a - (a != 0) (PR #170076)   Craig Topper via llvm-commits
• [llvm] [RISCV] Emit lpad for function with returns-twice attribute (PR #170520)   Craig Topper via llvm-commits
• [llvm] [RISCV][NFC] Simplify Imm range checks (PR #170497)   Craig Topper via llvm-commits
• [llvm] [RISCV] Introduce new AND combine to expose additional load narrowing opportunities (PR #170483)   Craig Topper via llvm-commits
• [llvm] [RISCV] Introduce new AND combine to expose additional load narrowing opportunities (PR #170483)   Craig Topper via llvm-commits
• [llvm] [RISCV] Introduce new AND combine to expose additional load narrowing opportunities (PR #170483)   Craig Topper via llvm-commits
• [llvm] [RISCV] Introduce new AND combine to expose additional load narrowing opportunities (PR #170483)   Craig Topper via llvm-commits
• [llvm] [RISCV] improve `musttail` support (PR #170547)   Craig Topper via llvm-commits
• [llvm] [RISCV] improve `musttail` support (PR #170547)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove last use of @llvm.experimental.vp.splat in RISCVCodeGenPrepare. NFCI (PR #170543)   Craig Topper via llvm-commits
• [llvm] [RISCV] Emit lpad for function with returns-twice attribute (PR #170520)   Craig Topper via llvm-commits
• [llvm] [RISCV][NFC] Simplify Imm range checks (PR #170497)   Craig Topper via llvm-commits
• [llvm] [RISCV] improve `musttail` support (PR #170547)   Craig Topper via llvm-commits
• [llvm] [RISCV][NFC] Simplify Imm range checks (PR #170497)   Craig Topper via llvm-commits
• [llvm] [RISCV][NFC] Simplify Imm range checks (PR #170497)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Support select G_EXTRACT_SUBVECTOR (PR #169789)   Craig Topper via llvm-commits
• [llvm] [NFC][RISCV] Cleanup unused attributes in xsfmm tests (PR #170601)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Update Zvqdotq to v0.1 (PR #170648)   Craig Topper via llvm-commits
• [llvm] [RISCV] Inserting indirect jumps with X7 for Zicfilp (PR #170683)   Craig Topper via llvm-commits
• [llvm] [RISCV][llvm] Support VFADD, VFSUB, VFMUL codegen for Zvfbfa (PR #170612)   Craig Topper via llvm-commits
• [llvm] [RISCV][llvm] Support VFADD, VFSUB, VFMUL codegen for Zvfbfa (PR #170612)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Update Zvqdotq to v0.1 (PR #170648)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV][Zicfilp] Enable Zicfilp CFI compiler behaviors by looking at module flags (PR #152121)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV][Zicfilp] Enable Zicfilp CFI compiler behaviors by looking at module flags (PR #152121)   Craig Topper via llvm-commits
• [llvm] [docs] [RISCV] Update docs regarding RV32E/RV64E (PR #170707)   Craig Topper via llvm-commits
• [llvm] [RISCV] Inserting indirect jumps with X7 for Zicfilp (PR #170683)   Craig Topper via llvm-commits
• [llvm] [RISCV] Inserting indirect jumps with X7 for Zicfilp (PR #170683)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use GPRNoX0 instead of AVL for Xsfmm pseudos. NFC (PR #170726)   Craig Topper via llvm-commits
• [llvm] [CodeGen] Minor refactor of CSRSavedLocation struct [nfc] (PR #170721)   Craig Topper via llvm-commits
• [llvm] [CodeGen] Minor refactor of CSRSavedLocation struct [nfc] (PR #170721)   Craig Topper via llvm-commits
• [llvm] [RISCV] Make RISCVInstrInfo::verifyInstruction stricter for immediate-only operands (PR #170736)   Craig Topper via llvm-commits
• [llvm] [RISCV] Make RISCVInstrInfo::verifyInstruction stricter for immediate-only operands (PR #170736)   Craig Topper via llvm-commits
• [llvm] [RISCV] Make RISCVInstrInfo::verifyInstruction stricter for immediate-only operands (PR #170736)   Craig Topper via llvm-commits
• [llvm] [DAG] Fold mul 0 -> 0 when expanding mul into parts. (PR #168780)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use a valid AVL immedaite in allone-masked-to-unmasked.mir. NFC (PR #170747)   Craig Topper via llvm-commits
• [llvm] [RISCV]: Implemented softening of `FCANONICALIZE` (PR #169234)   Craig Topper via llvm-commits
• [llvm] [RISCV] Correct the register class for the VL op check in RISCVInstrInfo::verifyInstruction. (PR #170751)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use a valid AVL immedaite in allone-masked-to-unmasked.mir. NFC (PR #170747)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use a valid AVL immediate in allone-masked-to-unmasked.mir. NFC (PR #170747)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use a valid AVL immediate in allone-masked-to-unmasked.mir. NFC (PR #170747)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use a valid AVL immediate in allone-masked-to-unmasked.mir. NFC (PR #170747)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Update P extension to the 018 version of the spec. (PR #170399)   Craig Topper via llvm-commits
• [llvm] [RISCV] Correct the register class for the VL op check in RISCVInstrInfo::verifyInstruction. (PR #170751)   Craig Topper via llvm-commits
• [llvm] [RISCV] Make RISCVInstrInfo::verifyInstruction stricter for immediate-only operands (PR #170736)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use a valid AVL immediate in allone-masked-to-unmasked.mir. NFC (PR #170747)   Craig Topper via llvm-commits
• [llvm] [RISCV] Make RISCVInstrInfo::verifyInstruction stricter for immediate-only operands (PR #170736)   Craig Topper via llvm-commits
• [llvm] [RISCV] Correct the register class for the VL op check in RISCVInstrInfo::verifyInstruction. (PR #170751)   Craig Topper via llvm-commits
• [llvm] [RISCV] LMUL lists for indexed and strided loads (PR #169756)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add OPERAND_AVL to RISCVInstrInfo::verifyInstruction. (PR #170770)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Add Svrsw60t59b extension (PR #132321)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add OPERAND_AVL to RISCVInstrInfo::verifyInstruction. (PR #170770)   Craig Topper via llvm-commits
• [llvm] [CodeGen] Use insert idiom in CFIInstrInserter instead of find [nfc] (PR #170760)   Craig Topper via llvm-commits
• [llvm] [RISCV] Introduce a new tune feature string syntax and its parser (PR #168160)   Craig Topper via llvm-commits
• [llvm] [RISCV] Introduce a new tune feature string syntax and its parser (PR #168160)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Lowering usub.sat(a, 1) to a - (a != 0) (PR #170076)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Lowering usub.sat(a, 1) to a - (a != 0) (PR #170076)   Craig Topper via llvm-commits
• [llvm] [LoopPeel] Fix typo Derefencebale -> Derefenceable. NFC (PR #170791)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add short forward branch support for `lb`, `lbu`, `lh`, `lhu`, `lw`, `lwu` and `ld` (PR #170829)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add short forward branch support for `lb`, `lbu`, `lh`, `lhu`, `lw`, `lwu` and `ld` (PR #170829)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add short forward branch support for `lb`, `lbu`, `lh`, `lhu`, `lw`, `lwu` and `ld` (PR #170829)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add short forward branch support for `lb`, `lbu`, `lh`, `lhu`, `lw`, `lwu` and `ld` (PR #170829)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add short forward branch support for `lb`, `lbu`, `lh`, `lhu`, `lw`, `lwu` and `ld` (PR #170829)   Craig Topper via llvm-commits
• [llvm] [RISCV] Refactor some code in RISCVMergeBaseOffset.NFC (PR #170839)   Craig Topper via llvm-commits
• [llvm] [RISCV][TTI] Add cost model for ROTL/ROTR (PR #170824)   Craig Topper via llvm-commits
• [llvm] [RISCV][TTI] Add cost model for ROTL/ROTR (PR #170824)   Craig Topper via llvm-commits
• [llvm] [RISCV][TTI] Add cost model for ROTL/ROTR (PR #170824)   Craig Topper via llvm-commits
• [llvm] [NFC][RISCV] Make vfadd attribute list follow other tests (PR #170864)   Craig Topper via llvm-commits
• [llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)   Craig Topper via llvm-commits
• [llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)   Craig Topper via llvm-commits
• [llvm] [LoopPeel] Fix typo Derefencebale -> Dereferenceable. NFC (PR #170791)   Craig Topper via llvm-commits
• [llvm] [LoopPeel] Fix typo Derefencebale -> Dereferenceable. NFC (PR #170791)   Craig Topper via llvm-commits
• [llvm] [IR] Add ImplicitTrunc argument to ConstantInt::get() (PR #170865)   Craig Topper via llvm-commits
• [llvm] [RISCV] Introduce a new tune feature string syntax and its parser (PR #168160)   Craig Topper via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove last use of @llvm.experimental.vp.splat in RISCVCodeGenPrepare. NFCI (PR #170543)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use a switch in RISCVInstrInfo::verifyInstruction. NFC (PR #170961)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use a switch in RISCVInstrInfo::verifyInstruction. NFC (PR #170961)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Add Propeller support for RISC-V (PR #170992)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Add Propeller support for RISC-V (PR #170992)   Craig Topper via llvm-commits
• [llvm] [NFC][RISCV] Unify all zvfbfa vl patterns and sd node patterns (PR #171072)   Craig Topper via llvm-commits
• [llvm] [NFC][RISCV] Unify all zvfbfa vl patterns and sd node patterns (PR #171072)   Craig Topper via llvm-commits
• [llvm] [NFC][RISCV] Unify all zvfbfa vl patterns and sd node patterns (PR #171072)   Craig Topper via llvm-commits
• [llvm] [NFC][RISCV] Unify all zvfbfa vl patterns and sd node patterns (PR #171072)   Craig Topper via llvm-commits
• [llvm] [NFC][RISCV] Unify all zvfbfa vl patterns and sd node patterns (PR #171072)   Craig Topper via llvm-commits
• [llvm] [NFC][RISCV] Unify all zvfbfa vl patterns and sd node patterns (PR #171072)   Craig Topper via llvm-commits
• [llvm] [NFC][RISCV] Unify all zvfbfa vl patterns and sd node patterns (PR #171072)   Craig Topper via llvm-commits
• [llvm] [NFC][RISCV] Unify all zvfbfa vl patterns and sd node patterns (PR #171072)   Craig Topper via llvm-commits
• [llvm] [NFC][RISCV] Unify all zvfbfa vl patterns and sd node patterns (PR #171072)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add short forward branch support for `lb`, `lbu`, `lh`, `lhu`, `lw`, `lwu` and `ld` (PR #170829)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add short forward branch support for `lb`, `lbu`, `lh`, `lhu`, `lw`, `lwu` and `ld` (PR #170829)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add short forward branch support for `lb`, `lbu`, `lh`, `lhu`, `lw`, `lwu` and `ld` (PR #170829)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use GPRNoX0 instead of AVL for Xsfmm pseudos. NFC (PR #170726)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use GPRNoX0 instead of AVL for Xsfmm pseudos. NFC (PR #170726)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Update P extension to the 018 version of the spec. (PR #170399)   Craig Topper via llvm-commits
• [llvm] [IR][RISCV] Remove @llvm.experimental.vp.splat (PR #171084)   Craig Topper via llvm-commits
• [llvm] 9c60d70 - [RISCV] Re-generate rvp-ext-rv32.ll after #170399. NFC   Craig Topper via llvm-commits
• [llvm] [Attributor] Support nested conditional branches (PR #168532)   Cullen Rhodes via llvm-commits
• [llvm] Revert "[Attributor] Support nested conditional branches" (PR #170257)   Cullen Rhodes via llvm-commits
• [llvm] [llvm-mca][AArch64] Refactor Neoverse tests to split out common inputs (NFC) (PR #170324)   Cullen Rhodes via llvm-commits
• [llvm] [llvm-mca][AArch64] Refactor Neoverse tests to split out common inputs (NFC) (PR #170324)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Compare and branch set twice in Neoverse V1/N1 sched (NFC) (PR #170498)   Cullen Rhodes via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Maintain existing predicate when lowering aarch64.sve.[s,u]abd.u intrinsics. (PR #170472)   Cullen Rhodes via llvm-commits
• [clang] [llvm] [LLVM][AArch64] Add "u" variants of SVE saturating/rounding shift left intrinsics. (PR #170503)   Cullen Rhodes via llvm-commits
• [clang] [llvm] [LLVM][AArch64] Add "u" variants of SVE saturating/rounding shift left intrinsics. (PR #170503)   Cullen Rhodes via llvm-commits
• [llvm] [llvm-mca][AArch64] Merge Neoverse NEON tests (NFC) (PR #170881)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Damian Heaton via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Damian Heaton via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Damian Heaton via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Damian Heaton via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Damian Heaton via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Damian Heaton via llvm-commits
• [llvm] Add LoopVectorizer support for `llvm.vector.partial.reduce.fadd` (PR #163975)   Damian Heaton via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Damian Heaton via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Damian Heaton via llvm-commits
• [llvm] [NFC] Add missing analysis to `DirectX/llc-pipeline` (PR #170714)   Damyan Pepper via llvm-commits
• [lld] [lld][MachO] Add --lto-emit-llvm command line option (PR #170355)   Daniel Rodríguez Troitiño via llvm-commits
• [lld] [lld][MachO] Add --lto-emit-llvm command line option (PR #170355)   Daniel Rodríguez Troitiño via llvm-commits
• [lld] [lld][MachO] Add --lto-emit-llvm command line option (PR #170355)   Daniel Rodríguez Troitiño via llvm-commits
• [lld] [llvm] [DRAFT] "Builtins world" for LTO (PR #164916)   Daniel Thornburgh via llvm-commits
• [lld] [llvm] [DRAFT] "Builtins world" for LTO (PR #164916)   Daniel Thornburgh via llvm-commits
• [lld] [llvm] [DRAFT] "Builtins world" for LTO (PR #164916)   Daniel Thornburgh via llvm-commits
• [lld] [llvm] [DRAFT] "Builtins world" for LTO (PR #164916)   Daniel Thornburgh via llvm-commits
• [lld] [llvm] [DRAFT] "Builtins world" for LTO (PR #164916)   Daniel Thornburgh via llvm-commits
• [lld] [llvm] [DRAFT] "Builtins world" for LTO (PR #164916)   Daniel Thornburgh via llvm-commits
• [lld] [llvm] [DRAFT] "Builtins world" for LTO (PR #164916)   Daniel Thornburgh via llvm-commits
• [lld] [llvm] [DRAFT] "Builtins world" for LTO (PR #164916)   Daniel Thornburgh via llvm-commits
• [llvm] [NFC] Reduce fragility of swdev503538-move-to-valu… test (PR #170702)   Daniil Fukalov via llvm-commits
• [llvm] [NFC] Reduce fragility of swdev503538-move-to-valu… test (PR #170702)   Daniil Fukalov via llvm-commits
• [llvm] [NFC] Reduce fragility of swdev503538-move-to-valu… test (PR #170702)   Daniil Fukalov via llvm-commits
• [llvm] InstCombine: Stop transforming EQ/NE of SHR to 0 to ULT/UGT if >1 use (PR #168007)   Danila Malyutin via llvm-commits
• [llvm] [AMDGPU][NPM] Port AMDGPUArgumentUsageInfo to NPM (PR #170886)   Dark Steve via llvm-commits
• [llvm] [AMDGPU][NPM] Port AMDGPUArgumentUsageInfo to NPM (PR #170886)   Dark Steve via llvm-commits
• [llvm] [PHIElimination] Declare MachineLoopInfo dependency for Legacy PM (PR #169693)   Dark Steve via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtual call-site target information in DWARF. (PR #167666)   David Blaikie via llvm-commits
• [llvm] [llvm-dwp] Fix FoundCUUnit problem on soft-stop with DWARF5 (PR #169783)   David Blaikie via llvm-commits
• [llvm] [llvm-dwp] Fix FoundCUUnit problem on soft-stop with DWARF5 (PR #169783)   David Blaikie via llvm-commits
• [llvm] [DebugInfo][NVPTX] Adding support for `inlined_at` debug directive in NVPTX backend (PR #170239)   David Blaikie via llvm-commits
• [llvm] [DebugInfo][NVPTX] Adding support for `inlined_at` debug directive in NVPTX backend (PR #170239)   David Blaikie via llvm-commits
• [llvm] [DebugInfo][NVPTX] Adding support for `inlined_at` debug directive in NVPTX backend (PR #170239)   David Blaikie via llvm-commits
• [llvm] [llvm-dwp] Fix FoundCUUnit problem on soft-stop with DWARF5 (PR #169783)   David Blaikie via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtual call-site target information in DWARF. (PR #167666)   David Blaikie via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtual call-site target information in DWARF. (PR #167666)   David Blaikie via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] fix i386 build for Haiku (PR #171075)   David CARLIER via llvm-commits
• [clang] [llvm] [ARM] Introduce intrinsics for MVE minnm/maxnm under strict-fp. (PR #169795)   David Green via llvm-commits
• [clang] [llvm] [ARM] Introduce intrinsics for MVE minnm/maxnm under strict-fp. (PR #169795)   David Green via llvm-commits
• [llvm] [DAGCombiner] Handle type-promoted constants in UDIV lowering (PR #169491)   David Green via llvm-commits
• [llvm] [DAGCombiner] Handle type-promoted constants in UDIV lowering (PR #169491)   David Green via llvm-commits
• [llvm] [DAGCombiner] Handle type-promoted constants in UDIV lowering (PR #169491)   David Green via llvm-commits
• [llvm] [DAGCombiner] Handle type-promoted constants in UDIV lowering (PR #169491)   David Green via llvm-commits
• [llvm] Fixes inlining issue in armv7 (PR #169337)   David Green via llvm-commits
• [llvm] Fixes inlining issue in armv7 (PR #169337)   David Green via llvm-commits
• [llvm] Fixes inlining issue in armv7 (PR #169337)   David Green via llvm-commits
• [llvm] Fixes inlining issue in armv7 (PR #169337)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Don't crash when legalising vector G_SHL (PR #168848)   David Green via llvm-commits
• [llvm] [AArch64][ARM] Move ARM-specific InstCombine transforms to new module (PR #169589)   David Green via llvm-commits
• [llvm] [AArch64][ARM] Move ARM-specific InstCombine transforms to new module (PR #169589)   David Green via llvm-commits
• [llvm] [AArch64][ARM] Move ARM-specific InstCombine transforms to new module (PR #169589)   David Green via llvm-commits
• [llvm] [AArch64][ARM] Move ARM-specific InstCombine transforms to new module (PR #169589)   David Green via llvm-commits
• [llvm] [AArch64][ARM] Optimize more `tbl`/`tbx` calls into `shufflevector` (PR #169748)   David Green via llvm-commits
• [llvm] [AArch64]Enable aggressive interleaving for A320 (PR #169825)   David Green via llvm-commits
• [llvm] [AArch64] recognise trn1/trn2 with flipped operands (PR #169858)   David Green via llvm-commits
• [llvm] [AArch64] Add bitcasts for lowering saturating add/sub and shift intrinsics. (PR #161840)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] SIMD fpcvt codegen for rounding nodes (PR #165546)   David Green via llvm-commits
• [llvm] [Arm] Control forced unrolling of small loops (PR #170127)   David Green via llvm-commits
• [llvm] [AArch64] Remove unused references to MVT::f80. (PR #169545)   David Green via llvm-commits
• [llvm] [AArch64] support `.arch_extension dit` (PR #169999)   David Green via llvm-commits
• [llvm] [RegAlloc][AArch64] Add test case for terminal rule. NFC (PR #170035)   David Green via llvm-commits
• [llvm] [AArch64][GISel] Add legalizer support for @llvm.umul.with.overflow.i128 (PR #170101)   David Green via llvm-commits
• [llvm] GlobalISel: Stop using TPC to check if GlobalISelAbort is enabled (PR #169917)   David Green via llvm-commits
• [llvm] [GISel][Inlineasm] Support inlineasm i constraint for symbols (PR #170094)   David Green via llvm-commits
• [llvm] [GISel][Inlineasm] Support inlineasm i constraint for symbols (PR #170094)   David Green via llvm-commits
• [llvm] [GISel][Inlineasm] Support inlineasm i constraint for symbols (PR #170094)   David Green via llvm-commits
• [llvm] [AggressiveInstCombine] Fix memory location for alias analysis (PR #169953)   David Green via llvm-commits
• [llvm] [llvm-exegesis] Add CLI Option to set Fixed RNG seed (PR #170013)   David Green via llvm-commits
• [llvm] [Arm] Control forced unrolling of small loops (PR #170127)   David Green via llvm-commits
• [llvm] [Arm] Control forced unrolling of small loops (PR #170127)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Don't crash when legalising vector G_SHL (PR #168848)   David Green via llvm-commits
• [llvm] 5c26015 - [AArch64][GlobalISel] Add GISel coverage for i32 lround and lrint. NFC   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Add basic scalar handling for i32 lround and lrint (PR #170175)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Add basic scalar handling for i32 lround and lrint (PR #170175)   David Green via llvm-commits
• [clang] [llvm] RuntimeLibcalls: Move VectorLibrary handling into TargetOptions (PR #167996)   David Green via llvm-commits
• [llvm] [DAG] Use known-bits when creating umulh/smulh. (PR #160916)   David Green via llvm-commits
• [llvm] [DAG] Use known-bits when creating umulh/smulh. (PR #160916)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Don't crash when legalising vector G_SHL (PR #168848)   David Green via llvm-commits
• [llvm] 437fa02 - [ARM] Add tests for over-sized mulh. NFC   David Green via llvm-commits
• [llvm] f741851 - Revert "[AArch64][ARM] Move ARM-specific InstCombine transforms into `Transforms/Utils` (#169589)"   David Green via llvm-commits
• [clang] [llvm] [ARM] Introduce intrinsics for MVE minnm/maxnm under strict-fp. (PR #169795)   David Green via llvm-commits
• [clang] [llvm] [ARM] Introduce intrinsics for MVE vrnd under strict-fp. (PR #169797)   David Green via llvm-commits
• [clang] [llvm] [ARM] Introduce intrinsics for MVE vcmp under strict-fp. (PR #169798)   David Green via llvm-commits
• [llvm] 879dddf - [AArch64] Add tests for umulh. NFC   David Green via llvm-commits
• [llvm] [AArch64] Use sve instructions for fixed-width smulh/umulh. (PR #166168)   David Green via llvm-commits
• [llvm] [AArch64] Use sve instructions for fixed-width smulh/umulh. (PR #166168)   David Green via llvm-commits
• [llvm] [AArch64] Use sve instructions for fixed-width smulh/umulh. (PR #166168)   David Green via llvm-commits
• [clang] [llvm] [ARM] Introduce intrinsics for MVE minnm/maxnm under strict-fp. (PR #169795)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Add basic scalar handling for i32 lround and lrint (PR #170175)   David Green via llvm-commits
• [llvm] [VectorCombine][X86] foldShuffleOfIntrinsics - provide the arguments to a getShuffleCost call (PR #170465)   David Green via llvm-commits
• [llvm] [DAGCombiner] Handle type-promoted constants in UDIV lowering (PR #169491)   David Green via llvm-commits
• [llvm] [AArch64] Optimize CBZ wzr and friends. (PR #161508)   David Green via llvm-commits
• [llvm] [AArch64] Optimize CBZ wzr and friends. (PR #161508)   David Green via llvm-commits
• [llvm] [AArch64] Optimize CBZ wzr and friends. (PR #161508)   David Green via llvm-commits
• [llvm] [AArch64] Optimize CBZ wzr and friends. (PR #161508)   David Green via llvm-commits
• [llvm] [AArch64] Fix the assertion failure on `RegisterVT == PartVT && "Part… (PR #170632)   David Green via llvm-commits
• [llvm] [DAGCombiner] Handle type-promoted constants in SDIV lowering (PR #169924)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Add basic scalar handling for i32 lround and lrint (PR #170175)   David Green via llvm-commits
• [clang] [llvm] [ARM] Introduce intrinsics for MVE fp-converts under strict-fp. (PR #170686)   David Green via llvm-commits
• [llvm] [DAG] Fold mul 0 -> 0 when expanding mul into parts. (PR #168780)   David Green via llvm-commits
• [llvm] [DAG] Fold mul 0 -> 0 when expanding mul into parts. (PR #168780)   David Green via llvm-commits
• [llvm] [AArch64][ARM] Optimize more `tbl`/`tbx` calls into `shufflevector` (PR #169748)   David Green via llvm-commits
• [llvm] [AArch64][ARM] Optimize more `tbl`/`tbx` calls into `shufflevector` (PR #169748)   David Green via llvm-commits
• [llvm] [AArch64][ARM] Optimize more `tbl`/`tbx` calls into `shufflevector` (PR #169748)   David Green via llvm-commits
• [llvm] [AArch64][ARM] Optimize more `tbl`/`tbx` calls into `shufflevector` (PR #169748)   David Green via llvm-commits
• [llvm] [AArch64][ARM] Optimize more `tbl`/`tbx` calls into `shufflevector` (PR #169748)   David Green via llvm-commits
• [llvm] [AArch64][ARM] Optimize more `tbl`/`tbx` calls into `shufflevector` (PR #169748)   David Green via llvm-commits
• [llvm] [AArch64][ARM] Move ARM-specific InstCombine transforms into `Transforms/Utils` (PR #169589)   David Green via llvm-commits
• [llvm] [DAG] Fold mul 0 -> 0 when expanding mul into parts. (PR #168780)   David Green via llvm-commits
• [llvm] [AArch64][ARM] Optimize more `tbl`/`tbx` calls into `shufflevector` (PR #169748)   David Green via llvm-commits
• [llvm] [AArch64] Fold scalar-to-vector shuffles into DUP/FMOV (PR #166962)   David Green via llvm-commits
• [llvm] [AArch64] Fold scalar-to-vector shuffles into DUP/FMOV (PR #166962)   David Green via llvm-commits
• [llvm] [AArch64]SIMD fpcvt codegen for rounding nodes (PR #165546)   David Green via llvm-commits
• [llvm] [AArch64]SIMD fpcvt codegen for rounding nodes (PR #165546)   David Green via llvm-commits
• [llvm] [AArch64] Optimize CBZ wzr and friends. (PR #161508)   David Green via llvm-commits
• [llvm] [AArch64] Run optimizeTerminators earlier too. (PR #170907)   David Green via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   David Salinas via llvm-commits
• [llvm] Add --dump-offload-bundle option to llvm-objcopy (PR #143347)   David Salinas via llvm-commits
• [llvm] Add --dump-offload-bundle option to llvm-objcopy (PR #143347)   David Salinas via llvm-commits
• [llvm] Extend LLVM Offloading API for binary fatbin Bundles (PR #114833)   David Salinas via llvm-commits
• [llvm] [LV] Don't create WidePtrAdd recipes for scalar VFs (PR #169344)   David Sherwood via llvm-commits
• [llvm] [LV] Don't create WidePtrAdd recipes for scalar VFs (PR #169344)   David Sherwood via llvm-commits
• [llvm] [LV] Don't create WidePtrAdd recipes for scalar VFs (PR #169344)   David Sherwood via llvm-commits
• [llvm] [LV] Don't create WidePtrAdd recipes for scalar VFs (PR #169344)   David Sherwood via llvm-commits
• [llvm] [LV] Don't create WidePtrAdd recipes for scalar VFs (PR #169344)   David Sherwood via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Add lowering for ISD::[ANY,SIGN,ZERO]_EXTEND_VECTOR_INREG. (PR #169847)   David Sherwood via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Add lowering for ISD::[ANY,SIGN,ZERO]_EXTEND_VECTOR_INREG. (PR #169847)   David Sherwood via llvm-commits
• [llvm] [VPlan] Use wide IV if scalar lanes > 0 are used with scalable vectors. (PR #169796)   David Sherwood via llvm-commits
• [llvm] [VPlan] Use wide IV if scalar lanes > 0 are used with scalable vectors. (PR #169796)   David Sherwood via llvm-commits
• [llvm] [VPlan] Use wide IV if scalar lanes > 0 are used with scalable vectors. (PR #169796)   David Sherwood via llvm-commits
• [llvm] [VPlan] Use BlockFrequencyInfo in getPredBlockCostDivisor (PR #158690)   David Sherwood via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Add lowering for ISD::[ANY,SIGN,ZERO]_EXTEND_VECTOR_INREG. (PR #169847)   David Sherwood via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Add lowering for ISD::[ANY,SIGN,ZERO]_EXTEND_VECTOR_INREG. (PR #169847)   David Sherwood via llvm-commits
• [llvm] [VPlan] Use BlockFrequencyInfo in getPredBlockCostDivisor (PR #158690)   David Sherwood via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   David Sherwood via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   David Sherwood via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   David Sherwood via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   David Sherwood via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   David Sherwood via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   David Sherwood via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   David Sherwood via llvm-commits
• [llvm] [LV] Use forced cost once for whole interleave group in legacy costmodel (PR #168270)   David Sherwood via llvm-commits
• [llvm] [LV][NFC] Remove unnecessary multiply in expandVPWidenIntOrFpInduction (PR #170159)   David Sherwood via llvm-commits
• [llvm] [VPlan] Use wide IV if scalar lanes > 0 are used with scalable vectors. (PR #169796)   David Sherwood via llvm-commits
• [llvm] [VPlan] Improve code in VPInstruction::generate (NFC) (PR #169470)   David Sherwood via llvm-commits
• [llvm] [LV] Fix random behaviour in LoopVectorizationLegality::isUniform (PR #170463)   David Sherwood via llvm-commits
• [llvm] [LV] Fix random behaviour in LoopVectorizationLegality::isUniform (PR #170463)   David Sherwood via llvm-commits
• [llvm] [LV] Fix random behaviour in LoopVectorizationLegality::isUniform (PR #170463)   David Sherwood via llvm-commits
• [llvm] [llvm][NFC] In `SetVector`, `contains` and `count` now automatically accept `const T *` arguments when the key is `T *` (PR #170377)   David Stone via llvm-commits
• [llvm] [llvm][NFC] In `SetVector`, `contains` and `count` now automatically accept `const T *` arguments when the key is `T *` (PR #170377)   David Stone via llvm-commits
• [llvm] [AArch64] Optimize CBZ wzr and friends. (PR #161508)   David Tellenbach via llvm-commits
• [llvm] [AArch64] Optimize CBZ wzr and friends. (PR #161508)   David Tellenbach via llvm-commits
• [llvm] [AArch64] Optimize CBZ wzr and friends. (PR #161508)   David Tellenbach via llvm-commits
• [llvm] [WebAssembly] Implement addrspacecast to funcref (PR #166820)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Implement GlobalISel (PR #157161)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Implement GlobalISel (PR #157161)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Implement addrspacecast to funcref (PR #166820)   Demetrius Kanios via llvm-commits
• [llvm] [CodeGen] Make LoadExtActions address-space aware (PR #162407)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Implement addrspacecast to funcref (PR #166820)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Implement addrspacecast to funcref (PR #166820)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Implement addrspacecast to funcref (PR #166820)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Implement addrspacecast to funcref (PR #166820)   Derek Schuff via llvm-commits
• [llvm] Revert "[WebAssembly] Implement addrspacecast to funcref" (PR #170785)   Derek Schuff via llvm-commits
• [llvm] Revert "[WebAssembly] Implement addrspacecast to funcref" (PR #170785)   Derek Schuff via llvm-commits
• [llvm] Revert "[WebAssembly] Implement addrspacecast to funcref" (PR #170785)   Derek Schuff via llvm-commits
• [llvm] Revert "[WebAssembly] Implement addrspacecast to funcref" (PR #170785)   Derek Schuff via llvm-commits
• [llvm] [ELF][Objcopy] Dont corrupt symbol table when `--update-section` is called for ELF files (PR #170462)   Dmitry Nechitaev via llvm-commits
• [llvm] [ELF][Objcopy] Dont corrupt symbol table when `--update-section` is called for ELF files (PR #170462)   Dmitry Nechitaev via llvm-commits
• [llvm] [SPIRV] Add legalization for long vectors (PR #169665)   Dmitry Sidorov via llvm-commits
• [llvm] [InstCombine] Preload DomConditionCache to reach fixed point when sinking (PR #170835)   Dominik Montada via llvm-commits
• [llvm] [InstCombine] Preload DomConditionCache to reach fixed point when sinking (PR #170835)   Dominik Montada via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Drew Kersnar via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Drew Kersnar via llvm-commits
• [llvm] [LoadStoreVectorizer] Fill gaps in load/store chains to enable vectorization (PR #159388)   Drew Kersnar via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Drew Kersnar via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Drew Kersnar via llvm-commits
• [llvm] [LoadStoreVectorizer] Fill gaps in load/store chains to enable vectorization (PR #159388)   Drew Kersnar via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Drew Kersnar via llvm-commits
• [llvm] [LoadStoreVectorizer] Fill gaps in load/store chains to enable vectorization (PR #159388)   Drew Kersnar via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Drew Kersnar via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Drew Kersnar via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Drew Kersnar via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Drew Kersnar via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Drew Kersnar via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Drew Kersnar via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Drew Kersnar via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Drew Kersnar via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Drew Kersnar via llvm-commits
• [llvm] [LSV] Merge contiguous chains across scalar types (PR #154069)   Drew Kersnar via llvm-commits
• [llvm] [LoadStoreVectorizer] Allow redundant stores (PR #169946)   Drew Kersnar via llvm-commits
• [llvm] [LoadStoreVectorizer] Allow redundant stores (PR #169946)   Drew Kersnar via llvm-commits
• [llvm] Revert "[LSV] Merge contiguous chains across scalar types" (PR #170381)   Drew Kersnar via llvm-commits
• [llvm] Revert "[LSV] Merge contiguous chains across scalar types" (PR #170381)   Drew Kersnar via llvm-commits
• [llvm] [LoadStoreVectorizer] Fill gaps in load/store chains to enable vectorization (PR #159388)   Drew Kersnar via llvm-commits
• [llvm] [LoadStoreVectorizer] Fill gaps in load/store chains to enable vectorization (PR #159388)   Drew Kersnar via llvm-commits
• [llvm] [LoadStoreVectorizer] Fill gaps in load/store chains to enable vectorization (PR #159388)   Drew Kersnar via llvm-commits
• [llvm] [LoadStoreVectorizer] Fill gaps in load/store chains to enable vectorization (PR #159388)   Drew Kersnar via llvm-commits
• [llvm] [LoadStoreVectorizer] Fill gaps in load/store chains to enable vectorization (PR #159388)   Drew Kersnar via llvm-commits
• [llvm] [LoadStoreVectorizer] Fill gaps in load/store chains to enable vectorization (PR #159388)   Drew Kersnar via llvm-commits
• [llvm] [LoadStoreVectorizer] Fill gaps in load/store chains to enable vectorization (PR #159388)   Drew Kersnar via llvm-commits
• [llvm] [LoadStoreVectorizer] Fill gaps in load/store chains to enable vectorization (PR #159388)   Drew Kersnar via llvm-commits
• [llvm] [LoadStoreVectorizer] Fill gaps in load/store chains to enable vectorization (PR #159388)   Drew Kersnar via llvm-commits
• [llvm] [LoadStoreVectorizer] Fill gaps in load/store chains to enable vectorization (PR #159388)   Drew Kersnar via llvm-commits
• [llvm] [LoadStoreVectorizer] Allow redundant stores (PR #169946)   Drew Kersnar via llvm-commits
• [llvm] [DA] Add tests for nsw doesn't hold on entire iteration space (NFC) (PR #162281)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Add tests for nsw doesn't hold on entire iteration space (NFC) (PR #162281)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Add tests for nsw doesn't hold on entire iteration space (NFC) (PR #162281)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Add tests for nsw doesn't hold on entire iteration space (NFC) (PR #162281)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Add tests for nsw doesn't hold on entire iteration space (NFC) (PR #162281)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Add tests for nsw doesn't hold on entire iteration space (NFC) (PR #162281)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Add tests for nsw doesn't hold on entire iteration space (NFC) (PR #162281)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Add tests for nsw doesn't hold on entire iteration space (NFC) (PR #162281)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Add tests for nsw doesn't hold on entire iteration space (NFC) (PR #162281)   Ehsan Amiri via llvm-commits
• [llvm] [MC] [Win64EH] Clarify the comment about a skipped case of packed unwind info (PR #169784)   Eli Friedman via llvm-commits
• [llvm] [llvm-readobj] [ARMWinEH] Fix the interpretation of packed unwind CR=01 RegI=1 (PR #169676)   Eli Friedman via llvm-commits
• [llvm] [MC] [Win64EH] Produce packed unwind for the special case of X19+LR (PR #169697)   Eli Friedman via llvm-commits
• [llvm] [AArch64] Fix Windows prologue handling to pair more registers. (PR #170214)   Eli Friedman via llvm-commits
• [clang] [flang] [llvm] [mlir] Add FramePointerKind::NonLeafNoReserve (PR #163775)   Eli Friedman via llvm-commits
• [clang] [compiler-rt] Ubsan minimum assumed alignment (PR #166755)   Eli Friedman via llvm-commits
• [llvm] [llvm-readobj] [ARMWinEH] Fix printing of packed unwind with H=1, RegI=RegF=0, CR!=1 (PR #170294)   Eli Friedman via llvm-commits
• [compiler-rt] [Compiler-rt] Implement AEABI Unaligned Read/Write Helpers in compiler-rt (PR #167913)   Eli Friedman via llvm-commits
• [llvm] [AArch64] support `.arch_extension dit` (PR #169999)   Eli Friedman via llvm-commits
• [llvm] [llvm-readobj] [ARMWinEH] Fix printing of packed unwind with H=1, RegI=RegF=0, CR!=1 (PR #170294)   Eli Friedman via llvm-commits
• [llvm] [LangRef] make consequences of NaN rules for pow(i) more explicit (PR #170177)   Eli Friedman via llvm-commits
• [llvm] [AArch64] support `.arch_extension dit` (PR #169999)   Eli Friedman via llvm-commits
• [llvm] [LangRef] make consequences of NaN rules for pow(i) more explicit (PR #170177)   Eli Friedman via llvm-commits
• [llvm] [AArch64] support `.arch_extension dit` (PR #169999)   Eli Friedman via llvm-commits
• [llvm] [LangRef] make consequences of NaN rules for pow(i) more explicit (PR #170177)   Eli Friedman via llvm-commits
• [llvm] [SPARC] Remove CCIfConsecutiveRegs for f128 returns (PR #170133)   Eli Friedman via llvm-commits
• [clang] [llvm] [WinEH] Fix try scopes leaking to caller on inline (PR #167176)   Eli Friedman via llvm-commits
• [clang] [llvm] [WinEH] Fix try scopes leaking to caller on inline (PR #167176)   Eli Friedman via llvm-commits
• [clang] [llvm] [WinEH] Fix try scopes leaking to caller on inline (PR #167176)   Eli Friedman via llvm-commits
• [clang] [llvm] [WinEH] Fix try scopes leaking to caller on inline (PR #167176)   Eli Friedman via llvm-commits
• [clang] [llvm] [WinEH] Fix try scopes leaking to caller on inline (PR #167176)   Eli Friedman via llvm-commits
• [llvm] [aarch64] Mix the frame pointer with the stack cookie when protecting the stack (PR #161114)   Eli Friedman via llvm-commits
• [llvm] x86: fix musttail sibcall miscompilation (PR #168956)   Eli Friedman via llvm-commits
• [llvm] x86: fix musttail sibcall miscompilation (PR #168956)   Eli Friedman via llvm-commits
• [llvm] x86: fix musttail sibcall miscompilation (PR #168956)   Eli Friedman via llvm-commits
• [llvm] x86: fix musttail sibcall miscompilation (PR #168956)   Eli Friedman via llvm-commits
• [llvm] [BasicAA][TLI] Local-linkage or non-thread-local globals may not alias errno (PR #170290)   Eli Friedman via llvm-commits
• [llvm] Autogenerate llvm/test/CodeGen/AArch64/wineh-pac.ll (PR #170925)   Eli Friedman via llvm-commits
• [llvm] [AArch64] Fix Windows prologue handling to pair more registers. (PR #170214)   Eli Friedman via llvm-commits
• [compiler-rt] [compiler-rt] Add baremetal version of profile library. (PR #167998)   Eli Friedman via llvm-commits
• [compiler-rt] [compiler-rt] Add baremetal version of profile library. (PR #167998)   Eli Friedman via llvm-commits
• [llvm] Autogenerate llvm/test/CodeGen/AArch64/wineh-pac.ll (PR #170925)   Eli Friedman via llvm-commits
• [compiler-rt] [compiler-rt] Add CMake flag for AArch64 Linux with 39-bit VA. (PR #167028)   Eli Friedman via llvm-commits
• [compiler-rt] [hwasan] Add config for AArch64 Linux with 39-bit VA. (PR #170927)   Eli Friedman via llvm-commits
• [compiler-rt] [asan] Add config for AArch64 Linux with 39-bit VA. (PR #170929)   Eli Friedman via llvm-commits
• [compiler-rt] [hwasan] Add config for AArch64 Linux with 39-bit VA. (PR #170927)   Eli Friedman via llvm-commits
• [llvm] Autogenerate llvm/test/CodeGen/AArch64/wineh-pac.ll (PR #170925)   Eli Friedman via llvm-commits
• [clang] [llvm] RFC: Implementing new mechanism for hard register operands to inline asm as a constraint. (PR #85846)   Eli Friedman via llvm-commits
• [clang] [llvm] RFC: Implementing new mechanism for hard register operands to inline asm as a constraint. (PR #85846)   Eli Friedman via llvm-commits
• [clang] [llvm] RFC: Implementing new mechanism for hard register operands to inline asm as a constraint. (PR #85846)   Eli Friedman via llvm-commits
• [compiler-rt] [asan] Add config for AArch64 Linux with 39-bit VA. (PR #170929)   Eli Friedman via llvm-commits
• [compiler-rt] [asan][hwasan] Add config for AArch64 Linux with 39-bit VA. (PR #166881)   Eli Friedman via llvm-commits
• [compiler-rt] [asan][hwasan] Add config for AArch64 Linux with 39-bit VA. (PR #166881)   Eli Friedman via llvm-commits
• [llvm] [AArch64] Fix Windows prologue handling to pair more registers. (PR #170214)   Eli Friedman via llvm-commits
• [llvm] [AArch64] Fix Windows prologue handling to pair more registers. (PR #170214)   Eli Friedman via llvm-commits
• [llvm] [AArch64] Fix Windows prologue handling to pair more registers. (PR #170214)   Eli Friedman via llvm-commits
• [llvm] [AArch64] Fix Windows prologue handling to pair more registers. (PR #170214)   Eli Friedman via llvm-commits
• [llvm] [AArch64] Fix Windows prologue handling to pair more registers. (PR #170214)   Eli Friedman via llvm-commits
• [llvm] [Draft] Support save/restore point splitting in shrink-wrap (PR #119359)   Elizaveta Noskova via llvm-commits
• [llvm] [Draft] Support save/restore point splitting in shrink-wrap (PR #119359)   Elizaveta Noskova via llvm-commits
• [llvm] [Draft] Support save/restore point splitting in shrink-wrap (PR #119359)   Elizaveta Noskova via llvm-commits
• [llvm] [Draft] Support save/restore point splitting in shrink-wrap (PR #119359)   Elizaveta Noskova via llvm-commits
• [llvm] [Draft] Support save/restore point splitting in shrink-wrap (PR #119359)   Elizaveta Noskova via llvm-commits
• [llvm] [Draft] Support save/restore point splitting in shrink-wrap (PR #119359)   Elizaveta Noskova via llvm-commits
• [lld] [lld-macho] Choose ICF root function deterministically based on symbol names (PR #158157)   Ellis Hoag via llvm-commits
• [lld] [lld-macho] Choose ICF root function deterministically based on symbol names (PR #158157)   Ellis Hoag via llvm-commits
• [lld] [lld-macho] Choose ICF root function deterministically based on symbol names (PR #158157)   Ellis Hoag via llvm-commits
• [compiler-rt] [llvm] [MC/DC][Coverage] Enable profile correlation for MC/DC (PR #136437)   Ellis Hoag via llvm-commits
• [compiler-rt] [llvm] [MC/DC][Coverage] Enable profile correlation for MC/DC (PR #136437)   Ellis Hoag via llvm-commits
• [compiler-rt] [llvm] [MC/DC][Coverage] Enable profile correlation for MC/DC (PR #136437)   Ellis Hoag via llvm-commits
• [compiler-rt] [llvm] [MC/DC][Coverage] Enable profile correlation for MC/DC (PR #136437)   Ellis Hoag via llvm-commits
• [compiler-rt] [llvm] [MC/DC][Coverage] Enable profile correlation for MC/DC (PR #136437)   Ellis Hoag via llvm-commits
• [llvm] Add option for two-way branch optimization. (PR #161419)   Ellis Hoag via llvm-commits
• [llvm] Add option for two-way branch optimization. (PR #161419)   Ellis Hoag via llvm-commits
• [llvm] Add option for two-way branch optimization. (PR #161419)   Ellis Hoag via llvm-commits
• [compiler-rt] [FMV][AArch64] Add initial AT_HWCAP3 / AT_HWCAP4 support (PR #161595)   Eric Christopher via llvm-commits
• [llvm] [ARM] Disable strict node mutation and use correct lowering for several strict ops (PR #170136)   Erik Enikeev via llvm-commits
• [llvm] [ARM] Disable strict node mutation and use correct lowering for several strict ops (PR #170136)   Erik Enikeev via llvm-commits
• [llvm] [ARM] Disable strict node mutation and use correct lowering for several strict ops (PR #170136)   Erik Enikeev via llvm-commits
• [llvm] [mips][micromips] Add mayRaiseFPException to appropriate instructions, mark all instructions that read FCSR (FCR31) rounding bits as doing so (PR #170322)   Erik Enikeev via llvm-commits
• [llvm] [mips][micromips] Add mayRaiseFPException to appropriate instructions, mark all instructions that read FCSR (FCR31) rounding bits as doing so (PR #170322)   Erik Enikeev via llvm-commits
• [llvm] [PowerPC] set libcall lowering for fp setcc ops on SPE boards (PR #153238)   Erik Enikeev via llvm-commits
• [llvm] [X86][GlobalISel] Support globals in pic mode (PR #170038)   Evgenii Kudriashov via llvm-commits
• [llvm] [LowerMemIntrinsics] Factor control flow generation out of the memcpy lowering (PR #169039)   Fabian Ritter via llvm-commits
• [lld] [lld-macho] Remove cuIndices indirection in UnwindInfoSection. NFC (PR #170252)   Fangrui Song via llvm-commits
• [lld] [lld-macho] Remove cuIndices indirection in UnwindInfoSection. NFC (PR #170252)   Fangrui Song via llvm-commits
• [lld] [lld] Fix typo in lld manpage, nfc (PR #170299)   Fangrui Song via llvm-commits
• [llvm] [SPIRV] Add legalization for long vectors (PR #169665)   Farzon Lotfi via llvm-commits
• [llvm] [Hexagon] Passes for widening vector operations and shuffle opt (PR #169559)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Passes for widening vector operations and shuffle opt (PR #169559)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Passes for widening vector operations and shuffle opt (PR #169559)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Passes for widening vector operations and shuffle opt (PR #169559)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Passes for widening vector operations and shuffle opt (PR #169559)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Passes for widening vector operations and shuffle opt (PR #169559)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Passes for widening vector operations and shuffle opt (PR #169559)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Passes for widening vector operations and shuffle opt (PR #169559)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Fix HWBF16 PatLeaf type (PR #170560)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Fix HWBF16 PatLeaf type (PR #170560)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Add HVX patterns for vector arithmetic (PR #170704)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Add HVX patterns for vector arithmetic (PR #170704)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Add HVX patterns for vector arithmetic (PR #170704)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Add HVX patterns for vector arithmetic (PR #170704)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Fix HWBF16 PatLeaf type (PR #170560)   Fateme Hosseini via llvm-commits
• [llvm] Reland "Redesign Straight-Line Strength Reduction (SLSR) (#162930)" (PR #169614)   Fei Peng via llvm-commits
• [llvm] [LoopVectorize][LAA] Hoist load in memory IV to allow vectorization (PR #168312)   Felipe Magno de Almeida via llvm-commits
• [llvm] [X86][APX] Compress setzucc with memory operand to setcc (PR #170842)   Feng Zou via llvm-commits
• [llvm] [X86][APX] Compress setzucc with memory operand to setcc (PR #170842)   Feng Zou via llvm-commits
• [llvm] [DirectX] Add lowering support for `llvm.fsh[l|r].*` (PR #170570)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Add lowering support for `llvm.fsh[l|r].*` (PR #170570)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Add lowering support for `llvm.fsh[l|r].*` (PR #170570)   Finn Plummer via llvm-commits
• [llvm] [NFC] Add missing analysis to `DirectX/llc-pipeline` (PR #170714)   Finn Plummer via llvm-commits
• [llvm] [NFC] Add missing analysis to `DirectX/llc-pipeline` (PR #170714)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Add lowering support for `llvm.fsh[l|r].*` (PR #170570)   Finn Plummer via llvm-commits
• [llvm] [VPlan] Use wide IV if scalar lanes > 0 are used with scalable vectors. (PR #169796)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Extract reverse operation for reverse accesses (PR #146525)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Extract reverse operation for reverse accesses (PR #146525)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Extract reverse operation for reverse accesses (PR #146525)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use BlockFrequencyInfo in getPredBlockCostDivisor (PR #158690)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use BlockFrequencyInfo in getPredBlockCostDivisor (PR #158690)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use BlockFrequencyInfo in getPredBlockCostDivisor (PR #158690)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use BlockFrequencyInfo in getPredBlockCostDivisor (PR #158690)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Extract reverse operation for reverse accesses (PR #146525)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use wide IV if scalar lanes > 0 are used with scalable vectors. (PR #169796)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use wide IV if scalar lanes > 0 are used with scalable vectors. (PR #169796)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Sink predicated stores with complementary masks. (PR #168771)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Sink predicated stores with complementary masks. (PR #168771)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Sink predicated stores with complementary masks. (PR #168771)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Sink predicated stores with complementary masks. (PR #168771)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Allow udiv canonicalization of potentially-wrapping AddRecs (PR #169576)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Add initial support for ptrtoaddr. (PR #158032)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Add initial support for ptrtoaddr. (PR #158032)   Florian Hahn via llvm-commits
• [llvm] [LV][NFC] Remove unnecessary multiply in expandVPWidenIntOrFpInduction (PR #170159)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace ExtractLast(Elem|LanePerPart) with ExtractLast(Lane/Part) (PR #164124)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use wide IV if scalar lanes > 0 are used with scalable vectors. (PR #169796)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Rewrite more SCEVAddExpr when applying guards. (PR #159942)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use wide IV if scalar lanes > 0 are used with scalable vectors. (PR #169796)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use wide IV if scalar lanes > 0 are used with scalable vectors. (PR #169796)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace ExtractLast(Elem|LanePerPart) with ExtractLast(Lane/Part) (PR #164124)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use wide IV if scalar lanes > 0 are used with scalable vectors. (PR #169796)   Florian Hahn via llvm-commits
• [llvm] [MapVector] Introduce {keys,values} iterators (PR #169675)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Improve code in VPInstruction::generate (NFC) (PR #169470)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Allow udiv canonicalization of potentially-wrapping AddRecs (PR #169576)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Allow udiv canonicalization of potentially-wrapping AddRecs (PR #169576)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Allow udiv canonicalization of potentially-wrapping AddRecs (PR #169576)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Treat VPVector(End)PointerRecipe as single-scalar, if ops are. (PR #169249)   Florian Hahn via llvm-commits
• [llvm] 1e6476d - [LV] Add predicated store sinking tests requiring further noalias checks   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use SCEV to prove non-aliasing for stores at different offsets. (PR #170347)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [LV] Use forced cost once for whole interleave group in legacy costmodel (PR #168270)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [LV] Use forced cost once for whole interleave group in legacy costmodel (PR #168270)   Florian Hahn via llvm-commits
• [llvm] [LV] Use forced cost once for whole interleave group in legacy costmodel (PR #168270)   Florian Hahn via llvm-commits
• [llvm] [LV] Use forced cost once for whole interleave group in legacy costmodel (PR #168270)   Florian Hahn via llvm-commits
• [llvm] [LV] Use forced cost once for whole interleave group in legacy costmodel (PR #168270)   Florian Hahn via llvm-commits
• [llvm] bd5fa63 - [VPlan] Remove duplicated computeCost call (NFC).   Florian Hahn via llvm-commits
• [llvm] 41519b3 - [SCEV] Add UDiv canonicalization tests with nested AddRecs.   Florian Hahn via llvm-commits
• [llvm] [TTI] Use MemIntrinsicCostAttributes for getStridedOpCost (PR #170436)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Handle non-constant start values in AddRec UDiv canonicalization. (PR #170474)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use predicate in VPInstruction::computeCost for selects. (PR #170278)   Florian Hahn via llvm-commits
• [llvm] c5e6f4e - [AArch64] Add unrolling test with -mcpu=apple-a17.   Florian Hahn via llvm-commits
• [llvm] [DebugInfo][LoopVectorizer][NFC] Use unknown annotations for more instructions (PR #170522)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Consolidate logic for narrowToSingleScalars (NFCI) (PR #167360)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Add isAppleMLike helper to check for M cores and aligned CPUs. (PR #170553)   Florian Hahn via llvm-commits
• [llvm] [PowerPC] cost modeling for length type VP intrinsic load/store (PR #168938)   Florian Hahn via llvm-commits
• [llvm] [PowerPC] cost modeling for length type VP intrinsic load/store (PR #168938)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Handle non-constant start values in AddRec UDiv canonicalization. (PR #170474)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Handle non-constant start values in AddRec UDiv canonicalization. (PR #170474)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Handle non-constant start values in AddRec UDiv canonicalization. (PR #170474)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Handle non-constant start values in AddRec UDiv canonicalization. (PR #170474)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Handle non-constant start values in AddRec UDiv canonicalization. (PR #170474)   Florian Hahn via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   Florian Hahn via llvm-commits
• [llvm] 095f8e0 - [LV] Add more tests for finding the first-iv of argmin.   Florian Hahn via llvm-commits
• [llvm] [SCEV] Handle non-constant start values in AddRec UDiv canonicalization. (PR #170474)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Add isAppleMLike helper to check for M cores and aligned CPUs. (PR #170553)   Florian Hahn via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fix opcode in LoadStore EVL recipe (PR #170594)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix random behaviour in LoopVectorizationLegality::isUniform (PR #170463)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix random behaviour in LoopVectorizationLegality::isUniform (PR #170463)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix random behaviour in LoopVectorizationLegality::isUniform (PR #170463)   Florian Hahn via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Florian Hahn via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize conditional scalar assignments (PR #158088)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize conditional scalar assignments (PR #158088)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize conditional scalar assignments (PR #158088)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize conditional scalar assignments (PR #158088)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement printing VPIRMetadata. (PR #168385)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Skip applying InstsToScalarize with forced instr costs. (PR #168269)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Skip applying InstsToScalarize with forced instr costs. (PR #168269)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement printing VPIRMetadata. (PR #168385)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement printing VPIRMetadata. (PR #168385)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix random behaviour in LoopVectorizationLegality::isUniform (PR #170463)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Directly unroll VectorPointerRecipe (PR #168886)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Directly unroll VectorPointerRecipe (PR #168886)   Florian Hahn via llvm-commits
• [llvm] Revert [VPlan] Consolidate logic for narrowToSingleScalars (PR #170720)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Add m_scev_UndefOrPoison (NFC). (PR #170740)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Add poison/undef canonicalization for SCEVAddExpr, SCEVAddRecExpr. (PR #170741)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Add poison/undef canonicalization for SCEVAddExpr, SCEVAddRecExpr. (PR #170741)   Florian Hahn via llvm-commits
• [llvm] f02dc4d - [VPlan] Don't try to hoist multi-defs for first-order recurrences.   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize conditional scalar assignments (PR #158088)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize conditional scalar assignments (PR #158088)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize conditional scalar assignments (PR #158088)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize conditional scalar assignments (PR #158088)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize conditional scalar assignments (PR #158088)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize conditional scalar assignments (PR #158088)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize conditional scalar assignments (PR #158088)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize conditional scalar assignments (PR #158088)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Directly unroll VectorPointerRecipe (PR #168886)   Florian Hahn via llvm-commits
• [llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)   Florian Hahn via llvm-commits
• [llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Add m_scev_UndefOrPoison (NFC). (PR #170740)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Add m_scev_UndefOrPoison (NFC). (PR #170740)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Add m_scev_UndefOrPoison (NFC). (PR #170740)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize conditional scalar assignments (PR #158088)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize conditional scalar assignments (PR #158088)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Detect and create partial reductions in VPlan. (NFCI) (PR #167851)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace UnrollPart for VPScalarIVSteps with start index op (NFC) (PR #170906)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace UnrollPart for VPScalarIVSteps with start index op (NFC) (PR #170906)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Explicitly unoll replicate-regions without live-outs by VF. (PR #170212)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Add isAppleMLike helper to check for M cores and aligned CPUs. (PR #170553)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Add isAppleMLike helper to check for M cores and aligned CPUs. (PR #170553)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Add isAppleMLike helper to check for M cores and aligned CPUs. (PR #170553)   Florian Hahn via llvm-commits
• [llvm] d8e52c0 - [VPlan] Use strict whitespace checks for VPlan printing test.   Florian Hahn via llvm-commits
• [llvm] ba836dc - [VPlan] Remove stray space before ops when printing vector-ptr (NFC)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace ExtractLast(Elem|LanePerPart) with ExtractLast(Lane/Part) (PR #164124)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace ExtractLast(Elem|LanePerPart) with ExtractLast(Lane/Part) (PR #164124)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace ExtractLast(Elem|LanePerPart) with ExtractLast(Lane/Part) (PR #164124)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace ExtractLast(Elem|LanePerPart) with ExtractLast(Lane/Part) (PR #164124)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace ExtractLast(Elem|LanePerPart) with ExtractLast(Lane/Part) (PR #164124)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace ExtractLast(Elem|LanePerPart) with ExtractLast(Lane/Part) (PR #164124)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace ExtractLast(Elem|LanePerPart) with ExtractLast(Lane/Part) (PR #164124)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace ExtractLast(Elem|LanePerPart) with ExtractLast(Lane/Part) (PR #164124)   Florian Hahn via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   Florian Hahn via llvm-commits
• [compiler-rt] [compiler-rt] [test] refine target_page_size() in lit.common.cfg.py (NFC) (PR #170475)   Florian Mayer via llvm-commits
• [clang] [llvm] [MTE] Add an attribute to opt-in memory tagging of global variables while using fsanitize=memtag-globals (#166380) (PR #168535)   Florian Mayer via llvm-commits
• [clang] [llvm] [MTE] Add an attribute to opt-in memory tagging of global variables while using fsanitize=memtag-globals (#166380) (PR #168535)   Florian Mayer via llvm-commits
• [clang] [llvm] [MTE] Add an attribute to opt-in memory tagging of global variables while using fsanitize=memtag-globals (#166380) (PR #168535)   Florian Mayer via llvm-commits
• [clang] [llvm] [MTE] Add an attribute to opt-in memory tagging of global variables while using fsanitize=memtag-globals (#166380) (PR #168535)   Florian Mayer via llvm-commits
• [clang] [llvm] [MTE] Add an attribute to opt-in memory tagging of global variables while using fsanitize=memtag-globals (#166380) (PR #168535)   Florian Mayer via llvm-commits
• [compiler-rt] [UBSan] Fix missing preserve handlers (PR #170788)   Florian Mayer via llvm-commits
• [compiler-rt] [compiler-rt] [UBSan] Fix missing preserve handlers (PR #170788)   Florian Mayer via llvm-commits
• [llvm] [NFC] Fix memory leak in ConstantsTest (PR #170789)   Florian Mayer via llvm-commits
• [clang] [llvm] [MTE] Add an attribute to opt-in memory tagging of global variables while using fsanitize=memtag-globals (#166380) (PR #168535)   Florian Mayer via llvm-commits
• [compiler-rt] [compiler-rt] [test] refine target_page_size() in lit.common.cfg.py (NFC) (PR #170475)   Florian Mayer via llvm-commits
• [llvm] [AArch64] support `.arch_extension dit` (PR #169999)   Folkert de Vries via llvm-commits
• [llvm] [AArch64] support `.arch_extension dit` (PR #169999)   Folkert de Vries via llvm-commits
• [llvm] [AArch64] support `.arch_extension dit` (PR #169999)   Folkert de Vries via llvm-commits
• [llvm] [AArch64] support `.arch_extension dit` (PR #169999)   Folkert de Vries via llvm-commits
• [llvm] [RISCV] improve `musttail` support (PR #170547)   Folkert de Vries via llvm-commits
• [llvm] [RISCV] improve `musttail` support (PR #170547)   Folkert de Vries via llvm-commits
• [llvm] [RISCV] improve `musttail` support (PR #170547)   Folkert de Vries via llvm-commits
• [llvm] [RISCV] improve `musttail` support (PR #170547)   Folkert de Vries via llvm-commits
• [llvm] [RISCV] improve `musttail` support (PR #170547)   Folkert de Vries via llvm-commits
• [llvm] [RISCV] improve `musttail` support (PR #170547)   Folkert de Vries via llvm-commits
• [llvm] x86: fix musttail sibcall miscompilation (PR #168956)   Folkert de Vries via llvm-commits
• [llvm] x86: fix musttail sibcall miscompilation (PR #168956)   Folkert de Vries via llvm-commits
• [llvm] x86: fix musttail sibcall miscompilation (PR #168956)   Folkert de Vries via llvm-commits
• [llvm] x86: fix musttail sibcall miscompilation (PR #168956)   Folkert de Vries via llvm-commits
• [llvm] x86: fix musttail sibcall miscompilation (PR #168956)   Folkert de Vries via llvm-commits
• [llvm] x86: fix musttail sibcall miscompilation (PR #168956)   Folkert de Vries via llvm-commits
• [llvm] [LoadStoreVectorizer] Allow redundant stores (PR #169946)   Gang Chen via llvm-commits
• [llvm] [LoadStoreVectorizer] Allow redundant stores (PR #169946)   Gang Chen via llvm-commits
• [llvm] [LV] Transform to handle exits in the scalar loop (PR #148626)   Gaëtan Bossu via llvm-commits
• [llvm] Add LoopVectorizer support for `llvm.vector.partial.reduce.fadd` (PR #163975)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Transform to handle exits in the scalar loop (PR #148626)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Transform to handle exits in the scalar loop (PR #148626)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Transform to handle exits in the scalar loop (PR #148626)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Transform to handle exits in the scalar loop (PR #148626)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Transform to handle exits in the scalar loop (PR #148626)   Gaëtan Bossu via llvm-commits
• [llvm] Reapply "[BOLT][BTI] Skip inlining BasicBlocks containing indirect tailcalls" (#169881) (PR #169929)   Gergely Bálint via llvm-commits
• [llvm] [BOLT] Improve DWARF CFI generation for pac-ret binaries (PR #163381)   Gergely Bálint via llvm-commits
• [llvm] [BOLT] Improve DWARF CFI generation for pac-ret binaries (PR #163381)   Gergely Bálint via llvm-commits
• [llvm] [BOLT] Improve DWARF CFI generation for pac-ret binaries (PR #163381)   Gergely Bálint via llvm-commits
• [llvm] [BOLT] Rename Pointer Auth DWARF rewriter passes (PR #164622)   Gergely Bálint via llvm-commits
• [llvm] [BOLT] Rename Pointer Auth DWARF rewriter passes (PR #164622)   Gergely Bálint via llvm-commits
• [llvm] [BOLT] Rename Pointer Auth DWARF rewriter passes (PR #164622)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][PAC] Warn about synchronous unwind tables (PR #165227)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][PAC] Warn about synchronous unwind tables (PR #165227)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][PAC] Warn about synchronous unwind tables (PR #165227)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][BTI] Add MCPlusBuilder::addBTItoBBStart (PR #167329)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][BTI] Add MCPlusBuilder::addBTItoBBStart (PR #167329)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][BTI] Add MCPlusBuilder::addBTItoBBStart (PR #167329)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][BTI] Add MCPlusBuilder::addBTItoBBStart (PR #167329)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][BTI] Add MCPlusBuilder::addBTItoBBStart (PR #167329)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][BTI] Add MCPlusBuilder::addBTItoBBStart (PR #167329)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][BTI] Add MCPlusBuilder::insertBTI (PR #167329)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][BTI] Add MCPlusBuilder::insertBTI (PR #167329)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][BTI] Add MCPlusBuilder::insertBTI (PR #167329)   Gergely Bálint via llvm-commits
• [llvm] Revert "[BOLT][AArch64] Fixed indirect call instrumentation snippet" (PR #170874)   Gergely Bálint via llvm-commits
• [llvm] [AArch64] Treat NOP as a separate instruction. (PR #170968)   Gergely Bálint via llvm-commits
• [llvm] [AMDGPU] Enable sinking of free vector ops that will be folded into their uses (PR #162580)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] [AMDGPU] Enable sinking of free vector ops that will be folded into their uses (PR #162580)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] [AMDGPU] Enable sinking of free vector ops that will be folded into their uses (PR #162580)   Gheorghe-Teodor Bercea via llvm-commits
• [flang] [llvm] [mlir] Revert "[Flang][OpenMP] Add lowering support for is_device_ptr clause" (PR #170778)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] [LV] Vectorize conditional scalar assignments (PR #158088)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize conditional scalar assignments (PR #158088)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize conditional scalar assignments (PR #158088)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform to handle exits in the scalar loop (PR #148626)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform to handle exits in the scalar loop (PR #148626)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform to handle exits in the scalar loop (PR #148626)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform to handle exits in the scalar loop (PR #148626)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize conditional scalar assignments (PR #158088)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize conditional scalar assignments (PR #158088)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize conditional scalar assignments (PR #158088)   Graham Hunter via llvm-commits
• [llvm] Fix __apple_XXX iterator that iterates over all entries. (PR #157538)   Greg Clayton via llvm-commits
• [clang] [llvm] [clang/LLVM] Add function level flatten_depth attribute for depth-limited inlining (PR #165777)   Grigory Pastukhov via llvm-commits
• [llvm] Remove myself from CODEOWNERS (PR #170799)   Han-Chung Wang via llvm-commits
• [llvm] Remove myself from CODEOWNERS (PR #170799)   Han-Chung Wang via llvm-commits
• [llvm] Remove myself from CODEOWNERS (PR #170799)   Han-Chung Wang via llvm-commits
• [llvm] build_llvm_release.bat: Use absolute path when building the tarball (PR #169951)   Hans Wennborg via llvm-commits
• [lld] [llvm] [LLD][COFF] Prefetch inputs early-on to improve link times (PR #169224)   Hans Wennborg via llvm-commits
• [lld] [llvm] [LLD][COFF] Prefetch inputs early-on to improve link times (PR #169224)   Hans Wennborg via llvm-commits
• [lld] [llvm] [LLD][COFF] Prefetch inputs early-on to improve link times (PR #169224)   Hans Wennborg via llvm-commits
• [lld] [llvm] [LLD][COFF] Prefetch inputs early-on to improve link times (PR #169224)   Hans Wennborg via llvm-commits
• [llvm] Build win release packages with LLDB_ENABLE_LIBXML2 (PR #170513)   Hans Wennborg via llvm-commits
• [llvm] Build win release packages with LLDB_ENABLE_LIBXML2 (PR #170513)   Hans Wennborg via llvm-commits
• [clang] [lldb] [llvm] [cmake] Add support for statically linking libxml2 (PR #166867)   Hans Wennborg via llvm-commits
• [llvm] [Support][Windows] disk_space handle unicode paths (PR #170716)   Hans Wennborg via llvm-commits
• [llvm] [AArch64] Treat NOP as a separate instruction. (PR #170968)   Harald van Dijk via llvm-commits
• [llvm] [AArch64] Treat NOP as a separate instruction. (PR #170968)   Harald van Dijk via llvm-commits
• [llvm] [AArch64] Treat NOP as a separate instruction. (PR #170968)   Harald van Dijk via llvm-commits
• [llvm] [AArch64] Treat NOP as a separate instruction. (PR #170968)   Harald van Dijk via llvm-commits
• [llvm] [AArch64] Treat NOP as a separate instruction. (PR #170968)   Harald van Dijk via llvm-commits
• [llvm] [AMDGPU] Enable i8 GEP promotion for vector allocas (PR #166132)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Enable i8 GEP promotion for vector allocas (PR #166132)   Harrison Hao via llvm-commits
• [clang] [llvm] Added partial support for compiling C++20 modules and header-units without scanning. (PR #147682)   Hassan Sajjad via llvm-commits
• [clang] [llvm] Added partial support for compiling C++20 modules and header-units without scanning. (PR #147682)   Hassan Sajjad via llvm-commits
• [clang] [llvm] Added partial support for compiling C++20 modules and header-units without scanning. (PR #147682)   Hassan Sajjad via llvm-commits
• [clang] [llvm] Added partial support for compiling C++20 modules and header-units without scanning. (PR #147682)   Hassan Sajjad via llvm-commits
• [clang] [llvm] [Clang]: Enable speculative devirtualization (PR #159685)   Hassnaa Hamdi via llvm-commits
• [clang] [llvm] [Clang]: Enable speculative devirtualization (PR #159685)   Hassnaa Hamdi via llvm-commits
• [clang] [llvm] [Clang]: Enable speculative devirtualization (PR #159685)   Hassnaa Hamdi via llvm-commits
• [clang] [llvm] [Clang]: Enable speculative devirtualization (PR #159685)   Hassnaa Hamdi via llvm-commits
• [clang] [llvm] [Clang]: Enable speculative devirtualization (PR #159685)   Hassnaa Hamdi via llvm-commits
• [clang] [llvm] [Clang]: Enable speculative devirtualization (PR #159685)   Hassnaa Hamdi via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Hassnaa Hamdi via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Hassnaa Hamdi via llvm-commits
• [clang] [llvm] [Clang]: Support opt-in speculative devirtualization (PR #159685)   Hassnaa Hamdi via llvm-commits
• [clang] [llvm] [Clang]: Support opt-in speculative devirtualization (PR #159685)   Hassnaa Hamdi via llvm-commits
• [clang] [llvm] [Clang]: Support opt-in speculative devirtualization (PR #159685)   Hassnaa Hamdi via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Hassnaa Hamdi via llvm-commits
• [llvm] [AArch64] Run optimizeTerminators earlier too. (PR #170907)   Hassnaa Hamdi via llvm-commits
• [llvm] [AArch64] Run optimizeTerminators earlier too. (PR #170907)   Hassnaa Hamdi via llvm-commits
• [llvm] [AArch64] Run optimizeTerminators earlier too. (PR #170907)   Hassnaa Hamdi via llvm-commits
• [llvm] [AArch64] Run optimizeTerminators earlier too. (PR #170907)   Hassnaa Hamdi via llvm-commits
• [llvm] [AArch64] Run optimizeTerminators earlier too. (PR #170907)   Hassnaa Hamdi via llvm-commits
• [clang] [llvm] [Clang]: Support opt-in speculative devirtualization (PR #159685)   Hassnaa Hamdi via llvm-commits
• [compiler-rt] [NFC][compiler-rt] Fix typos in int_to_fp_impl (PR #171067)   Hendrik Hübner via llvm-commits
• [clang] [llvm] [CIR] X86 vector masked load builtins (PR #169464)   Henrich Lauko via llvm-commits
• [clang] [llvm] [CIR] X86 vector masked load builtins (PR #169464)   Henrich Lauko via llvm-commits
• [llvm] [MachineBasicBlock] Don't split loop header successor if the terminator is unanalyzable (PR #170146)   Hongyu Chen via llvm-commits
• [llvm] [MachineBasicBlock] Don't split loop header successor if the terminator is unanalyzable (PR #170146)   Hongyu Chen via llvm-commits
• [llvm] [MachineBasicBlock] Don't split loop header successor if the terminator is unanalyzable (PR #170146)   Hongyu Chen via llvm-commits
• [llvm] [MachineBasicBlock] Don't split loop header successor if the terminator is unanalyzable (PR #170146)   Hongyu Chen via llvm-commits
• [llvm] [MachineBasicBlock] Don't split loop header successor if the terminator is unanalyzable (PR #170146)   Hongyu Chen via llvm-commits
• [llvm] [AMDGPU][UnifyLoopExits] Fix duplicate successor handling (PR #170759)   Hongyu Chen via llvm-commits
• [llvm] [CostModel] Estimate the codesize cost of switch (PR #163569)   Hongyu Chen via llvm-commits
• [llvm] [DAGCombiner] Don't peek through bitcast when checking isMulAddWithConstProfitable (PR #171056)   Hongyu Chen via llvm-commits
• [clang] [compiler-rt] [UBSAN] add null and alignment checks for aggregates (PR #164548)   Hubert Tong via llvm-commits
• [clang] [compiler-rt] [UBSAN] add null and alignment checks for aggregates (PR #164548)   Hubert Tong via llvm-commits
• [llvm] [HEXAGON] [MachinePipeliner] Fix the DAG in case of dependent phis. (PR #135925)   Ikhlas Ajbar via llvm-commits
• [llvm] [HEXAGON] [MachinePipeliner] Fix the DAG in case of dependent phis. (PR #135925)   Ikhlas Ajbar via llvm-commits
• [llvm] [HEXAGON] [MachinePipeliner] Fix the DAG in case of dependent phis. (PR #135925)   Ikhlas Ajbar via llvm-commits
• [llvm] [HEXAGON] [MachinePipeliner] Fix the DAG in case of dependent phis. (PR #135925)   Ikhlas Ajbar via llvm-commits
• [llvm] [mlir] [MLIR][Python] reland (narrower) type stub generation (PR #157930)   Ingo Müller via llvm-commits
• [llvm] [mlir] [MLIR][Python] reland (narrower) type stub generation (PR #157930)   Ingo Müller via llvm-commits
• [llvm] [mlir] [MLIR][Python] reland (narrower) type stub generation (PR #157930)   Ingo Müller via llvm-commits
• [llvm] [mlir] [MLIR][Python] reland (narrower) type stub generation (PR #157930)   Ingo Müller via llvm-commits
• [llvm] [mlir] [MLIR][Python] reland (narrower) type stub generation (PR #157930)   Ingo Müller via llvm-commits
• [llvm] [mlir][OpenMP] Fix assert in processing of dist_schedule (PR #170269)   Jack Styles via llvm-commits
• [compiler-rt] [asan][sanitizer_common] Enable build and testing of asan+sanitizer_common on AIX (PR #137186)   Jake Egan via llvm-commits
• [compiler-rt] [asan] Implement interception on AIX (PR #131870)   Jake Egan via llvm-commits
• [compiler-rt] [asan] Implement interception on AIX (PR #131870)   Jake Egan via llvm-commits
• [compiler-rt] [NFC][asan] Fix formatting of asan_interceptors.h (PR #170361)   Jake Egan via llvm-commits
• [llvm] Fixed build with C++20 standard (PR #169772)   Jakub Kuderski via llvm-commits
• [llvm] [llvm][NFC] In `SetVector`, `contains` and `count` now automatically accept `const T *` arguments when the key is `T *` (PR #170377)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] BitVector: give `subsetOf(RHS)` name to `!test(RHS)` (NFC) (PR #170875)   Jakub Kuderski via llvm-commits
• [llvm] [LLVM][ADT] Add helper class for working with caches (PR #171008)   Jakub Kuderski via llvm-commits
• [llvm] [LLVM][ADT] Add helper class for working with caches (PR #171008)   Jakub Kuderski via llvm-commits
• [llvm] [LLVM][ADT] Add helper class for working with caches (PR #171008)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Add `llvm::conditionally_reverse()` iterator (PR #171040)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Add `llvm::conditionally_reverse()` iterator (PR #171040)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Add `llvm::conditionally_reverse()` iterator (PR #171040)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Add `llvm::conditionally_reverse()` iterator (PR #171040)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Add `llvm::reverse_conditionally()` iterator (PR #171040)   Jakub Kuderski via llvm-commits
• [llvm] llvm-ar `N` argument: re-add truncated sentence (PR #169977)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   James Henderson via llvm-commits
• [llvm] [llvm-readobj][MachO] Add support for CPU_TYPE_ARM64_32 (PR #170193)   James Henderson via llvm-commits
• [llvm] [llvm-readobj][MachO] Add support for CPU_TYPE_ARM64_32 (PR #170193)   James Henderson via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   James Henderson via llvm-commits
• [llvm] [llvm-readobj][MachO] Add support for CPU_TYPE_ARM64_32 (PR #170193)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   James Henderson via llvm-commits
• [llvm] [llvm-symbolizer] Recognize AIX big archive (PR #150401)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Eliminate the dependency of `--mcpu=help` and `--mattr=help` on `-d` (PR #165661)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Eliminate the dependency of `--mcpu=help` and `--mattr=help` on `-d` (PR #165661)   James Henderson via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   James Henderson via llvm-commits
• [llvm] [llvm-readobj][MachO] Add support for CPU_TYPE_ARM64_32 (PR #170193)   James Henderson via llvm-commits
• [llvm] [llvm-readobj][MachO] Add support for CPU_TYPE_ARM64_32 (PR #170193)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Support --mcpu=help/--mattr=help without -d (PR #165661)   James Henderson via llvm-commits
• [llvm] [ELF][Objcopy] Dont corrupt symbol table when `--update-section` is called for ELF files (PR #170462)   James Henderson via llvm-commits
• [llvm] [ELF][Objcopy] Dont corrupt symbol table when `--update-section` is called for ELF files (PR #170462)   James Henderson via llvm-commits
• [llvm] [ELF][Objcopy] Dont corrupt symbol table when `--update-section` is called for ELF files (PR #170462)   James Henderson via llvm-commits
• [llvm] [ELF][Objcopy] Dont corrupt symbol table when `--update-section` is called for ELF files (PR #170462)   James Henderson via llvm-commits
• [llvm] [ELF][Objcopy] Dont corrupt symbol table when `--update-section` is called for ELF files (PR #170462)   James Henderson via llvm-commits
• [llvm] Add CondGroup infrastructure and unittests. (PR #170922)   James Player via llvm-commits
• [llvm] Add CondGroup infrastructure and unittests. (PR #170922)   James Player via llvm-commits
• [llvm] Add CondGroup infrastructure and unittests. (PR #170922)   James Player via llvm-commits
• [llvm] Add CondGroup infrastructure and unittests. (PR #170922)   James Player via llvm-commits
• [llvm] [LangRef] make consequences of NaN rules for pow(i) more explicit (PR #170177)   James Y Knight via llvm-commits
• [llvm] [LangRef] make consequences of NaN rules for pow(i) more explicit (PR #170177)   James Y Knight via llvm-commits
• [llvm] [AMDGPU] Add some more product names for GPUs (PR #170469)   Jan Patrick Lehr via llvm-commits
• [llvm] Revert "[AMDGPU] Enable i8 GEP promotion for vector allocas" (PR #171087)   Jan Patrick Lehr via llvm-commits
• [llvm] Revert "[AMDGPU] Enable i8 GEP promotion for vector allocas" (PR #171087)   Jan Patrick Lehr via llvm-commits
• [llvm] [AMDGPU] Emit b32 movs if (a)v_mov_b64_pseudo dest vgprs are misaligned (PR #160547)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU] siloadstoreopt generate REG_SEQUENCE with aligned operands (PR #162088)   Janek van Oirschot via llvm-commits
• [llvm] [Dexter] Adjust launch sequencing to align closer with DAP spec (PR #170523)   Janet Yang via llvm-commits
• [llvm] [Dexter] Adjust launch sequencing to align closer with DAP spec (PR #170523)   Janet Yang via llvm-commits
• [llvm] [WebAssembly] Optimize away mask of 63 for shl ( zext (and i32 63))) (PR #152397)   Jasmine Tang via llvm-commits
• [llvm] [WebAssembly] Optimize away mask of 63 for shl ( zext (and i32 63))) (PR #152397)   Jasmine Tang via llvm-commits
• [llvm] [WebAssembly] Optimize away mask of 63 for shl ( zext (and i32 63))) (PR #152397)   Jasmine Tang via llvm-commits
• [llvm] [WebAssembly] Optimize away mask of 63 for sra and srl( zext (and i32 63))) (PR #170128)   Jasmine Tang via llvm-commits
• [llvm] [WebAssembly] Optimize away mask of 63 for sra and srl( zext (and i32 63))) (PR #170128)   Jasmine Tang via llvm-commits
• [llvm] [WebAssembly] Optimize away mask of 63 for sra and srl( zext (and i32 63))) (PR #170128)   Jasmine Tang via llvm-commits
• [llvm] [WebAssembly] Optimize away mask of 63 for sra and srl( zext (and i32 63))) (PR #170128)   Jasmine Tang via llvm-commits
• [llvm] [WebAssembly] Optimizes [zext](and 63|32) for shl, srl and sra with selectShiftMask (PR #170572)   Jasmine Tang via llvm-commits
• [llvm] [TableGen] Add `CompressedTupleNameStride` to compress tuple names. (PR #169196)   Jason Eckhardt via llvm-commits
• [llvm] [TableGen] Add `CompressedTupleNameStride` to compress tuple names. (PR #169196)   Jason Eckhardt via llvm-commits
• [llvm] [Bazel] Fix `--warn-backrefs` errors in `Analysis` target (PR #170357)   Jason Macnak via llvm-commits
• [llvm] [Bazel] Fix `--warn-backrefs` errors in `Analysis` target (PR #170357)   Jason Macnak via llvm-commits
• [llvm] [AMDGPU] Add support for GFX12 expert scheduling mode 2 (PR #170319)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add support for GFX12 expert scheduling mode 2 (PR #170319)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add support for GFX12 expert scheduling mode 2 (PR #170319)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add support for GFX12 expert scheduling mode 2 (PR #170319)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add support for GFX12 expert scheduling mode 2 (PR #170319)   Jay Foad via llvm-commits
• [llvm] [SelectionDAG] Lowering usub.sat(a, 1) to a - (a != 0) (PR #170076)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add a RUN line to check VGPR MSBs for VOPD pairs (PR #170494)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add verifier for flat_scr_base_hi read hazard (PR #170550)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix VGPR lowering for V_DUAL_FMAMK_F32 (PR #170567)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix VGPR lowering for V_DUAL_FMAMK_F32 (PR #170567)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Enable reordering of VMEM loads during clustering (PR #107986)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix VGPR lowering for V_DUAL_FMAMK_F32 (PR #170567)   Jay Foad via llvm-commits
• [llvm] [NFC] Reduce fragility of swdev503538-move-to-valu… test (PR #170702)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Make rotr illegal (PR #166558)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (PR #167372)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (PR #167372)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (PR #167372)   Jay Foad via llvm-commits
• [llvm] AMDGPU: Improve exp10 lowering for f16 (PR #170771)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Common up some unsafe fexp lowering. NFC. (PR #170841)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Inherit constructors from WaitcntGenerator. NFC. (PR #170845)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Make rotr illegal (PR #166558)   Jay Foad via llvm-commits
• [llvm] 64e3bcd - [AMDGPU] Add an assertion. NFCI.   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Eliminate InstCombineTables.td. NFC. (PR #170857)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Eliminate InstCombineTables.td. NFC. (PR #170857)   Jay Foad via llvm-commits
• [flang] [llvm] [flang/flang-rt] Adding support of RAND, IRAND and SRAND intrinsics (PR #166780)   Jean-Didier PAILLEUX via llvm-commits
• [llvm] [llvm] Replace `OwningArrayRef` with `std::vector` in `BTFParser` (PR #169124)   Jeremy Morse via llvm-commits
• [llvm] [VectorCombine] Fold permute of intrinsics into intrinsic of permutes: shuffle(intrinsic, poison/undef) -> intrinsic(shuffle) (PR #170052)   Jerry Dang via llvm-commits
• [llvm] [VectorCombine] Fold permute of intrinsics into intrinsic of permutes: shuffle(intrinsic, poison/undef) -> intrinsic(shuffle) (PR #170052)   Jerry Dang via llvm-commits
• [llvm] [VectorCombine] Fold permute of intrinsics into intrinsic of permutes: shuffle(intrinsic, poison/undef) -> intrinsic(shuffle) (PR #170052)   Jerry Dang via llvm-commits
• [llvm] [VectorCombine] Fold permute of intrinsics into intrinsic of permutes: shuffle(intrinsic, poison/undef) -> intrinsic(shuffle) (PR #170052)   Jerry Dang via llvm-commits
• [llvm] [VectorCombine] Fold permute of intrinsics into intrinsic of permutes: shuffle(intrinsic, poison/undef) -> intrinsic(shuffle) (PR #170052)   Jerry Dang via llvm-commits
• [llvm] [VectorCombine] Fold permute of intrinsics into intrinsic of permutes: shuffle(intrinsic, poison/undef) -> intrinsic(shuffle) (PR #170052)   Jerry Dang via llvm-commits
• [llvm] [RISCV] Emit lpad for function with returns-twice attribute (PR #170520)   Jesse Huang via llvm-commits
• [llvm] [RISCV] Emit lpad for function with returns-twice attribute (PR #170520)   Jesse Huang via llvm-commits
• [llvm] [RISCV] Emit lpad for function with returns-twice attribute (PR #170520)   Jesse Huang via llvm-commits
• [llvm] [RISCV] Emit lpad for function with returns-twice attribute (PR #170520)   Jesse Huang via llvm-commits
• [llvm] [RISCV] Emit lpad for function with returns-twice attribute (PR #170520)   Jesse Huang via llvm-commits
• [llvm] [RISCV] Emit lpad for function with returns-twice attribute (PR #170520)   Jesse Huang via llvm-commits
• [llvm] [RISCV] Emit lpad for function with returns-twice attribute (PR #170520)   Jesse Huang via llvm-commits
• [llvm] [RISCV] Emit lpad for function with returns-twice attribute (PR #170520)   Jesse Huang via llvm-commits
• [llvm] [RISCV] Emit lpad for function with returns-twice attribute (PR #170520)   Jesse Huang via llvm-commits
• [llvm] [RISCV] Inserting indirect jumps with X7 for Zicfilp (PR #170683)   Jesse Huang via llvm-commits
• [llvm] [RISCV] Inserting indirect jumps with X7 for Zicfilp (PR #170683)   Jesse Huang via llvm-commits
• [llvm] [RISCV] Inserting indirect jumps with X7 for Zicfilp (PR #170683)   Jesse Huang via llvm-commits
• [llvm] [RISCV] Inserting indirect jumps with X7 for Zicfilp (PR #170683)   Jesse Huang via llvm-commits
• [clang] [llvm] [RISCV] Add Svrsw60t59b extension (PR #132321)   Jessica Clarke via llvm-commits
• [llvm] [RISCV] Introduce a new tune feature string syntax and its parser (PR #168160)   Jessica Clarke via llvm-commits
• [lld] [NFC][ELF] Remove pointless NEEDS_TLSGD_TO_IE (PR #171046)   Jessica Clarke via llvm-commits
• [lld] [lld-macho] Remove cuIndices indirection in UnwindInfoSection. NFC (PR #170252)   Jez Ng via llvm-commits
• [lld] [lld-macho] Remove cuIndices indirection in UnwindInfoSection. NFC (PR #170252)   Jez Ng via llvm-commits
• [lld] [lld-macho] Remove cuIndices indirection in UnwindInfoSection. NFC (PR #170252)   Jez Ng via llvm-commits
• [llvm] [RISCV][GISel] Fix legalize G_EXTRACT_SUBVECTOR (PR #169877)   Jianjian Guan via llvm-commits
• [llvm] [InstCombine] Fold chained GEP with constant base into single GEP (PR #170439)   Jianjian Guan via llvm-commits
• [llvm] [RISCV][GISel] Support select G_EXTRACT_SUBVECTOR (PR #169789)   Jianjian Guan via llvm-commits
• [llvm] [RISCV][GISel] Support select G_EXTRACT_SUBVECTOR (PR #169789)   Jianjian Guan via llvm-commits
• [llvm] [InstCombine] Fold chained GEP with constant base into single GEP (PR #170439)   Jianjian Guan via llvm-commits
• [llvm] [InstCombine] Fold chained GEP with constant base into single GEP (PR #170439)   Jianjian Guan via llvm-commits
• [llvm] [InstCombine] Fold chained GEP with constant base into single GEP (PR #170439)   Jianjian Guan via llvm-commits
• [llvm] [RISCV][GISel] Support select G_EXTRACT_SUBVECTOR (PR #169789)   Jianjian Guan via llvm-commits
• [llvm] b7721c5 - [RISCV] Remove the duplicate for RV32/RV64 in zicond-fp-select-zfinx.ll. NFC.   Jim Lin via llvm-commits
• [llvm] [RISCV] Implement RVV scheduling model for andes 45 series processor. (PR #167821)   Jim Lin via llvm-commits
• [llvm] [RISCV] Remove zvfh and experimental-zvfbfmin from the tests for xsfmm. (PR #170589)   Jim Lin via llvm-commits
• [llvm] [RISCV] Remove zvfh and experimental-zvfbfmin from the tests for xsfmm. (PR #170589)   Jim Lin via llvm-commits
• [llvm] [NFC][RISCV] Cleanup unused attributes in xsfmm tests (PR #170601)   Jim Lin via llvm-commits
• [llvm] [RISCV][llvm] Support VFADD, VFSUB, VFMUL codegen for Zvfbfa (PR #170612)   Jim Lin via llvm-commits
• [llvm] [profcheck] Fix missing profile metadata in ExpandMemCmp (PR #169979)   Jin Huang via llvm-commits
• [llvm] [profcheck] Fix missing profile metadata in ExpandMemCmp (PR #169979)   Jin Huang via llvm-commits
• [llvm] [profcheck] Fix missing profile metadata in ExpandMemCmp (PR #169979)   Jin Huang via llvm-commits
• [llvm] [AA] Improve precision for monotonic atomic load/store operations (PR #158169)   Jin Huang via llvm-commits
• [llvm] [profcheck] Remove the expected failed test cases. (PR #170787)   Jin Huang via llvm-commits
• [llvm] [profcheck] Remove the expected failed test cases. (PR #170787)   Jin Huang via llvm-commits
• [llvm] [AA] Improve precision for monotonic atomic load/store operations (PR #158169)   Jin Huang via llvm-commits
• [llvm] [AA] Improve precision for monotonic atomic load/store operations (PR #158169)   Jin Huang via llvm-commits
• [llvm] [AA] Improve precision for monotonic atomic load/store operations (PR #158169)   Jin Huang via llvm-commits
• [llvm] [AA] Improve precision for monotonic atomic load/store operations (PR #158169)   Jin Huang via llvm-commits
• [llvm] [AA] Improve precision for monotonic atomic load/store operations (PR #158169)   Jin Huang via llvm-commits
• [llvm] [AA] Improve precision for monotonic atomic load/store operations (PR #158169)   Jin Huang via llvm-commits
• [llvm] [BOLT] Discard BB profiles with a hash of 0 in yaml from a Post-BAT binary (PR #169627)   Jinjie Huang via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Jinjie Huang via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Jinjie Huang via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Jinjie Huang via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Jinjie Huang via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Jinjie Huang via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Jinjie Huang via llvm-commits
• [llvm] [llvm-dwp] Fix FoundCUUnit problem on soft-stop with DWARF5 (PR #169783)   Jinjie Huang via llvm-commits
• [llvm] [llvm-dwp] Fix FoundCUUnit problem on soft-stop with DWARF5 (PR #169783)   Jinjie Huang via llvm-commits
• [llvm] [llvm-dwp] Fix FoundCUUnit problem on soft-stop with DWARF5 (PR #169783)   Jinjie Huang via llvm-commits
• [llvm] [llvm-dwp] Fix FoundCUUnit problem on soft-stop with DWARF5 (PR #169783)   Jinjie Huang via llvm-commits
• [llvm] [llvm-dwp] Fix FoundCUUnit problem on soft-stop with DWARF5 (PR #169783)   Jinjie Huang via llvm-commits
• [llvm] [llvm-dwp] Fix FoundCUUnit problem on soft-stop with DWARF5 (PR #169783)   Jinjie Huang via llvm-commits
• [llvm] [BOLT] Discard BB profiles with a hash of 0 in yaml from a Post-BAT binary (PR #169627)   Jinjie Huang via llvm-commits
• [llvm] [llvm-dwp] Fix FoundCUUnit problem on soft-stop with DWARF5 (PR #169783)   Jinjie Huang via llvm-commits
• [llvm] [CodeGen] Fix lpad padding at section start after empty block (PR #112595)   Jinjie Huang via llvm-commits
• [llvm] [llvm-dwp] Fix FoundCUUnit problem on soft-stop with DWARF5 (PR #169783)   Jinjie Huang via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Jinjie Huang via llvm-commits
• [llvm] [BOLT] Fix comments for interprocedural branches. NFC (PR #170745)   Jinjie Huang via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Jinjie Huang via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Jinjie Huang via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Jinjie Huang via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Jinjie Huang via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Jinjie Huang via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Jinjie Huang via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Jinjie Huang via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Jinjie Huang via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Jinjie Huang via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Jinjie Huang via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Jinjie Huang via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][ICP] Propagate parent hash to newly inserted BBs for BAT (PR #171044)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][ICP] Propagate parent hash to newly inserted BBs for BAT (PR #171044)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][ICP] Propagate parent hash to newly inserted BBs for BAT (PR #171044)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][ICP] Propagate parent hash to newly inserted BBs for BAT (PR #171044)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][ICP] Propagate parent hash to newly inserted BBs for BAT (PR #171044)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][ICP] Propagate parent hash to newly inserted BBs for BAT (PR #171044)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][ICP] Propagate parent hash to newly inserted BBs for BAT (PR #171044)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][ICP] Propagate parent hash to newly inserted BBs for BAT (PR #171044)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][ICP] Propagate parent hash to newly inserted BBs for BAT (PR #171044)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][ICP] Propagate parent hash to newly inserted BBs for BAT (PR #171044)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][ICP] Propagate parent hash to newly inserted BBs for BAT (PR #171044)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][ICP] Propagate parent hash to newly inserted BBs for BAT (PR #171044)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][ICP] Propagate parent hash to newly inserted BBs for BAT (PR #171044)   Jinjie Huang via llvm-commits
• [llvm] [BOLT][ICP] Propagate parent hash to newly inserted BBs for BAT (PR #171044)   Jinjie Huang via llvm-commits
• [llvm] [AMDGPU] Fix VGPR lowering for V_DUAL_FMAMK_F32 (PR #170567)   Joe Nash via llvm-commits
• [llvm] [llvm-exegesis] Add AArch64 operand initializers, SetRegTo (PR #169912)   John Brawn via llvm-commits
• [llvm] [llvm-exegesis] Add AArch64 operand initializers, SetRegTo (PR #169912)   John Brawn via llvm-commits
• [llvm] [LSR] Insert the transformed IV increment in the user block (PR #169515)   John Brawn via llvm-commits
• [llvm] [VPlan] Don't use the legacy cost model for loop conditions (PR #156864)   John Brawn via llvm-commits
• [llvm] [Dexter] Adjust launch sequencing to align closer with DAP spec (PR #170523)   John Harrison via llvm-commits
• [llvm] [Dexter] Adjust launch sequencing to align closer with DAP spec (PR #170523)   John Harrison via llvm-commits
• [llvm] [SystemZ] Handle IR struct arguments correctly. (PR #169583)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ] Handle IR struct arguments correctly. (PR #169583)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ] Handle IR struct arguments correctly. (PR #169583)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ] Handle IR struct arguments correctly. (PR #169583)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ] Handle IR struct arguments correctly. (PR #169583)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ] Handle IR struct arguments correctly. (PR #169583)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ] Handle IR struct arguments correctly. (PR #169583)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ] Handle IR struct arguments correctly. (PR #169583)   Jonas Paulsson via llvm-commits
• [llvm] [SelectionDAGBuilder] Remove the added base offset in LowerFormalArguments(). (PR #170732)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ] Handle IR struct arguments correctly. (PR #169583)   Jonas Paulsson via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Jonas Paulsson via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Jonas Paulsson via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Jonas Paulsson via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ] Support fp16 vector ABI and basic codegen. (PR #171066)   Jonas Paulsson via llvm-commits
• [llvm] [Arm] Control forced unrolling of small loops (PR #170127)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64] support `.arch_extension dit` (PR #169999)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64] support `.arch_extension dit` (PR #169999)   Jonathan Thackray via llvm-commits
• [llvm] [benchmark][NFC] Update cc_binary load (PR #169710)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Move clang-fuzzer to separate package (PR #170167)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] feat: update bazel lldb for llvm:support dep (PR #170344)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] feat: update bazel lldb for llvm:support dep (PR #170344)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] update bazel build for PluginScriptedProcess (PR #170364)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] update bazel build for PluginScriptedProcess (PR #170364)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] update bazel build for PluginScriptedProcess (PR #170364)   Jordan Rupprecht via llvm-commits
• [llvm] [Bazel] Fix `--warn-backrefs` errors in `Analysis` target (PR #170357)   Jordan Rupprecht via llvm-commits
• [llvm] [Bazel] Fix `--warn-backrefs` errors in `Analysis` target (PR #170357)   Jordan Rupprecht via llvm-commits
• [llvm] [KCFI][NFC] Remove unused header (PR #170599)   Jordan Rupprecht via llvm-commits
• [clang] [llvm] [CodeGen][KCFI] Allow setting type hash from xxHash64 to FNV-1a (PR #167254)   Jordan Rupprecht via llvm-commits
• [llvm] [KCFI][NFC] Remove unused header (PR #170599)   Jordan Rupprecht via llvm-commits
• [llvm] [KCFI][NFC] Remove unused header (PR #170599)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][clang][DependencyScanning] Port #169962: clang dependency scanner deps (PR #170600)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][clang][DependencyScanning] Port #169962: clang dependency scanner deps (PR #170600)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][NFC] Rename third_party_build/BUILD -> BUILD.bazel (PR #169709)   Jordan Rupprecht via llvm-commits
• [clang] [llvm] [CodeGen][KCFI] Allow setting type hash from xxHash64 to FNV-1a (PR #167254)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][NFC] Avoid set for older bazel versions (PR #170758)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][NFC] Avoid set for older bazel versions (PR #170758)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][clang-doc] Port 9349cb1523ddb88ca9d82bad497bb98082eb6c8d (PR #170797)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][clang-doc] Port 9349cb1523ddb88ca9d82bad497bb98082eb6c8d (PR #170797)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][clang-doc] Port 9349cb1523ddb88ca9d82bad497bb98082eb6c8d (PR #170797)   Jordan Rupprecht via llvm-commits
• [llvm] [profcheck][test] Use quotes for when not using the internal lit shell (PR #170873)   Jordan Rupprecht via llvm-commits
• [llvm] [profcheck][test] Use quotes for when not using the internal lit shell (PR #170873)   Jordan Rupprecht via llvm-commits
• [llvm] [profcheck][test] Use quotes for when not using the internal lit shell (PR #170873)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][mlir] Port 41f00cb3dec39f13a21cf635528bbc36c2c0c965: tablegen dialect interfaces (PR #170884)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][mlir] Port 41f00cb3dec39f13a21cf635528bbc36c2c0c965: tablegen dialect interfaces (PR #170884)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][mlir] Port 41f00cb3dec39f13a21cf635528bbc36c2c0c965: tablegen dialect interfaces (PR #170884)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Fix mlir build after #171024 (PR #171068)   Jorge Gorbe Moya via llvm-commits
• [llvm] [bazel] Fix mlir build after #171024 (PR #171068)   Jorge Gorbe Moya via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Joseph Huber via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Joseph Huber via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Joseph Huber via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Joseph Huber via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Joseph Huber via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Joseph Huber via llvm-commits
• [llvm] [Triple] Add "hipspv" and "chipstar" OS components (PR #170655)   Joseph Huber via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   Joseph Huber via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   Joseph Huber via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   Joseph Huber via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Joseph Huber via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Joseph Huber via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Joseph Huber via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Joseph Huber via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Joseph Huber via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   Joseph Huber via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Joseph Huber via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Joseph Huber via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Joseph Huber via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Joseph Huber via llvm-commits
• [clang] [llvm] [SPIR-V] [HLSL] Add CheckAccessFullyMapped HLSL function. (PR #169398)   Joshua Batista via llvm-commits
• [clang] [llvm] [SPIR-V] [HLSL] Add CheckAccessFullyMapped HLSL function. (PR #169398)   Joshua Batista via llvm-commits
• [clang] [llvm] [HLSL] Implement ddx and ddy HLSL intrinsics (PR #168887)   Joshua Batista via llvm-commits
• [llvm] [LangRef] make consequences of NaN rules for pow(i) more explicit (PR #170177)   Joshua Cranmer via llvm-commits
• [llvm] [LangRef] make consequences of NaN rules for pow(i) more explicit (PR #170177)   Joshua Cranmer via llvm-commits
• [llvm] [LangRef] make consequences of NaN rules for pow(i) more explicit (PR #170177)   Joshua Cranmer via llvm-commits
• [llvm] [LangRef] make consequences of NaN rules for pow(i) more explicit (PR #170177)   Joshua Cranmer via llvm-commits
• [llvm] [LangRef] make consequences of NaN rules for pow(i) more explicit (PR #170177)   Joshua Cranmer via llvm-commits
• [llvm] [AArch64][GlobalISel] Added support for left shift neon intrinsics (PR #170827)   Joshua Rodriguez via llvm-commits
• [llvm] [AArch64][GlobalISel] Added support for neon shift intrinsics on single-element vector types (PR #170827)   Joshua Rodriguez via llvm-commits
• [llvm] [AArch64][GlobalISel] Added support for neon left shift intrinsics on single-element vector types (PR #170827)   Joshua Rodriguez via llvm-commits
• [llvm] [AArch64][GlobalISel] Added support for neon left shift intrinsics on single-element vector types (PR #170827)   Joshua Rodriguez via llvm-commits
• [llvm] [AArch64][GlobalISel] Added support for neon left shift intrinsics on single-element vector types (PR #170827)   Joshua Rodriguez via llvm-commits
• [llvm] [AMDGPU] Rematerialize VGPR candidates when SGPR spills results in VGPR Excess (PR #168079)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AMDGPU] Rematerialize VGPR candidates when SGPR spills results in VGPR Excess (PR #168079)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Promote scalar arguments to vector for `OpExtInst` in `generateExtInst` instead of `SPIRVRegularizer` (PR #170155)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [llvm] [NFC][LLVM] Use @llvm.compiler.used/@llvm.used helpers in Clang and BitcodeWriter (PR #162660)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Promote scalar arguments to vector for `OpExtInst` in `generateExtInst` instead of `SPIRVRegularizer` (PR #170155)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Promote scalar arguments to vector for `OpExtInst` in `generateExtInst` instead of `SPIRVRegularizer` (PR #170155)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AMDGCN][SDAG] Expand (INSERT|EXTRACT)_VECTOR_ELT for dynamic indices even with -O0 (PR #170323)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Error for zero-length arrays if not a shader (PR #169732)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Promote scalar arguments to vector for `OpExtInst` in `generateExtInst` instead of `SPIRVRegularizer` (PR #170155)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Promote scalar arguments to vector for `OpExtInst` in `generateExtInst` instead of `SPIRVRegularizer` (PR #170155)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Promote scalar arguments to vector for `OpExtInst` in `generateExtInst` instead of `SPIRVRegularizer` (PR #170155)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Promote scalar arguments to vector for `OpExtInst` in `generateExtInst` instead of `SPIRVRegularizer` (PR #170155)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Promote scalar arguments to vector for `OpExtInst` in `generateExtInst` instead of `SPIRVRegularizer` (PR #170155)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Promote scalar arguments to vector for `OpExtInst` in `generateExtInst` instead of `SPIRVRegularizer` (PR #170155)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Promote scalar arguments to vector for `OpExtInst` in `generateExtInst` instead of `SPIRVRegularizer` (PR #170155)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][AMDGPU] Refactor wave reduce test files. (PR #170440)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AMDGPU][SDAG] Add missing cases for SI_INDIRECT_SRC/DST (PR #170323)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [WIP][AMDGPU][MC] Support 128b rsrc reg in mimg instructions (PR #139121)   Jun Wang via llvm-commits
• [llvm] [WIP][AMDGPU][MC] Support 128b rsrc reg in mimg instructions (PR #139121)   Jun Wang via llvm-commits
• [llvm] [AMDGPU][MC] Adding symbolic name for the constant 1 over 2*pi (PR #160617)   Jun Wang via llvm-commits
• [llvm] [AMDGPU][MC] Adding symbolic name for the constant 1 over 2*pi (PR #160617)   Jun Wang via llvm-commits
• [llvm] [SPIRV] Add legalization for long vectors (PR #169665)   Justin Bogner via llvm-commits
• [llvm] [NFC] Add missing analysis to `DirectX/llc-pipeline` (PR #170714)   Justin Bogner via llvm-commits
• [llvm] [GOFF] Emit symbols for functions. (PR #144437)   Kai Nacke via llvm-commits
• [llvm] [GOFF] Emit symbols for functions. (PR #144437)   Kai Nacke via llvm-commits
• [llvm] [GOFF] Emit symbols for functions. (PR #144437)   Kai Nacke via llvm-commits
• [llvm] [GOFF] Emit symbols for functions. (PR #144437)   Kai Nacke via llvm-commits
• [llvm] [GOFF] Emit symbols for functions. (PR #144437)   Kai Nacke via llvm-commits
• [llvm] [GOFF] Emit symbols for functions. (PR #144437)   Kai Nacke via llvm-commits
• [llvm] [mlir] [OpenMP][flang] Support GPU team-reductions on allocatables (PR #169651)   Kareem Ergawy via llvm-commits
• [llvm] [mlir] [OpenMP][flang] Support GPU team-reductions on allocatables (PR #169651)   Kareem Ergawy via llvm-commits
• [flang] [llvm] [flang][OpenMP] Store list of expressions in InitializerT (PR #170923)   Kareem Ergawy via llvm-commits
• [flang] [llvm] [flang][OpenMP] Store list of expressions in InitializerT (PR #170923)   Kareem Ergawy via llvm-commits
• [flang] [llvm] [flang][OpenMP] Store list of expressions in InitializerT (PR #170923)   Kareem Ergawy via llvm-commits
• [clang] [llvm] [CodeGen][KCFI] Allow setting type hash from xxHash64 to FNV-1a (PR #167254)   Kees Cook via llvm-commits
• [clang] [llvm] [CodeGen][KCFI] Allow setting type hash from xxHash64 to FNV-1a (PR #167254)   Kees Cook via llvm-commits
• [clang] [llvm] [CodeGen][KCFI] Allow setting type hash from xxHash64 to FNV-1a (PR #167254)   Kees Cook via llvm-commits
• [clang] [llvm] [CodeGen][KCFI] Allow setting type hash from xxHash64 to FNV-1a (PR #167254)   Kees Cook via llvm-commits
• [llvm] [bazel] Move clang-fuzzer to separate package (PR #170167)   Keith Smiley via llvm-commits
• [llvm] [bazel] Add explicit dep on protobuf (PR #168928)   Keith Smiley via llvm-commits
• [llvm] [bazel] Add explicit dep on protobuf (PR #168928)   Keith Smiley via llvm-commits
• [llvm] [mlir] [PDLL] Collapse TypeDetail.h into Types.h (PR #170341)   Keith Smiley via llvm-commits
• [llvm] [mlir] [PDLL] Collapse TypeDetail.h into Types.h (PR #170341)   Keith Smiley via llvm-commits
• [clang] [lldb] [llvm] [cmake] Add support for statically linking libxml2 (PR #166867)   Keith Smiley via llvm-commits
• [clang] [lldb] [llvm] [cmake] Add support for statically linking libxml2 (PR #166867)   Keith Smiley via llvm-commits
• [clang] [lldb] [llvm] [cmake] Add support for statically linking libxml2 (PR #166867)   Keith Smiley via llvm-commits
• [clang] [lldb] [llvm] [cmake] Add support for statically linking libxml2 (PR #166867)   Keith Smiley via llvm-commits
• [clang] [lldb] [llvm] [cmake] Add support for statically linking libxml2 (PR #166867)   Keith Smiley via llvm-commits
• [clang] [lldb] [llvm] [cmake] Add support for statically linking libxml2 (PR #166867)   Keith Smiley via llvm-commits
• [llvm] [bazel][NFC] Avoid set for older bazel versions (PR #170758)   Keith Smiley via llvm-commits
• [llvm] [mlir] [PDLL] Collapse TypeDetail.h into Types.h (PR #170341)   Keith Smiley via llvm-commits
• [llvm] [mlir] [PDLL] Collapse TypeDetail.h into Types.h (PR #170341)   Keith Smiley via llvm-commits
• [llvm] [flang] Enable Driver/exec.f90 test (NFC) (PR #170544)   Kelvin Li via llvm-commits
• [llvm] [flang] Enable Driver/exec.f90 test (NFC) (PR #170544)   Kelvin Li via llvm-commits
• [llvm] [Flang-RT] Set LD_LIBRARY_PATH for unittests (PR #170840)   Kelvin Li via llvm-commits
• [clang] [llvm] New calling convention preserve_none (PR #76868)   Keno Fischer via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics for 9.6 crypto instructions (PR #165545)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics support for SVE2p2 instructions (PR #163575)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics for 9.6 crypto instructions (PR #165545)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics for 9.6 crypto instructions (PR #165545)   Kerry McLaughlin via llvm-commits
• [llvm] [AMDGPU] Limit promoting allocas that have users with dynamic index above a threshold on number of elements (PR #170327)   Kevin Choi via llvm-commits
• [llvm] [AMDGPU] Limit promoting allocas that have users with dynamic index above a threshold on number of elements (PR #170327)   Kevin Choi via llvm-commits
• [llvm] [AMDGPU] Limit promoting allocas that have users with dynamic index above a threshold on number of elements (PR #170327)   Kevin Choi via llvm-commits
• [llvm] [AMDGPU] Limit promoting allocas that have users with dynamic index above a threshold on number of elements (PR #170327)   Kevin Choi via llvm-commits
• [llvm] [AMDGPU] Limit promoting allocas that have users with dynamic index above a threshold on number of elements (PR #170327)   Kevin Choi via llvm-commits
• [llvm] [AMDGPU] Limit promoting allocas that have users with dynamic index above a threshold on number of elements (PR #170327)   Kevin Choi via llvm-commits
• [llvm] [AMDGPU] Limit promoting allocas that have users with dynamic index above a threshold on number of elements (PR #170327)   Kevin Choi via llvm-commits
• [llvm] [AMDGPU] Limit promoting allocas that have users with dynamic index above a threshold on number of elements (PR #170327)   Kevin Choi via llvm-commits
• [llvm] [AMDGPU] Limit promoting allocas that have users with dynamic index above a threshold on number of elements (PR #170327)   Kevin Choi via llvm-commits
• [llvm] [AMDGPU] Limit promoting allocas that have users with dynamic index above a threshold on number of elements (PR #170327)   Kevin Choi via llvm-commits
• [llvm] [AMDGPU] Limit promoting allocas that have users with dynamic index above a threshold on number of elements (PR #170327)   Kevin Choi via llvm-commits
• [llvm] [AMDGPU] Limit promoting allocas that have users with dynamic index above a threshold on number of elements (PR #170327)   Kevin Choi via llvm-commits
• [llvm] [AMDGPU] Limit promoting allocas that have users with dynamic index above a threshold on number of elements (PR #170327)   Kevin Choi via llvm-commits
• [llvm] [AMDGPU] Limit promoting allocas that have users with dynamic index above a threshold on number of elements (PR #170327)   Kevin Choi via llvm-commits
• [llvm] [AMDGPU] Limit promoting allocas that have users with dynamic index above a threshold on number of elements (PR #170327)   Kevin Choi via llvm-commits
• [llvm] VectorCombine: Fold chains of shuffles fed by length-changing shuffles (PR #168819)   Kevin Choi via llvm-commits
• [llvm] [RISCV]: Implemented softening of `FCANONICALIZE` (PR #169234)   Kevin Per via llvm-commits
• [llvm] [RISCV]: Implemented softening of `FCANONICALIZE` (PR #169234)   Kevin Per via llvm-commits
• [llvm] [InstCombine]: Replace overflow calculation with intrinsic (PR #168195)   Kevin Per via llvm-commits
• [llvm] [RISCV]: Implemented softening of `FCANONICALIZE` (PR #169234)   Kevin Per via llvm-commits
• [clang] [llvm] [openmp] [Clang][OpenMP] Switch to __kmpc_parallel_60 with strict parameter (PR #171082)   Kevin Sala Penades via llvm-commits
• [clang] [llvm] [openmp] [Clang][OpenMP] Switch to __kmpc_parallel_60 with strict parameter (PR #171082)   Kevin Sala Penades via llvm-commits
• [clang] [llvm] [mlir] [openmp] [Clang][OpenMP] Switch to __kmpc_parallel_60 with strict parameter (PR #171082)   Kevin Sala Penades via llvm-commits
• [llvm] Reapply "[MC] Use a variant to hold MCCFIInstruction state (NFC)" (PR #170342)   Kewen Meng via llvm-commits
• [llvm] Reapply "[MC] Use a variant to hold MCCFIInstruction state (NFC)" (PR #170342)   Kewen Meng via llvm-commits
• [clang] [compiler-rt] [clang][Darwin] Prefer the toolchain-provided libc++.dylib if there is one (PR #170303)   Kewen Meng via llvm-commits
• [clang] [compiler-rt] Revert "[clang][Darwin] Prefer the toolchain-provided libc++.dylib if there is one" (PR #170912)   Kewen Meng via llvm-commits
• [llvm] Add SubtargetFeature to disable lowering unpredicated loads/stores as… (PR #170256)   Kinoshita Kotaro via llvm-commits
• [llvm] Add parentheses around '&&' within '||' (PR #170652)   Konrad Kleine via llvm-commits
• [lld] [llvm] [DTLTO][ELF][COFF] Add archive support for DTLTO. (PR #157043)   Konstantin Belochapka via llvm-commits
• [lld] [llvm] [DTLTO][ELF][COFF] Add archive support for DTLTO. (PR #157043)   Konstantin Belochapka via llvm-commits
• [lld] [llvm] [DTLTO][ELF][COFF] Add archive support for DTLTO. (PR #157043)   Konstantin Belochapka via llvm-commits
• [lld] [llvm] [DTLTO][ELF][COFF] Add archive support for DTLTO. (PR #157043)   Konstantin Belochapka via llvm-commits
• [lld] [llvm] [DTLTO][ELF][COFF] Add archive support for DTLTO. (PR #157043)   Konstantin Belochapka via llvm-commits
• [lld] [llvm] [DTLTO][ELF][COFF] Add archive support for DTLTO. (PR #157043)   Konstantin Belochapka via llvm-commits
• [lld] [llvm] [DTLTO][ELF][COFF] Add archive support for DTLTO. (PR #157043)   Konstantin Belochapka via llvm-commits
• [llvm] [RISCV] Use vsetivli instead of `x0,x0` form to retain SEW/LMUL when AVL is imm (PR #169307)   Krste Asanovic via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Add MLIR Lowering Support for dist_schedule (PR #152736)   Krut Patel via llvm-commits
• [clang] [llvm] AMDGPU: Implement tensor load and store instructions for gfx1250 (PR #146636)   Krzysztof Drewniak via llvm-commits
• [clang] [llvm] AMDGPU: Implement tensor load and store instructions for gfx1250 (PR #146636)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Krzysztof Drewniak via llvm-commits
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• [llvm] [libcxx][Github] Bump Runners to Next Group (PR #168122)   Louis Dionne via llvm-commits
• [llvm] [libcxx][Github] Bump Runners to Next Group (PR #168122)   Louis Dionne via llvm-commits
• [llvm] [libcxx][Github] Bump Runners to Next Group (PR #168122)   Louis Dionne via llvm-commits
• [clang] [compiler-rt] [clang][Darwin] Prefer the toolchain-provided libc++.dylib if there is one (PR #170303)   Louis Dionne via llvm-commits
• [clang] [compiler-rt] [clang][Darwin] Prefer the toolchain-provided libc++.dylib if there is one (PR #170303)   Louis Dionne via llvm-commits
• [clang] [compiler-rt] [clang][Darwin] Prefer the toolchain-provided libc++.dylib if there is one (PR #170303)   Louis Dionne via llvm-commits
• [clang] [compiler-rt] [clang][Darwin] Prefer the toolchain-provided libc++.dylib if there is one (PR #170303)   Louis Dionne via llvm-commits
• [clang] [compiler-rt] [clang][Darwin] Prefer the toolchain-provided libc++.dylib if there is one (PR #170303)   Louis Dionne via llvm-commits
• [clang] [compiler-rt] Revert "[clang][Darwin] Prefer the toolchain-provided libc++.dylib if there is one" (PR #170912)   Louis Dionne via llvm-commits
• [clang] [compiler-rt] [clang][Darwin] Prefer the toolchain-provided libc++.dylib if there is one (PR #170303)   Louis Dionne via llvm-commits
• [clang] [compiler-rt] Revert "[clang][Darwin] Prefer the toolchain-provided libc++.dylib if there is one" (PR #170912)   Louis Dionne via llvm-commits
• [clang] [compiler-rt] Revert "[clang][Darwin] Prefer the toolchain-provided libc++.dylib if there is one" (PR #170912)   Louis Dionne via llvm-commits
• [clang] [compiler-rt] Revert "[clang][Darwin] Prefer the toolchain-provided libc++.dylib if there is one" (PR #170912)   Louis Dionne via llvm-commits
• [clang] [compiler-rt] Revert "[clang][Darwin] Prefer the toolchain-provided libc++.dylib if there is one" (PR #170912)   Louis Dionne via llvm-commits
• [clang] [compiler-rt] [clang] Temporarily disable Darwin test for linking against libc++ on non-darwin systems (PR #170912)   Louis Dionne via llvm-commits
• [clang] [compiler-rt] [clang] Temporarily disable Darwin test for linking against libc++ on non-darwin systems (PR #170912)   Louis Dionne via llvm-commits
• [compiler-rt] a55221d - [clang] Revert changes to prefer the toolchain-provided libc++.dylib   Louis Dionne via llvm-commits
• [clang] [compiler-rt] [clang] Temporarily disable Darwin test for linking against libc++ on non-darwin systems (PR #170912)   Louis Dionne via llvm-commits
• [clang] [compiler-rt] [clang][Darwin] Prefer the toolchain-provided libc++.dylib if there is one (PR #170303)   Louis Dionne via llvm-commits
• [clang] [compiler-rt] [clang][Darwin] Prefer the toolchain-provided libc++.dylib if there is one (PR #170930)   Louis Dionne via llvm-commits
• [llvm] [LoongArch] Enable tail calls for sret and byval functions (PR #168506)   Lu Weining via llvm-commits
• [clang] [llvm] [llvm][Triple] Add libc-less variants of some environments (PR #168042)   Lu Weining via llvm-commits
• [llvm] [AMDGPU][Scheduler] Scoring system for rematerialization candidates (PR #153092)   Lucas Ramirez via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   Lucas Ste via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   Lucas Ste via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   Lucas Ste via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   Lucas Ste via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   Lucas Ste via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   Lucas Ste via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   Lucas Ste via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   Lucas Ste via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   Lucas Ste via llvm-commits
• [llvm] [JumpThread] Fix `JumpThreading` pass to skip merging when both blocks contain convergence loop/entry intrinsics. (PR #170247)   Lucie Choi via llvm-commits
• [llvm] [JumpThread] Fix `JumpThreading` pass to skip merging when both blocks contain convergence loop/entry intrinsics. (PR #170247)   Lucie Choi via llvm-commits
• [llvm] [JumpThread] Fix `JumpThreading` pass to skip merging when both blocks contain convergence loop/entry intrinsics. (PR #170247)   Lucie Choi via llvm-commits
• [llvm] [JumpThread] Fix `JumpThreading` pass to skip merging when both blocks contain convergence loop/entry intrinsics. (PR #170247)   Lucie Choi via llvm-commits
• [llvm] [JumpThread] Fix `JumpThreading` pass to skip merging when both blocks contain convergence loop/entry intrinsics. (PR #170247)   Lucie Choi via llvm-commits
• [llvm] [SCCP] Handle llvm.experimental.get.vector.length calls (PR #169527)   Luke Lau via llvm-commits
• [llvm] [SCCP] Handle llvm.experimental.get.vector.length calls (PR #169527)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Add SelectionDAG::getTypeSize. NFC (PR #169764)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Add SelectionDAG::getTypeSize. NFC (PR #169764)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Add SelectionDAG::getTypeSize. NFC (PR #169764)   Luke Lau via llvm-commits
• [llvm] [SCCP] Handle llvm.experimental.get.vector.length calls (PR #169527)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Add SelectionDAG::getTypeSize. NFC (PR #169764)   Luke Lau via llvm-commits
• [llvm] [VPlan] Extract reverse operation for reverse accesses (PR #146525)   Luke Lau via llvm-commits
• [llvm] [ConstantRange] Allow casting to the same bitwidth. NFC (PR #170102)   Luke Lau via llvm-commits
• [llvm] [VPlan] Use BlockFrequencyInfo in getPredBlockCostDivisor (PR #158690)   Luke Lau via llvm-commits
• [llvm] [VPlan] Use BlockFrequencyInfo in getPredBlockCostDivisor (PR #158690)   Luke Lau via llvm-commits
• [llvm] [VPlan] Use BlockFrequencyInfo in getPredBlockCostDivisor (PR #158690)   Luke Lau via llvm-commits
• [llvm] [VPlan] Use BlockFrequencyInfo in getPredBlockCostDivisor (PR #158690)   Luke Lau via llvm-commits
• [llvm] [VPlan] Use BlockFrequencyInfo in getPredBlockCostDivisor (PR #158690)   Luke Lau via llvm-commits
• [llvm] [ConstantRange] Allow casting to the same bitwidth. NFC (PR #170102)   Luke Lau via llvm-commits
• [llvm] [Draft] Support save/restore point splitting in shrink-wrap (PR #119359)   Luke Lau via llvm-commits
• [llvm] [Draft] Support save/restore point splitting in shrink-wrap (PR #119359)   Luke Lau via llvm-commits
• [llvm] [VPlan] Extract reverse operation for reverse accesses (PR #146525)   Luke Lau via llvm-commits
• [llvm] [WebAssembly] Optimize away mask of 63 for sra and srl( zext (and i32 63))) (PR #170128)   Luke Lau via llvm-commits
• [llvm] [WebAssembly] Optimize away mask of 63 for sra and srl( zext (and i32 63))) (PR #170128)   Luke Lau via llvm-commits
• [llvm] [WebAssembly] Optimize away mask of 63 for sra and srl( zext (and i32 63))) (PR #170128)   Luke Lau via llvm-commits
• [llvm] [VPlan] Use wide IV if scalar lanes > 0 are used with scalable vectors. (PR #169796)   Luke Lau via llvm-commits
• [llvm] [VPlan] Use wide IV if scalar lanes > 0 are used with scalable vectors. (PR #169796)   Luke Lau via llvm-commits
• [llvm] [VPlan] Use wide IV if scalar lanes > 0 are used with scalable vectors. (PR #169796)   Luke Lau via llvm-commits
• [llvm] [LV][NFC] Remove unnecessary multiply in expandVPWidenIntOrFpInduction (PR #170159)   Luke Lau via llvm-commits
• [llvm] [VPlan] Extract reverse operation for reverse accesses (PR #146525)   Luke Lau via llvm-commits
• [llvm] [VPlan] Use predicate in VPInstruction::computeCost for selects. (PR #170278)   Luke Lau via llvm-commits
• [llvm] [ValueTracking] Support scalable vector splats in computeKnownFPClass (PR #170325)   Luke Lau via llvm-commits
• [llvm] [RISCV] Clear kill flags for FalseReg in foldVMergeToMask (PR #170438)   Luke Lau via llvm-commits
• [llvm] [RISCV] Clear kill flags for FalseReg in foldVMergeToMask (PR #170438)   Luke Lau via llvm-commits
• [llvm] [RISCV] Clear kill flags for FalseReg in foldVMergeToMask (PR #170438)   Luke Lau via llvm-commits
• [llvm] [RISCV] Clear kill flags for FalseReg in foldVMergeToMask (PR #170438)   Luke Lau via llvm-commits
• [llvm] [RISCV] Clear kill flags for FalseReg in foldVMergeToMask (PR #170438)   Luke Lau via llvm-commits
• [llvm] [TTI] Use MemIntrinsicCostAttributes for getStridedOpCost (PR #170436)   Luke Lau via llvm-commits
• [llvm] [TTI] Use MemIntrinsicCostAttributes for getStridedOpCost (PR #170436)   Luke Lau via llvm-commits
• [llvm] [TTI] Use MemIntrinsicCostAttributes for getStridedOpCost (PR #170436)   Luke Lau via llvm-commits
• [llvm] [Hexagon][NFC] Drop no-op getMaskedMemoryOpCost/getGatherScatterOpCost stubs (PR #170426)   Luke Lau via llvm-commits
• [llvm] [TTI] Remove masked/gather-scatter/strided/expand-compress costing from TTIImpl (PR #169885)   Luke Lau via llvm-commits
• [llvm] [RISCV] Commute Src in foldVMV_V_V (PR #170536)   Luke Lau via llvm-commits
• [llvm] [RISCV] Combine vmerge_vl allones -> vmv_v_v, vmv_v_v splat(x) -> vmv_v_x (PR #170539)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove last use of experimental.vp.splat in RISCVCodeGenPrepare. NFCI (PR #170543)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove last use of experimental.vp.splat in RISCVCodeGenPrepare. NFCI (PR #170543)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove last use of @llvm.experimental.vp.splat in RISCVCodeGenPrepare. NFCI (PR #170543)   Luke Lau via llvm-commits
• [llvm] [VPlan] Fix opcode in LoadStore EVL recipe (PR #170594)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove last use of @llvm.experimental.vp.splat in RISCVCodeGenPrepare. NFCI (PR #170543)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove last use of @llvm.experimental.vp.splat in RISCVCodeGenPrepare. NFCI (PR #170543)   Luke Lau via llvm-commits
• [llvm] [VPlan] Use BlockFrequencyInfo in getPredBlockCostDivisor (PR #158690)   Luke Lau via llvm-commits
• [llvm] [RISCV] Commute Src in foldVMV_V_V (PR #170536)   Luke Lau via llvm-commits
• [llvm] [RISCV] Combine vmerge_vl allones -> vmv_v_v, vmv_v_v splat(x) -> vmv_v_x (PR #170539)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove last use of @llvm.experimental.vp.splat in RISCVCodeGenPrepare. NFCI (PR #170543)   Luke Lau via llvm-commits
• [llvm] [RISCV][llvm] Support VFADD, VFSUB, VFMUL codegen for Zvfbfa (PR #170612)   Luke Lau via llvm-commits
• [llvm] [RISCV][llvm] Support VFADD, VFSUB, VFMUL codegen for Zvfbfa (PR #170612)   Luke Lau via llvm-commits
• [llvm] [RISCV][llvm] Support VFADD, VFSUB, VFMUL codegen for Zvfbfa (PR #170612)   Luke Lau via llvm-commits
• [llvm] [VPlan] Remove VPWidenRecipe constructor with no underlying instruction. NFCI (PR #166521)   Luke Lau via llvm-commits
• [llvm] [VPlan] Remove VPWidenRecipe constructor with no underlying instruction. NFCI (PR #166521)   Luke Lau via llvm-commits
• [llvm] [IR] Split vector.splice into vector.splice.down and vector.splice.up (PR #170796)   Luke Lau via llvm-commits
• [llvm] [IR] Fix vector.splice verifier scaling by vscale for fixed length vectors (PR #170807)   Luke Lau via llvm-commits
• [llvm] [IR] Fix vector.splice verifier scaling by vscale for fixed length vectors (PR #170807)   Luke Lau via llvm-commits
• [llvm] [IR] Fix vector.splice verifier scaling by vscale for fixed length vectors (PR #170807)   Luke Lau via llvm-commits
• [llvm] [IR] Split vector.splice into vector.splice.down and vector.splice.up (PR #170796)   Luke Lau via llvm-commits
• [llvm] [IR] Split vector.splice into vector.splice.down and vector.splice.up (PR #170796)   Luke Lau via llvm-commits
• [llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)   Luke Lau via llvm-commits
• [llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)   Luke Lau via llvm-commits
• [llvm] [IR] Split vector.splice into vector.splice.down and vector.splice.up (PR #170796)   Luke Lau via llvm-commits
• [llvm] [IR] Split vector.splice into vector.splice.down and vector.splice.up (PR #170796)   Luke Lau via llvm-commits
• [llvm] [IR] Split vector.splice into vector.splice.down and vector.splice.up (PR #170796)   Luke Lau via llvm-commits
• [llvm] [RISCV][TTI] Add cost model for ROTL/ROTR (PR #170824)   Luke Lau via llvm-commits
• [llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove last use of @llvm.experimental.vp.splat in RISCVCodeGenPrepare. NFCI (PR #170543)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove last use of @llvm.experimental.vp.splat in RISCVCodeGenPrepare. NFCI (PR #170543)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove last use of @llvm.experimental.vp.splat in RISCVCodeGenPrepare. NFCI (PR #170543)   Luke Lau via llvm-commits
• [llvm] [NFC][RISCV] Make vfadd attribute list follow other tests (PR #170864)   Luke Lau via llvm-commits
• [llvm] [RISCV] Use GPRNoX0 instead of AVL for Xsfmm pseudos. NFC (PR #170726)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove last use of @llvm.experimental.vp.splat in RISCVCodeGenPrepare. NFCI (PR #170543)   Luke Lau via llvm-commits
• [llvm] [IR][RISCV] Remove @llvm.experimental.vp.splat (PR #171084)   Luke Lau via llvm-commits
• [llvm] [IR][RISCV] Remove @llvm.experimental.vp.splat (PR #171084)   Luke Lau via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Madhur Amilkanthwar via llvm-commits
• [llvm] [mlir] [MLIR][Python] reland (narrower) type stub generation (PR #157930)   Maksim Levental via llvm-commits
• [llvm] [mlir] [MLIR][Python] reland (narrower) type stub generation (PR #157930)   Maksim Levental via llvm-commits
• [llvm] [mlir] [MLIR][Python] reland (narrower) type stub generation (PR #157930)   Maksim Levental via llvm-commits
• [llvm] [mlir] [MLIR][Python] reland (narrower) type stub generation (PR #157930)   Maksim Levental via llvm-commits
• [llvm] [BOLT] Allow missing DT_FINI{,_ARRAY} if instrumentation-sleep-time is used (PR #170086)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT][BTI] Disassemble PLT entries when processing BTI binaries (PR #169663)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT][BTI] Disassemble PLT entries when processing BTI binaries (PR #169663)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT][AArch64] Enable safe ICF (PR #170172)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT][BTI] Disassemble PLT entries when processing BTI binaries (PR #169663)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Fix comments for interprocedural branches. NFC (PR #170745)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Minor code refactoring. NFC (PR #170746)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Minor code refactoring. NFC (PR #170746)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT][AArch64] Tweak heuristics for epilogue recognition (PR #169584)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Fix comments for interprocedural branches. NFC (PR #170745)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Properly validate relocations against internals of a function (PR #167451)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Properly validate relocations against internals of a function (PR #167451)   Maksim Panchenko via llvm-commits
• [llvm] [SPIRV] Fix assertion violation caused by unexpected ConstantExpr. (PR #170524)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV] Fix assertion violation caused by unexpected ConstantExpr. (PR #170524)   Manuel Carrasco via llvm-commits
• [clang] [llvm] [Clang][CodeGen] Remove explicit insertion of AllocToken pass (PR #169360)   Marco Elver via llvm-commits
• [clang] [llvm] Make OpenCL an OSType rather than an EnvironmentType. (PR #170297)   Marcos Maronas via llvm-commits
• [clang] [llvm] Make OpenCL an OSType rather than an EnvironmentType. (PR #170297)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV] Error for zero-length arrays if not a shader (PR #169732)   Marcos Maronas via llvm-commits
• [llvm] [RISCV][docs] Update url for SpacemiT xsmtvdot (PR #170598)   Mark Zhuang via llvm-commits
• [llvm] [RISCV][docs] Update url for SpacemiT xsmtvdot (PR #170598)   Mark Zhuang via llvm-commits
• [llvm] 3e5b86c - [AArch64] [test] Write the seh.s test output object to a file   Martin Storsjö via llvm-commits
• [llvm] e50ac8a - [AArch64] [test] Move tests for custom unwind opcodes to a separate function   Martin Storsjö via llvm-commits
• [llvm] 9e27fef - [AArch64] [test] Fix stack allocation instructions in the seh.s test   Martin Storsjö via llvm-commits
• [llvm] 4a619a7 - [AArch64] [test] Spell out the matching instructions for SVE unwind opcodes   Martin Storsjö via llvm-commits
• [llvm] 4580350 - [AArch64] [test] Make unwind info tests actually use the right instructions   Martin Storsjö via llvm-commits
• [llvm] [llvm-readobj] [ARMWinEH] Fix printing of packed unwind with H=1, RegI=RegF=0, CR!=1 (PR #170294)   Martin Storsjö via llvm-commits
• [llvm] [llvm-readobj] [ARMWinEH] Fix printing of packed unwind with H=1, RegI=RegF=0, CR!=1 (PR #170294)   Martin Storsjö via llvm-commits
• [clang] [llvm] [PowerPC] Add initial support for AMO load builtins (PR #168746)   Maryam Moghadas via llvm-commits
• [clang] [llvm] [PowerPC] Add initial support for AMO load builtins (PR #168746)   Maryam Moghadas via llvm-commits
• [clang] [llvm] [PowerPC] Add initial support for AMO load builtins (PR #168746)   Maryam Moghadas via llvm-commits
• [clang] [llvm] [PowerPC] Add AMO load signed builtins (PR #168747)   Maryam Moghadas via llvm-commits
• [clang] [llvm] [PowerPC] Add AMO load signed builtins (PR #168747)   Maryam Moghadas via llvm-commits
• [clang] [llvm] [PowerPC] Add initial support for AMO load builtins (PR #168746)   Maryam Moghadas via llvm-commits
• [clang] [llvm] [PowerPC] Add initial support for AMO load builtins (PR #168746)   Maryam Moghadas via llvm-commits
• [llvm] GlobalISel: Stop using TPC to check if GlobalISelAbort is enabled (PR #169917)   Matt Arsenault via llvm-commits
• [llvm] GlobalISel: Stop using TPC to check if GlobalISelAbort is enabled (PR #169917)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NPM] Preserve analyses in AMDGPURewriteAGPRCopyMFMA for NPM (PR #170130)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][DAGCombiner][GlobalISel] Prevent FMA contraction when multiply cannot be eliminated (PR #169735)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][DAGCombiner][GlobalISel] Prevent FMA contraction when multiply cannot be eliminated (PR #169735)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][DAGCombiner][GlobalISel] Prevent FMA contraction when multiply cannot be eliminated (PR #169735)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][DAGCombiner][GlobalISel] Prevent FMA contraction when multiply cannot be eliminated (PR #169735)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][DAGCombiner][GlobalISel] Prevent FMA contraction when multiply cannot be eliminated (PR #169735)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][DAGCombiner][GlobalISel] Prevent FMA contraction when multiply cannot be eliminated (PR #169735)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][DAGCombiner][GlobalISel] Prevent FMA contraction when multiply cannot be eliminated (PR #169735)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][DAGCombiner][GlobalISel] Prevent FMA contraction when multiply cannot be eliminated (PR #169735)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][DAGCombiner][GlobalISel] Prevent FMA contraction when multiply cannot be eliminated (PR #169735)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][DAGCombiner][GlobalISel] Prevent FMA contraction when multiply cannot be eliminated (PR #169735)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][DAGCombiner][GlobalISel] Prevent FMA contraction when multiply cannot be eliminated (PR #169735)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GISel] Add legalizer support for @llvm.umul.with.overflow.i128 (PR #170101)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix AGPR_32 reg assign for mfma scale ops (PR #168964)   Matt Arsenault via llvm-commits
• [llvm] expandFMINIMUM_FMAXIMUM: FMAXNUM/FMINNUM treat +0>-0 (PR #137367)   Matt Arsenault via llvm-commits
• [llvm] expandFMINIMUM_FMAXIMUM: FMAXNUM/FMINNUM treat +0>-0 (PR #137367)   Matt Arsenault via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   Matt Arsenault via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix treating unknown mem operands as uniform (PR #170309)   Matt Arsenault via llvm-commits
• [llvm] [LangRef] make consequences of NaN rules for pow(i) more explicit (PR #170177)   Matt Arsenault via llvm-commits
• [llvm] [AMDGCN][SDAG] Expand (INSERT|EXTRACT)_VECTOR_ELT for dynamic indices even with -O0 (PR #170323)   Matt Arsenault via llvm-commits
• [llvm] [mips][micromips] Add mayRaiseFPException to appropriate instructions, mark all instructions that read FCSR (FCR31) rounding bits as doing so (PR #170322)   Matt Arsenault via llvm-commits
• [clang] [llvm] CodeGen: Add LibcallLoweringInfo analysis pass (PR #168622)   Matt Arsenault via llvm-commits
• [clang] [llvm] CodeGen: Add LibcallLoweringInfo analysis pass (PR #168622)   Matt Arsenault via llvm-commits
• [llvm] [ValueTracking] Support scalable vector splats in computeKnownFPClass (PR #170325)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: share LDS budget logic and add experimental LDS buffering pass (PR #166388)   Matt Arsenault via llvm-commits
• [llvm] [LowerMemIntrinsics] Factor control flow generation out of the memcpy lowering (PR #169039)   Matt Arsenault via llvm-commits
• [llvm] [LowerMemIntrinsics] Factor control flow generation out of the memcpy lowering (PR #169039)   Matt Arsenault via llvm-commits
• [llvm] [LowerMemIntrinsics] Factor control flow generation out of the memcpy lowering (PR #169039)   Matt Arsenault via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Make rotr illegal (PR #166558)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Make rotr illegal (PR #166558)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix AGPR_32 reg assign for mfma scale ops (PR #168964)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix AGPR_32 reg assign for mfma scale ops (PR #168964)   Matt Arsenault via llvm-commits
• [clang] [llvm] Make OpenCL an OSType rather than an EnvironmentType. (PR #170297)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Disable illegal extract_subvector splitting for scalable vectors (PR #170315)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix AGPR_32 reg assign for mfma scale ops (PR #168964)   Matt Arsenault via llvm-commits
• [llvm] [ValueTracking] Support scalable vector splats in computeKnownFPClass (PR #170325)   Matt Arsenault via llvm-commits
• [clang] [llvm] CodeGen: Add LibcallLoweringInfo analysis pass (PR #168622)   Matt Arsenault via llvm-commits
• [clang] [llvm] [ARM] Introduce intrinsics for MVE minnm/maxnm under strict-fp. (PR #169795)   Matt Arsenault via llvm-commits
• [llvm] LTO: Remove unused TargetLibraryInfo include (PR #170340)   Matt Arsenault via llvm-commits
• [llvm] LTO: Remove unused TargetLibraryInfo include (PR #170340)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Report RegBankLegalize errors using reportGISelFailure (PR #169918)   Matt Arsenault via llvm-commits
• [llvm] [NFC] Refactor TargetLowering::getTgtMemIntrinsic to take CallBase parameter (PR #170334)   Matt Arsenault via llvm-commits
• [llvm] LTO: Remove unused TargetLibraryInfo include (PR #170340)   Matt Arsenault via llvm-commits
• [llvm] LTO: Remove unused TargetLibraryInfo include (PR #170340)   Matt Arsenault via llvm-commits
• [llvm] LTO: Remove unused TargetLibraryInfo include (PR #170340)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Salvage debuginfo when combining load and sext instrs. (PR #169779)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Salvage debuginfo when combining load and sext instrs. (PR #169779)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix AGPR_32 reg assign for mfma scale ops (PR #168964)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Generate UMULH/SMULH with wider vector types (PR #170283)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Prevent folding of flat_scr_base_hi into a 64-bit SALU (PR #170373)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Prevent folding of flat_scr_base_hi into a 64-bit SALU (PR #170373)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scaffolding for ML focused scheduling strategy (PR #169616)   Matt Arsenault via llvm-commits
• [llvm] [LangRef] make consequences of NaN rules for pow(i) more explicit (PR #170177)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Prevent folding of flat_scr_base_hi into a 64-bit SALU (PR #170373)   Matt Arsenault via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   Matt Arsenault via llvm-commits
• [clang] [llvm] [SPIRV] Use AMDGPU ABI for AMDGCN flavoured SPIRV (PR #169865)   Matt Arsenault via llvm-commits
• [clang] [llvm] [SPIRV] Use AMDGPU ABI for AMDGCN flavoured SPIRV (PR #169865)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitCnts] Use RegUnits-based tracking (PR #162077)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitCnts] Use RegUnits-based tracking (PR #162077)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitCnts] Use RegUnits-based tracking (PR #162077)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] misched: avoid subregister dependencies (PR #140255)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] misched: avoid subregister dependencies (PR #140255)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] misched: avoid subregister dependencies (PR #140255)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] misched: avoid subregister dependencies (PR #140255)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] misched: avoid subregister dependencies (PR #140255)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] misched: avoid subregister dependencies (PR #140255)   Matt Arsenault via llvm-commits
• [llvm] DAG: Use LibcallImpl in various getLibFunc helpers (PR #170400)   Matt Arsenault via llvm-commits
• [llvm] DAG: Use LibcallImpl in various getLibFunc helpers (PR #170400)   Matt Arsenault via llvm-commits
• [llvm] DAG: Use LibcallImpl in various getLibFunc helpers (PR #170400)   Matt Arsenault via llvm-commits
• [llvm] DAG: Use LibcallImpl in various getLibFunc helpers (PR #170400)   Matt Arsenault via llvm-commits
• [llvm] DAG: Use LibcallImpl in various getLibFunc helpers (PR #170400)   Matt Arsenault via llvm-commits
• [llvm] DAG: Avoid more uses of getLibcallName (PR #170402)   Matt Arsenault via llvm-commits
• [llvm] DAG: Avoid more uses of getLibcallName (PR #170402)   Matt Arsenault via llvm-commits
• [llvm] DAG: Avoid using getLibcallName when looking for a divrem call (PR #170413)   Matt Arsenault via llvm-commits
• [llvm] DAG: Avoid using getLibcallName when looking for a divrem call (PR #170413)   Matt Arsenault via llvm-commits
• [llvm] DAG: Set MachinePointerInfo for stack when expanding divrem libcall (PR #170537)   Matt Arsenault via llvm-commits
• [llvm] DAG: Set MachinePointerInfo for stack when expanding divrem libcall (PR #170537)   Matt Arsenault via llvm-commits
• [llvm] DAG: Set MachinePointerInfo for stack when expanding divrem libcall (PR #170537)   Matt Arsenault via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Improve compare between zeros (PR #140193)   Matt Arsenault via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Improve compare between zeros (PR #140193)   Matt Arsenault via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Improve compare between zeros (PR #140193)   Matt Arsenault via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Improve compare between zeros (PR #140193)   Matt Arsenault via llvm-commits
• [clang] [llvm] CodeGen: Add LibcallLoweringInfo analysis pass (PR #168622)   Matt Arsenault via llvm-commits
• [clang] [llvm] GlobalISel: Use LibcallLoweringInfo analysis in legalizer (PR #170328)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/PromoteAlloca: Extract getVectorTypeForAlloca helper (PR #170509)   Matt Arsenault via llvm-commits
• [llvm] DAG: Use poison for filler values on legalize error paths (PR #170556)   Matt Arsenault via llvm-commits
• [llvm] DAG: Use poison for filler values on legalize error paths (PR #170556)   Matt Arsenault via llvm-commits
• [llvm] DAG: Use poison for filler values on legalize error paths (PR #170556)   Matt Arsenault via llvm-commits
• [llvm] DAG: Use poison for filler values on legalize error paths (PR #170556)   Matt Arsenault via llvm-commits
• [llvm] DAG: Use poison for filler values on legalize error paths (PR #170556)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] improve `musttail` support (PR #170547)   Matt Arsenault via llvm-commits
• [llvm] DAG: Use more RTLIB helper functions for getting libcall from type (PR #170563)   Matt Arsenault via llvm-commits
• [llvm] DAG: Use more RTLIB helper functions for getting libcall from type (PR #170563)   Matt Arsenault via llvm-commits
• [llvm] DAG: Use more RTLIB helper functions for getting libcall from type (PR #170563)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Allow negative offsets in scratch instructions (PR #166979)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Allow negative offsets in scratch instructions (PR #166979)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Allow negative offsets in scratch instructions (PR #166979)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Allow negative offsets in scratch instructions (PR #166979)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Allow negative offsets in scratch instructions (PR #166979)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Allow negative offsets in scratch instructions (PR #166979)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Add MachineRegisterClassInfo analysis pass (PR #164877)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix broken exp10 lowering for f16 (PR #170582)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix broken exp10 lowering for f16 (PR #170582)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix broken exp10 lowering for f16 (PR #170582)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix broken exp10 lowering for f16 (PR #170582)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Fix the assertion failure on `RegisterVT == PartVT && "Part… (PR #170632)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Fix the assertion failure on `RegisterVT == PartVT && "Part… (PR #170632)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve VGPR lowering test around FMA[AK|MK]. NFC (PR #170633)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] improve `musttail` support (PR #170547)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombiner] Handle type-promoted constants in UDIV exact lowering (PR #169949)   Matt Arsenault via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   Matt Arsenault via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   Matt Arsenault via llvm-commits
• [llvm] DAG: Use more RTLIB helper functions for getting libcall from type (PR #170563)   Matt Arsenault via llvm-commits
• [llvm] DAG: Avoid using getLibcallName for function support test (PR #170583)   Matt Arsenault via llvm-commits
• [llvm] DAG: Avoid using getLibcallName for function support test (PR #170583)   Matt Arsenault via llvm-commits
• [llvm] DAG: Add overload of makeLibCall which calls an RTLIB::LibcallImpl (PR #170584)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Create a dummy call sequence when emitting call error (PR #170656)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Create a dummy call sequence when emitting call error (PR #170656)   Matt Arsenault via llvm-commits
• [llvm] [NFC] Reduce fragility of swdev503538-move-to-valu… test (PR #170702)   Matt Arsenault via llvm-commits
• [llvm] [IndVarSimplify] Remove sinkunusedInvariants (PR #169250)   Matt Arsenault via llvm-commits
• [llvm] [IndVarSimplify] Remove sinkunusedInvariants (PR #169250)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] llvm-reduce: Add pass to sink defs to uses (PR #170317)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Consider imm offsets when sorting framerefs (PR #166979)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Consider imm offsets when sorting framerefs (PR #166979)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Consider imm offsets when sorting framerefs (PR #166979)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAGBuilder] Remove the added base offset in LowerFormalArguments(). (PR #170732)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel](NFC) Refactor construction of LLTs in `LegalizerHelper` (PR #170664)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Update log lowering to remove contract for AMDGCN backend (PR #168916)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Update log lowering to remove contract for AMDGCN backend (PR #168916)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix broken exp10 lowering for f16 (PR #170582)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix broken exp10 lowering for f16 (PR #170582)   Matt Arsenault via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Make LoadExtActions address-space aware (PR #162407)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Fold mul 0 -> 0 when expanding mul into parts. (PR #168780)   Matt Arsenault via llvm-commits
• [llvm] [RFC][SPIR-V] Add intrinsics to convert to/from ap.float (PR #164252)   Matt Arsenault via llvm-commits
• [llvm] expandFMINIMUM_FMAXIMUM: FMAXNUM/FMINNUM treat +0>-0 (PR #137367)   Matt Arsenault via llvm-commits
• [llvm] expandFMINIMUM_FMAXIMUM: FMAXNUM/FMINNUM treat +0>-0 (PR #137367)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Fix the assertion failure on `RegisterVT == PartVT && "Part… (PR #170632)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Wait on all LDS DMA operations when no aliasing store is found (PR #170660)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] CodeGenInstAlias: reduce calls to isSubClassOf. NFCI (PR #170767)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Improve exp10 lowering for f16 (PR #170771)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Improve exp10 lowering for f16 (PR #170771)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Improve exp10 lowering for f16 (PR #170771)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix broken exp10 lowering for f16 (PR #170582)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix broken exp10 lowering for f16 (PR #170708)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix broken exp10 lowering for f16 (PR #170708)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add verifier for flat_scr_base_hi read hazard (PR #170550)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][UnifyLoopExits] Fix duplicate successor handling (PR #170759)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Report a better error when an InstAlias does not use a RegClass (PR #168444)   Matt Arsenault via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Improve exp10 lowering for f16 (PR #170771)   Matt Arsenault via llvm-commits
• [llvm] PowerPC: Add vec_malloc functions to AIX in RuntimeLibcalls (PR #167089)   Matt Arsenault via llvm-commits
• [llvm] DAG: Add overload of getExternalSymbol using RTLIB::LibcallImpl (PR #170587)   Matt Arsenault via llvm-commits
• [llvm] DAG: Add overload of getExternalSymbol using RTLIB::LibcallImpl (PR #170587)   Matt Arsenault via llvm-commits
• [llvm] [SimplifyLibCalls] Recognize and simplify f[min/max]imumnum (PR #170699)   Matt Arsenault via llvm-commits
• [llvm] DAG: Add overload of getExternalSymbol using RTLIB::LibcallImpl (PR #170587)   Matt Arsenault via llvm-commits
• [llvm] DAG: Use RuntimeLibcalls to legalize vector frem calls (PR #170719)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Eliminate InstCombineTables.td. NFC. (PR #170857)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Handle roundeven libcall in visitCall (PR #170690)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Avoid crashing on statepoint-like pseudoinstructions (PR #170657)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NPM] Port AMDGPUArgumentUsageInfo to NPM (PR #170886)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NPM] Port AMDGPUArgumentUsageInfo to NPM (PR #170886)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NPM] Port AMDGPUArgumentUsageInfo to NPM (PR #170886)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NPM] Port AMDGPUArgumentUsageInfo to NPM (PR #170886)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NPM] Port AMDGPUArgumentUsageInfo to NPM (PR #170886)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Gracefully error out in ParseTreePattern when DAG has zero operands so that llvm-tblgen doesn't crash (PR #161417)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Precommit test for PR #164946 - Update Tests SimplifyDemandedBits - ICMP_SLT(X,0) - only sign mask of X is required (PR #171030)   Matt Arsenault via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - ICMP_SLT(X, 0) - only sign mask of X is required (PR #164946)   Matt Arsenault via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - ICMP_SLT(X, 0) - only sign mask of X is required (PR #164946)   Matt Arsenault via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - ICMP_SLT(X, 0) - only sign mask of X is required (PR #164946)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Precommit test for PR #164946 - Update Tests SimplifyDemandedBits - ICMP_SLT(X,0) - only sign mask of X is required (PR #171030)   Matt Arsenault via llvm-commits
• [llvm] Precommit test for PR #171012 (PR #171013)   Matt Arsenault via llvm-commits
• [llvm] Precommit test for PR #171012 (PR #171013)   Matt Arsenault via llvm-commits
• [llvm] Precommit test for PR #171012 (PR #171013)   Matt Arsenault via llvm-commits
• [llvm] Precommit test for PR #171012 (PR #171013)   Matt Arsenault via llvm-commits
• [llvm] Precommit test for PR #171012 (PR #171013)   Matt Arsenault via llvm-commits
• [llvm] Precommit test for PR #171012 (PR #171013)   Matt Arsenault via llvm-commits
• [llvm] [WIP][SPARC][IAS] Implement Solaris Natural Instruction extension (PR #170794)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add argument range annotations to intrinsics where applicable (PR #170958)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add argument range annotations to intrinsics where applicable (PR #170958)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Lowering usub.sat(a, 1) to a - (a != 0) (PR #170076)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Lowering usub.sat(a, 1) to a - (a != 0) (PR #170076)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Consider imm offsets when sorting framerefs (PR #171012)   Matt Arsenault via llvm-commits
• [llvm] VectorCombine: Fold chains of shuffles fed by length-changing shuffles (PR #168819)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Handle roundeven libcall in visitCall (PR #170690)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix broken exp10 lowering for f16 (PR #170708)   Matt Arsenault via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   Matt Arsenault via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix a crash when a bool variable is used in inline asm (PR #171004)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix a crash when a bool variable is used in inline asm (PR #171004)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix a crash when a bool variable is used in inline asm (PR #171004)   Matt Arsenault via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   Matt Arsenault via llvm-commits
• [libc] [llvm] [APFloat] Add exp function for APFloat::IEEESsingle using expf implementation from LLVM libc. (PR #143959)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Common up some unsafe fexp lowering. NFC. (PR #170841)   Matt Arsenault via llvm-commits
• [clang] [llvm] CodeGen: Add LibcallLoweringInfo analysis pass (PR #168622)   Matt Arsenault via llvm-commits
• [clang] [llvm] CodeGen: Add LibcallLoweringInfo analysis pass (PR #168622)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][InstCombine][AArch64] sve.dup(V, all_active, S) ==> splat(S) (PR #170292)   Matthew Devereau via llvm-commits
• [llvm] [llvm-link] Add more detail to `--internalize` description (PR #170397)   Matthew Maurer via llvm-commits
• [llvm] [Support] Join threads when stopping the ThreadPoolExecutor (PR #166054)   Maurice Heumann via llvm-commits
• [llvm] [Support] Join threads when stopping the ThreadPoolExecutor (PR #166054)   Maurice Heumann via llvm-commits
• [llvm] [Support] Join threads when stopping the ThreadPoolExecutor (PR #166054)   Maurice Heumann via llvm-commits
• [llvm] Fix emulated TLS alignment for large variables (PR #171037)   Medha Tiwari via llvm-commits
• [llvm] [LIT] Workaround the 60 processed limit on Windows (PR #157759)   Mehdi Amini via llvm-commits
• [llvm] [LIT] Workaround the 60 processed limit on Windows (PR #157759)   Mehdi Amini via llvm-commits
• [llvm] [LIT] Workaround the 60 processed limit on Windows (PR #157759)   Mehdi Amini via llvm-commits
• [llvm] [LIT] Workaround the 60 processed limit on Windows (PR #157759)   Mehdi Amini via llvm-commits
• [llvm] b4c30b0 - Fix LLVM test to use %python instead of python   Mehdi Amini via llvm-commits
• [clang] [llvm] Added partial support for compiling C++20 modules and header-units without scanning. (PR #147682)   Mehdi Amini via llvm-commits
• [clang] [llvm] Added partial support for compiling C++20 modules and header-units without scanning. (PR #147682)   Mehdi Amini via llvm-commits
• [clang] [llvm] Added partial support for compiling C++20 modules and header-units without scanning. (PR #147682)   Mehdi Amini via llvm-commits
• [llvm] 235d44d - Fix LLVM test to use %python instead of python   Mehdi Amini via llvm-commits
• [llvm] [LIT] Workaround the 60 processed limit on Windows (PR #157759)   Mehdi Amini via llvm-commits
• [llvm] Fix lit testing to support standalone testing (PR #170365)   Mehdi Amini via llvm-commits
• [llvm] Fix lit testing to support standalone testing (PR #170365)   Mehdi Amini via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [VPlan] Extract reverse operation for reverse accesses (PR #146525)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Explicitly disable in-loop reductions for AnyOf and FindIV. nfc (PR #163541)   Mel Chen via llvm-commits
• [llvm] [VPlan] Remove VPWidenRecipe constructor with no underlying instruction. NFCI (PR #166521)   Mel Chen via llvm-commits
• [llvm] [VPlanValue] Introduce hasOneUser(). nfc (PR #170826)   Mel Chen via llvm-commits
• [llvm] [VPlan] Extract reverse operation for reverse accesses (PR #146525)   Mel Chen via llvm-commits
• [llvm] [VPlan] Extract reverse operation for reverse accesses (PR #146525)   Mel Chen via llvm-commits
• [llvm] [VPlan] Extract reverse operation for reverse accesses (PR #146525)   Mel Chen via llvm-commits
• [llvm] [VPlan] Extract reverse operation for reverse accesses (PR #146525)   Mel Chen via llvm-commits
• [llvm] [VPlan] Extract reverse operation for reverse accesses (PR #146525)   Mel Chen via llvm-commits
• [llvm] [VPlan] Extract reverse operation for reverse accesses (PR #146525)   Mel Chen via llvm-commits
• [llvm] [VPlan] Extract reverse operation for reverse accesses (PR #146525)   Mel Chen via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #170057)   Mend Renovate via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #171064)   Mend Renovate via llvm-commits
• [llvm] Update actions/checkout action to v6 (PR #171065)   Mend Renovate via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #171064)   Mend Renovate via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #171064)   Mend Renovate via llvm-commits
• [llvm] [llvm][DebugInfo] Allow DIDerivedType as a bound in DISubrangeType (PR #165880)   Michael Buch via llvm-commits
• [llvm] Add a filegroup containing _all_ sources to the libc build rules (PR #169155)   Michael Jones via llvm-commits
• [libc] [llvm] Reland Refactor WIDE_READ to allow finer control over high-performance function selection (#165613) (PR #170738)   Michael Jones via llvm-commits
• [libc] [llvm] Reland Refactor WIDE_READ to allow finer control over high-performance function selection (#165613) (PR #170738)   Michael Jones via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP][Offload] Add offload runtime support for dyn_groupprivate clause (PR #152831)   Michael Klemm via llvm-commits
• [clang] [llvm] [Flang][OpenMP] Fix OpenMP static scheduling when trip count is zero (PR #170863)   Michael Klemm via llvm-commits
• [llvm] [DA] Add tests for GCD MIV misses dependency due to overflow (NFC) (PR #169926)   Michael Kruse via llvm-commits
• [llvm] [DA] Add tests for nsw doesn't hold on entire iteration space (NFC) (PR #162281)   Michael Kruse via llvm-commits
• [llvm] [Delinearization] Add test for inferred array size exceeds integer range (NFC) (PR #169048)   Michael Kruse via llvm-commits
• [llvm] [Delinearization] Add test for inferred array size exceeds integer range (NFC) (PR #169048)   Michael Kruse via llvm-commits
• [llvm] [Delinearization] Add test for inferred array size exceeds integer range (NFC) (PR #169048)   Michael Kruse via llvm-commits
• [flang] [llvm] [flang] implement show_descriptor intrinsic, a non-standard extension (PR #169137)   Michael Kruse via llvm-commits
• [llvm] [Delinearization] Add validation for large size arrays (PR #169902)   Michael Kruse via llvm-commits
• [llvm] [flang] Enable Driver/exec.f90 test (NFC) (PR #170544)   Michael Kruse via llvm-commits
• [llvm] [flang] Enable Driver/exec.f90 test (NFC) (PR #170544)   Michael Kruse via llvm-commits
• [llvm] [Flang-RT] Set LD_LIBRARY_PATH for unittests (PR #170840)   Michael Kruse via llvm-commits
• [llvm] [Flang-RT] Set LD_LIBRARY_PATH for unittests (PR #170840)   Michael Kruse via llvm-commits
• [llvm] [Flang-RT] Set LD_LIBRARY_PATH for unittests (PR #170840)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [Flang] Move builtin .mod generation into runtimes (Reapply #137828) (PR #169638)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [Flang] Move builtin .mod generation into runtimes (Reapply #137828) (PR #169638)   Michael Kruse via llvm-commits
• [llvm] [SPIRV] Add legalization for long vectors (PR #169665)   Michal Paszkowski via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   Michal R via llvm-commits
• [llvm] [LLVM] Remove the requirement for named pipe in jobserver (PR #169154)   Michał Górny via llvm-commits
• [llvm] [LLVM] Remove the requirement for named pipe in jobserver (PR #169154)   Michał Górny via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   Michał Górny via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   Michał Górny via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   Michał Górny via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   Michał Górny via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   Michał Górny via llvm-commits
• [llvm] f6cbd7a - [llvm-profgen] Fix warnings when building without asserts [NFC]   Mikael Holmen via llvm-commits
• [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Update SpacemiT-X60 vector load/stores (PR #169936)   Mikhail R. Gadelha via llvm-commits
• [llvm] [RISCV] Update SpacemiT-X60 vector load/stores (PR #169936)   Mikhail R. Gadelha via llvm-commits
• [llvm] [DAGCombiner] Honor rewrite semantics of fast-math flags in fdiv combine (PR #167595)   Mikołaj Piróg via llvm-commits
• [llvm] [DAGCombiner] Honor rewrite semantics of fast-math flags in fdiv combine (PR #167595)   Mikołaj Piróg via llvm-commits
• [llvm] [DAG] Recognise AVGFLOOR (((A >> 1) + (B >> 1)) + (A & B & 1)) patterns (PR #169644)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Introduce a new tune feature string syntax and its parser (PR #168160)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Introduce a new tune feature string syntax and its parser (PR #168160)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Introduce a new tune feature string syntax and its parser (PR #168160)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Introduce a new tune feature string syntax and its parser (PR #168160)   Min-Yih Hsu via llvm-commits
• [llvm] [llvm-exegesis] Make rvv/filter.test deterministic (PR #170014)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Update SpacemiT-X60 vector load/stores (PR #169936)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Update SpacemiT-X60 vector load/stores (PR #169936)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Update SpacemiT-X60 vector load/stores (PR #169936)   Min-Yih Hsu via llvm-commits
• [llvm] [DAG] SDPatternMatch - Fix m_Reassociatable mismatching (PR #170061)   Min-Yih Hsu via llvm-commits
• [llvm] [DAG] SDPatternMatch - Fix m_Reassociatable mismatching (PR #170061)   Min-Yih Hsu via llvm-commits
• [llvm] [Exegesis][RISCV] Support C_LDSP for llvm-exegesis (PR #169660)   Min-Yih Hsu via llvm-commits
• [llvm] [Exegesis][RISCV] Support C_LDSP for llvm-exegesis (PR #169660)   Min-Yih Hsu via llvm-commits
• [llvm] [Exegesis][RISCV] Support C_LDSP for llvm-exegesis (PR #169660)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] LMUL lists for indexed and strided loads (PR #169756)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Move tuning features below non-tuning features. Put CPU family in their own section. NFC (PR #170352)   Min-Yih Hsu via llvm-commits
• [llvm] [Exegesis][RISCV] Support C_LDSP for llvm-exegesis (PR #169660)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Introduce a new tune feature string syntax and its parser (PR #168160)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Introduce a new tune feature string syntax and its parser (PR #168160)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Introduce a new tune feature string syntax and its parser (PR #168160)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Introduce a new tune feature string syntax and its parser (PR #168160)   Min-Yih Hsu via llvm-commits
• [llvm] [M68k] add test showing callseq begin failure for doubles, and fix mem chain generation (PR #170049)   Min-Yih Hsu via llvm-commits
• [llvm] [DAG] SDPatternMatch - Fix m_Reassociatable mismatching (PR #170061)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Implement RVV scheduling model for andes 45 series processor. (PR #167821)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Implement RVV scheduling model for andes 45 series processor. (PR #167821)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Implement RVV scheduling model for andes 45 series processor. (PR #167821)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Make RISCVInstrInfo::verifyInstruction stricter for immediate-only operands (PR #170736)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Make RISCVInstrInfo::verifyInstruction stricter for immediate-only operands (PR #170736)   Min-Yih Hsu via llvm-commits
• [llvm] [DAG] SDPatternMatch - Fix m_Reassociatable mismatching (PR #170061)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] LMUL lists for indexed and strided loads (PR #169756)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Sources of vmerge shouldn't overlap V0 (PR #170070)   Min-Yih Hsu via llvm-commits
• [llvm] [DAG] SDPatternMatch - Fix m_Reassociatable mismatching (PR #170061)   Min-Yih Hsu via llvm-commits
• [clang] [llvm] [RISCV][Zicfilp] Enable Zicfilp CFI compiler behaviors by looking at module flags (PR #152121)   Ming-Yi Lai via llvm-commits
• [clang] [llvm] [RISCV][Zicfilp] Enable Zicfilp CFI compiler behaviors by looking at module flags (PR #152121)   Ming-Yi Lai via llvm-commits
• [clang] [llvm] [RISCV][Zicfilp] Enable Zicfilp CFI compiler behaviors by looking at module flags (PR #152121)   Ming-Yi Lai via llvm-commits
• [clang] [llvm] [RISCV][Zicfilp] Enable Zicfilp CFI compiler behaviors by looking at module flags (PR #152121)   Ming-Yi Lai via llvm-commits
• [llvm] [ThinLTO] Fix parsing null aliasee in alias summary (PR #169490)   Mingjie Xu via llvm-commits
• [llvm] [InstCombine] Fix bail-out in `PHIsEqualValue()` (PR #170650)   Mingjie Xu via llvm-commits
• [llvm] [NFC] Fix multi-line RUN statement in a test. (PR #170011)   Mingming Liu via llvm-commits
• [llvm] [NFC] Fix multi-line RUN statement in a test. (PR #170011)   Mingming Liu via llvm-commits
• [llvm] [NFC] Fix multi-line RUN statement in a test. (PR #170011)   Mingming Liu via llvm-commits
• [llvm] [Support] Optimize DebugCounter (PR #170305)   Mingming Liu via llvm-commits
• [llvm] Introduction of typified section in ExtBinary format (PR #166553)   Mingming Liu via llvm-commits
• [lld] [lld][docs] Document two linker-script related options for lld ELF (PR #166313)   Mingming Liu via llvm-commits
• [lld] [lld][docs] Document two linker-script related options for lld ELF (PR #166313)   Mingming Liu via llvm-commits
• [lld] [lld][docs] Document two linker-script related options for lld ELF (PR #166313)   Mingming Liu via llvm-commits
• [lld] [lld][docs] Document two linker-script related options for lld ELF (PR #166313)   Mingming Liu via llvm-commits
• [lld] [lld][docs] Document two linker-script related options for lld ELF (PR #166313)   Mingming Liu via llvm-commits
• [llvm] [benchmark][NFC] Update cc_binary load (PR #169710)   Mircea Trofin via llvm-commits
• [llvm] [profcheck] update exclude list (PR #170316)   Mircea Trofin via llvm-commits
• [llvm] [LLT] mark the CFI jumptable naked on Windows (PR #170371)   Mircea Trofin via llvm-commits
• [llvm] [LLT] mark the CFI jumptable naked on Windows (PR #170371)   Mircea Trofin via llvm-commits
• [llvm] [LLT] mark the CFI jumptable naked on Windows (PR #170371)   Mircea Trofin via llvm-commits
• [llvm] [LLT] mark the CFI jumptable naked on Windows (PR #170371)   Mircea Trofin via llvm-commits
• [llvm] [LLT] mark the CFI jumptable naked on Windows (PR #170371)   Mircea Trofin via llvm-commits
• [llvm] [LTT] mark the CFI jumptable naked on Windows (PR #170371)   Mircea Trofin via llvm-commits
• [llvm] [LTT] mark the CFI jumptable naked on Windows (PR #170371)   Mircea Trofin via llvm-commits
• [llvm] [LTT] Set the naked attribute (PR #170380)   Mircea Trofin via llvm-commits
• [llvm] [LTT] Set the naked attribute (PR #170380)   Mircea Trofin via llvm-commits
• [llvm] [LTT] Set the naked attribute (PR #170380)   Mircea Trofin via llvm-commits
• [llvm] [LTT] Set the naked attribute (PR #170380)   Mircea Trofin via llvm-commits
• [llvm] [WIP][profcheck] Codegen Prepare (PR #166857)   Mircea Trofin via llvm-commits
• [llvm] [LTT] mark the CFI jumptable naked on Windows (PR #170371)   Mircea Trofin via llvm-commits
• [llvm] [LTT] mark the CFI jumptable naked on Windows (PR #170371)   Mircea Trofin via llvm-commits
• [llvm] [LTT] mark the CFI jumptable naked on Windows (PR #170371)   Mircea Trofin via llvm-commits
• [llvm] [profcheck] Don't verify global ctors (PR #170597)   Mircea Trofin via llvm-commits
• [llvm] [profcheck] Don't verify global ctors (PR #170597)   Mircea Trofin via llvm-commits
• [llvm] [profcheck] Don't verify generated global ctors/dtors (PR #170597)   Mircea Trofin via llvm-commits
• [llvm] [profcheck] Don't verify generated global ctors/dtors (PR #170597)   Mircea Trofin via llvm-commits
• [llvm] [profcheck] Don't verify generated global ctors/dtors (PR #170597)   Mircea Trofin via llvm-commits
• [llvm] [profcheck] Don't verify generated global ctors/dtors (PR #170597)   Mircea Trofin via llvm-commits
• [llvm] [profcheck] Don't verify generated global ctors/dtors (PR #170597)   Mircea Trofin via llvm-commits
• [llvm] [profcheck] Don't verify generated global ctors/dtors (PR #170597)   Mircea Trofin via llvm-commits
• [llvm] [profcheck] Don't verify generated global ctors/dtors (PR #170597)   Mircea Trofin via llvm-commits
• [llvm] [profcheck] Don't verify generated global ctors/dtors (PR #170597)   Mircea Trofin via llvm-commits
• [llvm] [profcheck] Don't verify generated global ctors/dtors (PR #170597)   Mircea Trofin via llvm-commits
• [llvm] [profcheck] Don't verify generated global ctors/dtors (PR #170597)   Mircea Trofin via llvm-commits
• [llvm] [profcheck] Don't verify generated global ctors/dtors (PR #170597)   Mircea Trofin via llvm-commits
• [llvm] [LTT] Add `unknown` branch weights when lowering type tests with conditional (PR #170752)   Mircea Trofin via llvm-commits
• [llvm] [LTT] Add `unknown` branch weights when lowering type tests with conditional (PR #170752)   Mircea Trofin via llvm-commits
• [llvm] [NFC] Run UTC --check-globals on LowerTypeTests/import.ll (PR #170755)   Mircea Trofin via llvm-commits
• [llvm] [NFC] Run UTC --check-globals on LowerTypeTests/import.ll (PR #170755)   Mircea Trofin via llvm-commits
• [llvm] [NFC] Run UTC --check-globals on LowerTypeTests/import.ll (PR #170755)   Mircea Trofin via llvm-commits
• [llvm] [NFC] Run UTC --check-globals on LowerTypeTests/import.ll (PR #170755)   Mircea Trofin via llvm-commits
• [llvm] [NFC] Run UTC --check-globals on LowerTypeTests/import.ll (PR #170755)   Mircea Trofin via llvm-commits
• [clang] [llvm] [AMDGPU] Add s_wakeup_barrier instruction for gfx1250 (PR #170501)   Mirko Brkušanin via llvm-commits
• [clang] [llvm] [AMDGPU] Add s_wakeup_barrier instruction for gfx1250 (PR #170501)   Mirko Brkušanin via llvm-commits
• [clang] [llvm] [AMDGPU] Add s_wakeup_barrier instruction for gfx1250 (PR #170501)   Mirko Brkušanin via llvm-commits
• [llvm] [TableGen] Add GenericEnumClass that generates scoped enums (PR #170903)   Mirko Brkušanin via llvm-commits
• [compiler-rt] [compiler-rt] Add baremetal version of profile library. (PR #167998)   Mr. Walls via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] add clamp immediate operand to WMMA iu8 intrinsic (PR #171069)   Muhammad Abdul via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] add clamp immediate operand to WMMA iu8 intrinsic (PR #171069)   Muhammad Abdul via llvm-commits
• [libc] [llvm] [libc][math] Refactor expm1 implementation to header-only in src/__support/math folder. (PR #162127)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor expm1f implementation to header-only in src/__support/math folder. (PR #162131)   Muhammad Bassiouni via llvm-commits
• [compiler-rt] [compiler-rt] [test] refine target_page_size() in lit.common.cfg.py (NFC) (PR #170475)   Mészáros Gergely via llvm-commits
• [clang] [llvm] [CodeGen][KCFI] Allow setting type hash from xxHash64 to FNV-1a (PR #167254)   Nathan Chancellor via llvm-commits
• [clang] [llvm] [CodeGen][KCFI] Allow setting type hash from xxHash64 to FNV-1a (PR #167254)   Nathan Chancellor via llvm-commits
• [llvm] [AArch64][GlobalISel] Don't crash when legalising vector G_SHL (PR #168848)   Nathan Corbyn via llvm-commits
• [llvm] [AArch64][GlobalISel] Don't crash when legalising vector G_SHL (PR #168848)   Nathan Corbyn via llvm-commits
• [llvm] [AArch64][GlobalISel] Don't crash when legalising vector G_SHL (PR #168848)   Nathan Corbyn via llvm-commits
• [llvm] [AArch64][GlobalISel] Don't crash when legalising vector G_SHL (PR #168848)   Nathan Corbyn via llvm-commits
• [llvm] [AArch64][GlobalISel] Don't crash when legalising vector G_SHL (PR #168848)   Nathan Corbyn via llvm-commits
• [llvm] [AArch64][GlobalISel] Don't crash when legalising vector G_SHL (PR #168848)   Nathan Corbyn via llvm-commits
• [clang] [compiler-rt] [llvm] [TySan] Make TySan compatible with UBSan (PR #169036)   Nathan Corbyn via llvm-commits
• [llvm] [AArch64][GlobalISel] Don't crash when legalising vector G_SHL (PR #168848)   Nathan Corbyn via llvm-commits
• [llvm] [AArch64][GlobalISel] Don't crash when legalising vector G_SHL (PR #168848)   Nathan Corbyn via llvm-commits
• [llvm] [AArch64][GlobalISel] Don't crash when legalising vector G_SHL (PR #168848)   Nathan Corbyn via llvm-commits
• [llvm] [AArch64][GlobalISel] Don't crash when legalising G_*MIN/G_*MAX of pointer vector (PR #168872)   Nathan Corbyn via llvm-commits
• [llvm] [AArch64][GlobalISel] Fix vector lrint/llrint fallbacks (PR #170814)   Nathan Corbyn via llvm-commits
• [clang] [llvm] [SPIRV] Use AMDGPU ABI for AMDGCN flavoured SPIRV (PR #169865)   Nathan Gauër via llvm-commits
• [llvm] [JumpThread] Fix `JumpThreading` pass to skip merging when both blocks contain convergence loop/entry intrinsics. (PR #170247)   Nathan Gauër via llvm-commits
• [clang-tools-extra] [llvm] [Clangd] Add AST search capabilities from clang-query (PR #156090)   Nathan Ridge via llvm-commits
• [clang] [clang-tools-extra] [llvm] [clang][DependencyScanning] Separate clangDependencyScanning and DependencyScanningTool (NFC) (PR #169962)   Naveen Seth Hanig via llvm-commits
• [clang] [clang-tools-extra] [llvm] [clang] Introduce diagnostics suppression mappings (PR #112517)   Nick Desaulniers via llvm-commits
• [llvm] [SPIRV] Error for zero-length arrays if not a shader (PR #169732)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Error for zero-length arrays if not a shader (PR #169732)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Error for zero-length arrays if not a shader (PR #169732)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Error for zero-length arrays if not a shader (PR #169732)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Error for zero-length arrays if not a shader (PR #169732)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Error for zero-length arrays if not a shader (PR #169732)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Add support for CodeSectionINTEL storage class in legalizer (PR #167961)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Error for zero-length arrays if not a shader (PR #169732)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Error for zero-length arrays if not a shader (PR #169732)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Error for zero-length arrays if not a shader (PR #169732)   Nick Sarnie via llvm-commits
• [llvm] aaa59e3 - [gn] port 29fef3a51e6d (bolt PassTests)   Nico Weber via llvm-commits
• [compiler-rt] b73385d - [TySan] Attempt to unbreak build after #169036   Nico Weber via llvm-commits
• [clang] [compiler-rt] [llvm] [TySan] Make TySan compatible with UBSan (PR #169036)   Nico Weber via llvm-commits
• [llvm] [X86] EltsFromConsecutiveLoads - recognise reverse load patterns. (PR #168706)   Nico Weber via llvm-commits
• [llvm] [X86] EltsFromConsecutiveLoads - recognise reverse load patterns. (PR #168706)   Nico Weber via llvm-commits
• [llvm] [X86] Add EltsFromConsecutiveLoads test for infinite loop if we match reverse(vzload(ptr)) patterns (PR #170889)   Nico Weber via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   Nicolai Hähnle via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   Nicolai Hähnle via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   Nicolai Hähnle via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] Add support for GFX12 expert scheduling mode 2 (PR #170319)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] Add some more product names for GPUs (PR #170469)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU: Generalize and normalize some tests to avoid future churn (PR #170508)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU: Generalize and normalize some tests to avoid future churn (PR #170508)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU: Generalize and normalize some tests to avoid future churn (PR #170508)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU: Generalize and normalize some tests to avoid future churn (PR #170508)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU/PromoteAlloca: Extract getVectorTypeForAlloca helper (PR #170509)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU/PromoteAlloca: Extract getVectorTypeForAlloca helper (PR #170509)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU/PromoteAlloca: Simplify how deferred loads work (PR #170510)   Nicolai Hähnle via llvm-commits
• [llvm] [RFC][Uniformity] add proof section uniformity is safe to use across transforms (PR #170628)   Nicolai Hähnle via llvm-commits
• [llvm] [RFC][Uniformity] add proof section uniformity is safe to use across transforms (PR #170628)   Nicolai Hähnle via llvm-commits
• [llvm] [RFC][Uniformity] add proof section uniformity is safe to use across transforms (PR #170628)   Nicolai Hähnle via llvm-commits
• [llvm] [RFC][Uniformity] add proof section uniformity is safe to use across transforms (PR #170628)   Nicolai Hähnle via llvm-commits
• [llvm] [RFC][Uniformity] add proof section uniformity is safe to use across transforms (PR #170628)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] Emit amdgpu.max_num_named_barrier resource symbol (PR #169851)   Nicolai Hähnle via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Nicolai Hähnle via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Nicolai Hähnle via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Nicolai Hähnle via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Nicolai Hähnle via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Nicolai Hähnle via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Nicolai Hähnle via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Nicolai Hähnle via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Nicolai Hähnle via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (PR #167372)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (PR #167372)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (PR #167372)   Nicolai Hähnle via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Nicolai Hähnle via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Nicolai Hähnle via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Nicolai Hähnle via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Nicolai Hähnle via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Nicolai Hähnle via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   Nicolai Hähnle via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   Nicolai Hähnle via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU/PromoteAlloca: Simplify how deferred loads work (PR #170510)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU/PromoteAlloca: Always use i32 for indexing (PR #170511)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU/PromoteAlloca: Always use i32 for indexing (PR #170511)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU/PromoteAlloca: Refactor into analysis / commit phases (PR #170512)   Nicolai Hähnle via llvm-commits
• [llvm] de86696 - Revert "AMDGPU/PromoteAlloca: Always use i32 for indexing (#170511)"   Nicolai Hähnle via llvm-commits
• [llvm] 0e0ec4c - Revert "AMDGPU/PromoteAlloca: Simplify how deferred loads work (#170510)"   Nicolai Hähnle via llvm-commits
• [llvm] Reland "AMDGPU/PromoteAlloca: Simplify how deferred loads work (#170510)" (PR #170955)   Nicolai Hähnle via llvm-commits
• [llvm] Reland "AMDGPU/PromoteAlloca: Simplify how deferred loads work (#170510)" (PR #170955)   Nicolai Hähnle via llvm-commits
• [llvm] Reland "AMDGPU/PromoteAlloca: Simplify how deferred loads work (#170510)" (PR #170955)   Nicolai Hähnle via llvm-commits
• [llvm] Reland "AMDGPU/PromoteAlloca: Simplify how deferred loads work (#170510)" (PR #170955)   Nicolai Hähnle via llvm-commits
• [llvm] VectorCombine: Fold chains of shuffles fed by length-changing shuffles (PR #168819)   Nicolai Hähnle via llvm-commits
• [llvm] Reland "AMDGPU/PromoteAlloca: Simplify how deferred loads work (#170510)" (PR #170955)   Nicolai Hähnle via llvm-commits
• [llvm] Reland "AMDGPU/PromoteAlloca: Always use i32 for indexing (#170511)" (PR #170956)   Nicolai Hähnle via llvm-commits
• [llvm] Reland "AMDGPU/PromoteAlloca: Always use i32 for indexing (#170511)" (PR #170956)   Nicolai Hähnle via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   Nicolai Hähnle via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   Nicolai Hähnle via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   Nicolai Hähnle via llvm-commits
• [llvm] [ConstantRange] Allow casting to the same bitwidth. NFC (PR #170102)   Nikita Popov via llvm-commits
• [llvm] [PowerPC][MC] Diagnose out of range branch fixups (PR #165859)   Nikita Popov via llvm-commits
• [llvm] [PowerPC][MC] Diagnose out of range branch fixups (PR #165859)   Nikita Popov via llvm-commits
• [llvm] [IR] Add CallBr intrinsics support (PR #133907)   Nikita Popov via llvm-commits
• [llvm] [IR] Add CallBr intrinsics support (PR #133907)   Nikita Popov via llvm-commits
• [llvm] [IR] Add CallBr intrinsics support (PR #133907)   Nikita Popov via llvm-commits
• [llvm] [IR] Add CallBr intrinsics support (PR #133907)   Nikita Popov via llvm-commits
• [llvm] [IR] Add CallBr intrinsics support (PR #133907)   Nikita Popov via llvm-commits
• [llvm] [IR] Add CallBr intrinsics support (PR #133907)   Nikita Popov via llvm-commits
• [llvm] [IR] Add CallBr intrinsics support (PR #133907)   Nikita Popov via llvm-commits
• [llvm] [profcheck] Fix missing profile metadata in ExpandMemCmp (PR #169979)   Nikita Popov via llvm-commits
• [llvm] [AggressiveInstCombine] Fix memory location for alias analysis (PR #169953)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking] Enhance alignment propagation in computeKnownBits. (PR #166935)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking] Enhance alignment propagation in computeKnownBits. (PR #166935)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking] Enhance alignment propagation in computeKnownBits. (PR #166935)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Specify icmp on pointers to only compare address (PR #163936)   Nikita Popov via llvm-commits
• [llvm] [llvm-c] Create a 128 bit floating point constant from 2 64 bit values (PR #164381)   Nikita Popov via llvm-commits
• [llvm] [llvm-c] Create a 128 bit floating point constant from 2 64 bit values (PR #164381)   Nikita Popov via llvm-commits
• [llvm] [llvm-c] Create a 128 bit floating point constant from 2 64 bit values (PR #164381)   Nikita Popov via llvm-commits
• [clang] [llvm] [NFC][LLVM] Use @llvm.compiler.used/@llvm.used helpers in Clang and BitcodeWriter (PR #162660)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Rewrite more SCEVAddExpr when applying guards. (PR #159942)   Nikita Popov via llvm-commits
• [clang] [llvm] [SimplifyCFG] Hoist common code for switch multi-case destinations (PR #165700)   Nikita Popov via llvm-commits
• [clang] [llvm] [SimplifyCFG] Hoist common code for switch multi-case destinations (PR #165700)   Nikita Popov via llvm-commits
• [clang] [llvm] [SimplifyCFG] Hoist common code for switch multi-case destinations (PR #165700)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Enable FoldOpIntoSelect and foldOpIntoPhi when the Op's other parameter is non-const (PR #166102)   Nikita Popov via llvm-commits
• [llvm] [IR] Don't store switch case values as operands (PR #166842)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Allow udiv canonicalization of potentially-wrapping AddRecs (PR #169576)   Nikita Popov via llvm-commits
• [llvm] [PowerPC][MC] Diagnose out of range branch fixups (PR #165859)   Nikita Popov via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Specify correct ABI alignment for double (PR #144673)   Nikita Popov via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Specify correct ABI alignment for double (PR #144673)   Nikita Popov via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Specify correct ABI alignment for double (PR #144673)   Nikita Popov via llvm-commits
• [llvm] [profcheck] Fix missing profile metadata in ExpandMemCmp (PR #169979)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Allow udiv canonicalization of potentially-wrapping AddRecs (PR #169576)   Nikita Popov via llvm-commits
• [llvm] [Support] Optimize DebugCounter (PR #170305)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold (sub nsw X, umin(X, C)) s< C2 to (X s< C + C2) (PR #170422)   Nikita Popov via llvm-commits
• [clang] [llvm] [llvm] Introduce MoveEntryAllocaInit pass (PR #164882)   Nikita Popov via llvm-commits
• [llvm] [AA] Improve precision for monotonic atomic load/store operations (PR #158169)   Nikita Popov via llvm-commits
• [llvm] [AA] Improve precision for monotonic atomic load/store operations (PR #158169)   Nikita Popov via llvm-commits
• [llvm] [AA] Improve precision for monotonic atomic load/store operations (PR #158169)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold chained GEP with constant base into single GEP (PR #170439)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold chained GEP with constant base into single GEP (PR #170439)   Nikita Popov via llvm-commits
• [llvm] [llvm-link] Add more detail to `--internalize` description (PR #170397)   Nikita Popov via llvm-commits
• [llvm] [llvm-link] Add more detail to `--internalize` description (PR #170397)   Nikita Popov via llvm-commits
• [llvm] [SupportLSP] Add ShowMessageParams (PR #164626)   Nikita Popov via llvm-commits
• [llvm] [IR] Add CallBr intrinsics support (PR #133907)   Nikita Popov via llvm-commits
• [llvm] [IndVars] Strengthen inference of samesign flags (PR #170363)   Nikita Popov via llvm-commits
• [llvm] [IndVars] Split NumElimCmp statistic into three pieces (PR #170514)   Nikita Popov via llvm-commits
• [llvm] [LLVM][IR] Add support for address space names in DataLayout (PR #170559)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold chained GEP with constant base into single GEP (PR #170439)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold chained GEP with constant base into single GEP (PR #170439)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold chained GEP with constant base into single GEP (PR #170439)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold chained GEP with constant base into single GEP (PR #170439)   Nikita Popov via llvm-commits
• [llvm] [llvm-c] Add LLVMConstFPFromBits() API (PR #164381)   Nikita Popov via llvm-commits
• [llvm] [llvm-c] Add LLVMConstFPFromBits() API (PR #164381)   Nikita Popov via llvm-commits
• [llvm] [llvm-c] Add LLVMConstFPFromBits() API (PR #164381)   Nikita Popov via llvm-commits
• [llvm] [llvm-c] Add LLVMConstFPFromBits() API (PR #164381)   Nikita Popov via llvm-commits
• [clang] [llvm] [llvm] Introduce MoveEntryAllocaInit pass (PR #164882)   Nikita Popov via llvm-commits
• [llvm] [Support] Support debug counters in non-assertion builds (PR #170468)   Nikita Popov via llvm-commits
• [clang] [llvm] [llvm] Introduce MoveEntryAllocaInit pass (PR #164882)   Nikita Popov via llvm-commits
• [llvm] [IR] Fix User use-after-destroy by zapping in ~User (PR #170575)   Nikita Popov via llvm-commits
• [llvm] [IR] Fix User use-after-destroy by zapping in ~User (PR #170575)   Nikita Popov via llvm-commits
• [llvm] [IR] Fix User use-after-destroy by zapping in ~User (PR #170575)   Nikita Popov via llvm-commits
• [llvm] [llvm-c] Add LLVMConstFPFromBits() API (PR #164381)   Nikita Popov via llvm-commits
• [llvm] [LoopBoundSplit] Check if latch is operand of PHI induction variable (PR #167227)   Nikita Popov via llvm-commits
• [llvm] [InstCombine]: Replace overflow calculation with intrinsic (PR #168195)   Nikita Popov via llvm-commits
• [llvm] [InstCombine]: Replace overflow calculation with intrinsic (PR #168195)   Nikita Popov via llvm-commits
• [llvm] [InstCombine]: Replace overflow calculation with intrinsic (PR #168195)   Nikita Popov via llvm-commits
• [llvm] [InstCombine]: Replace overflow calculation with intrinsic (PR #168195)   Nikita Popov via llvm-commits
• [llvm] [InstCombine]: Replace overflow calculation with intrinsic (PR #168195)   Nikita Popov via llvm-commits
• [llvm] [InstSimplify] Forbid undef folds in foldOrCommuteConstant when undef cannot be used. (PR #170670)   Nikita Popov via llvm-commits
• [llvm] Document the community RFC process (PR #116386)   Nikita Popov via llvm-commits
• [llvm] Fill in some missing C23 math libcall handling (PR #170672)   Nikita Popov via llvm-commits
• [llvm] [InferAttrs] Mark ceil and round as memory(none) (PR #170694)   Nikita Popov via llvm-commits
• [llvm] [InferAttrs] Mark ceil and round as memory(none) (PR #170694)   Nikita Popov via llvm-commits
• [llvm] [InstSimplify] Add roundeven constant-propagation tests (PR #170688)   Nikita Popov via llvm-commits
• [llvm] [InferAttrs] Mark ceil and round as memory(none) (PR #170694)   Nikita Popov via llvm-commits
• [llvm] [InstSimplify] Add roundeven constant-propagation tests (PR #170688)   Nikita Popov via llvm-commits
• [llvm] [InstSimplify] Add roundeven constant-propagation tests (PR #170688)   Nikita Popov via llvm-commits
• [llvm] [InferAttrs] Handle roundeven like other libm functions (PR #170691)   Nikita Popov via llvm-commits
• [llvm] [InferAttrs] Handle roundeven like other libm functions (PR #170691)   Nikita Popov via llvm-commits
• [llvm] [InferAttrs] Handle roundeven like other libm functions (PR #170691)   Nikita Popov via llvm-commits
• [llvm] [IR] Fix vector.splice verifier scaling by vscale for fixed length vectors (PR #170807)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Add poison/undef canonicalization for SCEVAddExpr, SCEVAddRecExpr. (PR #170741)   Nikita Popov via llvm-commits
• [llvm] [IR] Fix vector.splice verifier scaling by vscale for fixed length vectors (PR #170807)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fix profile metadata when folding implied conditionals (PR #170756)   Nikita Popov via llvm-commits
• [llvm] [StackProtector] Introduce stack-protect-refinement pass to remove unnecessary protections. (PR #150390)   Nikita Popov via llvm-commits
• [llvm] [LLVM][IR] Add support for address space names in DataLayout (PR #170559)   Nikita Popov via llvm-commits
• [llvm] [LLVM][IR] Add support for address space names in DataLayout (PR #170559)   Nikita Popov via llvm-commits
• [llvm] [LLVM][IR] Add support for address space names in DataLayout (PR #170559)   Nikita Popov via llvm-commits
• [llvm] [IR] Split vector.splice into vector.splice.down and vector.splice.up (PR #170796)   Nikita Popov via llvm-commits
• [llvm] [IR] Split vector.splice into vector.splice.down and vector.splice.up (PR #170796)   Nikita Popov via llvm-commits
• [llvm] [IR] Split vector.splice into vector.splice.down and vector.splice.up (PR #170796)   Nikita Popov via llvm-commits
• [llvm] [IR] Don't store switch case values as operands (PR #166842)   Nikita Popov via llvm-commits
• [llvm] [llvm-lsp] LSP server for LLVM IR (PR #161969)   Nikita Popov via llvm-commits
• [llvm] [RFC] [IR] Modules can make filtered range to iterate function definitions only (PR #167972)   Nikita Popov via llvm-commits
• [llvm] [LoopPeel] Fix typo Derefencebale -> Derefenceable. NFC (PR #170791)   Nikita Popov via llvm-commits
• [llvm] Skip stack protectors on alloca's which have new metadata to opt out (PR #170229)   Nikita Popov via llvm-commits
• [llvm] [InferAttrs] Handle f[min/max]imum_num like other libm functions (PR #170697)   Nikita Popov via llvm-commits
• [llvm] [InferAttrs] Handle f[min/max]imum_num like other libm functions (PR #170697)   Nikita Popov via llvm-commits
• [llvm] d5551e1 - [InferFunctionAttrs] Fix check lines   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Add regression tests for f[min][max]imum_num libcalls (PR #170695)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Add regression tests for f[min][max]imum_num libcalls (PR #170695)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Handle roundeven libcall in visitCall (PR #170690)   Nikita Popov via llvm-commits
• [llvm] [ConstantFolding] Handle roundeven libcalls (PR #170692)   Nikita Popov via llvm-commits
• [llvm] [ConstantFolding] Handle roundeven libcalls (PR #170692)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Preload DomConditionCache to reach fixed point when sinking (PR #170835)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Updated the LLVM CMake Documentation (PR #121083)   Nikita Popov via llvm-commits
• [llvm] [Instcombine] Lower to explicit subtraction + unsigned comparison (PR #170896)   Nikita Popov via llvm-commits
• [llvm] [Instcombine] Lower to explicit subtraction + unsigned comparison (PR #170896)   Nikita Popov via llvm-commits
• [llvm] [Instcombine] Lower to explicit subtraction + unsigned comparison (PR #170896)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Limit canonicalization of extractelement(cast) to constant index or same basic block. (PR #166227)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Limit canonicalization of extractelement(cast) to constant index or same basic block. (PR #166227)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Limit canonicalization of extractelement(cast) to constant index or same basic block. (PR #166227)   Nikita Popov via llvm-commits
• [llvm] [DA] runtime predicates for delinearization bounds checks (PR #170713)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Nikita Popov via llvm-commits
• [llvm] [IR] Add ImplicitTrunc argument to ConstantInt::get() (PR #170865)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold (A & ~B) | (A ^ B) -> A ^ B (PR #171047)   Nikita Popov via llvm-commits
• [llvm] [IR] Add ImplicitTrunc argument to ConstantInt::get() (PR #170865)   Nikita Popov via llvm-commits
• [llvm] [llvm-c] Deprecate functions working on the global context (PR #163979)   Nikita Popov via llvm-commits
• [llvm] [llvm-c] Deprecate functions working on the global context (PR #163979)   Nikita Popov via llvm-commits
• [libcxx] [libcxxabi] [libunwind] [llvm] [libc++] Enable -Wmissing-prototypes (PR #116261)   Nikolas Klauser via llvm-commits
• [libcxx] [libcxxabi] [libunwind] [llvm] [libc++] Enable -Wmissing-prototypes (PR #116261)   Nikolas Klauser via llvm-commits
• [clang] [llvm] [llvm] Introduce MoveEntryAllocaInit pass (PR #164882)   Nimit Sachdeva via llvm-commits
• [llvm] [llvm] Introduce MoveEntryAllocaInit pass (PR #164882)   Nimit Sachdeva via llvm-commits
• [clang] [llvm] [llvm] Introduce MoveEntryAllocaInit pass (PR #164882)   Nimit Sachdeva via llvm-commits
• [clang] [llvm] [llvm] Introduce MoveEntryAllocaInit pass (PR #164882)   Nimit Sachdeva via llvm-commits
• [clang] [llvm] [llvm] Introduce MoveEntryAllocaInit pass (PR #164882)   Nimit Sachdeva via llvm-commits
• [clang] [llvm] [llvm] Introduce MoveEntryAllocaInit pass (PR #164882)   Nimit Sachdeva via llvm-commits
• [clang] [llvm] [llvm] Introduce MoveEntryAllocaInit pass (PR #164882)   Nimit Sachdeva via llvm-commits
• [llvm] Refactoring llvm-ir2vec.cpp for better separation of concerns in the Tooling classes (PR #170078)   Nishant Sachdeva via llvm-commits
• [llvm] Refactoring llvm-ir2vec.cpp for better separation of concerns in the Tooling classes (PR #170078)   Nishant Sachdeva via llvm-commits
• [llvm] Refactoring llvm-ir2vec.cpp for better separation of concerns in the Tooling classes (PR #170078)   Nishant Sachdeva via llvm-commits
• [llvm] build_llvm_release.bat: Use absolute path when building the tarball (PR #169951)   Omair Javaid via llvm-commits
• [llvm] Build win release packages with LLDB_ENABLE_LIBXML2 (PR #170513)   Omair Javaid via llvm-commits
• [llvm] Build win release packages with LLDB_ENABLE_LIBXML2 (PR #170513)   Omair Javaid via llvm-commits
• [clang] [llvm] [CIR] Support x86 builtin rotate (PR #169566)   Omar Hossam via llvm-commits
• [clang] [llvm] [CIR] Support x86 builtin rotate (PR #169566)   Omar Hossam via llvm-commits
• [llvm] [SelectionDAG] Salvage debuginfo when combining load and sext instrs. (PR #169779)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [SelectionDAG] Salvage debuginfo when combining load and sext instrs. (PR #169779)   Orlando Cazalet-Hyams via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtual call-site target information in DWARF. (PR #167666)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [ISel] Introduce llvm.clmul intrinsic (PR #168731)   Oscar Smith via llvm-commits
• [llvm] [aarch64] Mix the frame pointer with the stack cookie when protecting the stack (PR #161114)   Pan Tao via llvm-commits
• [llvm] [aarch64] Mix the frame pointer with the stack cookie when protecting the stack (PR #161114)   Pan Tao via llvm-commits
• [llvm] [AMDGPU] Implement Waitcnt Expansion for Profiling (PR #169345)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Implement Waitcnt Expansion for Profiling (PR #169345)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Implement Waitcnt Expansion for Profiling (PR #169345)   Pankaj Dwivedi via llvm-commits
• [llvm] [Uniformity] add proof section uniformity is safe to use across transforms (PR #170628)   Pankaj Dwivedi via llvm-commits
• [llvm] [RFC][Uniformity] add proof section uniformity is safe to use across transforms (PR #170628)   Pankaj Dwivedi via llvm-commits
• [llvm] [RFC][Uniformity] add proof section uniformity is safe to use across transforms (PR #170628)   Pankaj Dwivedi via llvm-commits
• [llvm] [BOLT] Improve DWARF CFI generation for pac-ret binaries (PR #163381)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Allow missing DT_FINI{,_ARRAY} if instrumentation-sleep-time is used (PR #170086)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Check if symbol is in data area of function (PR #160143)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Rename Pointer Auth DWARF rewriter passes (PR #164622)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][BTI] Add MCPlusBuilder::addBTItoBBStart (PR #167329)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Tweak heuristics for epilogue recognition (PR #169584)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Tweak heuristics for epilogue recognition (PR #169584)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Tweak heuristics for epilogue recognition (PR #169584)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][BTI] Add MCPlusBuilder::addBTItoBBStart (PR #167329)   Paschalis Mpeis via llvm-commits
• [llvm] Revert "[BOLT][AArch64] Fixed indirect call instrumentation snippet" (PR #170874)   Paschalis Mpeis via llvm-commits
• [llvm] Revert "[BOLT][AArch64] Fixed indirect call instrumentation snippet" (PR #170874)   Paschalis Mpeis via llvm-commits
• [llvm] [CodeGen] Add MachineRegisterClassInfo analysis pass (PR #164877)   Patrick Simmons via llvm-commits
• [llvm] [Docs] Add documentation for LLVM_ENABLE_CURL (PR #170928)   Paul Kirth via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Add lowering for ISD::[ANY,SIGN,ZERO]_EXTEND_VECTOR_INREG. (PR #169847)   Paul Walker via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Add lowering for ISD::[ANY,SIGN,ZERO]_EXTEND_VECTOR_INREG. (PR #169847)   Paul Walker via llvm-commits
• [llvm] [LLVM][CodeGen] Remove failure cases when widening EXTRACT/INSERT_SUBVECTOR. (PR #162308)   Paul Walker via llvm-commits
• [llvm] [LLVM][InstSimplify] Add folds for SVE integer reduction intrinsics. (PR #167519)   Paul Walker via llvm-commits
• [llvm] Add `llvm.vector.partial.reduce.fadd` intrinsic (PR #159776)   Paul Walker via llvm-commits
• [llvm] Add `llvm.vector.partial.reduce.fadd` intrinsic (PR #159776)   Paul Walker via llvm-commits
• [clang] [llvm] [LLVM][AArch64] Add "u" variants of SVE saturating/rounding shift left intrinsics. (PR #170503)   Paul Walker via llvm-commits
• [llvm] [AArch64] Lower v8bf16 FMUL to BFMLAL top/bottom with +sve (PR #169655)   Paul Walker via llvm-commits
• [llvm] [AArch64] Lower v8bf16 FMUL to BFMLAL top/bottom with +sve (PR #169655)   Paul Walker via llvm-commits
• [llvm] [AArch64] Lower v8bf16 FMUL to BFMLAL top/bottom with +sve (PR #169655)   Paul Walker via llvm-commits
• [llvm] [AArch64] Lower v8bf16 FMUL to BFMLAL top/bottom with +sve (PR #169655)   Paul Walker via llvm-commits
• [llvm] [NFC][LLVM][CodeGen][SVE] Restructure urshr related PatFrags. (PR #170521)   Paul Walker via llvm-commits
• [llvm] [LLVM][InstCombine][AArch64] sve.dup(V, all_active, S) ==> splat(S) (PR #170292)   Paul Walker via llvm-commits
• [clang] [llvm] [LLVM][AArch64] Add "u" variants of SVE saturating/rounding shift left intrinsics. (PR #170503)   Paul Walker via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   Paul Walker via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   Paul Walker via llvm-commits
• [clang] [llvm] [LLVM][AArch64] Add "u" variants of SVE saturating/rounding shift left intrinsics. (PR #170503)   Paul Walker via llvm-commits
• [llvm] [IR] Split vector.splice into vector.splice.down and vector.splice.up (PR #170796)   Paul Walker via llvm-commits
• [llvm] [IR] Split vector.splice into vector.splice.down and vector.splice.up (PR #170796)   Paul Walker via llvm-commits
• [llvm] [IR] Split vector.splice into vector.splice.down and vector.splice.up (PR #170796)   Paul Walker via llvm-commits
• [llvm] [IR] Split vector.splice into vector.splice.down and vector.splice.up (PR #170796)   Paul Walker via llvm-commits
• [llvm] [IR] Split vector.splice into vector.splice.down and vector.splice.up (PR #170796)   Paul Walker via llvm-commits
• [clang] [llvm] [LLVM][AArch64] Add "u" variants of sve.[s,u]hadd intrinsics (PR #170894)   Paul Walker via llvm-commits
• [clang] [llvm] [LLVM][AArch64] Add "u" variants of sve.[s,u]hadd intrinsics (PR #170894)   Paul Walker via llvm-commits
• [llvm] [RISCV] Adopt SpacemitX60's scheduling model for `-mtune=generic` (PR #167008)   Paul Walmsley via llvm-commits
• [llvm] [Support][Windows] disk_space handle unicode paths (PR #170716)   Pavel Rosický via llvm-commits
• [llvm] [RISCV] Sources of vmerge shouldn't overlap V0 (PR #170070)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Sources of vmerge shouldn't overlap V0 (PR #170070)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Move tuning features below non-tuning features. Put CPU family in their own section. NFC (PR #170352)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Sources of vmerge shouldn't overlap V0 (PR #170070)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Clear kill flags for FalseReg in foldVMergeToMask (PR #170438)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Clear kill flags for FalseReg in foldVMergeToMask (PR #170438)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Sources of vmerge shouldn't overlap V0 (PR #170070)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Commute Src in foldVMV_V_V (PR #170536)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Combine vmerge_vl allones -> vmv_v_v, vmv_v_v splat(x) -> vmv_v_x (PR #170539)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Use vsetivli instead of `x0,x0` form to retain SEW/LMUL when AVL is imm (PR #169307)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Use vsetivli instead of `x0,x0` form to retain SEW/LMUL when AVL is imm (PR #169307)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Sources of vmerge shouldn't overlap V0 (PR #170070)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Add Propeller support for RISC-V (PR #170992)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Use a switch in RISCVInstrInfo::verifyInstruction. NFC (PR #170961)   Pengcheng Wang via llvm-commits
• [llvm] [NFC][RISCV] Make vfadd attribute list follow other tests (PR #170864)   Pengcheng Wang via llvm-commits
• [llvm] GlobalISel: Stop using TPC to check if GlobalISelAbort is enabled (PR #169917)   Petar Avramovic via llvm-commits
• [llvm] GlobalISel: Stop using TPC to check if GlobalISelAbort is enabled (PR #169917)   Petar Avramovic via llvm-commits
• [llvm] GlobalISel: Stop using TPC to check if GlobalISelAbort is enabled (PR #169917)   Petar Avramovic via llvm-commits
• [llvm] GlobalISel: Stop using TPC to check if GlobalISelAbort is enabled (PR #169917)   Petar Avramovic via llvm-commits
• [llvm] GlobalISel: Stop using TPC to check if GlobalISelAbort is enabled (PR #169917)   Petar Avramovic via llvm-commits
• [llvm] GlobalISel: Stop using TPC to check if GlobalISelAbort is enabled (PR #169917)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Report RegBankLegalize errors using reportGISelFailure (PR #169918)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Report RegBankLegalize errors using reportGISelFailure (PR #169918)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Report RegBankLegalize errors using reportGISelFailure (PR #169918)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Report RegBankLegalize errors using reportGISelFailure (PR #169918)   Petar Avramovic via llvm-commits
• [llvm] Adding support for G_STRICT_FMA in new reg bank select (PR #170330)   Petar Avramovic via llvm-commits
• [llvm] Adding support for G_STRICT_FMA in new reg bank select (PR #170330)   Petar Avramovic via llvm-commits
• [llvm] Adding support for G_STRICT_FMA in new reg bank select (PR #170330)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Report RegBankLegalize errors using reportGISelFailure (PR #169918)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Report RegBankLegalize errors using reportGISelFailure (PR #169918)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix broken exp10 lowering for f16 (PR #170708)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix broken exp10 lowering for f16 (PR #170708)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix broken exp10 lowering for f16 (PR #170708)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix broken exp10 lowering for f16 (PR #170708)   Petar Avramovic via llvm-commits
• [llvm] [LTT] mark the CFI jumptable naked on Windows (PR #170371)   Peter Collingbourne via llvm-commits
• [llvm] [LTT] mark the CFI jumptable naked on Windows (PR #170371)   Peter Collingbourne via llvm-commits
• [llvm] [ReplaceConstant] Don't create instructions for the same constant multiple times in the same basic block (#169141) (PR #170398)   Peter Collingbourne via llvm-commits
• [llvm] [ReplaceConstant] Don't create instructions for the same constant multiple times in the same basic block (#169141) (PR #170398)   Peter Collingbourne via llvm-commits
• [clang] [lld] [llvm] Add llvm.protected.field.ptr intrinsic and pre-ISel lowering. (PR #151647)   Peter Collingbourne via llvm-commits
• [clang] [lld] [llvm] Add llvm.protected.field.ptr intrinsic and pre-ISel lowering. (PR #151647)   Peter Collingbourne via llvm-commits
• [clang] [lld] [llvm] Utils: Inhibit load/store folding through phis for llvm.protected.field.ptr. (PR #151649)   Peter Collingbourne via llvm-commits
• [clang] [lld] [llvm] Utils: Inhibit load/store folding through phis for llvm.protected.field.ptr. (PR #151649)   Peter Collingbourne via llvm-commits
• [llvm] [NFC] Run UTC --check-globals on LowerTypeTests/import.ll (PR #170755)   Peter Collingbourne via llvm-commits
• [llvm] [flang][runtime] Clean up C++ style & usage (PR #170227)   Peter Klausler via llvm-commits
• [llvm] [ARM] Recognize abi tag module flags (PR #161306)   Peter Smith via llvm-commits
• [lld] Fix lld crash wrt generated thunks growing away from the patched code (PR #170495)   Peter Smith via llvm-commits
• [lld] Fix lld crash wrt generated thunks growing away from the patched code (PR #170495)   Peter Smith via llvm-commits
• [lld] Fix lld crash wrt generated thunks growing away from the patched code (PR #170495)   Peter Smith via llvm-commits
• [lld] Fix lld crash wrt generated thunks growing away from the patched code (PR #170495)   Peter Smith via llvm-commits
• [lld] Fix lld crash wrt generated thunks growing away from the patched code (PR #170495)   Peter Smith via llvm-commits
• [lld] Fix lld crash wrt generated thunks growing away from the patched code (PR #170495)   Peter Smith via llvm-commits
• [lld] Fix lld crash wrt generated thunks growing away from the patched code (PR #170495)   Peter Smith via llvm-commits
• [lld] Fix lld crash wrt generated thunks growing away from the patched code (PR #170495)   Peter Smith via llvm-commits
• [lld] Fix lld crash wrt generated thunks growing away from the patched code (PR #170495)   Peter Smith via llvm-commits
• [lld] Fix lld crash wrt generated thunks growing away from the patched code (PR #170495)   Peter Smith via llvm-commits
• [lld] Fix lld crash wrt generated thunks growing away from the patched code (PR #170495)   Peter Smith via llvm-commits
• [lld] Fix lld crash wrt generated thunks growing away from the patched code (PR #170495)   Peter Smith via llvm-commits
• [lld] Fix lld crash wrt generated thunks growing away from the patched code (PR #170495)   Peter Smith via llvm-commits
• [lld] Fix lld crash wrt generated thunks growing away from the patched code (PR #170495)   Peter Smith via llvm-commits
• [compiler-rt] [compiler-rt] Add baremetal version of profile library. (PR #167998)   Peter Smith via llvm-commits
• [compiler-rt] [compiler-rt] Add baremetal version of profile library. (PR #167998)   Peter Smith via llvm-commits
• [compiler-rt] [compiler-rt] Add baremetal version of profile library. (PR #167998)   Peter Smith via llvm-commits
• [lld] Fix lld crash wrt generated thunks growing away from the patched code (PR #170495)   Peter Smith via llvm-commits
• [lld] Fix lld crash wrt generated thunks growing away from the patched code (PR #170495)   Peter Smith via llvm-commits
• [lld] Fix lld crash wrt generated thunks growing away from the patched code (PR #170495)   Peter Smith via llvm-commits
• [lld] Fix lld crash wrt generated thunks growing away from the patched code (PR #170495)   Peter Smith via llvm-commits
• [llvm] [BOLT] Do not fail in case of instrumentation binary without fini & fini_array & instrumentation-sleep-time>0 (PR #170086)   Peter Waller via llvm-commits
• [llvm] [BOLT] Do not fail in case of instrumentation binary without fini & fini_array & instrumentation-sleep-time>0 (PR #170086)   Peter Waller via llvm-commits
• [llvm] [BOLT] Do not fail in case of instrumentation binary without fini & fini_array & instrumentation-sleep-time>0 (PR #170086)   Peter Waller via llvm-commits
• [llvm] [BOLT] Do not fail in case of instrumentation binary without fini & fini_array & instrumentation-sleep-time>0 (PR #170086)   Peter Waller via llvm-commits
• [llvm] [BOLT] Do not fail in case of instrumentation binary without fini & fini_array & instrumentation-sleep-time>0 (PR #170086)   Peter Waller via llvm-commits
• [llvm] [BOLT] Improve DWARF CFI generation for pac-ret binaries (PR #163381)   Peter Waller via llvm-commits
• [llvm] [BOLT] Improve DWARF CFI generation for pac-ret binaries (PR #163381)   Peter Waller via llvm-commits
• [llvm] [CMake] Set LLVM_USE_LINKER for external projects when using lld (PR #170401)   Petr Hosek via llvm-commits
• [clang] [lldb] [llvm] [cmake] Add support for statically linking libxml2 (PR #166867)   Petr Hosek via llvm-commits
• [llvm] Add CMake configure preset building blocks (PR #170019)   Petr Hosek via llvm-commits
• [llvm] [CMake] Set LLVM_USE_LINKER for external projects when using lld (PR #170401)   Petr Hosek via llvm-commits
• [compiler-rt] [llvm] [compiler-rt] Add check-builtins target for LLVM_ENABLE_RUNTIMES builds (PR #166837)   Petr Hosek via llvm-commits
• [compiler-rt] [llvm] [compiler-rt] Add check-builtins target for LLVM_ENABLE_RUNTIMES builds (PR #166837)   Petr Hosek via llvm-commits
• [compiler-rt] [llvm] [compiler-rt] Add check-builtins target for LLVM_ENABLE_RUNTIMES builds (PR #166837)   Petr Hosek via llvm-commits
• [llvm] [RISCV] LMUL lists for indexed and strided loads (PR #169756)   Petr Penzin via llvm-commits
• [llvm] [RISCV] LMUL lists for indexed and strided loads (PR #169756)   Petr Penzin via llvm-commits
• [llvm] [RISCV] LMUL lists for indexed and strided loads (PR #169756)   Petr Penzin via llvm-commits
• [llvm] Allow multiple location for the same CSR. (PR #170606)   Petr Penzin via llvm-commits
• [llvm] [WIP][CodeGen][RISCV] Allow multiple location for the same CSR. (PR #170606)   Petr Penzin via llvm-commits
• [llvm] [WIP][CodeGen][RISCV] Allow multiple location for the same CSR. (PR #170606)   Petr Penzin via llvm-commits
• [llvm] [WIP][CodeGen][RISCV] Allow multiple location for the same CSR. (PR #170606)   Petr Penzin via llvm-commits
• [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)   Petr Penzin via llvm-commits
• [llvm] [RISCV] LMUL lists for indexed and strided loads (PR #169756)   Petr Penzin via llvm-commits
• [llvm] [RISCV] LMUL lists for indexed and strided loads (PR #169756)   Petr Penzin via llvm-commits
• [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)   Petr Penzin via llvm-commits
• [llvm] [RISCV] LMUL lists for indexed and strided loads (PR #169756)   Petr Penzin via llvm-commits
• [llvm] [AArch64] recognise trn1/trn2 with flipped operands (PR #169858)   Philip Ginsbach-Chen via llvm-commits
• [llvm] [AArch64] recognise trn1/trn2 with flipped operands (PR #169858)   Philip Ginsbach-Chen via llvm-commits
• [llvm] [AArch64] recognise trn1/trn2 with flipped operands (PR #169858)   Philip Ginsbach-Chen via llvm-commits
• [llvm] [AArch64] recognise trn1/trn2 with flipped operands (PR #169858)   Philip Ginsbach-Chen via llvm-commits
• [llvm] [AArch64] recognise trn1/trn2 with flipped operands (PR #169858)   Philip Ginsbach-Chen via llvm-commits
• [llvm] [AArch64] recognise trn1/trn2 with flipped operands (PR #169858)   Philip Ginsbach-Chen via llvm-commits
• [llvm] [AArch64] recognise trn1/trn2 with flipped operands (PR #169858)   Philip Ginsbach-Chen via llvm-commits
• [llvm] [RegAlloc] Remove default restriction on non-trivial rematerialization (PR #159211)   Philip Reames via llvm-commits
• [llvm] [TTI] Remove masked/gather-scatter/strided/expand-compress costing from TTIImpl (PR #169885)   Philip Reames via llvm-commits
• [llvm] [TTI] Remove masked/gather-scatter/strided/expand-compress costing from TTIImpl (PR #169885)   Philip Reames via llvm-commits
• [llvm] [TTI] Remove masked/gather-scatter/strided/expand-compress costing from TTIImpl (PR #169885)   Philip Reames via llvm-commits
• [llvm] [TTI] Remove masked/gather-scatter/strided/expand-compress costing from TTIImpl (PR #169885)   Philip Reames via llvm-commits
• [llvm] [TTI] Use MemIntrinsicCostAttributes for getGatherScatterOpCost (PR #168650)   Philip Reames via llvm-commits
• [llvm] [TTI] Remove masked/gather-scatter/strided/expand-compress costing from TTIImpl (PR #169885)   Philip Reames via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   Philip Reames via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   Philip Reames via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   Philip Reames via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   Philip Reames via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   Philip Reames via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   Philip Reames via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   Philip Reames via llvm-commits
• [llvm] 49a9787 - [SCEV] Regenerate a subset of auto updated tests   Philip Reames via llvm-commits
• [llvm] [IndVars] Strengthen inference of samesign flags (PR #170363)   Philip Reames via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   Philip Reames via llvm-commits
• [llvm] [IndVars] Strengthen inference of samesign flags (PR #170363)   Philip Reames via llvm-commits
• [llvm] [IndVars] Strengthen inference of samesign flags (PR #170363)   Philip Reames via llvm-commits
• [llvm] [SCEV] Factor out utility for proving same sign of two SCEVs [nfc] (PR #170376)   Philip Reames via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   Philip Reames via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   Philip Reames via llvm-commits
• [llvm] [IndVars] Strengthen inference of samesign flags (PR #170363)   Philip Reames via llvm-commits
• [llvm] [IndVars] Strengthen inference of samesign flags (PR #170363)   Philip Reames via llvm-commits
• [llvm] [IndVars] Strengthen inference of samesign flags (PR #170363)   Philip Reames via llvm-commits
• [llvm] [IndVars] Strengthen inference of samesign flags (PR #170363)   Philip Reames via llvm-commits
• [llvm] [IndVars] Split the NumElimCmp into three pieces (PR #170514)   Philip Reames via llvm-commits
• [llvm] [IndVars] Split NumElimCmp statistic into three pieces (PR #170514)   Philip Reames via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   Philip Reames via llvm-commits
• [llvm] [IndVars] Split NumElimCmp statistic into three pieces (PR #170514)   Philip Reames via llvm-commits
• [llvm] [IndVars] Split NumElimCmp statistic into three pieces (PR #170514)   Philip Reames via llvm-commits
• [llvm] [RISCV] Introduce new AND combine to expose additional load narrowing opportunities (PR #170483)   Philip Reames via llvm-commits
• [llvm] [RISCV] Introduce new AND combine to expose additional load narrowing opportunities (PR #170483)   Philip Reames via llvm-commits
• [llvm] [RISCV] Introduce new AND combine to expose additional load narrowing opportunities (PR #170483)   Philip Reames via llvm-commits
• [llvm] [RISCV] Introduce new AND combine to expose additional load narrowing opportunities (PR #170483)   Philip Reames via llvm-commits
• [llvm] [RISCV] Introduce new AND combine to expose additional load narrowing opportunities (PR #170483)   Philip Reames via llvm-commits
• [llvm] [Draft] Support save/restore point splitting in shrink-wrap (PR #119359)   Philip Reames via llvm-commits
• [clang] [llvm] [RISCV] Update Zvqdotq to v0.1 (PR #170648)   Philip Reames via llvm-commits
• [llvm] [CodeGen] Allow multiple location for the same CSR. (PR #168531)   Philip Reames via llvm-commits
• [llvm] [CodeGen] Minor refactor of CSRSavedLocation struct [nfc] (PR #170721)   Philip Reames via llvm-commits
• [llvm] [CFIInserter] Improve `CSRSavedLocation` struct. (PR #168869)   Philip Reames via llvm-commits
• [llvm] [SCEV] Add m_scev_UndefOrPoison (NFC). (PR #170740)   Philip Reames via llvm-commits
• [llvm] [SCEV] Add poison/undef canonicalization for SCEVAddExpr, SCEVAddRecExpr. (PR #170741)   Philip Reames via llvm-commits
• [llvm] [CodeGen] Use insert idiom in CFIInstrInserter instead of find [nfc] (PR #170760)   Philip Reames via llvm-commits
• [llvm] [CodeGen] Minor refactor of CSRSavedLocation struct [nfc] (PR #170721)   Philip Reames via llvm-commits
• [llvm] [RISCV] Add OPERAND_AVL to RISCVInstrInfo::verifyInstruction. (PR #170770)   Philip Reames via llvm-commits
• [llvm] [CodeGen] Use insert idiom in CFIInstrInserter instead of find [nfc] (PR #170760)   Philip Reames via llvm-commits
• [llvm] [CodeGen] Replace (Min,Max)CSFrameIndex with flag on frame object [NFCI] (PR #170905)   Philip Reames via llvm-commits
• [llvm] [CodeGen] Replace (Min,Max)CSFrameIndex with flag on frame object [NFCI] (PR #170905)   Philip Reames via llvm-commits
• [llvm] [CodeGen] Replace (Min,Max)CSFrameIndex with flag on frame object [NFCI] (PR #170905)   Philip Reames via llvm-commits
• [llvm] [CodeGen] Replace (Min,Max)CSFrameIndex with flag on frame object [NFCI] (PR #170905)   Philip Reames via llvm-commits
• [llvm] [CodeGen] Replace (Min,Max)CSFrameIndex with flag on frame object [NFCI] (PR #170905)   Philip Reames via llvm-commits
• [llvm] [CodeGen] Replace (Min,Max)CSFrameIndex with flag on frame object [NFCI] (PR #170905)   Philip Reames via llvm-commits
• [llvm] [CodeGen] Replace (Min,Max)CSFrameIndex with flag on frame object [NFCI] (PR #170905)   Philip Reames via llvm-commits
• [llvm] [CodeGen] Replace (Min,Max)CSFrameIndex with flag on frame object [NFCI] (PR #170905)   Philip Reames via llvm-commits
• [llvm] [X86] Lower `minimum`/`maximum`/`minimumnum`/`maximumnum` using bitwise operations (PR #170069)   Phoebe Wang via llvm-commits
• [llvm] [X86] Lower `minimum`/`maximum`/`minimumnum`/`maximumnum` using bitwise operations (PR #170069)   Phoebe Wang via llvm-commits
• [llvm] [X86] Lower `minimum`/`maximum`/`minimumnum`/`maximumnum` using bitwise operations (PR #170069)   Phoebe Wang via llvm-commits
• [llvm] [X86] Lower `minimum`/`maximum`/`minimumnum`/`maximumnum` using bitwise operations (PR #170069)   Phoebe Wang via llvm-commits
• [llvm] [X86] Lower `minimum`/`maximum`/`minimumnum`/`maximumnum` using bitwise operations (PR #170069)   Phoebe Wang via llvm-commits
• [llvm] [X86] Lower `minimum`/`maximum`/`minimumnum`/`maximumnum` using bitwise operations (PR #170069)   Phoebe Wang via llvm-commits
• [llvm] [X86] Lower `minimum`/`maximum`/`minimumnum`/`maximumnum` using bitwise operations (PR #170069)   Phoebe Wang via llvm-commits
• [llvm] Avoid maxnum(sNaN, x) optimizations / folds (PR #170181)   Phoebe Wang via llvm-commits
• [llvm] Avoid maxnum(sNaN, x) optimizations / folds (PR #170181)   Phoebe Wang via llvm-commits
• [clang] [llvm] [x86][AVX-VNNI] Fix VPDPWXXD Argument Types (PR #169456)   Phoebe Wang via llvm-commits
• [clang] [llvm] [x86][AVX-VNNI] Fix VPDPWXXD Argument Types (PR #169456)   Phoebe Wang via llvm-commits
• [clang] [llvm] [x86][AVX-VNNI] Fix VPDPWXXD Argument Types (PR #169456)   Phoebe Wang via llvm-commits
• [clang] [llvm] [x86][AVX-VNNI] Fix VPDPWXXD Argument Types (PR #169456)   Phoebe Wang via llvm-commits
• [llvm] [X86][APX] Add pattern for zext(X86setcc ..) -> SETZUCCr (PR #170806)   Phoebe Wang via llvm-commits
• [llvm] [X86][APX] Add pattern for zext(X86setcc ..) -> SETZUCCr (PR #170806)   Phoebe Wang via llvm-commits
• [llvm] [X86][APX] Add pattern for zext(X86setcc ..) -> SETZUCCr (PR #170806)   Phoebe Wang via llvm-commits
• [llvm] [X86][APX] Add pattern for zext(X86setcc ..) -> SETZUCCr (PR #170806)   Phoebe Wang via llvm-commits
• [llvm] [RFC] Extend FASTCC to use up to 22 registers under APX (PR #164638)   Phoebe Wang via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Move S_BFE lowering into RegBankCombiner (PR #141589)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Wait on all LDS DMA operations when no aliasing store is found (PR #170660)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Wait on all LDS DMA operations when no aliasing store is found (PR #170660)   Pierre van Houtryve via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Pierre van Houtryve via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Pierre van Houtryve via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Pierre van Houtryve via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Pierre van Houtryve via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Pierre van Houtryve via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Pierre van Houtryve via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Pierre van Houtryve via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Pierre van Houtryve via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Pierre van Houtryve via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Pierre van Houtryve via llvm-commits
• [llvm] [CodeGen][NFC] Update Doxygen references to renamed parameters (PR #170253)   Piotr Fusik via llvm-commits
• [llvm] [RISCV][NFC] Simplify Imm range checks (PR #170497)   Piotr Fusik via llvm-commits
• [llvm] [RISCV][NFC] Simplify Imm range checks (PR #170497)   Piotr Fusik via llvm-commits
• [llvm] [RISCV][NFC] Simplify Imm range checks (PR #170497)   Piotr Fusik via llvm-commits
• [llvm] [RISCV] Select (and (shl X, 8), 0xff00) -> (packh zero, X) (PR #170654)   Piotr Fusik via llvm-commits
• [clang] [llvm] [CodeGen][KCFI] Allow setting type hash from xxHash64 to FNV-1a (PR #167254)   Pranav Kant via llvm-commits
• [llvm] [AMDGPU][NPM] Preserve analyses in AMDGPURewriteAGPRCopyMFMA for NPM (PR #170130)   Prasoon Mishra via llvm-commits
• [llvm] [AMDGPU][NPM] Preserve analyses in AMDGPURewriteAGPRCopyMFMA for NPM (PR #170130)   Prasoon Mishra via llvm-commits
• [llvm] [AMDGPU][NPM] Preserve analyses in AMDGPURewriteAGPRCopyMFMA for NPM (PR #170130)   Prasoon Mishra via llvm-commits
• [llvm] [PHIElimination] Declare MachineLoopInfo dependency for Legacy PM (PR #169693)   Prasoon Mishra via llvm-commits
• [llvm] [TableGen] Gracefully error out in ParseTreePattern when DAG has zero operands so that llvm-tblgen doesn't crash (PR #161417)   Prerona Chaudhuri via llvm-commits
• [llvm] [TableGen] Gracefully error out in ParseTreePattern when DAG has zero operands so that llvm-tblgen doesn't crash (PR #161417)   Prerona Chaudhuri via llvm-commits
• [llvm] [TableGen] Gracefully error out in ParseTreePattern when DAG has zero operands so that llvm-tblgen doesn't crash (PR #161417)   Prerona Chaudhuri via llvm-commits
• [llvm] [TableGen] Gracefully error out in ParseTreePattern when DAG has zero operands so that llvm-tblgen doesn't crash (PR #161417)   Prerona Chaudhuri via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Priyanshu Kumar via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Priyanshu Kumar via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Priyanshu Kumar via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Priyanshu Kumar via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Priyanshu Kumar via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Priyanshu Kumar via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Priyanshu Kumar via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Priyanshu Kumar via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Priyanshu Kumar via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Priyanshu Kumar via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Priyanshu Kumar via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Priyanshu Kumar via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Priyanshu Kumar via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Priyanshu Kumar via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Priyanshu Kumar via llvm-commits
• [clang] [llvm] [CIR][X86] Implement lowering for sqrt builtins (PR #169310)   Priyanshu Kumar via llvm-commits
• [clang] [llvm] [mlir] [WIP][CUDA] update default CUDA sm ver to 75 (PR #170679)   Rafał Rudnicki via llvm-commits
• [clang] [llvm] [mlir] [WIP][CUDA] update default CUDA sm ver to 75 (PR #170679)   Rafał Rudnicki via llvm-commits
• [llvm] Adding Matching and Inference Functionality to Propeller-PR4: Implement matching and inference and create clusters (PR #167622)   Rahman Lavaee via llvm-commits
• [llvm] Adding Matching and Inference Functionality to Propeller-PR4: Implement matching and inference and create clusters (PR #167622)   Rahman Lavaee via llvm-commits
• [llvm] Adding Matching and Inference Functionality to Propeller-PR4: Implement matching and inference and create clusters (PR #167622)   Rahman Lavaee via llvm-commits
• [llvm] Insert symbols for prefetch targets read from basic blocks section profile. (PR #168439)   Rahman Lavaee via llvm-commits
• [llvm] Insert symbols for prefetch targets read from basic blocks section profile. (PR #168439)   Rahman Lavaee via llvm-commits
• [llvm] [LLVM] Add support for printing and parsing symbolic address spaces (PR #169422)   Rahul Joshi via llvm-commits
• [llvm] [LLVM] Add support for printing and parsing symbolic address spaces (PR #169422)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM] Namespace cleanup in ScalarEvolution (PR #166620)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM] Namespace cleanup in ScalarEvolution (PR #166620)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][IR] Add support for address space names in DataLayout (PR #170559)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][IR] Add support for address space names in DataLayout (PR #170559)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][IR] Add support for address space names in DataLayout (PR #170559)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][IR] Add support for address space names in DataLayout (PR #170559)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][IR] Add support for address space names in DataLayout (PR #170559)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][IR] Add support for address space names in DataLayout (PR #170559)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][IR] Add support for address space names in DataLayout (PR #170559)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][IR] Add support for address space names in DataLayout (PR #170559)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][IR] Add support for address space names in DataLayout (PR #170559)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][IR] Add support for address space names in DataLayout (PR #170559)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][IR] Add support for address space names in DataLayout (PR #170559)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM] Minor code cleanup in DebugLoc (PR #170757)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM] Minor code cleanup in DebugLoc (PR #170757)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM] Minor code cleanup in DebugLoc (PR #170757)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][IR] Add support for address space names in DataLayout (PR #170559)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][IR] Add support for address space names in DataLayout (PR #170559)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM] Minor code cleanup in DebugLoc (PR #170757)   Rahul Joshi via llvm-commits
• [compiler-rt] [SPARC][builtins] Add sparcv9 arch name for 32-bit SPARC (PR #170133)   Rainer Orth via llvm-commits
• [compiler-rt] [SPARC][builtins] Add sparcv9 arch name for 32-bit SPARC (PR #170133)   Rainer Orth via llvm-commits
• [compiler-rt] [SPARC][builtins] Add sparcv9 arch name for 32-bit SPARC (PR #170133)   Rainer Orth via llvm-commits
• [llvm] [SPARC] Remove CCIfConsecutiveRegs for f128 returns (PR #170133)   Rainer Orth via llvm-commits
• [llvm] [SPARC] Remove CCIfConsecutiveRegs for f128 returns (PR #170133)   Rainer Orth via llvm-commits
• [llvm] [LLVM][Intrinsics] Adds an API to automatically resolve overload types (PR #169007)   Rajat Bajpai via llvm-commits
• [llvm] [LLVM][Intrinsics] Adds an API to automatically resolve overload types (PR #169007)   Rajat Bajpai via llvm-commits
• [llvm] [PredicateInfo] Support `PredicateInfo` by adding `PHI` nodes that pick up info from created branch predicates (PR #151132)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [LangRef] make consequences of NaN rules for pow(i) more explicit (PR #170177)   Ralf Jung via llvm-commits
• [llvm] [LangRef] make consequences of NaN rules for pow(i) more explicit (PR #170177)   Ralf Jung via llvm-commits
• [llvm] [LangRef] make consequences of NaN rules for pow(i) more explicit (PR #170177)   Ralf Jung via llvm-commits
• [llvm] [LangRef] make consequences of NaN rules for pow(i) more explicit (PR #170177)   Ralf Jung via llvm-commits
• [llvm] [LangRef] make consequences of NaN rules for pow(i) more explicit (PR #170177)   Ralf Jung via llvm-commits
• [llvm] [LangRef] make consequences of NaN rules for pow(i) more explicit (PR #170177)   Ralf Jung via llvm-commits
• [llvm] [LangRef] make consequences of NaN rules for pow(i) more explicit (PR #170177)   Ralf Jung via llvm-commits
• [llvm] [LangRef] make consequences of NaN rules for pow(i) more explicit (PR #170177)   Ralf Jung via llvm-commits
• [llvm] [LangRef] make consequences of NaN rules for pow(i) more explicit (PR #170177)   Ralf Jung via llvm-commits
• [llvm] [LangRef] make consequences of NaN rules for pow(i) more explicit (PR #170177)   Ralf Jung via llvm-commits
• [llvm] [LangRef] make consequences of NaN rules for pow(i) more explicit (PR #170177)   Ralf Jung via llvm-commits
• [llvm] [LangRef] make consequences of NaN rules for pow(i) more explicit (PR #170177)   Ralf Jung via llvm-commits
• [llvm] [MapVector] Introduce {keys, values} iterator, use in VPlan (PR #169675)   Ramkumar Ramachandra via llvm-commits
• [llvm] [MapVector] Introduce {keys,values} iterators (PR #169675)   Ramkumar Ramachandra via llvm-commits
• [llvm] [MapVector] Introduce {keys,values} iterators (PR #169675)   Ramkumar Ramachandra via llvm-commits
• [llvm] [MapVector] Introduce {keys,values} iterators (PR #169675)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Improve code in VPInstruction::generate (NFC) (PR #169470)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Combine LiveIns fields into MapVector (NFC) (PR #170220)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorPointerRecipe (PR #168886)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorPointerRecipe (PR #168886)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use SCEV to prove non-aliasing for stores at different offsets. (PR #170347)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use SCEV to prove non-aliasing for stores at different offsets. (PR #170347)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use SCEV to prove non-aliasing for stores at different offsets. (PR #170347)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use SCEV to prove non-aliasing for stores at different offsets. (PR #170347)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use SCEV to prove non-aliasing for stores at different offsets. (PR #170347)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use SCEV to prove non-aliasing for stores at different offsets. (PR #170347)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use SCEV to prove non-aliasing for stores at different offsets. (PR #170347)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use SCEV to prove non-aliasing for stores at different offsets. (PR #170347)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use SCEV to prove non-aliasing for stores at different offsets. (PR #170347)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Consolidate logic for narrowToSingleScalars (NFCI) (PR #167360)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ISel] Introduce llvm.clmul intrinsic (PR #168731)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ISel] Introduce llvm.clmul intrinsic (PR #168731)   Ramkumar Ramachandra via llvm-commits
• [llvm] [DebugInfo][LoopVectorizer][NFC] Use unknown annotations for more instructions (PR #170522)   Ramkumar Ramachandra via llvm-commits
• [llvm] [DebugInfo][LoopVectorizer][NFC] Use unknown annotations for more instructions (PR #170522)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorPointerRecipe (PR #168886)   Ramkumar Ramachandra via llvm-commits
• [llvm] [DebugInfo][LoopVectorizer][NFC] Use unknown annotations for more instructions (PR #170522)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Consolidate logic for narrowToSingleScalars (NFCI) (PR #167360)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce vputils::getSingleScalarClone (PR #161667)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce vputils::getSingleScalarClone (PR #161667)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorPointerRecipe (PR #168886)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorPointerRecipe (PR #168886)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorPointerRecipe (PR #168886)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use nuw/nsw when computing {VF, VScale}xUF (PR #170710)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorPointerRecipe (PR #168886)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorPointerRecipe (PR #168886)   Ramkumar Ramachandra via llvm-commits
• [llvm] Revert [VPlan] Consolidate logic for narrowToSingleScalars (PR #170720)   Ramkumar Ramachandra via llvm-commits
• [llvm] Revert [VPlan] Consolidate logic for narrowToSingleScalars (PR #170720)   Ramkumar Ramachandra via llvm-commits
• [llvm] Revert [VPlan] Consolidate logic for narrowToSingleScalars (PR #170720)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorPointerRecipe (PR #168886)   Ramkumar Ramachandra via llvm-commits
• [llvm] [llvm-c] Deprecate functions working on the global context (PR #163979)   Reid Kleckner via llvm-commits
• [llvm] [IR] Fix User use-after-destroy by zapping in ~User (PR #170575)   Reid Kleckner via llvm-commits
• [llvm] [IR] Fix User use-after-destroy by zapping in ~User (PR #170575)   Reid Kleckner via llvm-commits
• [llvm] [IR] Fix User use-after-destroy by zapping in ~User (PR #170575)   Reid Kleckner via llvm-commits
• [llvm] [IR] Fix User use-after-destroy by zapping in ~User (PR #170575)   Reid Kleckner via llvm-commits
• [llvm] [llvm-mca][AArch64] Refactor Neoverse tests to split out common inputs (NFC) (PR #170324)   Ricardo Jesus via llvm-commits
• [llvm] [AArch64] Compare and branch set twice in Neoverse V1/N1 sched (NFC) (PR #170498)   Ricardo Jesus via llvm-commits
• [llvm] Add CMake configure preset building blocks (PR #170019)   Richard Thomson via llvm-commits
• [llvm] Add CMake configure preset building blocks (PR #170019)   Richard Thomson via llvm-commits
• [llvm] Add CMake configure preset building blocks (PR #170019)   Richard Thomson via llvm-commits
• [llvm] Add CMake configure preset building blocks (PR #170019)   Richard Thomson via llvm-commits
• [llvm] [openmp] Reland: [OpenMP] Implement omp_get_uid_from_device() / omp_get_device_from_uid() (PR #168554)   Robert Imschweiler via llvm-commits
• [llvm] [IR] Add CallBr intrinsics support (PR #133907)   Robert Imschweiler via llvm-commits
• [llvm] [openmp] Reland: [OpenMP] Implement omp_get_uid_from_device() / omp_get_device_from_uid() (PR #168554)   Robert Imschweiler via llvm-commits
• [llvm] [openmp] Reland: [OpenMP] Implement omp_get_uid_from_device() / omp_get_device_from_uid() (PR #168554)   Robert Imschweiler via llvm-commits
• [llvm] [NFC] Refactor TargetLowering::getTgtMemIntrinsic to take CallBase parameter (PR #170334)   Robert Imschweiler via llvm-commits
• [llvm] [NFC] Refactor TargetLowering::getTgtMemIntrinsic to take CallBase parameter (PR #170334)   Robert Imschweiler via llvm-commits
• [llvm] [IR] Add CallBr intrinsics support (PR #133907)   Robert Imschweiler via llvm-commits
• [llvm] [IR] Add CallBr intrinsics support (PR #133907)   Robert Imschweiler via llvm-commits
• [llvm] [IR] Add CallBr intrinsics support (PR #133907)   Robert Imschweiler via llvm-commits
• [llvm] [IR] Add CallBr intrinsics support (PR #133907)   Robert Imschweiler via llvm-commits
• [llvm] [IR] Add CallBr intrinsics support (PR #133907)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix / workaround amdgcn.kill/.unreachable lowering (PR #170639)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix / workaround amdgcn.kill/.unreachable lowering (PR #170639)   Robert Imschweiler via llvm-commits
• [llvm] AMDGPU: Avoid crashing on statepoint-like pseudoinstructions (PR #170657)   Robert Imschweiler via llvm-commits
• [llvm] AMDGPU: Avoid crashing on statepoint-like pseudoinstructions (PR #170657)   Robert Imschweiler via llvm-commits
• [llvm] AMDGPU: Avoid crashing on statepoint-like pseudoinstructions (PR #170657)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU][UnifyLoopExits] Fix duplicate succesor handling (PR #170759)   Robert Imschweiler via llvm-commits
• [llvm] [openmp] Reland: [OpenMP] Implement omp_get_uid_from_device() / omp_get_device_from_uid() (PR #168554)   Robert Imschweiler via llvm-commits
• [llvm] [docs] [RISCV] Update docs regarding RV32E/RV64E (PR #170707)   Robin Kastberg via llvm-commits
• [llvm] [docs] [RISCV] Update docs regarding RV32E/RV64E (PR #170707)   Robin Kastberg via llvm-commits
• [compiler-rt] [llvm] [MC/DC][Coverage] Enable profile correlation for MC/DC (PR #136437)   Roman Beliaev via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   Ruoyu Qiu via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   Ruoyu Qiu via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   Ruoyu Qiu via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   Ruoyu Qiu via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   Ruoyu Qiu via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   Ruoyu Qiu via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   Ruoyu Qiu via llvm-commits
• [llvm] [llvm-objdump] Add triple support to `mcpu=help` (PR #165661)   Ruoyu Qiu via llvm-commits
• [llvm] [llvm-objdump] Eliminate the dependency of `--mcpu=help` and `--mattr=help` on `-d` (PR #165661)   Ruoyu Qiu via llvm-commits
• [llvm] [llvm-objdump] Eliminate the dependency of `--mcpu=help` and `--mattr=help` on `-d` (PR #165661)   Ruoyu Qiu via llvm-commits
• [llvm] [llvm-objdump] Eliminate the dependency of `--mcpu=help` and `--mattr=help` on `-d` (PR #165661)   Ruoyu Qiu via llvm-commits
• [llvm] [llvm-objdump] Support --mcpu=help/--mattr=help without -d (PR #165661)   Ruoyu Qiu via llvm-commits
• [llvm] [llvm-objdump] Support --mcpu=help/--mattr=help without -d (PR #165661)   Ruoyu Qiu via llvm-commits
• [llvm] [llvm-objdump] Support --mcpu=help/--mattr=help without -d (PR #165661)   Ruoyu Qiu via llvm-commits
• [llvm] [llvm-objdump] Support --mcpu=help/--mattr=help without -d (PR #165661)   Ruoyu Qiu via llvm-commits
• [llvm] [llvm-objdump] Support --mcpu=help/--mattr=help without -d (PR #165661)   Ruoyu Qiu via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Ryan Buchner via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Ryan Buchner via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Ryan Buchner via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Ryan Buchner via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Ryan Buchner via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Ryan Buchner via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Ryan Buchner via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Ryan Buchner via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Ryan Buchner via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Ryan Buchner via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Ryan Buchner via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Ryan Buchner via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Ryan Buchner via llvm-commits
• [llvm] [llvm-readobj][MachO] Add support for CPU_TYPE_ARM64_32 (PR #170193)   Ryan Mansfield via llvm-commits
• [llvm] [llvm-readobj][MachO] Add support for CPU_TYPE_ARM64_32 (PR #170193)   Ryan Mansfield via llvm-commits
• [llvm] [AMDGPU] Add support for GFX12 expert scheduling mode 2 (PR #170319)   Ryan Mitchell via llvm-commits
• [llvm] [DA] Clean up unnecessary member function declarations (PR #170106)   Ryotaro Kasuga via llvm-commits
• [llvm] [Delinearization] Add test for inferred array size exceeds integer range (NFC) (PR #169048)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Clean up unnecessary member function declarations (PR #170106)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Clean up unnecessary member function declarations (PR #170106)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add tests for GCD MIV misses dependency due to overflow (NFC) (PR #169926)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Remove special handling for SCEVAddExpr in GCD MIV (PR #169927)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add overflow check when calculating Delta in GCD MIV (PR #169928)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add overflow check when calculating Delta in GCD MIV (PR #169928)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Remove special handling for SCEVAddExpr in GCD MIV (PR #169927)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Remove special handling for SCEVAddExpr in GCD MIV (PR #169927)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add overflow check when calculating Delta in GCD MIV (PR #169928)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Remove special handling for SCEVAddExpr in GCD MIV (PR #169927)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add overflow check when calculating Delta in GCD MIV (PR #169928)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Remove special handling for SCEVAddExpr in GCD MIV (PR #169927)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Remove special handling for SCEVAddExpr in GCD MIV (PR #169927)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Remove special handling for SCEVAddExpr in GCD MIV (PR #169927)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add tests for nsw doesn't hold on entire iteration space (NFC) (PR #162281)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add tests for nsw doesn't hold on entire iteration space (NFC) (PR #162281)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add tests for nsw doesn't hold on entire iteration space (NFC) (PR #162281)   Ryotaro Kasuga via llvm-commits
• [llvm] [HEXAGON] [MachinePipeliner] Fix the DAG in case of dependent phis. (PR #135925)   Ryotaro Kasuga via llvm-commits
• [llvm] [HEXAGON] [MachinePipeliner] Fix the DAG in case of dependent phis. (PR #135925)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add tests for nsw doesn't hold on entire iteration space (NFC) (PR #162281)   Ryotaro Kasuga via llvm-commits
• [llvm] [Delinearization] Add validation for large size arrays (PR #169902)   Ryotaro Kasuga via llvm-commits
• [llvm] [Delinearization] Add validation for large size arrays (PR #169902)   Ryotaro Kasuga via llvm-commits
• [llvm] [Delinearization] Add validation for large size arrays (PR #169902)   Ryotaro Kasuga via llvm-commits
• [llvm] [Delinearization] Add validation for large size arrays (PR #169902)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add tests for nsw doesn't hold on entire iteration space (NFC) (PR #162281)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add tests for nsw doesn't hold on entire iteration space (NFC) (PR #162281)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add tests for nsw doesn't hold on entire iteration space (NFC) (PR #162281)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Fix typo: Constan -> Constant (NFC) (PR #170636)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Fix typo: Constan -> Constant (NFC) (PR #170636)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Fix typo: Constan -> Constant (NFC) (PR #170636)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Introduce domain for monotonicity (PR #170684)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add tests for nsw doesn't hold on entire iteration space (NFC) (PR #162281)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Introduce domain for monotonicity (PR #170684)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Introduce domain for monotonicity (PR #170684)   Ryotaro Kasuga via llvm-commits
• [llvm] [polly] [DA] Add batch delinearization support for improved precision (PR #170519)   Ryotaro Kasuga via llvm-commits
• [llvm] [polly] [DA] Add batch delinearization support for improved precision (PR #170519)   Ryotaro Kasuga via llvm-commits
• [llvm] [polly] [DA] Add batch delinearization support for improved precision (PR #170519)   Ryotaro Kasuga via llvm-commits
• [llvm] [polly] [DA] Add batch delinearization support for improved precision (PR #170519)   Ryotaro Kasuga via llvm-commits
• [llvm] [llvm] Issues found PVS studio static analyzer. LoopUnrollAndJam.cpp (PR #170162)   Ryotaro Kasuga via llvm-commits
• [llvm] [polly] [DA] Add batch delinearization support for improved precision (PR #170519)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] runtime predicates for delinearization bounds checks (PR #170713)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] runtime predicates for delinearization bounds checks (PR #170713)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] runtime predicates for delinearization bounds checks (PR #170713)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Use ScalarEvolution::isKnownPredicate (PR #170919)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Use ScalarEvolution::isKnownPredicate (PR #170919)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Use ScalarEvolution::isKnownPredicate (PR #170919)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Use ScalarEvolution::isKnownPredicate (PR #170919)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Use ScalarEvolution::isKnownPredicate (PR #170919)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] runtime predicates for delinearization bounds checks (PR #170713)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Use ScalarEvolution::isKnownPredicate (PR #170919)   Ryotaro Kasuga via llvm-commits
• [llvm] Refactoring llvm-ir2vec.cpp for better separation of concerns in the Tooling classes (PR #170078)   S. VenkataKeerthy via llvm-commits
• [llvm] Refactoring llvm-ir2vec.cpp for better separation of concerns in the Tooling classes (PR #170078)   S. VenkataKeerthy via llvm-commits
• [llvm] Refactoring llvm-ir2vec.cpp for better separation of concerns in the Tooling classes (PR #170078)   S. VenkataKeerthy via llvm-commits
• [llvm] Refactoring llvm-ir2vec.cpp for better separation of concerns in the Tooling classes (PR #170078)   S. VenkataKeerthy via llvm-commits
• [llvm] Refactoring llvm-ir2vec.cpp for better separation of concerns in the Tooling classes (PR #170078)   S. VenkataKeerthy via llvm-commits
• [llvm] Refactoring llvm-ir2vec.cpp for better separation of concerns in the Tooling classes (PR #170078)   S. VenkataKeerthy via llvm-commits
• [llvm] Refactoring llvm-ir2vec.cpp for better separation of concerns in the Tooling classes (PR #170078)   S. VenkataKeerthy via llvm-commits
• [llvm] Refactoring llvm-ir2vec.cpp for better separation of concerns in the Tooling classes (PR #170078)   S. VenkataKeerthy via llvm-commits
• [llvm] Refactoring llvm-ir2vec.cpp for better separation of concerns in the Tooling classes (PR #170078)   S. VenkataKeerthy via llvm-commits
• [llvm] Refactoring llvm-ir2vec.cpp for better separation of concerns in the Tooling classes (PR #170078)   S. VenkataKeerthy via llvm-commits
• [llvm] Refactoring llvm-ir2vec.cpp for better separation of concerns in the Tooling classes (PR #170078)   S. VenkataKeerthy via llvm-commits
• [llvm] Refactoring llvm-ir2vec.cpp for better separation of concerns in the Tooling classes (PR #170078)   S. VenkataKeerthy via llvm-commits
• [llvm] Refactoring llvm-ir2vec.cpp for better separation of concerns in the Tooling classes (PR #170078)   S. VenkataKeerthy via llvm-commits
• [llvm] Refactoring llvm-ir2vec.cpp for better separation of concerns in the Tooling classes (PR #170078)   S. VenkataKeerthy via llvm-commits
• [llvm] Refactoring llvm-ir2vec.cpp for better separation of concerns in the Tooling classes (PR #170078)   S. VenkataKeerthy via llvm-commits
• [llvm] Refactoring llvm-ir2vec.cpp for better separation of concerns in the Tooling classes (PR #170078)   S. VenkataKeerthy via llvm-commits
• [llvm] Refactoring llvm-ir2vec.cpp for better separation of concerns in the Tooling classes (PR #170078)   S. VenkataKeerthy via llvm-commits
• [llvm] Refactoring llvm-ir2vec.cpp for better separation of concerns in the Tooling classes (PR #170078)   S. VenkataKeerthy via llvm-commits
• [llvm] Refactoring llvm-ir2vec.cpp for better separation of concerns in the Tooling classes (PR #170078)   S. VenkataKeerthy via llvm-commits
• [llvm] Refactoring llvm-ir2vec.cpp for better separation of concerns in the Tooling classes (PR #170078)   S. VenkataKeerthy via llvm-commits
• [compiler-rt] [scudo] Add time of last page release to getStats() (PR #164004)   Sadaf Ebrahimi via llvm-commits
• [compiler-rt] [scudo] Add last release time info to getStats (PR #166456)   Sadaf Ebrahimi via llvm-commits
• [clang] [llvm] CodeGen: Add LibcallLoweringInfo analysis pass (PR #168622)   Saleem Abdulrasool via llvm-commits
• [lldb] [llvm] [lldb][windows] add Windows Virtual Console support (PR #168729)   Saleem Abdulrasool via llvm-commits
• [lldb] [llvm] [lldb][windows] add Windows Virtual Console support (PR #168729)   Saleem Abdulrasool via llvm-commits
• [llvm] Build win release packages with LLDB_ENABLE_LIBXML2 (PR #170513)   Saleem Abdulrasool via llvm-commits
• [llvm] Build win release packages with LLDB_ENABLE_LIBXML2 (PR #170513)   Saleem Abdulrasool via llvm-commits
• [llvm] [Support][Windows] disk_space handle unicode paths (PR #170716)   Saleem Abdulrasool via llvm-commits
• [llvm] [RISCV] Rename SFB Base Feature (PR #169607)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Make RISCVInstrInfo::verifyInstruction stricter for immediate-only operands (PR #170736)   Sam Elliott via llvm-commits
• [llvm] [docs] [RISCV] Update docs regarding RV32E/RV64E (PR #170707)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Correct the register class for the VL op check in RISCVInstrInfo::verifyInstruction. (PR #170751)   Sam Elliott via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #163142)   Sam Elliott via llvm-commits
• [llvm] [RISCV][docs] Update url for SpacemiT xsmtvdot (PR #170598)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Use Zilsd Pseudos in ISel (PR #169580)   Sam Elliott via llvm-commits
• [clang] [llvm] [RISCV] Add Svrsw60t59b extension (PR #132321)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Introduce a new tune feature string syntax and its parser (PR #168160)   Sam Elliott via llvm-commits
• [clang] [llvm] [RISCV] Add Svrsw60t59b extension (PR #132321)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Introduce a new tune feature string syntax and its parser (PR #168160)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Introduce a new tune feature string syntax and its parser (PR #168160)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Refactor some code in RISCVMergeBaseOffset.NFC (PR #170839)   Sam Elliott via llvm-commits
• [lld] [lld][docs] Document two linker-script related options for lld ELF (PR #166313)   Sam Elliott via llvm-commits
• [lld] [lld][docs] Document two linker-script related options for lld ELF (PR #166313)   Sam Elliott via llvm-commits
• [llvm] [CodeGen] Replace (Min,Max)CSFrameIndex with flag on frame object [NFCI] (PR #170905)   Sam Elliott via llvm-commits
• [llvm] [CodeGen] Replace (Min,Max)CSFrameIndex with flag on frame object [NFCI] (PR #170905)   Sam Elliott via llvm-commits
• [llvm] [CodeGen] Replace (Min,Max)CSFrameIndex with flag on frame object [NFCI] (PR #170905)   Sam Elliott via llvm-commits
• [llvm] [docs] [RISCV] Update docs regarding RV32E/RV64E (PR #170707)   Sam Elliott via llvm-commits
• [llvm] [docs] [RISCV] Update docs regarding RV32E/RV64E (PR #170707)   Sam Elliott via llvm-commits
• [lld] [lld][docs] Document two linker-script related options for lld ELF (PR #166313)   Sam Elliott via llvm-commits
• [llvm] 2024d67 - [NFC][AMDGPU] modify lit test to use update_llc_test_checks   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AArch64] Improve select dagcombine (PR #169925)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Improve select dagcombine (PR #169925)   Sander de Smalen via llvm-commits
• [llvm] [RegisterCoalescer] The COPY with the implicit-def of super register is not coalescable. (PR #169997)   Sander de Smalen via llvm-commits
• [llvm] [RegisterCoalescer] The COPY with the implicit-def of super register is not coalescable. (PR #169997)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Lower memchr to __arm_sc_memchr in streaming[-compatible] functions (PR #168896)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Avoid clobbering X0 in the MachineSMEABIPass (PR #170131)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Avoid clobbering X0 in the MachineSMEABIPass (PR #170131)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Avoid clobbering X0 in the MachineSMEABIPass (PR #170131)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)   Sander de Smalen via llvm-commits
• [llvm] [LV] Transform to handle exits in the scalar loop (PR #148626)   Sander de Smalen via llvm-commits
• [llvm] [LV] Transform to handle exits in the scalar loop (PR #148626)   Sander de Smalen via llvm-commits
• [llvm] [LV] Transform to handle exits in the scalar loop (PR #148626)   Sander de Smalen via llvm-commits
• [llvm] [LV] Transform to handle exits in the scalar loop (PR #148626)   Sander de Smalen via llvm-commits
• [llvm] [LV] Transform to handle exits in the scalar loop (PR #148626)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Add pass remarks to the MachineSMEABIPass (PR #170277)   Sander de Smalen via llvm-commits
• [clang] [llvm] [HLSL] Implement ddx and ddy HLSL intrinsics (PR #168887)   Sarah Spall via llvm-commits
• [clang] [llvm] [HLSL] Implement ddx and ddy HLSL intrinsics (PR #168887)   Sarah Spall via llvm-commits
• [clang] [llvm] [HLSL] Implement ddx/ddy_fine intrinsics (PR #168874)   Sarah Spall via llvm-commits
• [llvm] [ConstantFolding] Constant fold nextafter and nexttoward (PR #168794)   Sayan Sivakumaran via llvm-commits
• [llvm] Reapply "[MC] Use a variant to hold MCCFIInstruction state (NFC)" (PR #170342)   Scott Linder via llvm-commits
• [llvm] Reapply "[MC] Use a variant to hold MCCFIInstruction state (NFC)" (PR #170342)   Scott Linder via llvm-commits
• [llvm] [MsgPack] Use JSON schema boolean resolution rules (PR #170561)   Scott Linder via llvm-commits
• [llvm] [MsgPack] Use JSON schema boolean resolution rules (PR #170561)   Scott Linder via llvm-commits
• [llvm] Fix VarArgs FixedStack object on AIX. (PR #170240)   Sean Fertile via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Specify correct ABI alignment for double (PR #144673)   Sean Fertile via llvm-commits
• [llvm] XCOFF associated metadata (PR #159096)   Sean Fertile via llvm-commits
• [llvm] XCOFF associated metadata (PR #159096)   Sean Fertile via llvm-commits
• [llvm] XCOFF associated metadata (PR #159096)   Sean Fertile via llvm-commits
• [clang] [compiler-rt] [llvm] [AIX] Implement the ifunc attribute. (PR #153049)   Sean Fertile via llvm-commits
• [llvm] [AMDGPU] Allow negative offsets in scratch instructions (PR #166979)   Sebastian Neubauer via llvm-commits
• [llvm] [DA] add testcases for bug #148435 (PR #154980)   Sebastian Pop via llvm-commits
• [llvm] [DA] add testcases for bug #148435 (PR #154980)   Sebastian Pop via llvm-commits
• [llvm] [DA] Fix zero coeff bug in Strong SIV test with runtime assumptions (#149991) (PR #155037)   Sebastian Pop via llvm-commits
• [llvm] [DA] Add batch delinearization support for improved precision (PR #170519)   Sebastian Pop via llvm-commits
• [llvm] [DA] Cache delinearization results. NFCI. (PR #164379)   Sebastian Pop via llvm-commits
• [llvm] [DA] Add batch delinearization support for improved precision (PR #170519)   Sebastian Pop via llvm-commits
• [llvm] [polly] [delinearize] use SCEV exprs in getIndexExpressionsFromGEP (PR #162888)   Sebastian Pop via llvm-commits
• [llvm] [polly] [delinearize] use SCEV exprs in getIndexExpressionsFromGEP (PR #162888)   Sebastian Pop via llvm-commits
• [llvm] [polly] [DA] Add batch delinearization support for improved precision (PR #170519)   Sebastian Pop via llvm-commits
• [llvm] [delinearize] clear Subscripts and Sizes vectors (NFC) (PR #156495)   Sebastian Pop via llvm-commits
• [llvm] [delinearize] clear Subscripts and Sizes vectors (NFC) (PR #156495)   Sebastian Pop via llvm-commits
• [llvm] [polly] [delinearize] use SCEV exprs in getIndexExpressionsFromGEP (PR #162888)   Sebastian Pop via llvm-commits
• [llvm] [delinearize] clear Subscripts and Sizes vectors (NFC) (PR #156495)   Sebastian Pop via llvm-commits
• [llvm] [DA] runtime predicates for delinearization bounds checks (PR #170713)   Sebastian Pop via llvm-commits
• [llvm] [DA] runtime predicates for delinearization bounds checks (PR #170713)   Sebastian Pop via llvm-commits
• [llvm] [DA] runtime predicates for delinearization bounds checks (PR #170713)   Sebastian Pop via llvm-commits
• [llvm] [DA] runtime predicates for delinearization bounds checks (PR #170713)   Sebastian Pop via llvm-commits
• [llvm] [DA] runtime predicates for delinearization bounds checks (PR #170713)   Sebastian Pop via llvm-commits
• [llvm] [DA] runtime predicates for delinearization bounds checks (PR #170713)   Sebastian Pop via llvm-commits
• [llvm] [polly] [DA] Add batch delinearization support for improved precision (PR #170519)   Sebastian Pop via llvm-commits
• [llvm] [DA] Add batch delinearization support for improved precision (PR #170519)   Sebastian Pop via llvm-commits
• [llvm] [DA] Add batch delinearization support for improved precision (PR #170519)   Sebastian Pop via llvm-commits
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• [llvm] [DA] batch delinearization (PR #170519)   Sebastian Pop via llvm-commits
• [clang] [llvm] Minimal support of floating-point operand bundles (PR #135658)   Serge Pavlov via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) (PR #155107)   Serge Pavlov via llvm-commits
• [clang] [llvm] Minimal support of floating-point operand bundles (PR #135658)   Serge Pavlov via llvm-commits
• [clang] [llvm] Minimal support of floating-point operand bundles (PR #135658)   Serge Pavlov via llvm-commits
• [clang] [llvm] Minimal support of floating-point operand bundles (PR #135658)   Serge Pavlov via llvm-commits
• [llvm] [SPARC][NFC] Update optcompare test that always returns false (PR #170025)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen] CodeGenInstAlias: reduce calls to isSubClassOf. NFCI (PR #170767)   Sergei Barannikov via llvm-commits
• [llvm] [DataLayout] Add byte specification (PR #106536)   Sergei Barannikov via llvm-commits
• [libcxx] [llvm] [libc++] Add support for picolibc and newlib in RUNTIMES_USE_LIBC (PR #147956)   Sergei Barannikov via llvm-commits
• [llvm] [Hexagon] Add an option to use fast FP to int convert for some HVX cases (PR #169562)   Sergei Larin via llvm-commits
• [llvm] [Hexagon] Passes for widening vector operations and shuffle opt (PR #169559)   Sergei Larin via llvm-commits
• [llvm] [Hexagon] Add an option to use fast FP to int convert for some HVX cases (PR #169562)   Sergei Larin via llvm-commits
• [llvm] [Hexagon] Passes for widening vector operations and shuffle opt (PR #169559)   Sergei Larin via llvm-commits
• [llvm] [Hexagon] Fix HWBF16 PatLeaf type (PR #170560)   Sergei Larin via llvm-commits
• [llvm] [Hexagon] Add HVX patterns for vector arithmetic (PR #170704)   Sergei Larin via llvm-commits
• [llvm] Introduction of typified section in ExtBinary format (PR #166553)   Sergey Shcherbinin via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   Sergey Shcherbinin via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   Sergey Shcherbinin via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   Sergey Shcherbinin via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   Sergey Shcherbinin via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   Sergey Shcherbinin via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   Sergey Shcherbinin via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   Sergey Shcherbinin via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   Sergey Shcherbinin via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   Sergey Shcherbinin via llvm-commits
• [llvm] [OPT] Fixes print-changed=dot-cfg for unnamed basic blocks. (PR #148582)   Shafik Yaghmour via llvm-commits
• [llvm] [ValueTracking] Enhance alignment propagation in computeKnownBits. (PR #166935)   Shamshura Egor via llvm-commits
• [llvm] [ValueTracking] Enhance alignment propagation in computeKnownBits. (PR #166935)   Shamshura Egor via llvm-commits
• [llvm] [ValueTracking] Enhance alignment propagation in computeKnownBits. (PR #166935)   Shamshura Egor via llvm-commits
• [llvm] [ValueTracking] Enhance alignment propagation in computeKnownBits. (PR #166935)   Shamshura Egor via llvm-commits
• [llvm] [ValueTracking] Enhance alignment propagation in computeKnownBits. (PR #166935)   Shamshura Egor via llvm-commits
• [llvm] [ValueTracking] Enhance alignment propagation in computeKnownBits. (PR #166935)   Shamshura Egor via llvm-commits
• [llvm] [ValueTracking] Enhance alignment propagation in computeKnownBits. (PR #166935)   Shamshura Egor via llvm-commits
• [llvm] [InferAlignment] Enhance alignment propagation for add(ptrtoint, const) pattern. (PR #166935)   Shamshura Egor via llvm-commits
• [llvm] [InferAlignment] Enhance alignment propagation for and(ptrtoint, const) pattern. (PR #166935)   Shamshura Egor via llvm-commits
• [llvm] [InferAlignment] Enhance alignment propagation for and(ptrtoint, const) pattern. (PR #166935)   Shamshura Egor via llvm-commits
• [llvm] [InferAlignment] Enhance alignment propagation for and(ptrtoint, const) pattern. (PR #166935)   Shamshura Egor via llvm-commits
• [llvm] [Exegesis][RISCV] Support C_LDSP for llvm-exegesis (PR #169660)   Shaoce SUN via llvm-commits
• [llvm] [Exegesis][RISCV] Support C_LDSP for llvm-exegesis (PR #169660)   Shaoce SUN via llvm-commits
• [llvm] [Exegesis][RISCV] Support C_LDSP for llvm-exegesis (PR #169660)   Shaoce SUN via llvm-commits
• [llvm] [Exegesis][RISCV] Support C_LDSP for llvm-exegesis (PR #169660)   Shaoce SUN via llvm-commits
• [llvm] [Exegesis][RISCV] Support C_LDSP for llvm-exegesis (PR #169660)   Shaoce SUN via llvm-commits
• [llvm] [X86] EltsFromConsecutiveLoads - recognise reverse load patterns. (PR #168706)   Sharjeel Khan via llvm-commits
• [llvm] [X86][APX] Add pattern for zext(X86setcc ..) -> SETZUCCr (PR #170806)   Shengchen Kan via llvm-commits
• [llvm] [X86][APX] Add pattern for zext(X86setcc ..) -> SETZUCCr (PR #170806)   Shengchen Kan via llvm-commits
• [llvm] [TTI] Remove masked/gather-scatter/strided/expand-compress costing from TTIImpl (PR #169885)   Shih-Po Hung via llvm-commits
• [llvm] [TTI] Use MemIntrinsicCostAttributes for getGatherScatterOpCost (PR #168650)   Shih-Po Hung via llvm-commits
• [llvm] [TTI] Use MemIntrinsicCostAttributes for getGatherScatterOpCost (PR #168650)   Shih-Po Hung via llvm-commits
• [llvm] [TTI] Use MemIntrinsicCostAttributes for getGatherScatterOpCost (PR #168650)   Shih-Po Hung via llvm-commits
• [llvm] [Hexagon][NFC] Drop no-op getMaskedMemoryOpCost/getGatherScatterOpCost stubs (PR #170426)   Shih-Po Hung via llvm-commits
• [llvm] [TTI] Use MemIntrinsicCostAttributes for getStridedOpCost (PR #170436)   Shih-Po Hung via llvm-commits
• [llvm] [TTI] Use MemIntrinsicCostAttributes for getStridedOpCost (PR #170436)   Shih-Po Hung via llvm-commits
• [llvm] [TTI] Use MemIntrinsicCostAttributes for getStridedOpCost (PR #170436)   Shih-Po Hung via llvm-commits
• [llvm] [TTI] Remove masked/gather-scatter/strided/expand-compress costing from TTIImpl (PR #169885)   Shih-Po Hung via llvm-commits
• [llvm] [TTI] Remove masked/gather-scatter/strided/expand-compress costing from TTIImpl (PR #169885)   Shih-Po Hung via llvm-commits
• [llvm] [TTI] Remove masked/gather-scatter/strided/expand-compress costing from TTIImpl (PR #169885)   Shih-Po Hung via llvm-commits
• [llvm] [TTI] Remove masked/gather-scatter/strided/expand-compress costing from TTIImpl (PR #169885)   Shih-Po Hung via llvm-commits
• [llvm] [TTI] Remove masked/gather-scatter/strided/expand-compress costing from TTIImpl (PR #169885)   Shih-Po Hung via llvm-commits
• [llvm] [VPlan] Support struct return types for widen intrinsics (NFC). (PR #165218)   Shih-Po Hung via llvm-commits
• [llvm] [TTI] Use MemIntrinsicCostAttributes for getStridedOpCost (PR #170436)   Shih-Po Hung via llvm-commits
• [llvm] [TTI] Use MemIntrinsicCostAttributes for getStridedOpCost (PR #170436)   Shih-Po Hung via llvm-commits
• [llvm] [Hexagon][NFC] Drop no-op getMaskedMemoryOpCost/getGatherScatterOpCost stubs (PR #170426)   Shih-Po Hung via llvm-commits
• [llvm] [TTI] Use MemIntrinsicCostAttributes for getStridedOpCost (PR #170436)   Shih-Po Hung via llvm-commits
• [llvm] [TTI] Use MemIntrinsicCostAttributes for getStridedOpCost (PR #170436)   Shih-Po Hung via llvm-commits
• [llvm] [TTI] Use MemIntrinsicCostAttributes for getStridedOpCost (PR #170436)   Shih-Po Hung via llvm-commits
• [llvm] [TTI] Use MemIntrinsicCostAttributes for getStridedOpCost (PR #170436)   Shih-Po Hung via llvm-commits
• [llvm] [TTI] Remove masked/gather-scatter/strided/expand-compress costing from TTIImpl (PR #169885)   Shih-Po Hung via llvm-commits
• [llvm] [TTI] Remove masked/gather-scatter/strided/expand-compress costing from TTIImpl (PR #169885)   Shih-Po Hung via llvm-commits
• [llvm] [TTI] Remove masked/gather-scatter/strided/expand-compress costing from TTIImpl (PR #169885)   Shih-Po Hung via llvm-commits
• [llvm] [VPlan] Fix opcode in LoadStore EVL recipe (PR #170594)   Shih-Po Hung via llvm-commits
• [llvm] [VPlan] Fix opcode in LoadStore EVL recipe (PR #170594)   Shih-Po Hung via llvm-commits
• [llvm] [VPlan] Fix opcode in LoadStore EVL recipe (PR #170594)   Shih-Po Hung via llvm-commits
• [llvm] [VPlan] Fix opcode in LoadStore EVL recipe (PR #170594)   Shih-Po Hung via llvm-commits
• [llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)   Shih-Po Hung via llvm-commits
• [llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)   Shih-Po Hung via llvm-commits
• [llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)   Shih-Po Hung via llvm-commits
• [llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)   Shih-Po Hung via llvm-commits
• [llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)   Shih-Po Hung via llvm-commits
• [llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)   Shih-Po Hung via llvm-commits
• [llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)   Shih-Po Hung via llvm-commits
• [llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)   Shih-Po Hung via llvm-commits
• [llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)   Shih-Po Hung via llvm-commits
• [llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)   Shih-Po Hung via llvm-commits
• [llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)   Shih-Po Hung via llvm-commits
• [llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)   Shih-Po Hung via llvm-commits
• [llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)   Shih-Po Hung via llvm-commits
• [llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)   Shih-Po Hung via llvm-commits
• [llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)   Shih-Po Hung via llvm-commits
• [llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)   Shih-Po Hung via llvm-commits
• [clang] [llvm] [Offload][Tests] Non-contiguous_update_to_tests (PR #169623)   Shilei Tian via llvm-commits
• [clang] [llvm] [Offload][Tests] Non-contiguous_update_to_tests (PR #169623)   Shilei Tian via llvm-commits
• [clang] [llvm] [Offload][Tests] Non-contiguous_update_to_tests (PR #169623)   Shilei Tian via llvm-commits
• [clang] [llvm] [Offload][Tests] Non-contiguous_update_to_tests (PR #169623)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (PR #167372)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (PR #167372)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (PR #167372)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][NFC] Put gfx125x common features into 12_50_Common (PR #170338)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add scaffolding for ML focused scheduling strategy (PR #169616)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add scaffolding for ML focused scheduling strategy (PR #169616)   Shilei Tian via llvm-commits
• [llvm] dbb702f - [NFC][AMDGPU] Remove trailing white spaces in `AMDGPU.td`   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Handle phys regs in flat_scratch_base_hi operand check (PR #170395)   Shilei Tian via llvm-commits
• [clang] [llvm] [AMDGPU] Add s_wakeup_barrier instruction for gfx1250 (PR #170501)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add a RUN line to check VGPR MSBs for VOPD pairs (PR #170494)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Allow negative offsets in scratch instructions (PR #166979)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Allow negative offsets in scratch instructions (PR #166979)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Allow negative offsets in scratch instructions (PR #166979)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Allow negative offsets in scratch instructions (PR #166979)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Allow negative offsets in scratch instructions (PR #166979)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Allow negative offsets in scratch instructions (PR #166979)   Shilei Tian via llvm-commits
• [llvm] AMDGPU/PromoteAlloca: Extract getVectorTypeForAlloca helper (PR #170509)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Limit promoting allocas that have users with dynamic index above a threshold on number of elements (PR #170327)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix VGPR lowering for V_DUAL_FMAMK_F32 (PR #170567)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix VGPR lowering for V_DUAL_FMAMK_F32 (PR #170567)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix VGPR lowering for V_DUAL_FMAMK_F32 (PR #170567)   Shilei Tian via llvm-commits
• [llvm] AMDGPU: Fix broken exp10 lowering for f16 (PR #170582)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Allow negative offsets in scratch instructions (PR #166979)   Shilei Tian via llvm-commits
• [clang] [llvm] [AMDGPU] Apply alignment attr for make.buffer.rsrc (PR #166914)   Shilei Tian via llvm-commits
• [clang] [llvm] [AMDGPU] Apply alignment attr for make.buffer.rsrc (PR #166914)   Shilei Tian via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   Shilei Tian via llvm-commits
• [llvm] [NFC][OpenMP][Offload] Add tests for `use_device_ptr(fb_preserve/nullify)`. (PR #170948)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a crash when a bool variable is used in inline asm (PR #171004)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a crash when a bool variable is used in inline asm (PR #171004)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a crash when a bool variable is used in inline asm (PR #171004)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a crash when a bool variable is used in inline asm (PR #171004)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a crash when a bool variable is used in inline asm (PR #171004)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a crash when a bool variable is used in inline asm (PR #171004)   Shilei Tian via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] add clamp immediate operand to WMMA iu8 intrinsic (PR #171069)   Shilei Tian via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] add clamp immediate operand to WMMA iu8 intrinsic (PR #171069)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Enable i8 GEP promotion for vector allocas (PR #166132)   Shilei Tian via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] add clamp immediate operand to WMMA iu8 intrinsic (PR #171069)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions and keep track of instructions causing an Access (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions and keep track of instructions causing an Access (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions and keep track of instructions causing an Access (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions and keep track of instructions causing an Access (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions and keep track of instructions causing an Access (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions and keep track of instructions causing an Access (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions and keep track of instructions causing an Access (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions and keep track of instructions causing an Access (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions and keep track of instructions causing an Access (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions and keep track of instructions causing an Access (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions and keep track of instructions causing an Access (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions and keep track of instructions causing an Access (PR #72029)   Shilei Tian via llvm-commits
• [llvm] [SelectionDAG] Salvage debuginfo when combining load and sext instrs. (PR #169779)   Shubham Sandeep Rastogi via llvm-commits
• [llvm] [SROA] Unify the names of new instructions created in SROA. (PR #167917)   Shubham Sandeep Rastogi via llvm-commits
• [llvm] [SROA] Unify the names of new instructions created in SROA. (PR #167917)   Shubham Sandeep Rastogi via llvm-commits
• [llvm] [SelectionDAG] Salvage debuginfo when combining load and sext instrs. (PR #169779)   Shubham Sandeep Rastogi via llvm-commits
• [llvm] [SelectionDAG] Salvage debuginfo when combining load and sext instrs. (PR #169779)   Shubham Sandeep Rastogi via llvm-commits
• [llvm] [SelectionDAG] Salvage debuginfo when combining load and sext instrs. (PR #169779)   Shubham Sandeep Rastogi via llvm-commits
• [llvm] [SelectionDAG] Salvage debuginfo when combining load and sext instrs. (PR #169779)   Shubham Sandeep Rastogi via llvm-commits
• [llvm] [AArch64] Enable maximising scalable vector bandwidth (PR #166748)   Shunsuke Watanabe via llvm-commits
• [llvm] [SDAG] Disable illegal extract_subvector splitting for scalable vectors (PR #170315)   Shunsuke Watanabe via llvm-commits
• [llvm] [AArch64] Enable maximising scalable vector bandwidth (PR #166748)   Shunsuke Watanabe via llvm-commits
• [llvm] [AArch64] Enable maximising scalable vector bandwidth (PR #166748)   Shunsuke Watanabe via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (PR #165156)   Sietze Riemersma via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added WaveActiveProduct intrinsic #164385 (PR #165109)   Sietze Riemersma via llvm-commits
• [llvm] [SelectionDAG] Lowering usub.sat(a, 1) to a - (a != 0) (PR #170076)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Lowering usub.sat(a, 1) to a - (a != 0) (PR #170076)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold permute of intrinsics into intrinsic of permutes: shuffle(intrinsic, poison/undef) -> intrinsic(shuffle) (PR #170052)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [x86][AVX-VNNI] Fix VPDPWXXD Argument Types (PR #169456)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add tests showing failure to concat sqrt intrinsics together. (PR #170096)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add tests showing failure to concat RCPPS + RSQRPS intrinsics together. (PR #170098)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add tests showing failure to concat sqrt intrinsics together. (PR #170096)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add tests showing failure to concat RCPPS + RSQRPS intrinsics together. (PR #170098)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add tests showing failure to concat RCPPS + RSQRTPS intrinsics together. (PR #170098)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add tests showing failure to concat RCPPS + RSQRTPS intrinsics together. (PR #170098)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add tests showing failure to concat RCPPS + RSQRTPS intrinsics together. (PR #170098)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add tests showing failure to concat sqrt intrinsics together. (PR #170096)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add tests showing failure to concat RCPPS + RSQRTPS intrinsics together. (PR #170098)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add tests showing failure to concat fp rounding intrinsics together. (PR #170108)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add tests showing failure to concat fp rounding intrinsics together. (PR #170108)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add tests showing failure to concat fp rounding intrinsics together. (PR #170108)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - add handling to concat sqrt intrinsics together (PR #170113)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - add handling to concat sqrt intrinsics together (PR #170113)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - add handling to concat sqrt intrinsics together (PR #170113)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - add handling to concat RCPPS/RSQRTPS intrinsics together (PR #170148)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - add handling to concat RCPPS/RSQRTPS intrinsics together (PR #170148)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - add handling to concat RCPPS/RSQRTPS intrinsics together (PR #170148)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add test coverage for the concatenation of vXf64 sqrt intrinsics (PR #170158)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add test coverage for the concatenation of vXf64 sqrt intrinsics (PR #170158)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - add handling to concat fp rounding intrinsics together (PR #170160)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - add handling to concat fp rounding intrinsics together (PR #170160)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add test coverage for the concatenation of vXf64 sqrt intrinsics (PR #170158)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - add handling to concat fp rounding intrinsics together (PR #170160)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add test coverage for the concatenation of ISD::FROUND intrinsics (PR #170166)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add test coverage for the concatenation of ISD::FFLOOR intrinsics (PR #170168)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add test coverage for the concatenation of ISD::FFLOOR intrinsics (PR #170168)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add test coverage for the concatenation of ISD::FFLOOR intrinsics (PR #170168)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add test coverage for the concatenation of ISD::FROUND intrinsics (PR #170166)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add test coverage for the concatenation of ISD::FROUND intrinsics (PR #170166)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add test coverage for the concatenation of ISD::FROUND intrinsics (PR #170166)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add test coverage for the concatenation of ISD::FROUND intrinsics (PR #170166)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - add handling to concat ISD::FROUND/FFLOOR intrinsics together (PR #170176)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Recognise AVGFLOOR (((A >> 1) + (B >> 1)) + (A & B & 1)) patterns (PR #169644)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - add handling to concat ISD::FROUND/FFLOOR intrinsics together (PR #170176)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - add handling to concat ISD::FROUND/FFLOOR intrinsics together (PR #170176)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add tests showing failure to concat icmp instructions together. (PR #170210)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add tests showing failure to concat fcmp instructions together (PR #170313)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Recognise AVGFLOOR (((A >> 1) + (B >> 1)) + (A & B & 1)) patterns (PR #169644)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Recognise AVGFLOOR (((A >> 1) + (B >> 1)) + (A & B & 1)) patterns (PR #169644)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SDPatternMatch - Fix m_Reassociatable mismatching (PR #170061)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Lowering usub.sat(a, 1) to a - (a != 0) (PR #170076)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold permute of intrinsics into intrinsic of permutes: shuffle(intrinsic, poison/undef) -> intrinsic(shuffle) (PR #170052)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold permute of intrinsics into intrinsic of permutes: shuffle(intrinsic, poison/undef) -> intrinsic(shuffle) (PR #170052)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold permute of intrinsics into intrinsic of permutes: shuffle(intrinsic, poison/undef) -> intrinsic(shuffle) (PR #170052)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold permute of intrinsics into intrinsic of permutes: shuffle(intrinsic, poison/undef) -> intrinsic(shuffle) (PR #170052)   Simon Pilgrim via llvm-commits
• [llvm] [X86] optimize masked truncated saturating stores (PR #169827)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Enable float point math ops as copyables elements. (PR #169857)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Enable float point math ops as copyables elements. (PR #169857)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Enable float point math ops as copyables elements. (PR #169857)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Enable float point math ops as copyables elements. (PR #169857)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Enable float point math ops as copyables elements. (PR #169857)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Enable float point math ops as copyables elements. (PR #169857)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Enable float point math ops as copyables elements. (PR #169857)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine][X86] foldShuffleOfIntrinsics - provide the arguments to a getShuffleCost call (PR #170465)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine][X86] foldShuffleOfIntrinsics - provide the arguments to a getShuffleCost call (PR #170465)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold permute of intrinsics into intrinsic of permutes: shuffle(intrinsic, poison/undef) -> intrinsic(shuffle) (PR #170052)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine][X86] foldShuffleOfIntrinsics - provide the arguments to a getShuffleCost call (PR #170465)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [x86][AVX-VNNI] Fix VPDPWXXD Argument Types (PR #169456)   Simon Pilgrim via llvm-commits
• [llvm] DAG: Use more RTLIB helper functions for getting libcall from type (PR #170563)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combine-sub-usat.ll - add test coverage inspired by #170076 (PR #170681)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combine-sub-usat.ll - add test coverage inspired by #170076 (PR #170681)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Lowering usub.sat(a, 1) to a - (a != 0) (PR #170076)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combine-sub-usat.ll - add test coverage inspired by #170076 (PR #170681)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combine-sub-usat.ll - add test coverage inspired by #170076 (PR #170681)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combine-sub-usat.ll - add test coverage inspired by #170076 (PR #170681)   Simon Pilgrim via llvm-commits
• [llvm] [X86] EltsFromConsecutiveLoads - recognise reverse load patterns. (PR #168706)   Simon Pilgrim via llvm-commits
• [llvm] [X86] LowerShuffle - don't call canonicalizeShuffleMaskWithHorizOp if we could shuffle whole lanes (PR #170838)   Simon Pilgrim via llvm-commits
• [llvm] [X86] LowerShuffle - don't call canonicalizeShuffleMaskWithHorizOp if we could shuffle whole lanes (PR #170838)   Simon Pilgrim via llvm-commits
• [llvm] [X86] LowerShuffle - don't call canonicalizeShuffleMaskWithHorizOp if we could shuffle whole lanes (PR #170838)   Simon Pilgrim via llvm-commits
• [llvm] [X86] EltsFromConsecutiveLoads - recognise reverse load patterns. (PR #168706)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold permute of intrinsics into intrinsic of permutes: shuffle(intrinsic, poison/undef) -> intrinsic(shuffle) (PR #170052)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add EltsFromConsecutiveLoads test for infinite loop if we match reverse(vzload(ptr)) patterns (PR #170889)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add EltsFromConsecutiveLoads test for infinite loop if we match reverse(vzload(ptr)) patterns (PR #170889)   Simon Pilgrim via llvm-commits
• [llvm] [X86] EltsFromConsecutiveLoads - recognise reverse load patterns. (PR #168706)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add EltsFromConsecutiveLoads test for infinite loop if we match reverse(vzload(ptr)) patterns (PR #170889)   Simon Pilgrim via llvm-commits
• [llvm] [IR] Add ImplicitTrunc argument to ConstantInt::get() (PR #170865)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Recognise AVGFLOOR (((A >> 1) + (B >> 1)) + (A & B & 1)) patterns (PR #169644)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Lower CTTZ/CTLZ vXi8 vectors using GF2P8AFFINEQB (PR #118012)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Fix condition used for unsigned subtraction overflow (PR #170896)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [ARM] Introduce intrinsics for MVE minnm/maxnm under strict-fp. (PR #169795)   Simon Tatham via llvm-commits
• [clang] [llvm] [ARM] Introduce intrinsics for MVE minnm/maxnm under strict-fp. (PR #169795)   Simon Tatham via llvm-commits
• [libc] [llvm] Reland Refactor WIDE_READ to allow finer control over high-performance function selection (#165613) (PR #170738)   Simon Tatham via llvm-commits
• [llvm] [llvm-exegesis] Add AArch64 operand initializers, SetRegTo (PR #169912)   Simon Wallis via llvm-commits
• [llvm] [llvm-exegesis] Add AArch64 operand initializers, SetRegTo (PR #169912)   Simon Wallis via llvm-commits
• [llvm] [llvm-exegesis] Add AArch64 operand initializers, SetRegTo (PR #169912)   Simon Wallis via llvm-commits
• [llvm] [llvm-exegesis] Add AArch64 operand initializers, SetRegTo (PR #169912)   Simon Wallis via llvm-commits
• [llvm] [DA] runtime predicates for delinearization bounds checks (PR #170713)   Sjoerd Meijer via llvm-commits
• [llvm] [DA] runtime predicates for delinearization bounds checks (PR #170713)   Sjoerd Meijer via llvm-commits
• [llvm] [llvm-exegesis] Add AArch64 operand initializers, SetRegTo (PR #169912)   Sjoerd Meijer via llvm-commits
• [llvm] [DA] runtime predicates for delinearization bounds checks (PR #170713)   Sjoerd Meijer via llvm-commits
• [flang] [llvm] [flang] implement show_descriptor intrinsic, a non-standard extension (PR #169137)   Slava Zakharin via llvm-commits
• [flang] [llvm] [flang/flang-rt] Implement show_descriptor intrinsic, a non-standard extension. (PR #170389)   Slava Zakharin via llvm-commits
• [flang] [llvm] [flang/flang-rt] Implement show_descriptor intrinsic, a non-standard extension. (PR #170389)   Slava Zakharin via llvm-commits
• [flang] [llvm] [flang/flang-rt] Implement show_descriptor intrinsic, a non-standard extension. (PR #170389)   Slava Zakharin via llvm-commits
• [flang] [llvm] [flang/flang-rt] Implement show_descriptor intrinsic, a non-standard extension. (PR #170389)   Slava Zakharin via llvm-commits
• [llvm] [llvm-profgen][SPGO] Support profiles with multiple concurrent processes (PR #169353)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Add remarks for matched allocs and calls (PR #170379)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Add remarks for matched allocs and calls (PR #170379)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Add remarks for matched allocs and calls (PR #170379)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Add remarks for matched allocs and calls (PR #170379)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Add remarks for matched allocs and calls (PR #170379)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Add option to print function GUIDs during matching (PR #170946)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Add option to print function GUIDs during matching (PR #170946)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Add option to print function GUIDs during matching (PR #170946)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Add option to print function GUIDs during matching (PR #170946)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Add option to print function GUIDs during matching (PR #170946)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Merge all callee guids for indirect call VP metadata (PR #170964)   Snehasish Kumar via llvm-commits
• [llvm] [MLIR|BUILD]: Fix for 8ceeba838 (PR #170110)   Sohaib Iftikhar via llvm-commits
• [llvm] [MLIR|BUILD]: Fix for 8ceeba838 (PR #170110)   Sohaib Iftikhar via llvm-commits
• [llvm] [MLIR|BUILD]: Fix for 8ceeba838 (PR #170110)   Sohaib Iftikhar via llvm-commits
• [clang] [llvm] [clang][NVPTX] Add support for mixed-precision FP arithmetic (PR #168359)   Srinivasa Ravi via llvm-commits
• [clang] [llvm] [clang][NVPTX] Add support for mixed-precision FP arithmetic (PR #168359)   Srinivasa Ravi via llvm-commits
• [clang] [llvm] [clang][NVPTX] Add support for mixed-precision FP arithmetic (PR #168359)   Srinivasa Ravi via llvm-commits
• [clang] [llvm] [clang][NVPTX] Add support for mixed-precision FP arithmetic (PR #168359)   Srinivasa Ravi via llvm-commits
• [clang] [llvm] [clang][NVPTX] Add support for mixed-precision FP arithmetic (PR #168359)   Srinivasa Ravi via llvm-commits
• [clang] [llvm] [clang][NVPTX] Add support for mixed-precision FP arithmetic (PR #168359)   Srinivasa Ravi via llvm-commits
• [clang] [llvm] [clang][NVPTX] Add missing half-precision add/mul/fma intrinsics (PR #170079)   Srinivasa Ravi via llvm-commits
• [clang] [llvm] [clang][NVPTX] Add missing half-precision add/mul/fma intrinsics (PR #170079)   Srinivasa Ravi via llvm-commits
• [clang] [llvm] [clang][NVPTX] Add missing half-precision add/mul/fma intrinsics (PR #170079)   Srinivasa Ravi via llvm-commits
• [clang] [llvm] [clang][NVPTX] Add missing half-precision add/mul/fma intrinsics (PR #170079)   Srinivasa Ravi via llvm-commits
• [clang] [llvm] [clang][NVPTX] Add support for mixed-precision FP arithmetic (PR #168359)   Srinivasa Ravi via llvm-commits
• [clang] [llvm] [clang][NVPTX] Add support for mixed-precision FP arithmetic (PR #168359)   Srinivasa Ravi via llvm-commits
• [clang] [llvm] [clang][NVPTX] Add support for mixed-precision FP arithmetic (PR #168359)   Srinivasa Ravi via llvm-commits
• [llvm] [AMDGPU] Refactor hazard recognizer for VALU-pipeline hazards. NFCI. (PR #168801)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Refactor hazard recognizer for VALU-pipeline hazards. NFCI. (PR #168801)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Refactor hazard recognizer for VALU-pipeline hazards. NFCI. (PR #168801)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Refactor hazard recognizer for VALU-pipeline hazards. NFCI. (PR #168801)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Allow hazard checks for WMMA co-exec (PR #168805)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Allow hazard checks for WMMA co-exec (PR #168805)   Stanislav Mekhanoshin via llvm-commits
• [llvm] AMDGPU: Try to use zext to implement constant-32-bit addrspacecast (PR #168977)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Allow hazard checks for WMMA co-exec (PR #168805)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Prevent folding of flat_scr_base_hi into a 64-bit SALU (PR #170373)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU][NFC] Add occupancy checks for gfx950 and gfx1250 (PR #170392)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Prevent folding of flat_scr_base_hi into a 64-bit SALU (PR #170373)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Handle phys regs in flat_scratch_base_hi operand check (PR #170395)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Handle phys regs in flat_scratch_base_hi operand check (PR #170395)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Prevent folding of flat_scr_base_hi into a 64-bit SALU (PR #170373)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Handle phys regs in flat_scratch_base_hi operand check (PR #170395)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Prevent folding of flat_scr_base_hi into a 64-bit SALU (PR #170373)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Handle phys regs in flat_scratch_base_hi operand check (PR #170395)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Avoid undefs in hazard-gfx1250-flat-scr-hi.mir. NFC (PR #170396)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Avoid undefs in hazard-gfx1250-flat-scr-hi.mir. NFC (PR #170396)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Avoid undefs in hazard-gfx1250-flat-scr-hi.mir. NFC (PR #170396)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Avoid undefs in hazard-gfx1250-flat-scr-hi.mir. NFC (PR #170396)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Avoid undefs in hazard-gfx1250-flat-scr-hi.mir. NFC (PR #170396)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Prevent folding of flat_scr_base_hi into a 64-bit SALU (PR #170373)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add verifier for flat_scr_nase_hi read hazard (PR #170550)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add verifier for flat_scr_nase_hi read hazard (PR #170550)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add verifier for flat_scr_base_hi read hazard (PR #170550)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add verifier for flat_scr_base_hi read hazard (PR #170550)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Prevent folding of flat_scr_base_hi into a 64-bit SALU (PR #170373)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add verifier for flat_scr_base_hi read hazard (PR #170550)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add verifier for flat_scr_base_hi read hazard (PR #170550)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add verifier for flat_scr_base_hi read hazard (PR #170550)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add verifier for flat_scr_base_hi read hazard (PR #170550)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix VGPR lowering for V_DUAL_FMAMK_F32 (PR #170567)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix VGPR lowering for V_DUAL_FMAMK_F32 (PR #170567)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix VGPR lowering for V_DUAL_FMAMK_F32 (PR #170567)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix VGPR lowering for V_DUAL_FMAMK_F32 (PR #170567)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix VGPR lowering for V_DUAL_FMAMK_F32 (PR #170567)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add verifier for flat_scr_base_hi read hazard (PR #170550)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix VGPR lowering for V_DUAL_FMAMK_F32 (PR #170567)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix VGPR lowering for V_DUAL_FMAMK_F32 (PR #170567)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Improve VGPR lowering test around FMA[AK|MK]. NFC (PR #170633)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Improve VGPR lowering test around FMA[AK|MK]. NFC (PR #170633)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Improve VGPR lowering test around FMA[AK|MK]. NFC (PR #170633)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Improve VGPR lowering test around FMA[AK|MK]. NFC (PR #170633)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Improve VGPR lowering test around FMA[AK|MK]. NFC (PR #170633)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Improve VGPR lowering test around FMA[AK|MK]. NFC (PR #170633)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Improve VGPR lowering test. NFC (PR #170633)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix VGPR lowering for V_DUAL_FMAMK_F32 (PR #170567)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix VGPR lowering for V_DUAL_FMAMK_F32 (PR #170567)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Improve VGPR lowering test. NFC (PR #170633)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix VGPR lowering for V_DUAL_FMAMK_F32 (PR #170567)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add verifier for flat_scr_base_hi read hazard (PR #170550)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add verifier for flat_scr_base_hi read hazard (PR #170550)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add verifier for flat_scr_base_hi read hazard (PR #170550)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add verifier for flat_scr_base_hi read hazard (PR #170550)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add verifier for flat_scr_base_hi read hazard (PR #170550)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix .Lfunc_end label placement (PR #127549)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix .Lfunc_end label placement (PR #127549)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Switch to MF.estimateFunctionSizeInBytes() (PR #127246)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Switch to MF.estimateFunctionSizeInBytes() (PR #127246)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Disable VALU sinking and hoisting with WWM (PR #123124)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Disable VALU sinking and hoisting with WWM (PR #123124)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Allow lane-op lowering for some illegal types (PR #114887)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Allow lane-op lowering for some illegal types (PR #114887)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Wait on all LDS DMA operations when no aliasing store is found (PR #170660)   Stanislav Mekhanoshin via llvm-commits
• [llvm] Reland: [ORC] Tailor ELF debugger support plugin to load-address patching only (PR #169482)   Stefan Gränitz via llvm-commits
• [llvm] [lli] Honor --jit-linker-kind=rtdyld on platforms that default to jitlink (PR #167860)   Stefan Gränitz via llvm-commits
• [llvm] Remove LLVM_ABI from members of RuntimeLibraryAnalysis (NFC) (PR #170850)   Stefan Gränitz via llvm-commits
• [llvm] Remove LLVM_ABI from members of RuntimeLibraryAnalysis (NFC) (PR #170850)   Stefan Gränitz via llvm-commits
• [llvm] [AMDGPU] Add support for GFX12 expert scheduling mode 2 (PR #170319)   Stephen Thomas via llvm-commits
• [llvm] [llvm-dwarfdump][LineCov 1/3] Add variable coverage metrics (PR #169646)   Stephen Tozer via llvm-commits
• [llvm] [llvm-dwarfdump][LineCov 1/3] Add variable coverage metrics (PR #169646)   Stephen Tozer via llvm-commits
• [llvm] [llvm-dwarfdump][LineCov 1/3] Add variable coverage metrics (PR #169646)   Stephen Tozer via llvm-commits
• [llvm] [llvm-dwarfdump][LineCov 1/3] Add variable coverage metrics (PR #169646)   Stephen Tozer via llvm-commits
• [llvm] [llvm-dwarfdump][LineCov 1/3] Add variable coverage metrics (PR #169646)   Stephen Tozer via llvm-commits
• [llvm] [llvm-dwarfdump][LineCov 1/3] Add variable coverage metrics (PR #169646)   Stephen Tozer via llvm-commits
• [llvm] [llvm-dwarfdump][LineCov 1/3] Add variable coverage metrics (PR #169646)   Stephen Tozer via llvm-commits
• [llvm] [llvm-dwarfdump][LineCov 1/3] Add variable coverage metrics (PR #169646)   Stephen Tozer via llvm-commits
• [llvm] [llvm-dwarfdump][LineCov 1/3] Add variable coverage metrics (PR #169646)   Stephen Tozer via llvm-commits
• [llvm] [llvm-dwarfdump][LineCov 1/3] Add variable coverage metrics (PR #169646)   Stephen Tozer via llvm-commits
• [llvm] [lldb-dap] Add breakpoints after debugger initialization in DExTer (PR #169744)   Stephen Tozer via llvm-commits
• [llvm] [DebugInfo][LoopVectorizer][NFC] Use unknown annotations for more instructions (PR #170522)   Stephen Tozer via llvm-commits
• [llvm] [Dexter] Adjust launch sequencing to align closer with DAP spec (PR #170523)   Stephen Tozer via llvm-commits
• [llvm] [DebugInfo][LoopVectorizer][NFC] Use unknown annotations for more instructions (PR #170522)   Stephen Tozer via llvm-commits
• [llvm] [DebugInfo][LoopVectorizer][NFC] Use unknown annotations for more instructions (PR #170522)   Stephen Tozer via llvm-commits
• [llvm] [Dexter] Adjust launch sequencing to align closer with DAP spec (PR #170523)   Stephen Tozer via llvm-commits
• [llvm] [Dexter] Adjust launch sequencing to align closer with DAP spec (PR #170523)   Stephen Tozer via llvm-commits
• [llvm] [Dexter] Adjust launch sequencing to align closer with DAP spec (PR #170523)   Stephen Tozer via llvm-commits
• [llvm] [Dexter] Adjust launch sequencing to align closer with DAP spec (PR #170523)   Stephen Tozer via llvm-commits
• [llvm] [DebugInfo][LoopVectorizer][NFC] Use unknown annotations for more instructions (PR #170522)   Stephen Tozer via llvm-commits
• [llvm] [NFC][LLVM] Minor code cleanup in DebugLoc (PR #170757)   Stephen Tozer via llvm-commits
• [llvm] [SPIRV] Add legalization for long vectors (PR #169665)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Add legalization for long vectors (PR #169665)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Add legalization for long vectors (PR #169665)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Add legalization for long vectors (PR #169665)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Add legalization for long vectors (PR #169665)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Add legalization for long vectors (PR #169665)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Move ASSIGN_TYPE generation to PostLegalizer (PR #169696)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Move ASSIGN_TYPE generation to PostLegalizer (PR #169696)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Move ASSIGN_TYPE generation to PostLegalizer (PR #169696)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Add legalization for long vectors (PR #169665)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Move ASSIGN_TYPE generation to PostLegalizer (PR #169696)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][SPIR-V] Implement vk::location for inputs (PR #169479)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Move ASSIGN_TYPE generation to PostLegalizer (PR #169696)   Steven Perron via llvm-commits
• [llvm] [JumpThread] Fix `JumpThreading` pass to skip merging when both blocks contain convergence loop/entry intrinsics. (PR #170247)   Steven Perron via llvm-commits
• [llvm] [CAS] Temporarily skip tests on old windows version (PR #170063)   Steven Wu via llvm-commits
• [llvm] [CAS] Add UnifiedOnDiskCache and OnDiskCAS (PR #114103)   Steven Wu via llvm-commits
• [llvm] [CAS] Disable CASTests on Windows versions before windows 11 (PR #170420)   Steven Wu via llvm-commits
• [llvm] [CAS] Disable CASTests on Windows versions before windows 11 (PR #170420)   Steven Wu via llvm-commits
• [llvm] [CAS] Disable CASTests on Windows versions before windows 11 (PR #170420)   Steven Wu via llvm-commits
• [llvm] [CAS] Disable CASTests on Windows versions before windows 11 (PR #170420)   Steven Wu via llvm-commits
• [llvm] [CAS] Add UnifiedOnDiskCache and OnDiskCAS (PR #114103)   Steven Wu via llvm-commits
• [llvm] [SPIRV] Added Support for the SPV_INTEL_arbitrary_precesion_floating_point Extension (PR #160054)   Subash B via llvm-commits
• [llvm] [SPIRV] Added Support for the SPV_INTEL_arbitrary_precesion_floating_point Extension (PR #160054)   Subash B via llvm-commits
• [llvm] [SPIRV] Added Support for the SPV_INTEL_arbitrary_precesion_floating_point Extension (PR #160054)   Subash B via llvm-commits
• [llvm] [SPIRV] Added support for the constrained arithmetic(Fmuladd) intrinsic (PR #170270)   Subash B via llvm-commits
• [llvm] [SPIRV] Added support for the constrained arithmetic intrinsic (PR #157441)   Subash B via llvm-commits
• [llvm] [SPIRV] Added Support for the constrained conversion intrinsics (PR #157437)   Subash B via llvm-commits
• [llvm] [RISCV][TTI] Add cost model for ROTL/ROTR (PR #170824)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV][TTI] Add cost model for ROTL/ROTR (PR #170824)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Refactor some code in RISCVMergeBaseOffse.NFC (PR #170839)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Refactor some code in RISCVMergeBaseOffset.NFC (PR #170839)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV][TTI] Add cost model for ROTL/ROTR (PR #170824)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV][TTI] Add cost model for ROTL/ROTR (PR #170824)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV][TTI] Add cost model for ROTL/ROTR (PR #170824)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV][TTI] Add cost model for ROTL/ROTR (PR #170824)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Refactor some code in RISCVMergeBaseOffset.NFC (PR #170839)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV][TTI] Add cost model for ROTL/ROTR (PR #170824)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV][TTI] Add cost model for ROTL/ROTR (PR #170824)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Generate Xqcilsm LWMI/SWMI load/store multiple instructions (PR #171079)   Sudharsan Veeravalli via llvm-commits
• [llvm] AArch64: Enable terminal rule (PR #165959)   Sushant Gokhale via llvm-commits
• [clang] [flang] [llvm] [mlir] Add FramePointerKind::NonLeafNoReserve (PR #163775)   Sushant Gokhale via llvm-commits
• [llvm] [LV] Decide early between partial reduce and a regular reduction based on cost-model (PR #169898)   Sushant Gokhale via llvm-commits
• [clang] [llvm] [MTE] Add an attribute to opt-in memory tagging of global variables while using fsanitize=memtag-globals (#166380) (PR #168535)   Tarcísio Fischer via llvm-commits
• [clang] [llvm] [MTE] Add an attribute to opt-in memory tagging of global variables while using fsanitize=memtag-globals (#166380) (PR #168535)   Tarcísio Fischer via llvm-commits
• [clang] [llvm] [MTE] Add an attribute to opt-in memory tagging of global variables while using fsanitize=memtag-globals (#166380) (PR #168535)   Tarcísio Fischer via llvm-commits
• [lld] Fix lld crash wrt generated thunks growing away from the patched code (PR #170495)   Tarcísio Fischer via llvm-commits
• [lld] Fix lld crash wrt generated thunks growing away from the patched code (PR #170495)   Tarcísio Fischer via llvm-commits
• [lld] Fix lld crash wrt generated thunks growing away from the patched code (PR #170495)   Tarcísio Fischer via llvm-commits
• [lld] [lld][MachO] Add --lto-emit-llvm command line option (PR #170355)   Tarun Prabhu via llvm-commits
• [lld] [lld][MachO] Add --lto-emit-llvm command line option (PR #170355)   Tarun Prabhu via llvm-commits
• [lld] [lld][MachO] Add --lto-emit-llvm command line option (PR #170355)   Tarun Prabhu via llvm-commits
• [lld] [lld][MachO] Add --lto-emit-llvm command line option (PR #170355)   Tarun Prabhu via llvm-commits
• [llvm] [CodeGen][NPM] Add support for -print-regusage in New Pass Manager (PR #169761)   Teja Alaghari via llvm-commits
• [llvm] [CodeGen][NPM] Add support for -print-regusage in New Pass Manager (PR #169761)   Teja Alaghari via llvm-commits
• [clang] [llvm] [Clang]: Enable speculative devirtualization (PR #159685)   Teresa Johnson via llvm-commits
• [clang] [llvm] [Clang]: Enable speculative devirtualization (PR #159685)   Teresa Johnson via llvm-commits
• [clang] [llvm] [Clang]: Enable speculative devirtualization (PR #159685)   Teresa Johnson via llvm-commits
• [lld] [llvm] [DTLTO][ELF][COFF] Add archive support for DTLTO. (PR #157043)   Teresa Johnson via llvm-commits
• [lld] [llvm] [DTLTO][ELF][COFF] Add archive support for DTLTO. (PR #157043)   Teresa Johnson via llvm-commits
• [lld] [llvm] [DTLTO][ELF][COFF] Add archive support for DTLTO. (PR #157043)   Teresa Johnson via llvm-commits
• [lld] [llvm] [DTLTO][ELF][COFF] Add archive support for DTLTO. (PR #157043)   Teresa Johnson via llvm-commits
• [lld] [llvm] [DTLTO][ELF][COFF] Add archive support for DTLTO. (PR #157043)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Add remarks for matched allocs and calls (PR #170379)   Teresa Johnson via llvm-commits
• [clang] [llvm] [Clang]: Enable speculative devirtualization (PR #159685)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Add option to emit full call context for matched allocations (PR #170516)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Add remarks for matched allocs and calls (PR #170379)   Teresa Johnson via llvm-commits
• [llvm] [LTO][Veclib] Fix vector library handling with LTO (PR #170638)   Teresa Johnson via llvm-commits
• [lld] [llvm] [DTLTO][ELF][COFF] Add archive support for DTLTO. (PR #157043)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Add remarks for matched allocs and calls (PR #170379)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Add option to print function GUIDs during matching (PR #170946)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Add remarks for matched allocs and calls (PR #170379)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Add remarks for matched allocs and calls (PR #170379)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Add option to print function GUIDs during matching (PR #170946)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Add option to print function GUIDs during matching (PR #170946)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Add option to print function GUIDs during matching (PR #170946)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Add option to print function GUIDs during matching (PR #170946)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Add option to print function GUIDs during matching (PR #170946)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Add option to print function GUIDs during matching (PR #170946)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Merge all callee guids for indirect call VP metadata (PR #170964)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Add option to print function GUIDs during matching (PR #170946)   Teresa Johnson via llvm-commits
• [llvm] [C-API] LLVMOrcCreateObjectLinkingLayerWithInProcessMemoryManager (PR #169862)   Thomas Munro via llvm-commits
• [llvm] [C-API] LLVMOrcCreateObjectLinkingLayerWithInProcessMemoryManager (PR #169862)   Thomas Munro via llvm-commits
• [llvm] [C-API] LLVMOrcCreateObjectLinkingLayerWithInProcessMemoryManager (PR #169862)   Thomas Munro via llvm-commits
• [clang] [llvm] [x86][AVX-VNNI] Fix VPDPWXXD Argument Types (PR #169456)   Thurston Dang via llvm-commits
• [compiler-rt] [NFC][asan] Fix formatting of asan_interceptors.h (PR #170361)   Thurston Dang via llvm-commits
• [compiler-rt] [compiler-rt] Disable asan tests on GNU/Hurd (PR #169209)   Thurston Dang via llvm-commits
• [compiler-rt] [win/asan] GetInstructionSize: Support some more 2 or 3 byte instruction (PR #166691)   Thurston Dang via llvm-commits
• [compiler-rt] [win/asan] GetInstructionSize: Support some more 2 or 3 byte instruction (PR #166691)   Thurston Dang via llvm-commits
• [compiler-rt] [win/asan] GetInstructionSize: Support some more 2 or 3 byte instruction (PR #166691)   Thurston Dang via llvm-commits
• [clang] [llvm] [x86][AVX-VNNI] Fix VPDPWXXD Argument Types (PR #169456)   Thurston Dang via llvm-commits
• [compiler-rt] [hwasan] Add config for AArch64 Linux with 39-bit VA. (PR #170927)   Thurston Dang via llvm-commits
• [compiler-rt] [asan] Add config for AArch64 Linux with 39-bit VA. (PR #170929)   Thurston Dang via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Tirthankar Mazumder via llvm-commits
• [clang] [flang] [llvm] [mlir] [OMPIRBuilder] re-land cancel barriers patch #164586 (PR #169931)   Tom Eccles via llvm-commits
• [clang] [llvm] [mlir] [OMPIRBuilder] CANCEL IF(FALSE) is still a cancellation point (PR #170095)   Tom Eccles via llvm-commits
• [clang] [llvm] [mlir] [OMPIRBuilder] CANCEL IF(FALSE) is still a cancellation point (PR #170095)   Tom Eccles via llvm-commits
• [clang] [llvm] [mlir] [OMPIRBuilder] CANCEL IF(FALSE) is still a cancellation point (PR #170095)   Tom Eccles via llvm-commits
• [llvm] [mlir] [OpenMP][flang] Support GPU team-reductions on allocatables (PR #169651)   Tom Eccles via llvm-commits
• [llvm] workflows: Factor out artifact attestation and upload into a composite action (PR #169621)   Tom Stellard via llvm-commits
• [llvm] workflows: Factor out artifact attestation and upload into a composite action (PR #169621)   Tom Stellard via llvm-commits
• [flang] [llvm] [flang] implement show_descriptor intrinsic, a non-standard extension (PR #169137)   Tom Stellard via llvm-commits
• [llvm] workflows: Factor out artifact attestation and upload into a composite action (PR #169621)   Tom Stellard via llvm-commits
• [llvm] workflows: Factor out artifact attestation and upload into a composite action (PR #169621)   Tom Stellard via llvm-commits
• [llvm] workflows: Factor out artifact attestation and upload into a composite action (PR #169621)   Tom Stellard via llvm-commits
• [llvm] workflows: Factor out artifact attestation and upload into a composite action (PR #169621)   Tom Stellard via llvm-commits
• [llvm] workflows: Factor out artifact attestation and upload into a composite action (PR #169621)   Tom Stellard via llvm-commits
• [llvm] workflows/release-binaries: Use upload-release-artifact action for uploading (PR #170528)   Tom Stellard via llvm-commits
• [llvm] [CI] Report real results for aarch64 (PR #170535)   Tom Stellard via llvm-commits
• [llvm] [CI] Report real results for aarch64 (PR #170535)   Tom Stellard via llvm-commits
• [llvm] build_llvm_release.bat: Use absolute path when building the tarball (PR #169951)   Tom Stellard via llvm-commits
• [llvm] workflows/release-binaries: Use upload-release-artifact action for uploading (PR #170528)   Tom Stellard via llvm-commits
• [llvm] workflows/release-binaries: Use upload-release-artifact action for uploading (PR #170528)   Tom Stellard via llvm-commits
• [llvm] workflows/release-binaries: Use upload-release-artifact action for uploading (PR #170528)   Tom Stellard via llvm-commits
• [llvm] workflows/release-binaries: Use upload-release-artifact action for uploading (PR #170528)   Tom Stellard via llvm-commits
• [llvm] workflows/release-binaries: Use upload-release-artifact action for uploading (PR #170528)   Tom Stellard via llvm-commits
• [llvm] [llvm][DebugInfo] Allow DIDerivedType as a bound in DISubrangeType (PR #165880)   Tom Tromey via llvm-commits
• [llvm] [AArch64] Add isAppleMLike helper to check for M cores and aligned CPUs. (PR #170553)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Add isAppleMLike helper to check for M cores and aligned CPUs. (PR #170553)   Tomer Shafir via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Tony Linthicum via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Tony Linthicum via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Tony Linthicum via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Tony Linthicum via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Tony Linthicum via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Tony Linthicum via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Tony Linthicum via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Tony Linthicum via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Tony Linthicum via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Tony Linthicum via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Tony Linthicum via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Tony Linthicum via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Tony Linthicum via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Tony Linthicum via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   Tony Linthicum via llvm-commits
• [clang] [llvm] RFC: Implementing new mechanism for hard register operands to inline asm as a constraint. (PR #85846)   Tony Tao via llvm-commits
• [clang] [llvm] RFC: Implementing new mechanism for hard register operands to inline asm as a constraint. (PR #85846)   Tony Tao via llvm-commits
• [clang] [llvm] RFC: Implementing new mechanism for hard register operands to inline asm as a constraint. (PR #85846)   Tony Tao via llvm-commits
• [clang] [llvm] RFC: Implementing new mechanism for hard register operands to inline asm as a constraint. (PR #85846)   Tony Tao via llvm-commits
• [clang-tools-extra] [llvm] [Clangd] Add AST search capabilities from clang-query (PR #156090)   Tor Shepherd via llvm-commits
• [llvm] [SystemZ] Handle IR struct arguments correctly. (PR #169583)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Handle IR struct arguments correctly. (PR #169583)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Handle IR struct arguments correctly. (PR #169583)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Handle IR struct arguments correctly. (PR #169583)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Handle IR struct arguments correctly. (PR #169583)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Handle IR struct arguments correctly. (PR #169583)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Handle IR struct arguments correctly. (PR #169583)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Handle IR struct arguments correctly. (PR #169583)   Ulrich Weigand via llvm-commits
• [clang] [compiler-rt] [TySan] TySan support for SystemZ - Re-submission of original pr#162396 (PR #169850)   Ulrich Weigand via llvm-commits
• [clang] [compiler-rt] [TySan] TySan support for SystemZ - Re-submission of original pr#162396 (PR #169850)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Handle IR struct arguments correctly. (PR #169583)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Handle IR struct arguments correctly. (PR #169583)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Handle IR struct arguments correctly. (PR #169583)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [compiler-rt] [llvm] [JITLink] Add initial TLS support for SystemZ (PR #170706)   Ulrich Weigand via llvm-commits
• [compiler-rt] [llvm] [JITLink] Add initial TLS support for SystemZ (PR #170706)   Ulrich Weigand via llvm-commits
• [compiler-rt] [llvm] [JITLink] Add initial TLS support for SystemZ (PR #170706)   Ulrich Weigand via llvm-commits
• [compiler-rt] [llvm] [JITLink] Add initial TLS support for SystemZ (PR #170706)   Ulrich Weigand via llvm-commits
• [llvm] [LTO][Veclib] Fix vector library handling with LTO (PR #170638)   Usha Gupta via llvm-commits
• [llvm] [AArch64] Optimize CBZ wzr and friends. (PR #161508)   Usha Gupta via llvm-commits
• [llvm] [AArch64] Optimize CBZ wzr and friends. (PR #161508)   Usha Gupta via llvm-commits
• [llvm] [AArch64] Optimize CBZ wzr and friends. (PR #161508)   Usha Gupta via llvm-commits
• [llvm] [AArch64] Optimize CBZ wzr and friends. (PR #161508)   Usha Gupta via llvm-commits
• [llvm] [AArch64] Optimize CBZ wzr and friends. (PR #161508)   Usha Gupta via llvm-commits
• [llvm] [LTO][Veclib] Fix vector library handling with LTO (PR #170638)   Usha Gupta via llvm-commits
• [llvm] [LTO][Veclib] Fix vector library handling with LTO (PR #170638)   Usha Gupta via llvm-commits
• [llvm] [DAGCombiner] Handle type-promoted constants in UDIV lowering (PR #169491)   Valeriy Savchenko via llvm-commits
• [llvm] [DAGCombiner] Handle type-promoted constants in UDIV lowering (PR #169491)   Valeriy Savchenko via llvm-commits
• [llvm] [DAGCombiner] Handle type-promoted constants in UDIV lowering (PR #169491)   Valeriy Savchenko via llvm-commits
• [llvm] [DAGCombiner] Allow promoted constants in MULHU by power-of-2 -> SRL transform (PR #170562)   Valeriy Savchenko via llvm-commits
• [llvm] [DAGCombiner] Allow promoted constants in MULHU by power-of-2 -> SRL transform (PR #170562)   Valeriy Savchenko via llvm-commits
• [llvm] [DAGCombiner] Handle type-promoted constants in SDIV lowering (PR #169924)   Valeriy Savchenko via llvm-commits
• [llvm] [DAGCombiner] Handle type-promoted constants in SDIV lowering (PR #169924)   Valeriy Savchenko via llvm-commits
• [llvm] [DAGCombiner] Handle type-promoted constants in UDIV exact lowering (PR #169949)   Valeriy Savchenko via llvm-commits
• [llvm] [DAGCombiner] Handle type-promoted constants in UDIV exact lowering (PR #169949)   Valeriy Savchenko via llvm-commits
• [llvm] [AArch64] Fold tbl1 intrinsic into dup when broadcasting (PR #170872)   Valeriy Savchenko via llvm-commits
• [llvm] [AArch64] Fold tbl1 intrinsic into dup when broadcasting (PR #170872)   Valeriy Savchenko via llvm-commits
• [llvm] [AArch64] Fold tbl1 intrinsic into dup when broadcasting (PR #170872)   Valeriy Savchenko via llvm-commits
• [flang] [llvm] [flang] implement show_descriptor intrinsic, a non-standard extension (PR #169137)   Valery Dmitriev via llvm-commits
• [flang] [llvm] [flang] implement show_descriptor intrinsic, a non-standard extension (PR #169137)   Valery Dmitriev via llvm-commits
• [llvm] [flang][runtime] Clean up C++ style & usage (PR #170227)   Valery Dmitriev via llvm-commits
• [flang] [llvm] [flang/flang-rt] Implement show_descriptor intrinsic, a non-standard extension. (PR #170389)   Valery Dmitriev via llvm-commits
• [flang] [llvm] [flang/flang-rt] Implement show_descriptor intrinsic, a non-standard extension. (PR #170389)   Valery Dmitriev via llvm-commits
• [flang] [llvm] [flang/flang-rt] Implement show_descriptor intrinsic, a non-standard extension. (PR #170389)   Valery Dmitriev via llvm-commits
• [flang] [llvm] [flang/flang-rt] Implement show_descriptor intrinsic, a non-standard extension. (PR #170389)   Valery Dmitriev via llvm-commits
• [flang] [llvm] [flang/flang-rt] Implement show_descriptor intrinsic, a non-standard extension. (PR #170389)   Valery Dmitriev via llvm-commits
• [llvm] [libc++] Use private CMake flags to enable the pragma system_header macro when building (PR #138826)   Valery Mironov via llvm-commits
• [llvm] [libc++] Use private CMake flags to enable the pragma system_header macro when building (PR #138826)   Valery Mironov via llvm-commits
• [llvm] [BOLT] Do not fail in case of instrumentation binary without fini & fini_array & instrumentation-sleep-time>0 (PR #170086)   Vasily Leonenko via llvm-commits
• [llvm] [BOLT] Do not fail in case of instrumentation binary without fini & fini_array & instrumentation-sleep-time>0 (PR #170086)   Vasily Leonenko via llvm-commits
• [llvm] [BOLT] Allow missing DT_FINI{,_ARRAY} if instrumentation-sleep-time is used (PR #170086)   Vasily Leonenko via llvm-commits
• [llvm] [BOLT] Allow missing DT_FINI{,_ARRAY} if instrumentation-sleep-time is used (PR #170086)   Vasily Leonenko via llvm-commits
• [llvm] [BOLT] Allow missing DT_FINI{,_ARRAY} if instrumentation-sleep-time is used (PR #170086)   Vasily Leonenko via llvm-commits
• [llvm] [BOLT] Allow missing DT_FINI{,_ARRAY} if instrumentation-sleep-time is used (PR #170086)   Vasily Leonenko via llvm-commits
• [llvm] [BOLT] Allow missing DT_FINI{,_ARRAY} if instrumentation-sleep-time is used (PR #170086)   Vasily Leonenko via llvm-commits
• [llvm] [BOLT] Allow missing DT_FINI{,_ARRAY} if instrumentation-sleep-time is used (PR #170086)   Vasily Leonenko via llvm-commits
• [clang] [llvm] [RFC][LLVM][Clang] Add LLVM plugin hook for back-ends (PR #170846)   Vassil Vassilev via llvm-commits
• [llvm] [Orc][LibResolver] Refactor resolver internals and simplify symbol resolution. (PR #169161)   Vassil Vassilev via llvm-commits
• [llvm] [Orc][LibResolver] Refactor resolver internals and simplify symbol resolution. (PR #169161)   Vassil Vassilev via llvm-commits
• [llvm] [Orc][LibResolver] Refactor resolver internals and simplify symbol resolution. (PR #169161)   Vassil Vassilev via llvm-commits
• [llvm] [Orc][LibResolver] Refactor resolver internals and simplify symbol resolution. (PR #169161)   Vassil Vassilev via llvm-commits
• [llvm] Fixed build with C++20 standard (PR #169772)   Vedran Miletić via llvm-commits
• [llvm] Fixed build with C++20 standard (PR #169772)   Vedran Miletić via llvm-commits
• [llvm] Fixed build with C++20 standard (PR #169772)   Vedran Miletić via llvm-commits
• [llvm] [LLVM] Add helper class for working with caches (PR #171008)   Victor Chernyakin via llvm-commits
• [llvm] [LLVM] Add helper class for working with caches (PR #171008)   Victor Chernyakin via llvm-commits
• [llvm] [LLVM][ADT] Add helper class for only (PR #171008)   Victor Chernyakin via llvm-commits
• [llvm] [LLVM][ADT] Add helper class for working with caches (PR #171008)   Victor Chernyakin via llvm-commits
• [llvm] [LLVM][ADT] Add helper class for working with caches (PR #171008)   Victor Chernyakin via llvm-commits
• [llvm] [LLVM][ADT] Add helper class for working with caches (PR #171008)   Victor Chernyakin via llvm-commits
• [llvm] [LLVM][ADT] Add helper class for working with caches (PR #171008)   Victor Chernyakin via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions and keep track of instructions causing an Access (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions and keep track of instructions causing an Access (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions and keep track of instructions causing an Access (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] [Attributor] Change allocation size and load/store offsets using AAPointerInfo for Alloca instructions and keep track of instructions causing an Access (PR #72029)   Vidush Singhal via llvm-commits
• [llvm] Reland "[LICM] Sink unused l-invariant loads in preheader #157559" (PR #170204)   Vigneshwar Jayakumar via llvm-commits
• [llvm] Reland "[LICM] Sink unused l-invariant loads in preheader #157559" (PR #170204)   Vigneshwar Jayakumar via llvm-commits
• [llvm] Reland "[LICM] Sink unused l-invariant loads in preheader #157559" (PR #170204)   Vigneshwar Jayakumar via llvm-commits
• [llvm] Reland "[LICM] Sink unused l-invariant loads in preheader #157559" (PR #170204)   Vigneshwar Jayakumar via llvm-commits
• [llvm] [IndVarSimplify] Remove sinkunusedInvariants (PR #169250)   Vigneshwar Jayakumar via llvm-commits
• [llvm] [CodeGen] Add MO_LaneMask type and a new COPY_LANEMASK instruction (PR #151944)   Vikash Gupta via llvm-commits
• [llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Vikash Gupta via llvm-commits
• [llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Vikash Gupta via llvm-commits
• [llvm] [CodeGen][NPM] Add support for -print-regusage in New Pass Manager (PR #169761)   Vikram Hegde via llvm-commits
• [clang] [compiler-rt] [UBSAN] add null and alignment checks for aggregates (PR #164548)   Vitaly Buka via llvm-commits
• [clang] [compiler-rt] [UBSAN] add null and alignment checks for aggregates (PR #164548)   Vitaly Buka via llvm-commits
• [llvm] [NFC] Fix memory leak in ConstantsTest (PR #170789)   Vitaly Buka via llvm-commits
• [llvm] [NFC] Fix memory leak in ConstantsTest (PR #170789)   Vitaly Buka via llvm-commits
• [llvm] [NFC] Fix memory leak in ConstantsTest (PR #170789)   Vitaly Buka via llvm-commits
• [compiler-rt] Add API to temporalily suppress usage of ASAN's fake stack (PR #160135)   Vitaly Buka via llvm-commits
• [compiler-rt] Add API to temporalily suppress usage of ASAN's fake stack (PR #160135)   Vitaly Buka via llvm-commits
• [compiler-rt] [ASan] Do not return from void functions in asan_abi_shim.cpp (PR #170897)   Vitaly Buka via llvm-commits
• [compiler-rt] [ASan] Do not return from void functions in asan_abi_shim.cpp (PR #170897)   Vitaly Buka via llvm-commits
• [llvm] [IR] Don't store switch case values as operands (PR #166842)   Vitaly Buka via llvm-commits
• [llvm] Revert "[IR] Don't store switch case values as operands" (PR #170962)   Vitaly Buka via llvm-commits
• [llvm] Revert "[IR] Don't store switch case values as operands" (PR #170962)   Vitaly Buka via llvm-commits
• [llvm] Revert "[IR] Don't store switch case values as operands" (PR #170962)   Vitaly Buka via llvm-commits
• [llvm] [IR] Don't store switch case values as operands (PR #166842)   Vitaly Buka via llvm-commits
• [llvm] [Arm] Control forced unrolling of small loops (PR #170127)   Vladi Krapp via llvm-commits
• [llvm] [Arm] Control forced unrolling of small loops (PR #170127)   Vladi Krapp via llvm-commits
• [llvm] [Arm] Control forced unrolling of small loops (PR #170127)   Vladi Krapp via llvm-commits
• [llvm] [Arm] Control forced unrolling of small loops (PR #170127)   Vladi Krapp via llvm-commits
• [llvm] [Arm] Control forced unrolling of small loops (PR #170127)   Vladi Krapp via llvm-commits
• [llvm] [Arm] Control forced unrolling of small loops (PR #170127)   Vladi Krapp via llvm-commits
• [llvm] [Arm] Control forced unrolling of small loops (PR #170127)   Vladi Krapp via llvm-commits
• [llvm] [Arm] Control forced unrolling of small loops (PR #170127)   Vladi Krapp via llvm-commits
• [llvm] [Arm] Control forced unrolling of small loops (PR #170127)   Vladi Krapp via llvm-commits
• [clang] [llvm] Reland "[DebugMetadata][DwarfDebug] Support function-local types in lexical block scopes (4/7)" (PR #165032)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [DebugInfo][test] Fix llvm/test/ThinLTO/X86/pr35472.ll (NFC) (PR #170952)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [DebugInfo][test] Fix llvm/test/ThinLTO/X86/pr35472.ll (NFC) (PR #170952)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [DebugInfo][test] Fix llvm/test/ThinLTO/X86/pr35472.ll (NFC) (PR #170952)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [DebugInfo][test] Fix llvm/test/ThinLTO/X86/pr35472.ll (NFC) (PR #170952)   Vladislav Dzhidzhoev via llvm-commits
• [libcxx] [llvm] [libc++] Add support for picolibc and newlib in RUNTIMES_USE_LIBC (PR #147956)   Volodymyr Turanskyy via llvm-commits
• [lld] [lld-macho]Define a flag for adjusting slop scale (PR #164295)   Vy Nguyen via llvm-commits
• [lld] [lld-macho]Define a flag for adjusting slop scale (PR #164295)   Vy Nguyen via llvm-commits
• [clang] [compiler-rt] [llvm] [AIX] Implement the ifunc attribute. (PR #153049)   Wael Yehia via llvm-commits
• [clang] [compiler-rt] [llvm] [AIX] Implement the ifunc attribute. (PR #153049)   Wael Yehia via llvm-commits
• [clang] [compiler-rt] [llvm] [AIX] Implement the ifunc attribute. (PR #153049)   Wael Yehia via llvm-commits
• [clang] [compiler-rt] [llvm] [AIX] Implement the ifunc attribute. (PR #153049)   Wael Yehia via llvm-commits
• [clang] [compiler-rt] [llvm] [AIX] Implement the ifunc attribute. (PR #153049)   Wael Yehia via llvm-commits
• [clang] [compiler-rt] [llvm] [AIX] Implement the ifunc attribute. (PR #153049)   Wael Yehia via llvm-commits
• [clang] [compiler-rt] [llvm] [AIX] Implement the ifunc attribute. (PR #153049)   Wael Yehia via llvm-commits
• [clang] [compiler-rt] [llvm] [AIX] Implement the ifunc attribute. (PR #153049)   Wael Yehia via llvm-commits
• [llvm] [llvm-profgen][SPGO] Support profiles with multiple concurrent processes (PR #169353)   Wei Wang via llvm-commits
• [llvm] [llvm-profgen][SPGO] Support profiles with multiple concurrent processes (PR #169353)   Wei Wang via llvm-commits
• [clang] [llvm] [CoroEarly] Infer presplitcoroutine attribute for Switch-Resumed ABI (PR #169866)   Weibo He via llvm-commits
• [llvm] [mlir] [PDLL] Collapse TypeDetail.h into Types.h (PR #170341)   Weiwei C via llvm-commits
• [llvm] [VectorCombine] Fold permute of intrinsics into intrinsic of permutes: shuffle(intrinsic, poison/undef) -> intrinsic(shuffle) (PR #170052)   Yanzuo Liu via llvm-commits
• [llvm] [JumpThread] Fix `JumpThreading` pass to skip merging when both blocks contain convergence loop/entry intrinsics. (PR #170247)   Yanzuo Liu via llvm-commits
• [llvm] [mlir] add ch1~ch3 note (PR #170624)   Yanzuo Liu via llvm-commits
• [llvm] [PowerPC] FIX llc crashed at -O1/O2/O3: Assertion `isImm() && "Wrong MachineOperand mutator"' failed. (PR #170548)   Yanzuo Liu via llvm-commits
• [llvm] [IR] Fix User use-after-destroy by zapping in ~User (PR #170575)   Yanzuo Liu via llvm-commits
• [compiler-rt] [llvm] [JITLink] Add initial TLS support for SystemZ (PR #170706)   Yanzuo Liu via llvm-commits
• [clang] [llvm] [clang] Add hasAdjSubstatements matcher (PR #169965)   Yanzuo Liu via llvm-commits
• [clang] [llvm] [clang] Add hasAdjSubstatements matcher (PR #169965)   Yanzuo Liu via llvm-commits
• [llvm] [LLVM][ADT] Add helper class for working with caches (PR #171008)   Yanzuo Liu via llvm-commits
• [llvm] [LLVM] Remove the requirement for named pipe in jobserver (PR #169154)   Yaxun Liu via llvm-commits
• [llvm] [LLVM] Remove the requirement for named pipe in jobserver (PR #169154)   Yaxun Liu via llvm-commits
• [llvm] AMDGPU: share LDS budget logic and add experimental LDS buffering pass (PR #166388)   Yaxun Liu via llvm-commits
• [llvm] [AggressiveInstCombine] Fix memory location for alias analysis (PR #169953)   Yingwei Zheng via llvm-commits
• [llvm] [ValueTracking] Support scalable vector splats in computeKnownFPClass (PR #170325)   Yingwei Zheng via llvm-commits
• [llvm] [ValueTracking] Support scalable vector splats in computeKnownFPClass (PR #170325)   Yingwei Zheng via llvm-commits
• [llvm] [ValueTracking] Support scalable vector splats in computeKnownFPClass (PR #170325)   Yingwei Zheng via llvm-commits
• [llvm] [ValueTracking] Support scalable vector splats in computeKnownFPClass (PR #170325)   Yingwei Zheng via llvm-commits
• [llvm] [ValueTracking] Support scalable vector splats in computeKnownFPClass (PR #170325)   Yingwei Zheng via llvm-commits
• [llvm] [ValueTracking] Support scalable vector splats in computeKnownBits (PR #170345)   Yingwei Zheng via llvm-commits
• [llvm] [SelectionDAGBuilder] Remove NoNaNsFPMath uses (PR #169904)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyLibCalls] Recognize and simplify f[min/max]imumnum (PR #170699)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyLibCalls] Recognize and simplify f[min/max]imumnum (PR #170699)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyLibCalls] Recognize and simplify f[min/max]imumnum (PR #170699)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyLibCalls] Recognize and simplify f[min/max]imumnum (PR #170699)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyLibCalls] Recognize and simplify f[min/max]imumnum (PR #170699)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fix bail-out in `PHIsEqualValue()` (PR #170650)   Yingwei Zheng via llvm-commits
• [llvm] [Instcombine] Lower to explicit subtraction + unsigned comparison (PR #170896)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold chained GEP with constant base into single GEP (PR #170439)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)   Yingwei Zheng via llvm-commits
• [llvm] [BasicAA][TLI] Local-linkage or non-thread-local globals may not alias errno (PR #170290)   Yingwei Zheng via llvm-commits
• [llvm] [BasicAA][TLI] Local-linkage or non-thread-local globals may not alias errno (PR #170290)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Preserve range information for `Op0 -nsw umin(X, Op0) --> usub.sat(Op0, X)` (PR #170989)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Preserve range information for `Op0 -nsw umin(X, Op0) --> usub.sat(Op0, X)` (PR #170989)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Preserve range information for `Op0 -nsw umin(X, Op0) --> usub.sat(Op0, X)` (PR #170989)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold (sub nsw X, umin(X, C)) s< C2 to (X s< C + C2) (PR #170422)   Yingwei Zheng via llvm-commits
• [llvm] [Instcombine] Lower to explicit subtraction + unsigned comparison (PR #170896)   Yingwei Zheng via llvm-commits
• [llvm] [Instcombine] Lower to explicit subtraction + unsigned comparison (PR #170896)   Yingwei Zheng via llvm-commits
• [llvm] [SROA] Clean up rewritePartition type selection process (NFC) (PR #169106)   Yonah Goldberg via llvm-commits
• [llvm] [NFC][SROA] Clean up rewritePartition type selection process (PR #169106)   Yonah Goldberg via llvm-commits
• [clang] [llvm] [SROA] Refactor rewritePartition alloca type selection process (PR #167771)   Yonah Goldberg via llvm-commits
• [llvm] [NFC][SROA] Clean up rewritePartition type selection process (PR #169106)   Yonah Goldberg via llvm-commits
• [clang] [llvm] [SROA] Refactor rewritePartition alloca type selection process (PR #167771)   Yonah Goldberg via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   YongKang Zhu via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   YongKang Zhu via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   YongKang Zhu via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   YongKang Zhu via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   YongKang Zhu via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   YongKang Zhu via llvm-commits
• [llvm] [BOLT][AArch64] Enable safe ICF (PR #170172)   YongKang Zhu via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   YongKang Zhu via llvm-commits
• [llvm] [BOLT][AArch64] Enable safe ICF (PR #170172)   YongKang Zhu via llvm-commits
• [llvm] [BOLT] Make safe ICF work with relative vtable (PR #170629)   YongKang Zhu via llvm-commits
• [llvm] [BOLT] Make safe ICF work with relative vtable (PR #170629)   YongKang Zhu via llvm-commits
• [llvm] [BOLT] Minor code refactoring. NFC (PR #170746)   YongKang Zhu via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   YongKang Zhu via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   YongKang Zhu via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   YongKang Zhu via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   YongKang Zhu via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   YongKang Zhu via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   YongKang Zhu via llvm-commits
• [llvm] [BOLT] Properly validate relocations against internals of a function (PR #167451)   YongKang Zhu via llvm-commits
• [llvm] [BOLT] Properly validate relocations against internals of a function (PR #167451)   YongKang Zhu via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   YunQiang Su via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   YunQiang Su via llvm-commits
• [clang] [llvm] Add release note entry for max/min (PR #131977)   YunQiang Su via llvm-commits
• [clang] [llvm] Add release note entry for max/min (PR #131977)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUM_FMAXIMUM: FMAXNUM/FMINNUM treat +0>-0 (PR #137367)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUM_FMAXIMUM: FMAXNUM/FMINNUM treat +0>-0 (PR #137367)   YunQiang Su via llvm-commits
• [llvm] simplifyBinaryIntrinsic: Return nan if snan is passed maxnum/minnum (PR #158470)   YunQiang Su via llvm-commits
• [llvm] simplifyBinaryIntrinsic: Return nan if snan is passed maxnum/minnum (PR #158470)   YunQiang Su via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   YunQiang Su via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   YunQiang Su via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   YunQiang Su via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Improve compare between zeros (PR #140193)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Improve compare between zeros (PR #140193)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Improve compare between zeros (PR #140193)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Improve compare between zeros (PR #140193)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Improve compare between zeros (PR #140193)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Improve compare between zeros (PR #140193)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Improve compare between zeros (PR #140193)   YunQiang Su via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   YunQiang Su via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Improve expandFP_TO_INT_SAT (PR #139217)   YunQiang Su via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Improve compare between zeros (PR #140193)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Improve compare between zeros (PR #140193)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Improve compare between zeros (PR #140193)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Improve compare between zeros (PR #140193)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Improve compare between zeros (PR #140193)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Improve compare between zeros (PR #140193)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Improve compare between zeros (PR #140193)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUM_FMAXIMUM: FMAXNUM/FMINNUM treat +0>-0 (PR #137367)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUM_FMAXIMUM: FMAXNUM/FMINNUM treat +0>-0 (PR #137367)   YunQiang Su via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUM_FMAXIMUM: FMAXNUM/FMINNUM treat +0>-0 (PR #137367)   YunQiang Su via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   YunQiang Su via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   YunQiang Su via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   YunQiang Su via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   YunQiang Su via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUM_FMAXIMUM: FMAXNUM/FMINNUM treat +0>-0 (PR #137367)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUM_FMAXIMUM: FMAXNUM/FMINNUM treat +0>-0 (PR #137367)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUM_FMAXIMUM: FMAXNUM/FMINNUM treat +0>-0 (PR #137367)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUM_FMAXIMUM: FMAXNUM/FMINNUM treat +0>-0 (PR #137367)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUM_FMAXIMUM: FMAXNUM/FMINNUM treat +0>-0 (PR #137367)   YunQiang Su via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   YunQiang Su via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   YunQiang Su via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   YunQiang Su via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   YunQiang Su via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   YunQiang Su via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   YunQiang Su via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUM_FMAXIMUM: FMAXNUM/FMINNUM treat +0>-0 (PR #137367)   YunQiang Su via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Yury Plyakhin via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Yury Plyakhin via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Yury Plyakhin via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Yury Plyakhin via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Yury Plyakhin via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Yury Plyakhin via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Yury Plyakhin via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Yury Plyakhin via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Yury Plyakhin via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Yury Plyakhin via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Yury Plyakhin via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Yury Plyakhin via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Yury Plyakhin via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Yury Plyakhin via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Yury Plyakhin via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Yury Plyakhin via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Yury Plyakhin via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Yury Plyakhin via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Yury Plyakhin via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Yury Plyakhin via llvm-commits
• [llvm] [symbolizer] Add a --pdb option. (PR #171053)   Yuxuan Shui via llvm-commits
• [llvm] [symbolizer] Add a --pdb option. (PR #171053)   Yuxuan Shui via llvm-commits
• [llvm] [CMake] Set LLVM_USE_LINKER for external projects when using lld (PR #170401)   Zachary Fogg via llvm-commits
• [llvm] [CMake] Set LLVM_USE_LINKER for external projects when using lld (PR #170401)   Zachary Fogg via llvm-commits
• [llvm] [CMake] Set LLVM_USE_LINKER for external projects when using lld (PR #170401)   Zachary Fogg via llvm-commits
• [llvm] [CMake] Set LLVM_USE_LINKER for external projects when using lld (PR #170401)   Zachary Fogg via llvm-commits
• [llvm] [CMake] Set LLVM_USE_LINKER for external projects when using lld (PR #170401)   Zachary Fogg via llvm-commits
• [llvm] [CMake] Set LLVM_USE_LINKER for external projects when using lld (PR #170401)   Zachary Fogg via llvm-commits
• [llvm] [CMake] Set LLVM_USE_LINKER for external projects when using lld (PR #170401)   Zachary Fogg via llvm-commits
• [llvm] [CMake] Set LLVM_USE_LINKER for external projects when using lld (PR #170401)   Zachary Fogg via llvm-commits
• [llvm] [CMake] Set LLVM_USE_LINKER for external projects when using lld (PR #170401)   Zachary Fogg via llvm-commits
• [llvm] [CMake] Set LLVM_USE_LINKER for external projects when using lld (PR #170401)   Zachary Fogg via llvm-commits
• [llvm] [CMake] Set LLVM_USE_LINKER for external projects when using lld (PR #170401)   Zachary Fogg via llvm-commits
• [clang] [compiler-rt] [llvm] [LFI] Introduce AArch64 LFI Target (PR #167061)   Zachary Yedidia via llvm-commits
• [clang] [compiler-rt] [llvm] [LFI] Introduce AArch64 LFI Target (PR #167061)   Zachary Yedidia via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Zahira Ammarguellat via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Zahira Ammarguellat via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Zahira Ammarguellat via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Zahira Ammarguellat via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Zahira Ammarguellat via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Zahira Ammarguellat via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Zahira Ammarguellat via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Zahira Ammarguellat via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Zahira Ammarguellat via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Zahira Ammarguellat via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Zahira Ammarguellat via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Zahira Ammarguellat via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Zahira Ammarguellat via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause (PR #166810)   Zahira Ammarguellat via llvm-commits
• [flang] [llvm] [flang/flang-rt] Adding support of RAND, IRAND and SRAND intrinsics (PR #166780)   antoine moynault via llvm-commits
• [llvm] [SelectionDAG] Lowering usub.sat(a, 1) to a - (a != 0) (PR #170076)   guan jian via llvm-commits
• [llvm] [SelectionDAG] Lowering usub.sat(a, 1) to a - (a != 0) (PR #170076)   guan jian via llvm-commits
• [llvm] [SelectionDAG] Lowering usub.sat(a, 1) to a - (a != 0) (PR #170076)   guan jian via llvm-commits
• [llvm] [SelectionDAG] Lowering usub.sat(a, 1) to a - (a != 0) (PR #170076)   guan jian via llvm-commits
• [clang] [llvm] [RegisterCoalescer] Improve register allocation for return values by limiting rematerialization (PR #163047)   guan jian via llvm-commits
• [clang] [llvm] [RegisterCoalescer] Improve register allocation for return values by limiting rematerialization (PR #163047)   guan jian via llvm-commits
• [llvm] [SelectionDAG] Lowering usub.sat(a, 1) to a - (a != 0) (PR #170076)   guan jian via llvm-commits
• [llvm] [SelectionDAG] Lowering usub.sat(a, 1) to a - (a != 0) (PR #170076)   guan jian via llvm-commits
• [llvm] [llvm-c] Create a 128 bit floating point constant from 2 64 bit values (PR #164381)   peter mckinna via llvm-commits
• [llvm] [llvm-c] Create a 128 bit floating point constant from 2 64 bit values (PR #164381)   peter mckinna via llvm-commits
• [llvm] [llvm-c] Create a 128 bit floating point constant from 2 64 bit values (PR #164381)   peter mckinna via llvm-commits
• [llvm] [llvm-c] Create a 128 bit floating point constant from 2 64 bit values (PR #164381)   peter mckinna via llvm-commits
• [llvm] [llvm-c] Add LLVMConstFPFromBits() API (PR #164381)   peter mckinna via llvm-commits
• [llvm] 17677ad - [LV] Don't create WidePtrAdd recipes for scalar VFs (#169344)   via llvm-commits
• [llvm] Refactoring llvm-ir2vec.cpp for better separation of concerns in the Tooling classes (PR #170078)   via llvm-commits
• [llvm] [X86] Lower `minimum`/`maximum`/`minimumnum`/`maximumnum` using bitwise operations (PR #170069)   via llvm-commits
• [llvm] [X86] Lower `minimum`/`maximum`/`minimumnum`/`maximumnum` using bitwise operations (PR #170069)   via llvm-commits
• [llvm] [X86] Lower `minimum`/`maximum`/`minimumnum`/`maximumnum` using bitwise operations (PR #170069)   via llvm-commits
• [llvm] [BOLT] Do not fail in case of instrumentation binary without fini & fini_array & instrumentation-sleep-time>0 (PR #170086)   via llvm-commits
• [llvm] [X86] Lower `minimum`/`maximum`/`minimumnum`/`maximumnum` using bitwise operations (PR #170069)   via llvm-commits
• [llvm] [AMDGPU] Emit amdgpu.max_num_named_barrier resource symbol (PR #169851)   via llvm-commits
• [llvm] [SelectionDAGBuilder] Remove NoNaNsFPMath uses (PR #169904)   via llvm-commits
• [llvm] llvm-ar `N` argument: re-add truncated sentence (PR #169977)   via llvm-commits
• [llvm] [Mips] Add MipsPat `add $gp, (select $cond, tglobaladdr, tglobaladdr)` to parse MipsISD::GPRel TargetGlobalAddress (PR #165531)   via llvm-commits
• [clang] [llvm] Testing checks (PR #170087)   via llvm-commits
• [llvm] [Mips] Add MipsPat `add $gp, (select $cond, tglobaladdr, tglobaladdr)` to parse MipsISD::GPRel TargetGlobalAddress (PR #165531)   via llvm-commits
• [llvm] 8079d03 - [CAS] Temporarily skip tests on old windows version (#170063)   via llvm-commits
• [llvm] [RISCV][ISelLowering] Use Zicond for FP selects on Zfinx/Zdinx (PR #169299)   via llvm-commits
• [llvm] [Mips] Add MipsPat `add $gp, (select $cond, tglobaladdr, tglobaladdr)` to parse MipsISD::GPRel TargetGlobalAddress (PR #165531)   via llvm-commits
• [llvm] [SelectionDAGBuilder] Remove NoNaNsFPMath uses (PR #169904)   via llvm-commits
• [llvm] [SelectionDAGBuilder] Remove NoNaNsFPMath uses (PR #169904)   via llvm-commits
• [llvm] [SelectionDAGBuilder] Remove NoNaNsFPMath uses (PR #169904)   via llvm-commits
• [llvm] [SelectionDAGBuilder] Remove NoNaNsFPMath uses (PR #169904)   via llvm-commits
• [llvm] [rtsan] Handle attributed IR function declarations (PR #169577)   via llvm-commits
• [llvm] [rtsan] Handle attributed IR function declarations (PR #169577)   via llvm-commits
• [llvm] [LoongArch][NFC] Pre-commit tests for 256-bit vector trunc (PR #170091)   via llvm-commits
• [llvm] [LoongArch][NFC] Pre-commit tests for 256-bit vector trunc (PR #170091)   via llvm-commits
• [llvm] 1317083 - [AArch64][SME] Support saving/restoring ZT0 in the MachineSMEABIPass (#166362)   via llvm-commits
• [llvm] [RegisterCoalescer] Don't commute two-address instructions which only define a subregister (PR #169031)   via llvm-commits
• [llvm] 8ec2112 - [OMPIRBuilder] re-land cancel barriers patch #164586 (#169931)   via llvm-commits
• [flang] [llvm] [flang] implement show_descriptor intrinsic, a non-standard extension (PR #169137)   via llvm-commits
• [llvm] [X86] Lower `minimum`/`maximum`/`minimumnum`/`maximumnum` using bitwise operations (PR #170069)   via llvm-commits
• [llvm] [X86] Lower `minimum`/`maximum`/`minimumnum`/`maximumnum` using bitwise operations (PR #170069)   via llvm-commits
• [llvm] [X86] Lower `minimum`/`maximum`/`minimumnum`/`maximumnum` using bitwise operations (PR #170069)   via llvm-commits
• [llvm] 2c9e9ff - [SCCP] Handle llvm.experimental.get.vector.length calls (#169527)   via llvm-commits
• [llvm] [GISel][Inlineasm] Support inlineasm i constraint for symbols (PR #170094)   via llvm-commits
• [llvm] [GISel][Inlineasm] Support inlineasm i constraint for symbols (PR #170094)   via llvm-commits
• [llvm] d1500d1 - [SelectionDAG] Add SelectionDAG::getTypeSize. NFC (#169764)   via llvm-commits
• [clang] [llvm] [mlir] [OMPIRBuilder] CANCEL IF(FALSE) is still a cancellation point (PR #170095)   via llvm-commits
• [clang] [llvm] [mlir] [OMPIRBuilder] CANCEL IF(FALSE) is still a cancellation point (PR #170095)   via llvm-commits
• [llvm] [X86] Add tests showing failure to concat sqrt intrinsics together. (PR #170096)   via llvm-commits
• [llvm] [rtsan] Handle attributed IR function declarations (PR #169577)   via llvm-commits
• [llvm] [X86] Add tests showing failure to concat RCPPS + RSQRPS intrinsics together. (PR #170098)   via llvm-commits
• [llvm] [AArch64][GISel] Add legalizer support for @llvm.umul.with.overflow.i128 (PR #170101)   via llvm-commits
• [llvm] [AArch64][GISel] Add legalizer support for @llvm.umul.with.overflow.i128 (PR #170101)   via llvm-commits
• [llvm] [AArch64][GISel] Add legalizer support for @llvm.umul.with.overflow.i128 (PR #170101)   via llvm-commits
• [llvm] [ConstantRange] Allow casting to the same bitwidth. NFC (PR #170102)   via llvm-commits
• [llvm] bf22687 - [OMPIRBuilder] CANCEL IF(FALSE) is still a cancellation point (#170095)   via llvm-commits
• [llvm] 6c0a02f - [X86] Add tests showing failure to concat sqrt intrinsics together. (#170096)   via llvm-commits
• [llvm] 0e721b7 - [X86] Add tests showing failure to concat RCPPS + RSQRTPS intrinsics together. (#170098)   via llvm-commits
• [llvm] [DA] Clean up unnecessary member function declarations (PR #170106)   via llvm-commits
• [llvm] edd1856 - [WebAssembly] Optimize away mask of 63 for shl ( zext (and i32 63))) (#152397)   via llvm-commits
• [llvm] [X86] Add tests showing failure to concat fp rounding intrinsics together. (PR #170108)   via llvm-commits
• [llvm] 577cd6f - [LIT] Workaround the 60 processed limit on Windows (#157759)   via llvm-commits
• [llvm] d0df51b - [ConstantRange] Allow casting to the same bitwidth. NFC (#170102)   via llvm-commits
• [llvm] 5877020 - [DA] Clean up unnecessary member function declarations (#170106)   via llvm-commits
• [llvm] 989ac4c - [X86] Add tests showing failure to concat fp rounding intrinsics together. (#170108)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics for multi-vector FEAT_SVE_BFSCALE instructions (PR #163536)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics support for multi-vector FMUL (PR #163397)   via llvm-commits
• [llvm] Fixes simple issue found static analyzer (PR #169958)   via llvm-commits
• [llvm] [X86] combineConcatVectorOps - add handling to concat sqrt intrinsics together (PR #170113)   via llvm-commits
• [llvm] [AArch64][GlobalISel] SIMD fpcvt codegen for rounding nodes (PR #165546)   via llvm-commits
• [llvm] [AArch64][GlobalISel] SIMD fpcvt codegen for rounding nodes (PR #165546)   via llvm-commits
• [llvm] [AArch64][GlobalISel] SIMD fpcvt codegen for rounding nodes (PR #165546)   via llvm-commits
• [llvm] [AArch64][GlobalISel] SIMD fpcvt codegen for rounding nodes (PR #165546)   via llvm-commits
• [llvm] 8478de3 - [LLVM][CodeGen] Remove failure cases when widening EXTRACT/INSERT_SUBVECTOR. (#162308)   via llvm-commits
• [llvm] [Arm] Control forced unrolling of small loops (PR #170127)   via llvm-commits
• [llvm] [GISel][Inlineasm] Support inlineasm i constraint for symbols (PR #170094)   via llvm-commits
• [llvm] [GISel][Inlineasm] Support inlineasm i constraint for symbols (PR #170094)   via llvm-commits
• [llvm] [GISel][Inlineasm] Support inlineasm i constraint for symbols (PR #170094)   via llvm-commits
• [llvm] [Arm] Control forced unrolling of small loops (PR #170127)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics for 9.6 crypto instructions (PR #165545)   via llvm-commits
• [clang-tools-extra] [llvm] [Clangd] Add AST search capabilities from clang-query (PR #156090)   via llvm-commits
• [llvm] [AArch64][GlobalISel] SIMD fpcvt codegen for rounding nodes (PR #165546)   via llvm-commits
• [llvm] 05ad840 - [X86] combineConcatVectorOps - add handling to concat sqrt intrinsics together (#170113)   via llvm-commits
• [llvm] [GISel][Inlineasm] Support inlineasm i constraint for symbols (PR #170094)   via llvm-commits
• [llvm] [WebAssembly] Optimize away mask of 63 for sra and srl( zext (and i32 63))) (PR #170128)   via llvm-commits
• [llvm] [AMDGPU][NPM] Preserve analyses in AMDGPURewriteAGPRCopyMFMA for NPM (PR #170130)   via llvm-commits
• [llvm] [AArch64][SME] Avoid clobbering X0 in the MachineSMEABIPass (PR #170131)   via llvm-commits
• [llvm] [InstCombine] Fold max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   via llvm-commits
• [llvm] [InstCombine] Fold max(max(x, c1) << c2, c3) —> max(x << c2, c3) when c3 >= c1 * 2 ^ c2 (PR #140526)   via llvm-commits
• [compiler-rt] [SPARC][builtins] Add sparcv9 arch name for 32-bit SPARC (PR #170133)   via llvm-commits
• [clang] [compiler-rt] [llvm] [SPARC] Properly handle CC for long double on sparc32 (PR #162226)   via llvm-commits
• [llvm] [ARM] Disable strict node mutation and use correct lowering for several strict ops (PR #170136)   via llvm-commits
• [llvm] d431f38 - [DA] Add tests for GCD MIV misses dependency due to overflow (NFC) (#169926)   via llvm-commits
• [llvm] [ARM] Disable strict node mutation and use correct lowering for several strict ops (PR #170136)   via llvm-commits
• [compiler-rt] [SPARC][builtins] Add sparcv9 arch name for 32-bit SPARC (PR #170133)   via llvm-commits
• [llvm] [AArch64] Add bitcasts for lowering saturating add/sub and shift intrinsics. (PR #161840)   via llvm-commits
• [llvm] c25ad27 - [AArch64] Remove unused references to MVT::f80. (#169545)   via llvm-commits
• [llvm] [AArch64][GlobalISel] SIMD fpcvt codegen for rounding nodes (PR #165546)   via llvm-commits
• [llvm] [AArch64][GlobalISel] SIMD fpcvt codegen for rounding nodes (PR #165546)   via llvm-commits
• [llvm] [BOLT] Add validation for direct call/branch targets, bypassing invalid functions (PR #165406)   via llvm-commits
• [llvm] 461433f - [DA] Add overflow check when calculating Delta in GCD MIV (#169928)   via llvm-commits
• [llvm] [MachineBasicBlock] Don't split loop header successor if the terminator is unanalyzable (PR #170146)   via llvm-commits
• [llvm] fa6d611 - [DA] Remove special handling for SCEVAddExpr in GCD MIV (#169927)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics for 9.6 crypto instructions (PR #165545)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics for 9.6 crypto instructions (PR #165545)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics for 9.6 crypto instructions (PR #165545)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics for 9.6 crypto instructions (PR #165545)   via llvm-commits
• [llvm] c7c6c0a - [AggressiveInstCombine] Fix memory location for alias analysis (#169953)   via llvm-commits
• [llvm] [X86] combineConcatVectorOps - add handling to concat RCPPS/RSQRTPS intrinsics together (PR #170148)   via llvm-commits
• [llvm] [WPD] Change Devirt Cutoff to use DebugCounter (PR #170009)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics for 9.6 crypto instructions (PR #165545)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics for 9.6 crypto instructions (PR #165545)   via llvm-commits
• [llvm] 73889c3 - [llvm-exegesis] Add CLI Option to set Fixed RNG seed   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics for 9.6 crypto instructions (PR #165545)   via llvm-commits
• [clang] [llvm] [x86][AVX-VNNI] Fix VPDPWXXD Argument Types (PR #169456)   via llvm-commits
• [clang] [llvm] [x86][AVX-VNNI] Fix VPDPWXXD Argument Types (PR #169456)   via llvm-commits
• [clang] [llvm] [x86][AVX-VNNI] Fix VPDPWXXD Argument Types (PR #169456)   via llvm-commits
• [clang] [llvm] [x86][AVX-VNNI] Fix VPDPWXXD Argument Types (PR #169456)   via llvm-commits
• [llvm] [RegAlloc] Remove redundant parameters for weightCalcHelper (NFC). (PR #170151)   via llvm-commits
• [llvm] [RegAlloc] Remove redundant parameters for weightCalcHelper (NFC). (PR #170151)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics support for SVE2p2 instructions (PR #163575)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics support for SVE2p2 instructions (PR #163575)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics support for SVE2p2 instructions (PR #163575)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics support for SVE2p2 instructions (PR #163575)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics support for SVE2p2 instructions (PR #163575)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics support for SVE2p2 instructions (PR #163575)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics support for SVE2p2 instructions (PR #163575)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics support for SVE2p2 instructions (PR #163575)   via llvm-commits
• [llvm] b76cada - [X86] combineConcatVectorOps - add handling to concat RCPPS/RSQRTPS intrinsics together (#170148)   via llvm-commits
• [llvm] 979a987 - [WPD] Change Devirt Cutoff to use DebugCounter (#170009)   via llvm-commits
• [llvm] [SPIRV] Promote scalar arguments to vector for `OpExtInst` in `generateExtInst` instead of `SPIRVRegularizer` (PR #170155)   via llvm-commits
• [llvm] [X86] Add test coverage for the concatenation of vXf64 sqrt intrinsics (PR #170158)   via llvm-commits
• [llvm] [LV][NFC] Remove unnecessary multiply in expandVPWidenIntOrFpInduction (PR #170159)   via llvm-commits
• [llvm] [X86] combineConcatVectorOps - add handling to concat fp rounding intrinsics together (PR #170160)   via llvm-commits
• [llvm] [llvm] Issues found PVS studio static analyzer. LoopUnrollAndJam.cpp (PR #170162)   via llvm-commits
• [llvm] [llvm] Issues found PVS studio static analyzer. LoopUnrollAndJam.cpp (PR #170162)   via llvm-commits
• [clang] [compiler-rt] [TySan] TySan support for SystemZ - Re-submission of original pr#162396 (PR #169850)   via llvm-commits
• [llvm] [llvm] Issues found PVS studio static analyzer. LoopUnrollAndJam.cpp (PR #170162)   via llvm-commits
• [llvm] [GISel][Inlineasm] Support inlineasm i constraint for symbols (PR #170094)   via llvm-commits
• [llvm] [GISel][Inlineasm] Support inlineasm i constraint for symbols (PR #170094)   via llvm-commits
• [llvm] [GISel][Inlineasm] Support inlineasm i/s constraint for symbols (PR #170094)   via llvm-commits
• [llvm] [AMDGPU] Fix AGPR_32 reg assign for mfma scale ops (PR #168964)   via llvm-commits
• [clang] [llvm] [Clang][AArch64] Implement widening FMMLA intrinsics (PR #165282)   via llvm-commits
• [llvm] [SPIRV] Promote scalar arguments to vector for `OpExtInst` in `generateExtInst` instead of `SPIRVRegularizer` (PR #170155)   via llvm-commits
• [llvm] 9f54c2a - [X86] Add test coverage for the concatenation of vXf64 sqrt intrinsics (#170158)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics support for SVE2p2 instructions (PR #163575)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics support for SVE2p2 instructions (PR #163575)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics support for SVE2p2 instructions (PR #163575)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics support for SVE2p2 instructions (PR #163575)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics support for SVE2p2 instructions (PR #163575)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics support for SVE2p2 instructions (PR #163575)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics support for SVE2p2 instructions (PR #163575)   via llvm-commits
• [llvm] 318d932 - [X86] combineConcatVectorOps - add handling to concat fp rounding intrinsics together (#170160)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics for 9.6 crypto instructions (PR #165545)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics for 9.6 crypto instructions (PR #165545)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics for 9.6 crypto instructions (PR #165545)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics for 9.6 crypto instructions (PR #165545)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics for 9.6 crypto instructions (PR #165545)   via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics for 9.6 crypto instructions (PR #165545)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics for 9.6 crypto instructions (PR #165545)   via llvm-commits
• [llvm] [X86] Add test coverage for the concatenation of ISD::FROUND intrinsics (PR #170166)   via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   via llvm-commits
• [llvm] [PowerPC][MC] Diagnose out of range branch fixups (PR #165859)   via llvm-commits
• [llvm] [llvm] Issues found PVS studio static analyzer. LoopUnrollAndJam.cpp (PR #170162)   via llvm-commits
• [llvm] [X86] Add test coverage for the concatenation of ISD::FFLOOR intrinsics (PR #170168)   via llvm-commits
• [llvm] [NFC][RISCV] Correct fminimumnum test case (PR #170169)   via llvm-commits
• [compiler-rt] 40aa91f - [TySan] TySan support for SystemZ - Re-submission of original pr#162396 (#169850)   via llvm-commits
• [llvm] [VPlan] Replace ExtractLast(Elem|LanePerPart) with ExtractLast(Lane/Part) (PR #164124)   via llvm-commits
• [llvm] a15a6c8 - [RISCV] Rename SFB Base Feature (#169607)   via llvm-commits
• [llvm] 8ccdb35 - [X86] Add test coverage for the concatenation of ISD::FFLOOR intrinsics (#170168)   via llvm-commits
• [llvm] [BOLT][AArch64] Enable safe ICF (PR #170172)   via llvm-commits
• [llvm] 4e316d7 - [X86] Add test coverage for the concatenation of ISD::FROUND intrinsics (#170166)   via llvm-commits
• [llvm] 8a3891c - [AMDGPU][NPM] Preserve analyses in AMDGPURewriteAGPRCopyMFMA for NPM (#170130)   via llvm-commits
• [llvm] 3d862cf - [SPIRV] Add legalization for long vectors (#169665)   via llvm-commits
• [compiler-rt] [SPARC][builtins] Add sparcv9 arch name for 32-bit SPARC (PR #170133)   via llvm-commits
• [llvm] 25ab47b - [VPlan] Use wide IV if scalar lanes > 0 are used with scalable vectors. (#169796)   via llvm-commits
• [llvm] [AMDGPU] Fix AGPR_32 reg assign for mfma scale ops (PR #168964)   via llvm-commits
• [llvm] [AMDGPU] Fix AGPR_32 reg assign for mfma scale ops (PR #168964)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add basic scalar handling for i32 lround and lrint (PR #170175)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add basic scalar handling for i32 lround and lrint (PR #170175)   via llvm-commits
• [llvm] [AMDGPU] Introduce Next-Use Analysis for SSA-based Register Allocation (PR #156079)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add basic scalar handling for i32 lround and lrint (PR #170175)   via llvm-commits
• [llvm] dec77e4 - [VPlan] Improve code in VPInstruction::generate (NFC) (#169470)   via llvm-commits
• [llvm] [X86] combineConcatVectorOps - add handling to concat ISD::FROUND/FFLOOR intrinsics together (PR #170176)   via llvm-commits
• [llvm] [LangRef] make consequences of NaN rules for pow(i) more explicit (PR #170177)   via llvm-commits
• [llvm] d1899ac - [X86] combineConcatVectorOps - add handling to concat ISD::FROUND/FFLOOR intrinsics together (#170176)   via llvm-commits
• [llvm] [WPD] Remove undef from tests (PR #170179)   via llvm-commits
• [clang] [llvm] RuntimeLibcalls: Move VectorLibrary handling into TargetOptions (PR #167996)   via llvm-commits
• [llvm] Avoid maxnum(sNaN, x) optimizations / folds (PR #170181)   via llvm-commits
• [llvm] Avoid maxnum(sNaN, x) optimizations / folds (PR #170181)   via llvm-commits
• [llvm] [LLVM] Add support for printing and parsing symbolic address spaces (PR #169422)   via llvm-commits
• [llvm] 0ff0f52 - Fix __apple_XXX iterator that iterates over all entries. (#157538)   via llvm-commits
• [llvm] [CI] Add checkmark emojis for passing builds (PR #170183)   via llvm-commits
• [llvm] [CI] Add checkmark emojis for passing builds (PR #170183)   via llvm-commits
• [llvm] e6ae246 - [AMDGPU] Refactor hazard recognizer for VALU-pipeline hazards. NFCI. (#168801)   via llvm-commits
• [llvm] [AMDGPU] Invert scc uses to delete s_cmp_eq* (PR #167382)   via llvm-commits
• [llvm] 6397e2f - Revert "[BPF] Allow libcalls behind a feature gate (#168442)" (#169733)   via llvm-commits
• [llvm] Revert "[BPF] Allow libcalls behind a feature gate (#168442)" (PR #169733)   via llvm-commits
• [llvm] Avoid maxnum(sNaN, x) optimizations / folds (PR #170181)   via llvm-commits
• [llvm] fffe9bc - [AMDGPU] Allow hazard checks for WMMA co-exec (#168805)   via llvm-commits
• [llvm] [AArch64][ARM] Optimize more `tbl`/`tbx` calls into `shufflevector` (PR #169748)   via llvm-commits
• [llvm] [llvm-readobj][MachO] Add support for CPU_TYPE_ARM64_32 (PR #170193)   via llvm-commits
• [llvm] [AArch64][ARM] Optimize more `tbl`/`tbx` calls into `shufflevector` (PR #169748)   via llvm-commits
• [llvm] [Github] Add workflow to test the issue write workflow (PR #170209)   via llvm-commits
• [llvm] [Github] Add workflow to test the issue write workflow (PR #170209)   via llvm-commits
• [llvm] 9324dae - [X86] Add tests showing failure to concat icmp instructions together. (#170210)   via llvm-commits
• [llvm] [DebugInfo][NVPTX] Adding support for `inlined_at` debug directive in NVPTX backend (PR #170239)   via llvm-commits
• [llvm] 91531f3 - [ThinLTO] Fix parsing null aliasee in alias summary (#169490)   via llvm-commits
• [llvm] [DebugInfo][NVPTX] Adding support for `inlined_at` debug directive in NVPTX backend (PR #170239)   via llvm-commits
• [llvm] Fix VarArgs FixedStack object on AIX. (PR #170240)   via llvm-commits
• [clang] [llvm] [AMDGPU] Apply alignment attr for make.buffer.rsrc (PR #166914)   via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   via llvm-commits
• [llvm] fbdf8ab - [LSV] Merge contiguous chains across scalar types (#154069)   via llvm-commits
• [llvm] 867d353 - [OpenMP][flang] Support GPU team-reductions on allocatables (#169651)   via llvm-commits
• [llvm] [AMDGPU] Serialize disjoint MFMA chains to hide DS_READ latency (PR #170242)   via llvm-commits
• [llvm] [AMDGPU] Serialize disjoint MFMA chains to hide DS_READ latency (PR #170242)   via llvm-commits
• [llvm] [PowerPC] Use the same lowering rule for vector rounding instructions (PR #166307)   via llvm-commits
• [llvm] [llvm-dwp] Fix FoundCUUnit problem on soft-stop with DWARF5 (PR #169783)   via llvm-commits
• [llvm] 4522448 - [PowerPC][MC] Diagnose out of range branch fixups (#165859)   via llvm-commits
• [llvm] [JumpThread] Fix `JumpThreading` pass to skip merging when both blocks contain convergence loop/entry intrinsics. (PR #170247)   via llvm-commits
• [lld] [lld-macho] Remove cuIndices indirection in UnwindInfoSection. NFC (PR #170252)   via llvm-commits
• [llvm] Improve formatting in BAT.md (PR #170254)   via llvm-commits
• [llvm] Improve formatting in BAT.md (PR #170254)   via llvm-commits
• [llvm] Improve formatting in BAT.md (PR #170254)   via llvm-commits
• [llvm] fixed lld-link: error: duplicate symbol: public: __cdecl llvm::Predic… (PR #169970)   via llvm-commits
• [llvm] [CFGPrinter] Add node id formater (PR #164623)   via llvm-commits
• [llvm] b5f7058 - [AArch64][GlobalISel] Don't crash when legalising vector G_SHL (#168848)   via llvm-commits
• [llvm] Add SubtargetFeature to disable lowering unpredicated loads/stores as… (PR #170256)   via llvm-commits
• [llvm] Revert "[Attributor] Support nested conditional branches" (PR #170257)   via llvm-commits
• [lld] 87d3795 - [lld-macho] Remove cuIndices indirection in UnwindInfoSection. NFC (#170252)   via llvm-commits
• [llvm] 34c6992 - [Arm] Control forced unrolling of small loops (#170127)   via llvm-commits
• [llvm] 30219f0 - [AMDGPU] Allow any SGPRs for chain callees (#168345)   via llvm-commits
• [llvm] b768152 - Revert "[Attributor] Support nested conditional branches" (#170257)   via llvm-commits
• [llvm] 9107d09 - [AArch64][SME] Avoid clobbering X0 in the MachineSMEABIPass (#170131)   via llvm-commits
• [llvm] fa2ddf2 - [AMDGPU] Fixup 30219f0f4300 (#170266)   via llvm-commits
• [llvm] 96c69b7 - [LTO][AllocToken] Support AllocToken instrumentation in backend (#169358)   via llvm-commits
• [llvm] 885509b - [llvm-readobj] [ARMWinEH] Fix the interpretation of packed unwind CR=01 RegI=1 (#169676)   via llvm-commits
• [llvm] 535f604 - [MC] [Win64EH] Clarify the comment about a skipped case of packed unwind info (#169784)   via llvm-commits
• [llvm] bbbc681 - [AArch64] Force dwarf unwind for MTE-tagged stack frames (#168530)   via llvm-commits
• [llvm] 1c32b6f - [AArch64][ARM] Move ARM-specific InstCombine transforms into `Transforms/Utils` (#169589)   via llvm-commits
• [llvm] 4a0b5bc - [MC] [Win64EH] Produce packed unwind for the special case of X19+LR (#169697)   via llvm-commits
• [llvm] aaa37af - [LLVM][CodeGen][SVE] Add lowering for ISD::[ANY,SIGN,ZERO]_EXTEND_VECTOR_INREG. (#169847)   via llvm-commits
• [llvm] 753f47d - [X86] Make VBMI2 funnel shifts use VSHLD/VSHRD for const splats (#169401)   via llvm-commits
• [llvm] 4b6ad11 - [VPlan] Sink predicated stores with complementary masks. (#168771)   via llvm-commits
• [llvm] e8bf011 - [LV] Emit better debug and opt-report messages when vectorization is disallowed in the LoopVectorizer (#158513)   via llvm-commits
• [llvm] 3098bfe - [llvm][Docs] Add release notes about dwarf fission with relaxations (#169871)   via llvm-commits
• [llvm] 9ba5fa2 - [Delinearization] Add test for inferred array size exceeds integer range (NFC) (#169048)   via llvm-commits
• [llvm] 7bced74 - [X86] combine-icmp.ll - fix copy+paste typo in concat_icmp_v64i8_v16i8 test (#170281)   via llvm-commits
• [llvm] 0e6d612 - [AArch64] Improve select dagcombine (#169925)   via llvm-commits
• [llvm] f5dd2dc - [cmake] Fix semicolon expansion when passing LLVM_TABLEGEN_FLAGS (#169518)   via llvm-commits
• [llvm] ea3fdc5 - Avoid maxnum(sNaN, x) optimizations / folds (#170181)   via llvm-commits
• [llvm] e74b425 - [HLSL][SPIR-V] Add support for SV_Target semantic (#168743)   via llvm-commits
• [llvm] e88a83a - [GlobalOpt][FMV] Perform expensive checks when NumVersions < Threshold (#168054)   via llvm-commits
• [llvm] 63f48fd - [CFGPrinter] Add node id formater (#164623)   via llvm-commits
• [llvm] 5d87609 - [SCEV] Allow udiv canonicalization of potentially-wrapping AddRecs (#169576)   via llvm-commits
• [llvm] 84e46aa - [X86] combineConcatVectorOps - add handling to concat setcc instructions together (#170295)   via llvm-commits
• [llvm] 854df54 - [Support] Optimize DebugCounter hot path (NFC) (#170260)   via llvm-commits
• [llvm] ca7edf2 - [AMDGPU][GISel] Add RegBankLegalize support for G_STRICT_{FADD|FMUL} (#169406)   via llvm-commits
• [llvm] 87f4e80 - [SPIRV] Add support for CodeSectionINTEL storage class in legalizer (#167961)   via llvm-commits
• [llvm] 23e6dbf - AMDGPU: Use ConstantPool as source value for DAG lowered kernarg loads (#168917)   via llvm-commits
• [llvm] 47d66bf - [X86] Add tests showing failure to concat fcmp instructions together (#170313)   via llvm-commits
• [llvm] [AArch64][GISel] Optimize i128 stores by splitting into two i64 stores (PR #170276)   via llvm-commits
• [llvm] 25b6a15 - GlobalISel: Stop using TPC to check if GlobalISelAbort is enabled (#169917)   via llvm-commits
• [clang] [llvm] [Clang][CodeGen] Remove explicit insertion of AllocToken pass (PR #169360)   via llvm-commits
• [llvm] [AMDGPU] Take BUF instructions into account in mayAccessScratchThroughFlat (PR #170274)   via llvm-commits
• [llvm] [SDAG] Disable illegal extract_subvector splitting for scalable vectors (PR #170315)   via llvm-commits
• [llvm] 0d853ae - AMDGPU: Fix treating unknown mem operands as uniform (#170309)   via llvm-commits
• [llvm] Add LoopVectorizer support for `llvm.vector.partial.reduce.fadd` (PR #163975)   via llvm-commits
• [llvm] [AMDGPU] Fix AGPR_32 reg assign for mfma scale ops (PR #168964)   via llvm-commits
• [llvm] [mips][micromips] Add mayRaiseFPException to appropriate instructions, mark all instructions that read FCSR (FCR31) rounding bits as doing so (PR #170322)   via llvm-commits
• [llvm] [mips][micromips] Add mayRaiseFPException to appropriate instructions, mark all instructions that read FCSR (FCR31) rounding bits as doing so (PR #170322)   via llvm-commits
• [llvm] [AMDGCN][SDAG] Expand (INSERT|EXTRACT)_VECTOR_ELT for dynamic indices even with -O0 (PR #170323)   via llvm-commits
• [llvm] 4ff3d1c - [profcheck] update exclude list (#170316)   via llvm-commits
• [llvm] [ValueTracking] Support scalable vector splats in computeKnownFPClass (PR #170325)   via llvm-commits
• [clang] [llvm] [OpenMP][clang] Register Vtables on device for indirect calls (PR #159856)   via llvm-commits
• [llvm] [AArch64] Optimize more floating-point round+convert combinations into fcvt instructions (PR #170018)   via llvm-commits
• [llvm] [AArch64] Optimize more floating-point round+convert combinations into fcvt instructions (PR #170018)   via llvm-commits
• [llvm] [AArch64] Optimize more floating-point round+convert combinations into fcvt instructions (PR #170018)   via llvm-commits
• [llvm] [AArch64] Optimize more floating-point round+convert combinations into fcvt instructions (PR #170018)   via llvm-commits
• [llvm] [mips][micromips] Add mayRaiseFPException to appropriate instructions, mark all instructions that read FCSR (FCR31) rounding bits as doing so (PR #170322)   via llvm-commits
• [clang] [llvm] [OpenMP][clang] Register Vtables on device for indirect calls (PR #159856)   via llvm-commits
• [llvm] [AMDGPU] Limit promoting allocas that have users with dynamic index above a threshold on number of elements (PR #170327)   via llvm-commits
• [llvm] [AMDGPU] Limit promoting allocas that have users with dynamic index above a threshold on number of elements (PR #170327)   via llvm-commits
• [clang] [llvm] Make OpenCL an OSType rather than an EnvironmentType. (PR #170297)   via llvm-commits
• [clang] [llvm] Make OpenCL an OSType rather than an EnvironmentType. (PR #170297)   via llvm-commits
• [llvm] 2ad7174 - [LSR] Insert the transformed IV increment in the user block (#169515)   via llvm-commits
• [llvm] Adding support for G_STRICT_FMA in new reg bank select (PR #170330)   via llvm-commits
• [llvm] Adding support for G_STRICT_FMA in new reg bank select (PR #170330)   via llvm-commits
• [llvm] c037128 - [ARM] Introduce intrinsics for MVE minnm/maxnm under strict-fp. (#169795)   via llvm-commits
• [llvm] [AMDGPU] Fix AGPR_32 reg assign for mfma scale ops (PR #168964)   via llvm-commits
• [llvm] [AMDGPU] Fix AGPR_32 reg assign for mfma scale ops (PR #168964)   via llvm-commits
• [llvm] [AMDGPU] Fix AGPR_32 reg assign for mfma scale ops (PR #168964)   via llvm-commits
• [llvm] [AMDGPU] Fix AGPR_32 reg assign for mfma scale ops (PR #168964)   via llvm-commits
• [llvm] [NFC] Refactor TargetLowering::getTgtMemIntrinsic to take CallBase parameter (PR #170334)   via llvm-commits
• [llvm] [NFC] Refactor TargetLowering::getTgtMemIntrinsic to take CallBase parameter (PR #170334)   via llvm-commits
• [llvm] [NFC] Refactor TargetLowering::getTgtMemIntrinsic to take CallBase parameter (PR #170334)   via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   via llvm-commits
• [llvm] [AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (PR #170335)   via llvm-commits
• [llvm] [BasicAA][TLI] Local-linkage or non-thread-local globals may not alias errno (PR #170290)   via llvm-commits
• [llvm] [AMDGPU] Fix AGPR_32 reg assign for mfma scale ops (PR #168964)   via llvm-commits
• [llvm] [AMDGPU][NFC] Put gfx125x common features into 12_50_Common (PR #170338)   via llvm-commits
• [llvm] [mlir] [PDLL] Collapse TypeDetail.h into Types.h (PR #170341)   via llvm-commits
• [llvm] Reapply "[MC] Use a variant to hold MCCFIInstruction state (NFC)" (PR #170342)   via llvm-commits
• [llvm] Reapply "[MC] Use a variant to hold MCCFIInstruction state (NFC)" (PR #170342)   via llvm-commits
• [llvm] e0f3302 - [ValueTracking] Support scalable vector splats in computeKnownFPClass (#170325)   via llvm-commits
• [llvm] LTO: Remove unused TargetLibraryInfo include (PR #170340)   via llvm-commits
• [llvm] ef49c92 - [NFC][LLVM] Namespace cleanup in ScalarEvolution (#166620)   via llvm-commits
• [llvm] [ValueTracking] Support scalable vector splats in computeKnownBits (PR #170345)   via llvm-commits
• [llvm] 2c38632 - LTO: Remove unused TargetLibraryInfo include (#170340)   via llvm-commits
• [lld] 4587fe6 - [lld] Fix typo in lld manpage, nfc (#170299)   via llvm-commits
• [lld] [lld] Fix typo in lld manpage, nfc (PR #170299)   via llvm-commits
• [llvm] 23a22d0 - [SROA] Unify the names of new instructions created in SROA. (#167917)   via llvm-commits
• [llvm] [DAG] Generate UMULH/SMULH with wider vector types (PR #170283)   via llvm-commits
• [llvm] e0db7f3 - [WebAssembly] Optimize away mask of 63 for sra and srl( zext (and i32 63))) (#170128)   via llvm-commits
• [llvm] 1a3709c - [SPIRV] Error for zero-length arrays if not a shader (#169732)   via llvm-commits
• [llvm] [AMDGPU] Add scaffolding for ML focused scheduling strategy (PR #169616)   via llvm-commits
• [llvm] [VPlan] Use SCEV to prove non-aliasing for stores at different offsets. (PR #170347)   via llvm-commits
• [llvm] 2183846 - [AMDGPU] Fix AGPR_32 reg assign for mfma scale ops (#168964)   via llvm-commits
• [llvm] [AMDGPU] Fix AGPR_32 reg assign for mfma scale ops (PR #168964)   via llvm-commits
• [llvm] 5c3c002 - [NFC] Refactor TargetLowering::getTgtMemIntrinsic to take CallBase parameter (#170334)   via llvm-commits
• [clang-tools-extra] [llvm] [Github][CI] Add `doc8` for clang-tidy documentation formatting (PR #168827)   via llvm-commits
• [llvm] 697b1be - [AMDGPU][NFC] Put gfx125x common features into 12_50_Common (#170338)   via llvm-commits
• [llvm] [AArch64] Use sve instructions for fixed-width smulh/umulh. (PR #166168)   via llvm-commits
• [llvm] [RISCV] Moving tuning features below non-tuning features. Put CPU family in their own section. NFC (PR #170352)   via llvm-commits
• [lld] [lld][MachO] Add --lto-emit-llvm command line option (PR #170355)   via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64] Add support for FCVTXNT, FCVTLT, {B}FCVTNT int… (PR #170356)   via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64] Add support for FCVTXNT, FCVTLT, {B}FCVTNT int… (PR #170356)   via llvm-commits
• [llvm] [Bazel] Fix `--warn-backrefs` errors in `Analysis` target (PR #170357)   via llvm-commits
• [compiler-rt] [asan][sanitizer_common] Enable build and testing of asan+sanitizer_common on AIX (PR #137186)   via llvm-commits
• [llvm] [llvm-readobj] [ARMWinEH] Fix printing of packed unwind with H=1, RegI=RegF=0, CR!=1 (PR #170294)   via llvm-commits
• [llvm] [llvm-profgen] Loading binary functions from .symtab when DWARF info is incomplete (PR #163654)   via llvm-commits
• [llvm] [llvm-profgen] Loading binary functions from .symtab when DWARF info is incomplete (PR #163654)   via llvm-commits
• [llvm] [llvm-profgen] Loading binary functions from .symtab when DWARF info is incomplete (PR #163654)   via llvm-commits
• [llvm] [llvm-profgen] Loading binary functions from .symtab when DWARF info is incomplete (PR #163654)   via llvm-commits
• [llvm] [llvm-profgen] Loading binary functions from .symtab when DWARF info is incomplete (PR #163654)   via llvm-commits
• [llvm] [AArch64] support `.arch_extension dit` (PR #169999)   via llvm-commits
• [compiler-rt] [NFC][asan] Fix formatting of asan_interceptors.h (PR #170361)   via llvm-commits
• [llvm] [IndVars] Strengthen inference of samesign flags (PR #170363)   via llvm-commits
• [llvm] [IndVars] Strengthen inference of samesign flags (PR #170363)   via llvm-commits
• [llvm] Fix lit testing to support standalone testing (PR #170365)   via llvm-commits
• [llvm] [AMDGPU] Introduce Next-Use Analysis for SSA-based Register Allocation (PR #156079)   via llvm-commits
• [llvm] [llvm-profgen] Loading binary functions from .symtab when DWARF info is incomplete (PR #163654)   via llvm-commits
• [llvm] [llvm-profgen] Loading binary functions from .symtab when DWARF info is incomplete (PR #163654)   via llvm-commits
• [llvm] [llvm-profgen] Loading binary functions from .symtab when DWARF info is incomplete (PR #163654)   via llvm-commits
• [llvm] [llvm-profgen] Loading binary functions from .symtab when DWARF info is incomplete (PR #163654)   via llvm-commits
• [llvm] [AMDGPU] Introduce Next-Use Analysis for SSA-based Register Allocation (PR #156079)   via llvm-commits
• [llvm] [DAG] SDPatternMatch - Fix m_Reassociatable mismatching (PR #170061)   via llvm-commits
• [llvm] [llvm-profgen] Loading binary functions from .symtab when DWARF info is incomplete (PR #163654)   via llvm-commits
• [llvm] [Bazel] Fix `--warn-backrefs` errors in `Analysis` target (PR #170357)   via llvm-commits
• [llvm] f0e1254 - [LV] Use forced cost once for whole interleave group in legacy costmodel (#168270)   via llvm-commits
• [flang] [llvm] [flang][OpenMP] Rename OmpLoopRangeClause to OmpLooprangeClause, NFC (PR #170370)   via llvm-commits
• [flang] [llvm] [flang][OpenMP] Rename OmpLoopRangeClause to OmpLooprangeClause, NFC (PR #170370)   via llvm-commits
• [flang] [llvm] [flang][OpenMP] Rename OmpLoopRangeClause to OmpLooprangeClause, NFC (PR #170370)   via llvm-commits
• [llvm] [AMDGPU] Prevent folding of flat_scr_base_hi into a 64-bit SALU (PR #170373)   via llvm-commits
• [llvm] [LLT] mark the CFI jumptable naked on Windows (PR #170371)   via llvm-commits
• [llvm] [SCEV] Factor out utility for proving same sign of two SCEVs [nfc] (PR #170376)   via llvm-commits
• [llvm] [llvm][NFC] In `SetVector`, `contains` and `count` now automatically accept `const T *` arguments when the key is `T *` (PR #170377)   via llvm-commits
• [llvm] [MemProf] Add remarks for matched allocs and calls (PR #170379)   via llvm-commits
• [llvm] Revert "[LSV] Merge contiguous chains across scalar types" (PR #170381)   via llvm-commits
• [llvm] Revert "[LSV] Merge contiguous chains across scalar types" (PR #170381)   via llvm-commits
• [llvm] Revert "[LSV] Merge contiguous chains across scalar types" (PR #170381)   via llvm-commits
• [llvm] [SLP][NFC]Simplify analysis of the scalars, NFC. (PR #170382)   via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   via llvm-commits
• [llvm] aeea056 - AMDGPU/GlobalISel: Report RegBankLegalize errors using reportGISelFailure (#169918)   via llvm-commits
• [llvm] 0f235c3 - [LowerConstantIntrinsics] Improve tests related to llvm.objectsize. NFC (#132364)   via llvm-commits
• [flang] [llvm] [flang/flang-rt] Implement show_descriptor intrinsic, a non-standard extension. (PR #170389)   via llvm-commits
• [flang] [llvm] [flang/flang-rt] Implement show_descriptor intrinsic, a non-standard extension. (PR #170389)   via llvm-commits
• [llvm] [SLP][NFC]Simplify analysis of the scalars, NFC. (PR #170382)   via llvm-commits
• [llvm] 9c78bc5 - Revert "[LSV] Merge contiguous chains across scalar types" (#170381)   via llvm-commits
• [llvm] e9c1274 - [LTT] mark the CFI jumptable naked on Windows (#170371)   via llvm-commits
• [llvm] [AMDGPU][NFC] Add occupancy checks for gfx950 and gfx1250 (PR #170392)   via llvm-commits
• [llvm] 45918f5 - [llvm][NFC] In `SetVector`, `contains` and `count` now automatically accept `const T *` arguments when the key is `T *` (#170377)   via llvm-commits
• [llvm] 9dd3346 - [AMDGPU] Prevent folding of flat_scr_base_hi into a 64-bit SALU (#170373)   via llvm-commits
• [llvm] c5e9289 - [llvm-exegesis] Make rvv/filter.test deterministic   via llvm-commits
• [llvm] [AMDGPU] Handle phys regs in flat_scratch_base_hi operand check (PR #170395)   via llvm-commits
• [llvm] [llvm-link] Add more detail to `--internalize` description (PR #170397)   via llvm-commits
• [llvm] dea86c6 - [AMDGPU][NFC] Add occupancy checks for gfx950 and gfx1250 (#170392)   via llvm-commits
• [llvm] [ReplaceConstant] Don't create instructions for the same constant multiple times in the same basic block (#169141) (PR #170398)   via llvm-commits
• [llvm] 83ab875 - [AMDGPU] Handle phys regs in flat_scratch_base_hi operand check (#170395)   via llvm-commits
• [llvm] [AMDGPU] Avoid undefs in hazard-gfx1250-flat-scr-hi.mir. NFC (PR #170396)   via llvm-commits
• [llvm] [RISCV] Update P extension to the 018 version of the spec. (PR #170399)   via llvm-commits
• [llvm] DAG: Use LibcallImpl in various getLibFunc helpers (PR #170400)   via llvm-commits
• [llvm] [RISCV] Update P extension to the 018 version of the spec. (PR #170399)   via llvm-commits
• [llvm] [LoongArch] Specially legalizing for several 128-bit vector trunc cases (PR #170403)   via llvm-commits
• [llvm] [LoongArch] Specially legalizing for several 128-bit vector trunc cases (PR #170403)   via llvm-commits
• [llvm] DAG: Use LibcallImpl in various getLibFunc helpers (PR #170400)   via llvm-commits
• [llvm] [AArch64] Optimize more floating-point round+convert combinations into fcvt instructions (PR #170018)   via llvm-commits
• [llvm] [AArch64] Optimize more floating-point round+convert combinations into fcvt instructions (PR #170018)   via llvm-commits
• [llvm] [CMake] Set LLVM_USE_LINKER for external projects when using lld (PR #170401)   via llvm-commits
• [llvm] [AArch64] Optimize more floating-point round+convert combinations into fcvt instructions (PR #170018)   via llvm-commits
• [llvm] [LoongArch] Specially legalizing for several 128-bit vector trunc cases (PR #170403)   via llvm-commits
• [llvm] 76cb984 - [RISCV] Sources of vmerge shouldn't overlap V0 (#170070)   via llvm-commits
• [llvm] 2978b20 - [Delinearization] Add validation for large size arrays (#169902)   via llvm-commits
• [llvm] 1c86f4a - [TTI] Use MemIntrinsicCostAttributes for getGatherScatterOpCost (#168650)   via llvm-commits
• [llvm] [llvm-profgen] Loading binary functions from .symtab when DWARF info is incomplete (PR #163654)   via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Improve compare between zeros (PR #140193)   via llvm-commits
• [llvm] [AArch64][GISel] Add legalizer support for @llvm.umul.with.overflow.i128 (PR #170101)   via llvm-commits
• [llvm] expandFMINIMUMNUM_FMAXIMUMNUM: Improve compare between zeros (PR #140193)   via llvm-commits
• [llvm] [SPIRV] Added support for the constrained arithmetic(Fmuladd) intrinsic (PR #170270)   via llvm-commits
• [llvm] [AArch64][GISel] Add legalizer support for @llvm.umul.with.overflow.i128 (PR #170101)   via llvm-commits
• [llvm] [mlir] [mlir][Bufferization]Add Inter-Procedural Fixed-Point Analysis for Recursive Function Call Graphs in One-Shot Bufferize (PR #170419)   via llvm-commits
• [llvm] [mlir] [mlir][Bufferization]Add Inter-Procedural Fixed-Point Analysis for Recursive Function Call Graphs in One-Shot Bufferize (PR #170419)   via llvm-commits
• [llvm] [mlir] [mlir][Bufferization]Add Inter-Procedural Fixed-Point Analysis for Recursive Function Call Graphs in One-Shot Bufferize (PR #170419)   via llvm-commits
• [llvm] [mlir] [mlir][Bufferization]Add Inter-Procedural Fixed-Point Analysis for Recursive Function Call Graphs in One-Shot Bufferize (PR #170419)   via llvm-commits
• [llvm] [mlir] [mlir][Bufferization]Add Inter-Procedural Fixed-Point Analysis for Recursive Function Call Graphs in One-Shot Bufferize (PR #170419)   via llvm-commits
• [llvm] 822fc44 - [LLVM][Intrinsics] Adds an API to automatically resolve overload types (#169007)   via llvm-commits
• [llvm] [InstCombine] Fold (sub nsw X, umin(X, C)) s< C2 to (X s< C + C2) (PR #170422)   via llvm-commits
• [llvm] [InstCombine] Fold (sub nsw X, umin(X, C)) s< C2 to (X s< C + C2) (PR #170422)   via llvm-commits
• [llvm] [InstCombine] Fold (sub nsw X, umin(X, C)) s< C2 to (X s< C + C2) (PR #170422)   via llvm-commits
• [llvm] [InstCombine] Fold (sub nsw X, umin(X, C)) s< C2 to (X s< C + C2) (PR #170422)   via llvm-commits
• [llvm] [OpenMP][Offload] Continue to update libomptarget debug messages (PR #170425)   via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   via llvm-commits
• [llvm] [InstCombine] Fold (sub nsw X, umin(X, C)) s< C2 to (X s< C + C2) (PR #170422)   via llvm-commits
• [llvm] 9f634c6 - [RISCV][GISel] Fix legalize G_EXTRACT_SUBVECTOR (#169877)   via llvm-commits
• [llvm] [Hexagon][NFC] Drop no-op getMaskedMemoryOpCost/getGatherScatterOpCost stubs (PR #170426)   via llvm-commits
• [llvm] [CodeGen][NPM] Add support for -print-regusage in New Pass Manager (PR #169761)   via llvm-commits
• [llvm] [CodeGen][NPM] Add support for -print-regusage in New Pass Manager (PR #169761)   via llvm-commits
• [llvm] 042a38f - [Support] Optimize DebugCounter (#170305)   via llvm-commits
• [llvm] [SPIRV] Added Support for the constrained conversion intrinsics (PR #157437)   via llvm-commits
• [llvm] [TTI] Use MemIntrinsicCostAttributes for getStridedOpCost (PR #170436)   via llvm-commits
• [llvm] [InstCombine] Fold (sub nsw X, umin(X, C)) s< C2 to (X s< C + C2) (PR #170422)   via llvm-commits
• [llvm] [RISCV] Clear kill flags for FalseReg in foldVMergeToMask (PR #170438)   via llvm-commits
• [llvm] [InstCombine] Fold chained GEP with constant base into single GEP (PR #170439)   via llvm-commits
• [clang] [llvm] Minimal support of floating-point operand bundles (PR #135658)   via llvm-commits
• [llvm] befa4e8 - [AMDGPU] Avoid undefs in hazard-gfx1250-flat-scr-hi.mir. NFC (#170396)   via llvm-commits
• [llvm] [NFC][AMDGPU] Refactor wave reduce test files. (PR #170440)   via llvm-commits
• [llvm] [NFC][AMDGPU] Refactor wave reduce test files. (PR #170440)   via llvm-commits
• [llvm] ae4289f - [Hexagon][NFC] Drop no-op getMaskedMemoryOpCost/getGatherScatterOpCost stubs (#170426)   via llvm-commits
• [llvm] cd86b2a - [CodeGen] Add MO_LaneMask type and a new COPY_LANEMASK instruction (#151944)   via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #163142)   via llvm-commits
• [llvm] [NFC][AMDGPU] Refactor wave reduce test files. (PR #170440)   via llvm-commits
• [llvm] [NFC][AMDGPU] Refactor wave reduce test files. (PR #170440)   via llvm-commits
• [llvm] 7cdb27a - [NFC][AMDGPU] Refactor wave reduce test files (#170440)   via llvm-commits
• [llvm] [NFC][AMDGPU] Refactor wave reduce test files. (PR #170440)   via llvm-commits
• [flang] [llvm] [flang] implement show_descriptor intrinsic, a non-standard extension (PR #169137)   via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   via llvm-commits
• [llvm] [VectorCombine][X86] foldShuffleOfIntrinsics - provide the arguments to a getShuffleCost call (PR #170465)   via llvm-commits
• [llvm] [VectorCombine][X86] foldShuffleOfIntrinsics - provide the arguments to a getShuffleCost call (PR #170465)   via llvm-commits
• [llvm] [SCEV] Handle non-constant start values in AddRec UDiv canonicalization. (PR #170474)   via llvm-commits
• [llvm] [SCEV] Handle non-constant start values in AddRec UDiv canonicalization. (PR #170474)   via llvm-commits
• [llvm] [LLVM][UTILS][VSCODE] Add LLVM LSP support in LLVM VS Code extension (PR #170489)   via llvm-commits
• [llvm] [SupportLSP] Add ShowMessageParams (PR #164626)   via llvm-commits
• [llvm] 58d74fe - [SupportLSP] Add ShowMessageParams (#164626)   via llvm-commits
• [llvm] [AArch64] Optimize more floating-point round+convert combinations into fcvt instructions (PR #170018)   via llvm-commits
• [llvm] [AArch64] Optimize more floating-point round+convert combinations into fcvt instructions (PR #170018)   via llvm-commits
• [llvm] bd21095 - [MachineBasicBlock] Don't split loop header successor if the terminator is unanalyzable (#170146)   via llvm-commits
• [llvm] ec6a15f - [X86] optimize masked truncated saturating stores (#169827)   via llvm-commits
• [clang] [llvm] [AMDGPU] Add s_wakeup_barrier instruction for gfx1250 (PR #170501)   via llvm-commits
• [llvm] c752bb9 - [IndVars] Strengthen inference of samesign flags (#170363)   via llvm-commits
• [clang] [llvm] [LLVM][AArch64] Add "u" variants of SVE saturating/rounding shift left intrinsics. (PR #170503)   via llvm-commits
• [clang] [llvm] [LLVM][AArch64] Add "u" variants of SVE saturating/rounding shift left intrinsics. (PR #170503)   via llvm-commits
• [llvm] AMDGPU: Generalize and normalize some tests to avoid future churn (PR #170508)   via llvm-commits
• [llvm] Build win release packages with LLDB_ENABLE_LIBXML2 (PR #170513)   via llvm-commits
• [llvm] [IndVars] Split the NumElimCmp into three pieces (PR #170514)   via llvm-commits
• [llvm] 838ad0e - AMDGPU: Generalize and normalize some tests to avoid future churn (#170508)   via llvm-commits
• [llvm] d18d53f - [DA] add testcases for bug #148435 (#154980)   via llvm-commits
• [llvm] 9383246 - [DA] Fix zero coeff bug in Strong SIV test with runtime assumptions (#149991) (#155037)   via llvm-commits
• [llvm] 70dd63b - [RISCV] Move tuning features below non-tuning features. Put CPU family in their own section. NFC (#170352)   via llvm-commits
• [llvm] [VectorCombine] Fold permute of intrinsics into intrinsic of permutes: shuffle(intrinsic, poison/undef) -> intrinsic(shuffle) (PR #170052)   via llvm-commits
• [llvm] [MemProf] Add option to emit full call context for matched allocations (PR #170516)   via llvm-commits
• [llvm] [MemProf] Add option to emit full call context for matched allocations (PR #170516)   via llvm-commits
• [llvm] [DA] Add batch delinearization support for improved precision (PR #170519)   via llvm-commits
• [llvm] [RISCV] Emit lpad for function with returns-twice attribute (PR #170520)   via llvm-commits
• [llvm] [RISCV] Emit lpad for function with returns-twice attribute (PR #170520)   via llvm-commits
• [llvm] [NFC][LLVM][CodeGen][SVE] Restructure urshr related PatFrags. (PR #170521)   via llvm-commits
• [llvm] [DebugInfo][LoopVectorizer][NFC] Use unknown annotations for more instructions (PR #170522)   via llvm-commits
• [llvm] [DebugInfo][LoopVectorizer][NFC] Use unknown annotations for more instructions (PR #170522)   via llvm-commits
• [llvm] 8d6c5cd - DAG: Use LibcallImpl in various getLibFunc helpers (#170400)   via llvm-commits
• [llvm] cdb5010 - DAG: Avoid more uses of getLibcallName (#170402)   via llvm-commits
• [llvm] 540fd18 - DAG: Avoid using getLibcallName when looking for a divrem call (#170413)   via llvm-commits
• [llvm] [SPIRV] Fix assertion violation caused by unexpected ConstantExpr. (PR #170524)   via llvm-commits
• [llvm] 2221f4a - [AMDGPU] Add a RUN line to check VGPR MSBs for VOPD pairs (#170494)   via llvm-commits
• [llvm] c2472be - [VectorCombine][X86] foldShuffleOfIntrinsics - provide the arguments to a getShuffleCost call (#170465)   via llvm-commits
• [llvm] 4ca61f5 - [NFC][SROA] Clean up rewritePartition type selection process (#169106)   via llvm-commits
• [llvm] d7cc82b - [IndVars] Split NumElimCmp statistic into three pieces (#170514)   via llvm-commits
• [llvm] [Github] Add workflow to test the issue write workflow (PR #170209)   via llvm-commits
• [llvm] [CI] Report real results for aarch64 (PR #170535)   via llvm-commits
• [llvm] [RISCV] Commute Src in foldVMV_V_V (PR #170536)   via llvm-commits
• [llvm] DAG: Set MachinePointerInfo for stack when expanding divrem libcall (PR #170537)   via llvm-commits
• [llvm] [RISCV] Combine vmerge_vl allones -> vmv_v_v, vmv_v_v splat(x) -> vmv_v_x (PR #170539)   via llvm-commits
• [llvm] c5fa1f8 - [DAGCombiner] Handle type-promoted constants in UDIV lowering (#169491)   via llvm-commits
• [llvm] [RISCV] Remove last use of experimental.vp.splat in RISCVCodeGenPrepare. NFCI (PR #170543)   via llvm-commits
• [llvm] 50916a4 - [VPlan] Use predicate in VPInstruction::computeCost for selects. (#170278)   via llvm-commits
• [llvm] [PowerPC] cost modeling for length type VP intrinsic load/store (PR #168938)   via llvm-commits
• [llvm] [RISCV] improve `musttail` support (PR #170547)   via llvm-commits
• [llvm] [PowerPC] FIX llc crashed at -O1/O2/O3: Assertion `isImm() && "Wrong MachineOperand mutator"' failed. (PR #170548)   via llvm-commits
• [llvm] 4715e52 - [Hexagon] Add an option to use fast FP to int convert for some HVX cases (#169562)   via llvm-commits
• [clang] [llvm] [PowerPC] Add initial support for AMO load builtins (PR #168746)   via llvm-commits
• [llvm] [AMDGPU] Add verifier for flat_scr_base_hi read hazard (PR #170550)   via llvm-commits
• [llvm] [Github] Add workflow to test the issue write workflow (PR #170209)   via llvm-commits
• [llvm] 7b3ec51 - [VPlan] Consolidate logic for narrowToSingleScalars (NFCI) (#167360)   via llvm-commits
• [llvm] [AArch64] Add isAppleMLike helper to check for M cores and aligned CPUs. (PR #170553)   via llvm-commits
• [llvm] [AArch64] Add isAppleMLike helper to check for M cores and aligned CPUs. (PR #170553)   via llvm-commits
• [llvm] 3d598c3 - [SPARC] Remove CCIfConsecutiveRegs for f128 returns (#170133)   via llvm-commits
• [llvm] Multi platofmr test fork (PR #170554)   via llvm-commits
• [llvm] 04c81a9 - CodeGen: Add LibcallLoweringInfo analysis pass (#168622)   via llvm-commits
• [llvm] [AArch64] Add isAppleMLike helper to check for M cores and aligned CPUs. (PR #170553)   via llvm-commits
• [llvm] 1054a6e - [SCEV] Handle non-constant start values in AddRec UDiv canonicalization. (#170474)   via llvm-commits
• [llvm] DAG: Use poison for filler values on legalize error paths (PR #170556)   via llvm-commits
• [llvm] [Hexagon] Fix HWBF16 PatLeaf type (PR #170560)   via llvm-commits
• [llvm] [MsgPack] Use JSON schema boolean resolution rules (PR #170561)   via llvm-commits
• [llvm] [DAGCombiner] Allow promoted constants in MULHU by power-of-2 -> SRL transform (PR #170562)   via llvm-commits
• [llvm] [DAGCombiner] Allow promoted constants in MULHU by power-of-2 -> SRL transform (PR #170562)   via llvm-commits
• [llvm] 90606ae - DAG: Use poison for filler values on legalize error paths (#170556)   via llvm-commits
• [llvm] DAG: Use more RTLIB helper functions for getting libcall from type (PR #170563)   via llvm-commits
• [llvm] 1f6d0d8 - [CAS] Disable CASTests on Windows versions before windows 11 (#170420)   via llvm-commits
• [llvm] [AMDGPU] Fix VGPR lowering for V_DUAL_FMAMK_F32 (PR #170567)   via llvm-commits
• [llvm] 4da31b6 - [Hexagon] Passes for widening vector operations and shuffle opt (#169559)   via llvm-commits
• [llvm] 240a0d1 - [llvm-profgen] Loading binary functions from .symtab when DWARF info is incomplete (#163654)   via llvm-commits
• [llvm] [llvm-profgen] Loading binary functions from .symtab when DWARF info is incomplete (PR #163654)   via llvm-commits
• [compiler-rt] [scudo] Show the resident pages from the secondary cache. (PR #170568)   via llvm-commits
• [llvm] f650330 - [PowerPC] Add initial support for AMO load builtins (#168746)   via llvm-commits
• [llvm] 3b9a0db - [RISCV] Update SpacemiT-X60 vector load/stores (#169936)   via llvm-commits
• [llvm] 6e47966 - [CodeGen][KCFI] Allow setting type hash from xxHash64 to FNV-1a (#167254)   via llvm-commits
• [llvm] 31ec45a - [AMDGPU] Fix VGPR lowering for V_DUAL_FMAMK_F32 (#170567)   via llvm-commits
• [lld] Fix lld crash wrt generated thunks growing away from the patched code (PR #170495)   via llvm-commits
• [llvm] [DirectX] Add lowering support for `llvm.fsh[l|r].*` (PR #170570)   via llvm-commits
• [llvm] [IR] Fix User use-after-destroy by zapping in ~User (PR #170575)   via llvm-commits
• [llvm] 1a09ac5 - [ORC] Add CallViaEPC and CallSPSViaEPC utilities. (#170464)   via llvm-commits
• [llvm] AMDGPU: Fix broken exp10 lowering for f16 (PR #170582)   via llvm-commits
• [clang] [llvm] [AMDGPU] Apply alignment attr for make.buffer.rsrc (PR #166914)   via llvm-commits
• [llvm] [AMDGPU] Generate waterfall for calls with SGPR(inreg) argument (PR #146997)   via llvm-commits
• [llvm] efbbca6 - [llvm][DebugInfo] Allow DIDerivedType as a bound in DISubrangeType (#165880)   via llvm-commits
• [llvm] [IR] Fix User use-after-destroy by zapping in ~User (PR #170575)   via llvm-commits
• [llvm] AMDGPU: Fix broken exp10 lowering for f16 (PR #170582)   via llvm-commits
• [llvm] [LLVM][IR] Add support for address space names in DataLayout (PR #170559)   via llvm-commits
• [llvm] [RISCV] Remove zvfh and experimental-zvfbfmin from the tests for xsfmm. (PR #170589)   via llvm-commits
• [llvm] [Support] Support debug counters in non-assertion builds (PR #170468)   via llvm-commits
• [llvm] fixed lld-link: error: duplicate symbol: public: __cdecl llvm::Predic… (PR #169970)   via llvm-commits
• [llvm] c2409b4 - [TTI] Remove masked/gather-scatter/strided/expand-compress costing from TTIImpl (#169885)   via llvm-commits
• [llvm] 4afc256 - Add llvm.protected.field.ptr intrinsic and pre-ISel lowering.   via llvm-commits
• [llvm] e60d62b - Utils: Inhibit load/store folding through phis for llvm.protected.field.ptr.   via llvm-commits
• [llvm] a29b29c - [llvm-dwp] Fix FoundCUUnit problem on soft-stop with DWARF5 (#169783)   via llvm-commits
• [clang] [llvm] [AMDGPU] Apply alignment attr for make.buffer.rsrc (PR #166914)   via llvm-commits
• [llvm] [AMDGPU] Generate waterfall for calls with SGPR(inreg) argument (PR #146997)   via llvm-commits
• [llvm] e5c3a53 - expandFMINIMUMNUM_FMAXIMUMNUM: Improve compare between zeros (#140193)   via llvm-commits
• [llvm] [VPlan] Fix opcode in LoadStore EVL recipe (PR #170594)   via llvm-commits
• [llvm] [VPlan] Fix opcode in LoadStore EVL recipe (PR #170594)   via llvm-commits
• [llvm] a82b97c - [CodeGen] Fix lpad padding at section start after empty block (#112595)   via llvm-commits
• [llvm] [profcheck] Don't verify generated global ctors/dtors (PR #170597)   via llvm-commits
• [llvm] [profcheck] Don't verify generated global ctors/dtors (PR #170597)   via llvm-commits
• [llvm] expandFMINIMUM_FMAXIMUM: FMAXNUM/FMINNUM treat +0>-0 (PR #137367)   via llvm-commits
• [llvm] 2222cfe - [C-API] LLVMOrcCreateObjectLinkingLayerWithInProcessMemoryManager (#169862)   via llvm-commits
• [llvm] [C-API] LLVMOrcCreateObjectLinkingLayerWithInProcessMemoryManager (PR #169862)   via llvm-commits
• [llvm] [AMDGPU] Limit promoting allocas that have users with dynamic index above a threshold on number of elements (PR #170327)   via llvm-commits
• [llvm] [RISCV][docs] Update url for SpacemiT xsmtvdot (PR #170598)   via llvm-commits
• [llvm] [KCFI][NFC] Remove unused header (PR #170599)   via llvm-commits
• [clang-tools-extra] [llvm] [Github][CI] Refactor `code-lint-helper.py` (PR #168827)   via llvm-commits
• [llvm] e891ff3 - [KCFI][NFC] Remove unused header (#170599)   via llvm-commits
• [llvm] [NFC][RISCV] Cleanup unused attributes in xsfmm tests (PR #170601)   via llvm-commits
• [clang-tools-extra] [llvm] [Github][CI] Refactor `code-lint-helper.py` (PR #168827)   via llvm-commits
• [llvm] [delinearize] clear Subscripts and Sizes vectors (NFC) (PR #156495)   via llvm-commits
• [polly] c08f49b - [delinearize] use SCEV exprs in getIndexExpressionsFromGEP (#162888)   via llvm-commits
• [llvm] 896288d - [Exegesis][RISCV] Support C_LDSP for llvm-exegesis (#169660)   via llvm-commits
• [clang-tools-extra] [llvm] [Github][CI] Refactor `code-lint-helper.py` (PR #168827)   via llvm-commits
• [clang-tools-extra] [llvm] [Github][CI] Refactor `code-lint-helper.py` (PR #168827)   via llvm-commits
• [clang-tools-extra] [llvm] [Github][CI] Refactor `code-lint-helper.py` (PR #168827)   via llvm-commits
• [clang-tools-extra] [llvm] [Github][CI] Refactor `code-lint-helper.py` (PR #168827)   via llvm-commits
• [clang-tools-extra] [llvm] [Github][CI] Refactor `code-lint-helper.py` (PR #168827)   via llvm-commits
• [clang-tools-extra] [llvm] [Github][CI] Refactor `code-lint-helper.py` (PR #168827)   via llvm-commits
• [clang-tools-extra] [llvm] [Github][CI] Refactor `code-lint-helper.py` (PR #168827)   via llvm-commits
• [clang-tools-extra] [llvm] [Github][CI] Refactor `code-lint-helper.py` (PR #168827)   via llvm-commits
• [clang-tools-extra] [llvm] [Github][CI] Introduce `LintHelper` class in `code-lint-helper.py` (PR #168827)   via llvm-commits
• [clang-tools-extra] [llvm] [Github][CI] Introduce `LintHelper` class in `code-lint-helper.py` (PR #168827)   via llvm-commits
• [llvm] cb5ccab - [RISCV][NFC] Simplify Imm range checks (#170497)   via llvm-commits
• [llvm] 9a71eff - [RISCV] Remove zvfh and experimental-zvfbfmin from the tests for xsfmm. (#170589)   via llvm-commits
• [llvm] [AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (PR #149062)   via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   via llvm-commits
• [llvm] 44d4197 - [RISCV] Emit lpad for function with returns-twice attribute (#170520)   via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   via llvm-commits
• [llvm] [LLVM][IR] Add support for address space names in DataLayout (PR #170559)   via llvm-commits
• [llvm] 41a6a0a - [AMDGPU] Add some more product names for GPUs (#170469)   via llvm-commits
• [clang] [llvm] [x86][AVX-VNNI] Fix VPDPWXXD Argument Types (PR #169456)   via llvm-commits
• [llvm] Allow multiple location for the same CSR. (PR #170606)   via llvm-commits
• [llvm] Allow multiple location for the same CSR. (PR #170606)   via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   via llvm-commits
• [llvm] a784187 - [delinearize] clear Subscripts and Sizes vectors (NFC) (#156495)   via llvm-commits
• [llvm] 3c5fd49 - AMDGPU/PromoteAlloca: Extract getVectorTypeForAlloca helper (#170509)   via llvm-commits
• [llvm] [RISCV][llvm] Support VFADD, VFSUB, VFMUL codegen for Zvfbfa (PR #170612)   via llvm-commits
• [llvm] 4fcb6e1 - [RISCV] Commute Src in foldVMV_V_V (#170536)   via llvm-commits
• [llvm] [WIP][CodeGen][RISCV] Allow multiple location for the same CSR. (PR #170606)   via llvm-commits
• [llvm] 0fa066b - [NFC][RISCV] Cleanup unused attributes in xsfmm tests (#170601)   via llvm-commits
• [llvm] [llvm-symbolizer] Recognize AIX big archive (PR #150401)   via llvm-commits
• [lld] [llvm] [DTLTO][ELF][COFF] Add archive support for DTLTO. (PR #157043)   via llvm-commits
• [llvm] [llvm-symbolizer] Recognize AIX big archive (PR #150401)   via llvm-commits
• [llvm] [LoongArch][NFC] Pre-commit tests for shufflevector reversing within subvectors (PR #170621)   via llvm-commits
• [llvm] e66e8aa - [RISCV][GISel] Support select G_EXTRACT_SUBVECTOR (#169789)   via llvm-commits
• [llvm] [LoongArch][NFC] Pre-commit tests for shufflevector reversing within subvectors (PR #170621)   via llvm-commits
• [llvm] [mlir] add ch1~ch3 note (PR #170624)   via llvm-commits
• [llvm] [mlir] add ch1~ch3 note (PR #170624)   via llvm-commits
• [lld] [llvm] [DTLTO][ELF][COFF] Add archive support for DTLTO. (PR #157043)   via llvm-commits
• [clang] [llvm] [CodeGen][KCFI] Allow setting type hash from xxHash64 to FNV-1a (PR #167254)   via llvm-commits
• [llvm] 186c9a7 - [LoongArch][NFC] Pre-commit tests for shufflevector reversing within subvectors (#170621)   via llvm-commits
• [llvm] [LoongArch][NFC] Pre-commit tests for shufflevector reversing within subvectors (PR #170621)   via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   via llvm-commits
• [llvm] [LoongArch] Custom legalize vector_shuffle to bswap (PR #170625)   via llvm-commits
• [llvm] [LoongArch] Custom legalize vector_shuffle to bswap (PR #170625)   via llvm-commits
• [llvm] [BOLT] Make safe ICF work with relative vtable (PR #170629)   via llvm-commits
• [llvm] [AArch64] Optimize memcpy for non-power of two sizes (PR #168890)   via llvm-commits
• [llvm] 38994f4 - [llvm-mca][AArch64] Refactor Neoverse tests to split out common inputs (NFC) (#170324)   via llvm-commits
• [llvm] 8993c93 - [AArch64] Compare and branch set twice in Neoverse V1/N1 sched (NFC) (#170498)   via llvm-commits
• [llvm] e84fdbe - [IR] Add CallBr intrinsics support (#133907)   via llvm-commits
• [llvm] fda85a1 - [DebugInfo][LoopVectorizer][NFC] Use unknown annotations for more instructions (#170522)   via llvm-commits
• [llvm] [AArch64] Fix the assertion failure on `RegisterVT == PartVT && "Part… (PR #170632)   via llvm-commits
• [llvm] [AArch64] Fix the assertion failure on `RegisterVT == PartVT && "Part… (PR #170632)   via llvm-commits
• [llvm] [mlir] add ch1~ch3 note (PR #170624)   via llvm-commits
• [llvm] [mlir] add ch1~ch3 note (PR #170624)   via llvm-commits
• [llvm] [AArch64] Optimize CBZ wzr and friends. (PR #161508)   via llvm-commits
• [llvm] [AMDGPU] Improve VGPR lowering test around FMA[AK|MK]. NFC (PR #170633)   via llvm-commits
• [llvm] 52113cf - AMDGPU: Fix broken exp10 lowering for f16 (#170582)   via llvm-commits
• [llvm] ff89558 - [VPlan] Fix opcode in LoadStore EVL recipe (#170594)   via llvm-commits
• [llvm] [SimplifyIndVar] ICMP predicate conversion to EQ/NE (PR #144945)   via llvm-commits
• [llvm] e5603da - [mlir][OpenMP] Fix assert in processing of dist_schedule (#170269)   via llvm-commits
• [llvm] [Orc][LibResolver] Refactor resolver internals and simplify symbol resolution. (PR #169161)   via llvm-commits
• [llvm] [Orc][LibResolver] Refactor resolver internals and simplify symbol resolution. (PR #169161)   via llvm-commits
• [llvm] [DA] Fix typo: Constan -> Constant (NFC) (PR #170636)   via llvm-commits
• [llvm] 0ba73fb - [llvm-c] Add LLVMConstFPFromBits() API (#164381)   via llvm-commits
• [llvm] 11b1bd5 - [DA] Fix typo: Constan -> Constant (NFC) (#170636)   via llvm-commits
• [llvm] [Orc][LibResolver] Refactor resolver internals and simplify symbol resolution. (PR #169161)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix / workaround amdgcn.kill/.unreachable lowering (PR #170639)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix / workaround amdgcn.kill/.unreachable lowering (PR #170639)   via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) (PR #155107)   via llvm-commits
• [llvm] [SelectionDAGBuilder] Remove NoNaNsFPMath uses (PR #169904)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add basic scalar handling for i32 lround and lrint (PR #170175)   via llvm-commits
• [llvm] 0e11a92 - [VPlan] Implement printing VPIRMetadata. (#168385)   via llvm-commits
• [llvm] [rtsan] Handle attributed IR function declarations (PR #169577)   via llvm-commits
• [llvm] [rtsan] Handle attributed IR function declarations (PR #169577)   via llvm-commits
• [llvm] 73ef27c - [DAGCombiner] Handle type-promoted constants in UDIV exact lowering (#169949)   via llvm-commits
• [llvm] 0458fe5 - [AMDGPU] Improve VGPR lowering test. NFC (#170633)   via llvm-commits
• [llvm] [AArch64] Fix the assertion failure on `RegisterVT == PartVT && "Part… (PR #170632)   via llvm-commits
• [llvm] b4b369a - [LLVM][InstCombine][AArch64] sve.dup(V, all_active, S) ==> splat(S) (#170292)   via llvm-commits
• [llvm] [rtsan] Handle attributed IR function declarations (PR #169577)   via llvm-commits
• [llvm] [X86] Remove `NoSignedZerosFPMath` uses (PR #163902)   via llvm-commits
• [llvm] [AArch64] Fix the assertion failure on `RegisterVT == PartVT && "Part… (PR #170632)   via llvm-commits
• [clang] [llvm] [mlir] [WIP][CUDA] update default CUDA sm ver to 75 (PR #170679)   via llvm-commits
• [clang-tools-extra] [llvm] [Github][CI] Introduce `LintHelper` class in `code-lint-helper.py` (PR #168827)   via llvm-commits
• [llvm] Fill in some missing C23 math libcall handling (PR #170672)   via llvm-commits
• [llvm] Fill in some missing C23 math libcall handling (PR #170672)   via llvm-commits
• [llvm] [X86] combine-sub-usat.ll - add test coverage inspired by #170076 (PR #170681)   via llvm-commits
• [llvm] Fill in some missing C23 math libcall handling (PR #170672)   via llvm-commits
• [llvm] [AMDGPU][DAGCombiner][GlobalISel] Prevent FMA contraction when multiply cannot be eliminated (PR #169735)   via llvm-commits
• [llvm] [RISCV] Inserting indirect jumps with X7 for Zicfilp (PR #170683)   via llvm-commits
• [llvm] 4f2d209 - [AArch64][GlobalISel] Add basic scalar handling for i32 lround and lrint (#170175)   via llvm-commits
• [llvm] [GVN] Merge identical critical edge split blocks from the same predecessor (PR #137750)   via llvm-commits
• [llvm] [LoopBoundSplit] Check if latch is operand of PHI induction variable (PR #167227)   via llvm-commits
• [clang] [llvm] [OpenMP][clang] Register Vtables on device for indirect calls (PR #159856)   via llvm-commits
• [llvm] 4c03b88 - [llvm-readobj][MachO] Add support for CPU_TYPE_ARM64_32 (#170193)   via llvm-commits
• [clang] [llvm] [ARM] Introduce intrinsics for MVE fp-converts under strict-fp. (PR #170686)   via llvm-commits
• [llvm] [InstSimplify] Add roundeven constant-propagation tests (PR #170688)   via llvm-commits
• [llvm] [RFC][LLVM] Emit dwarf data for changed-signature and new functions (PR #165310)   via llvm-commits
• [llvm] [TLI] Handle roundeven libcall in hasOptimizedCodegen (PR #170689)   via llvm-commits
• [llvm] [InstSimplify] Add roundeven constant-propagation tests (PR #170688)   via llvm-commits
• [llvm] [SelectionDAG] Handle roundeven libcall in visitCall (PR #170690)   via llvm-commits
• [llvm] [InferAttrs] Handle roundeven like other libm functions (PR #170691)   via llvm-commits
• [llvm] [TLI] Handle roundeven libcall in hasOptimizedCodegen (PR #170689)   via llvm-commits
• [llvm] [SelectionDAG] Handle roundeven libcall in visitCall (PR #170690)   via llvm-commits
• [llvm] [InferAttrs] Handle roundeven like other libm functions (PR #170691)   via llvm-commits
• [llvm] [ConstantFolding] Handle roundeven libcalls (PR #170692)   via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   via llvm-commits
• [llvm] Fill in some missing C23 math libcall handling (PR #170672)   via llvm-commits
• [llvm] Fill in some missing C23 math libcall handling (PR #170672)   via llvm-commits
• [llvm] 6283259 - DAG: Use more RTLIB helper functions for getting libcall from type (#170563)   via llvm-commits
• [llvm] ac56d6e - DAG: Avoid using getLibcallName for function support test (#170583)   via llvm-commits
• [llvm] [NFC] Reduce fragility of swdev503538-move-to-valu… test (PR #170702)   via llvm-commits
• [llvm] [RISCV64] liveness analysis (PR #167454)   via llvm-commits
• [llvm] [CI] Parse preceeding lines in mismatched failure messages (PR #170703)   via llvm-commits
• [clang] [llvm] [OpenMP][clang] Register Vtables on device for indirect calls (PR #159856)   via llvm-commits
• [llvm] [DA] Introduce domain for monotonicity (PR #170684)   via llvm-commits
• [llvm] 4424a58 - Document the community RFC process (#116386)   via llvm-commits
• [llvm] [AArch64] Optimize more floating-point round+convert combinations into fcvt instructions (PR #170018)   via llvm-commits
• [llvm] [AArch64][ARM] Optimize more `tbl`/`tbx` calls into `shufflevector` (PR #169748)   via llvm-commits
• [llvm] [AArch64][ARM] Optimize more `tbl`/`tbx` calls into `shufflevector` (PR #169748)   via llvm-commits
• [llvm] [AArch64][ARM] Optimize more `tbl`/`tbx` calls into `shufflevector` (PR #169748)   via llvm-commits
• [llvm] [InstSimplify] Add roundeven constant-propagation tests (PR #170688)   via llvm-commits
• [llvm] 222eb25 - [InferAttrs] Mark ceil and round as memory(none) (#170694)   via llvm-commits
• [llvm] [InferAttrs] Handle roundeven like other libm functions (PR #170691)   via llvm-commits
• [compiler-rt] [llvm] {JITLink] Add initial TLS support for SystemZ (PR #170706)   via llvm-commits
• [llvm] [docs] [RISCV] Update docs regarding RV32E/RV64E (PR #170707)   via llvm-commits
• [llvm] [docs] [RISCV] Update docs regarding RV32E/RV64E (PR #170707)   via llvm-commits
• [llvm] [ConstantFolding] Handle roundeven libcalls (PR #170692)   via llvm-commits
• [llvm] 1c72c90 - [InferAttrs] Handle roundeven like other libm functions (#170691)   via llvm-commits
• [llvm] cf7c255 - [JumpThread] Fix `JumpThreading` pass to skip merging when both blocks contain convergence loop/entry intrinsics. (#170247)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix broken exp10 lowering for f16 (PR #170708)   via llvm-commits
• [llvm] [VPlan] Use nuw/nsw when computing {VF, VScale}xUF (PR #170710)   via llvm-commits
• [llvm] [VPlan] Use nuw/nsw when computing {VF, VScale}xUF (PR #170710)   via llvm-commits
• [llvm] [AArch64] Lower v8bf16 FMUL to BFMLAL top/bottom with +sve (PR #169655)   via llvm-commits
• [compiler-rt] [llvm] {JITLink] Add initial TLS support for SystemZ (PR #170706)   via llvm-commits
• [llvm] [DA] runtime predicates for delinearization bounds checks (PR #170713)   via llvm-commits
• [libc] [llvm] Refactor WIDE_READ to allow finer control over high-performance function selection (PR #165613)   via llvm-commits
• [llvm] [NFC] Add missing analysis to `DirectX/llc-pipeline` (PR #170714)   via llvm-commits
• [llvm] Revert [VPlan] Consolidate logic for narrowToSingleScalars (PR #170720)   via llvm-commits
• [llvm] Revert [VPlan] Consolidate logic for narrowToSingleScalars (PR #170720)   via llvm-commits
• [llvm] ed6078c - [NFC] Add missing analysis to `DirectX/llc-pipeline` (#170714)   via llvm-commits
• [llvm] [RISCV64] liveness analysis (PR #167454)   via llvm-commits
• [llvm] 0b252da - [SystemZ] Handle IR struct arguments correctly. (#169583)   via llvm-commits
• [llvm] ef58670 - Revert [VPlan] Consolidate logic for narrowToSingleScalars (#170720)   via llvm-commits
• [llvm] d5072b9 - [RISCV] Select (and (shl X, 8), 0xff00) -> (packh zero, X) (#170654)   via llvm-commits
• [compiler-rt] [llvm] {JITLink] Add initial TLS support for SystemZ (PR #170706)   via llvm-commits
• [llvm] 78ee4a5 - [HEXAGON] [MachinePipeliner] Fix the DAG in case of dependent phis. (#135925)   via llvm-commits
• [llvm] [RISCV] Use GPRNoX0 instead of AVL for Xsfmm pseudos. NFC (PR #170726)   via llvm-commits
• [llvm] [SelectionDAGBuilder] Remove the added base offset in LowerFormalArguments(). (PR #170732)   via llvm-commits
• [llvm] [SelectionDAGBuilder] Remove the added base offset in LowerFormalArguments(). (PR #170732)   via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   via llvm-commits
• [llvm] AMDGPU/PromoteAlloca: Simplify how deferred loads work (PR #170510)   via llvm-commits
• [llvm] AMDGPU/PromoteAlloca: Simplify how deferred loads work (PR #170510)   via llvm-commits
• [llvm] [RISCV] Make RISCVInstrInfo::verifyInstruction stricter for immediate-only operands (PR #170736)   via llvm-commits
• [llvm] 097e0e1 - llvm-reduce: Add pass to sink defs to uses (#170317)   via llvm-commits
• [libc] [llvm] Reland Refactor WIDE_READ to allow finer control over high-performance function selection (#165613) (PR #170738)   via llvm-commits
• [libc] [llvm] Reland Refactor WIDE_READ to allow finer control over high-performance function selection (#165613) (PR #170738)   via llvm-commits
• [libc] [llvm] Reland Refactor WIDE_READ to allow finer control over high-performance function selection (#165613) (PR #170738)   via llvm-commits
• [llvm] [SCEV] Add m_scev_UndefOrPoison (NFC). (PR #170740)   via llvm-commits
• [llvm] [SCEV] Add poison/undef canonicalization for SCEVAddExpr, SCEVAddRecExpr. (PR #170741)   via llvm-commits
• [llvm] [SCEV] Add poison/undef canonicalization for SCEVAddExpr, SCEVAddRecExpr. (PR #170741)   via llvm-commits
• [llvm] [CI] Parse preceeding lines in mismatched failure messages (PR #170703)   via llvm-commits
• [llvm] [SCEV] Add poison/undef canonicalization for SCEVAddExpr, SCEVAddRecExpr. (PR #170741)   via llvm-commits
• [llvm] a992f29 - [AMDGPU] Emit amdgpu.max_num_named_barrier resource symbol (#169851)   via llvm-commits
• [llvm] [RISCV] Make RISCVInstrInfo::verifyInstruction stricter for immediate-only operands (PR #170736)   via llvm-commits
• [llvm] 3c2e5d5 - [AMDGPU] Update log lowering to remove contract for AMDGCN backend (#168916)   via llvm-commits
• [llvm] [AMDGPU] Update log lowering to remove contract for AMDGCN backend (PR #168916)   via llvm-commits
• [llvm] 4b42944 - [profcheck] Don't verify generated global ctors/dtors (#170597)   via llvm-commits
• [llvm] AMDGPU: Fix broken exp10 lowering for f16 (PR #170582)   via llvm-commits
• [llvm] [BOLT] Fix comments for interprocedural branches. NFC (PR #170745)   via llvm-commits
• [llvm] [BOLT] Minor code refactoring. NFC (PR #170746)   via llvm-commits
• [llvm] [RISCV] Use a valid AVL immedaite in allone-masked-to-unmasked.mir. NFC (PR #170747)   via llvm-commits
• [llvm] [RISCV] Correct the register class for the VL op check in RISCVInstrInfo::verifyInstruction. (PR #170751)   via llvm-commits
• [llvm] 72938d5 - [RISCV] Use a valid AVL immediate in allone-masked-to-unmasked.mir. NFC (#170747)   via llvm-commits
• [llvm] [InstCombine] Fix profile metadata when folding implied conditionals (PR #170756)   via llvm-commits
• [llvm] [AMDGPU][UnifyLoopExits] Fix duplicate succesor handling (PR #170759)   via llvm-commits
• [llvm] [NFC] Run UTC --check-globals on LowerTypeTests/import.ll (PR #170755)   via llvm-commits
• [llvm] 9c273dc - [RISCV] Correct the register class for the VL op check in RISCVInstrInfo::verifyInstruction. (#170751)   via llvm-commits
• [llvm] [profcheck] Don't verify generated global ctors/dtors (PR #170597)   via llvm-commits
• [llvm] Skip stack protectors on alloca's which have new metadata to opt out (PR #170229)   via llvm-commits
• [llvm] Skip stack protectors on alloca's which have new metadata to opt out (PR #170229)   via llvm-commits
• [llvm] 5ca53a2 - [ORC] Add synchronous helper APIs to CallViaEPC.h (#170743)   via llvm-commits
• [llvm] [RISCV] Add OPERAND_AVL to RISCVInstrInfo::verifyInstruction. (PR #170770)   via llvm-commits
• [llvm] AMDGPU: Improve exp10 lowering for f16 (PR #170771)   via llvm-commits
• [clang] [llvm] [OpenMP][clang] Register Vtables on device for indirect calls (PR #159856)   via llvm-commits
• [llvm] bdea6a2 - [AMDGPU] Add verifier for flat_scr_base_hi read hazard (#170550)   via llvm-commits
• [llvm] [Support][Windows] disk_space handle unicode paths (PR #170716)   via llvm-commits
• [llvm] [Support][Windows] disk_space handle unicode paths (PR #170716)   via llvm-commits
• [libc] [llvm] Reland Refactor WIDE_READ to allow finer control over high-performance function selection (#165613) (PR #170738)   via llvm-commits
• [llvm] [NFC][LLVM] Minor code cleanup in DebugLoc (PR #170757)   via llvm-commits
• [llvm] [NFC][LLVM] Minor code cleanup in DebugLoc (PR #170757)   via llvm-commits
• [libc] [llvm] Reland Refactor WIDE_READ to allow finer control over high-performance function selection (#165613) (PR #170738)   via llvm-commits
• [flang] [llvm] [mlir] Revert "[Flang][OpenMP] Add lowering support for is_device_ptr clause" (PR #170778)   via llvm-commits
• [flang] [llvm] [mlir] Revert "[Flang][OpenMP] Add lowering support for is_device_ptr clause" (PR #170778)   via llvm-commits
• [flang] [llvm] [mlir] Revert "[Flang][OpenMP] Add lowering support for is_device_ptr clause" (PR #170778)   via llvm-commits
• [llvm] 8f9ef4b - [RISCV] Add OPERAND_AVL to RISCVInstrInfo::verifyInstruction. (#170770)   via llvm-commits
• [llvm] d3b9fd0 - [WebAssembly] Implement addrspacecast to funcref (#166820)   via llvm-commits
• [flang] [llvm] [mlir] Revert "[Flang][OpenMP] Add lowering support for is_device_ptr clause" (PR #170778)   via llvm-commits
• [llvm] da06d9e - [CodeGen] Use insert idiom in CFIInstrInserter instead of find [nfc] (#170760)   via llvm-commits
• [llvm] Revert "[WebAssembly] Implement addrspacecast to funcref" (PR #170785)   via llvm-commits
• [compiler-rt] [ASan] Disable test that sets call stack on Darwin (PR #170786)   via llvm-commits
• [clang] [llvm] [AMDGPU] Apply alignment attr for make.buffer.rsrc (PR #166914)   via llvm-commits
• [clang] [llvm] [AMDGPU] Apply alignment attr for make.buffer.rsrc (PR #166914)   via llvm-commits
• [llvm] [StackProtector] Introduce stack-protect-refinement pass to remove unnecessary protections. (PR #150390)   via llvm-commits
• [compiler-rt] [UBSan] Fix missing preserve handlers (PR #170788)   via llvm-commits
• [llvm] [StackProtector] Introduce stack-protect-refinement pass to remove unnecessary protections. (PR #150390)   via llvm-commits
• [llvm] b75e564 - [RISCV][docs] Update url for SpacemiT xsmtvdot (#170598)   via llvm-commits
• [llvm] 6d60d3d - Revert "[WebAssembly] Implement addrspacecast to funcref" (#170785)   via llvm-commits
• [llvm] [NFC] Fix memory leak in ConstantsTest (PR #170789)   via llvm-commits
• [llvm] f50a079 - build_llvm_release.bat: Use absolute path when building the tarball (#169951)   via llvm-commits
• [llvm] [LoopPeel] Fix typo Derefencebale -> Derefenceable. NFC (PR #170791)   via llvm-commits
• [llvm] [WIP][SPARC][IAS] Implement Solaris Natural Instruction extension (PR #170794)   via llvm-commits
• [llvm] [WIP][SPARC][IAS] Implement Solaris Natural Instruction extension (PR #170794)   via llvm-commits
• [llvm] [WIP][SPARC][IAS] Implement Solaris Natural Instruction extension (PR #170794)   via llvm-commits
• [llvm] [WIP][SPARC][IAS] Implement Solaris Natural Instruction extension (PR #170794)   via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   via llvm-commits
• [llvm] 7f01d72 - [NFC] Fix memory leak in ConstantsTest (#170789)   via llvm-commits
• [llvm] Adding Matching and Inference Functionality to Propeller-PR4: Implement matching and inference and create clusters (PR #167622)   via llvm-commits
• [llvm] Adding Matching and Inference Functionality to Propeller-PR4: Implement matching and inference and create clusters (PR #167622)   via llvm-commits
• [llvm] Adding Matching and Inference Functionality to Propeller-PR4: Implement matching and inference and create clusters (PR #167622)   via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   via llvm-commits
• [llvm] [IR] Split vector.splice into vector.splice.down and vector.splice.up (PR #170796)   via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   via llvm-commits
• [llvm] [SPIRV] Start adding support for `int128` (PR #170798)   via llvm-commits
• [llvm] [IR] Split vector.splice into vector.splice.down and vector.splice.up (PR #170796)   via llvm-commits
• [llvm] [SPIRV] Start adding support for `int128` (PR #170798)   via llvm-commits
• [llvm] 71de783 - [RISCV] Inserting indirect jumps with X7 for Zicfilp (#170683)   via llvm-commits
• [llvm] af4098b - [RISCV][llvm] Support PSLL codegen for P extension (#170074)   via llvm-commits
• [llvm] e48d49f - [RISCV][llvm] Support VFADD, VFSUB, VFMUL codegen for Zvfbfa (#170612)   via llvm-commits
• [llvm] [RISCV64] liveness analysis (PR #167454)   via llvm-commits
• [clang] [llvm] [AMDGPU] Apply alignment attr for make.buffer.rsrc (PR #166914)   via llvm-commits
• [llvm] [IR] llvm.reloc.none intrinsic for no-op symbol references (PR #147427)   via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   via llvm-commits
• [llvm] [Orc][LibResolver] Refactor resolver internals and simplify symbol resolution. (PR #169161)   via llvm-commits
• [llvm] [ORC] Add void function support to CallViaEPC, CallSPSViaEPC. (PR #170800)   via llvm-commits
• [clang-tools-extra] [llvm] [Github][CI] Introduce `LintHelper` class in `code-lint-helper.py` (PR #168827)   via llvm-commits
• [llvm] Add a filegroup containing _all_ sources to the libc build rules (PR #169155)   via llvm-commits
• [llvm] 5911754 - Adding Matching and Inference Functionality to Propeller-PR4: Implement matching and inference and create clusters (#167622)   via llvm-commits
• [llvm] Adding Matching and Inference Functionality to Propeller-PR4: Implement matching and inference and create clusters (PR #167622)   via llvm-commits
• [llvm] [llvm-symbolizer] Recognize AIX big archive (PR #150401)   via llvm-commits
• [clang-tools-extra] [llvm] [Github][CI] Introduce `LintHelper` class in `code-lint-helper.py` (PR #168827)   via llvm-commits
• [llvm] [llvm-symbolizer] Recognize AIX big archive (PR #150401)   via llvm-commits
• [clang-tools-extra] [llvm] [Github][CI] Introduce `LintHelper` class in `code-lint-helper.py` (PR #168827)   via llvm-commits
• [llvm] [X86][APX] Add pattern for zext(X86setcc ..) -> SETZUCCr (PR #170806)   via llvm-commits
• [llvm] c9ebc89 - [ORC] Add void function support to CallViaEPC, CallSPSViaEPC. (#170800)   via llvm-commits
• [llvm] [IR] Fix vector.splice verifier scaling by vscale for fixed length vectors (PR #170807)   via llvm-commits
• [llvm] 4c6b882 - [DAG] Fold mul 0 -> 0 when expanding mul into parts. (#168780)   via llvm-commits
• [compiler-rt] [sanitizer_common] [Darwin] Replace pty with pipe on posix_spawn path for spawning symbolizer (PR #170809)   via llvm-commits
• [compiler-rt] [sanitizer_common] [Darwin] Replace pty with pipe on posix_spawn path for spawning symbolizer (PR #170809)   via llvm-commits
• [llvm] [AMDGPU] Add wave reduce intrinsics for double types - 1 (PR #170811)   via llvm-commits
• [llvm] [AMDGPU] Add wave reduce intrinsics for double types - 1 (PR #170811)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Fix vector lrint/llrint fallbacks (PR #170814)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Fix vector lrint/llrint fallbacks (PR #170814)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Fix vector lrint/llrint fallbacks (PR #170814)   via llvm-commits
• [compiler-rt] [sanitizer_common] [Darwin] Add inline frame support for AtosSymbolizer (PR #170815)   via llvm-commits
• [llvm] cc5b07c - [IR] Fix vector.splice verifier scaling by vscale for fixed length vectors (#170807)   via llvm-commits
• [llvm] [LoadStoreVectorizer] Fill gaps in load/store chains to enable vectorization (PR #159388)   via llvm-commits
• [compiler-rt] [sanitizer_common] Fix missing `check-sanitizer` deps under LLVM_ENABLE_RUNTIMES (PR #170817)   via llvm-commits
• [llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)   via llvm-commits
• [llvm] [llvm-symbolizer] Recognize AIX big archive (PR #150401)   via llvm-commits
• [llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)   via llvm-commits
• [llvm] [RISCV][TTI] Add cost model for ROTL/ROTR (PR #170824)   via llvm-commits
• [llvm] [llvm-symbolizer] Recognize AIX big archive (PR #150401)   via llvm-commits
• [llvm] [llvm-symbolizer] Recognize AIX big archive (PR #150401)   via llvm-commits
• [llvm] [llvm-symbolizer] Recognize AIX big archive (PR #150401)   via llvm-commits
• [llvm] [llvm-symbolizer] Recognize AIX big archive (PR #150401)   via llvm-commits
• [llvm] [llvm-symbolizer] Recognize AIX big archive (PR #150401)   via llvm-commits
• [llvm] [llvm-symbolizer] Recognize AIX big archive (PR #150401)   via llvm-commits
• [llvm] [llvm-symbolizer] Recognize AIX big archive (PR #150401)   via llvm-commits
• [llvm] [llvm-symbolizer] Recognize AIX big archive (PR #150401)   via llvm-commits
• [llvm] [llvm-symbolizer] Recognize AIX big archive (PR #150401)   via llvm-commits
• [llvm] [llvm-symbolizer] Recognize AIX big archive (PR #150401)   via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   via llvm-commits
• [llvm] [VPlanValue] Introduce hasOneUser(). nfc (PR #170826)   via llvm-commits
• [llvm] [llvm-symbolizer] Recognize AIX big archive (PR #150401)   via llvm-commits
• [llvm] 2612dc9 - [X86][APX] Add pattern for zext(X86setcc ..) -> SETZUCCr (#170806)   via llvm-commits
• [clang] [llvm] [RISCV][Zicfilp] Enable Zicfilp CFI compiler behaviors by looking at module flags (PR #152121)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Added support for left shift neon intrinsics (PR #170827)   via llvm-commits
• [llvm] [RISCV] Add short forward branch support for `lb`, `lbu`, `lh`, `lhu`, `lw`, `lwu` and `ld` (PR #170829)   via llvm-commits
• [llvm] [RISCV] Add short forward branch support for `lb`, `lbu`, `lh`, `lhu`, `lw`, `lwu` and `ld` (PR #170829)   via llvm-commits
• [llvm] ccfe7e0 - [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (#167900)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics support for multi-vector FMUL (PR #163397)   via llvm-commits
• [llvm] 7dc87cb - [InferAttrs] Handle f[min/max]imum_num like other libm functions (#170697)   via llvm-commits
• [llvm] [llvm-symbolizer] Recognize AIX big archive (PR #150401)   via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   via llvm-commits
• [llvm] [llvm-symbolizer] Recognize AIX big archive (PR #150401)   via llvm-commits
• [llvm] bae2401 - [InstCombine] Add regression tests for f[min][max]imum_num libcalls (#170695)   via llvm-commits
• [llvm] 63e9d60 - AMDGPU: Improve exp10 lowering for f16 (#170771)   via llvm-commits
• [llvm] 352b901 - [ConstantFolding] Handle roundeven libcalls (#170692)   via llvm-commits
• [llvm] [InstCombine] Preload DomConditionCache to reach fixed point when sinking (PR #170835)   via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics for multi-vector FEAT_SVE_BFSCALE instructions (PR #163536)   via llvm-commits
• [llvm] 113f058 - [SCEV] Add m_scev_UndefOrPoison (NFC). (#170740)   via llvm-commits
• [llvm] [X86] LowerShuffle - don't call canonicalizeShuffleMaskWithHorizOp if we could shuffle whole lanes (PR #170838)   via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   via llvm-commits
• [llvm] [RISCV] Refactor some code in RISCVMergeBaseOffse.NFC (PR #170839)   via llvm-commits
• [llvm] f199836 - [LLVM][AArch64] Add "u" variants of SVE saturating/rounding shift left intrinsics. (#170503)   via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   via llvm-commits
• [llvm] [AMDGPU] Common up some unsafe fexp lowering. NFC. (PR #170841)   via llvm-commits
• [llvm] 990289c - [X86] LowerShuffle - don't call canonicalizeShuffleMaskWithHorizOp if we could shuffle whole lanes (#170838)   via llvm-commits
• [llvm] [X86][APX] Compress setzucc with memory operand to setcc (PR #170842)   via llvm-commits
• [llvm] [PowerPC][AIX] Emit weak_definition symbols as weak externals (PR #156072)   via llvm-commits
• [llvm] [AMDGPU] Inherit constructors from WaitcntGenerator. NFC. (PR #170845)   via llvm-commits
• [llvm] db84960 - [AArch64] Add intrinsics for multi-vector FEAT_SVE_BFSCALE instructions (#163536)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics for multi-vector FEAT_SVE_BFSCALE instructions (PR #163536)   via llvm-commits
• [llvm] 740a3ad - AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (#141068)   via llvm-commits
• [llvm] AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (PR #141068)   via llvm-commits
• [llvm] b36f89f - [AMDGPU] Make rotr illegal (#166558)   via llvm-commits
• [llvm] [BOLT][BTI] Add MCPlusBuilder::insertBTI (PR #167329)   via llvm-commits
• [llvm] Remove LLVM_ABI from members of RuntimeLibraryAnalysis (NFC) (PR #170850)   via llvm-commits
• [flang] [llvm] [mlir] Reland "[Flang][OpenMP] Add lowering support for is_device_ptr clause (#169331)" (PR #170851)   via llvm-commits
• [flang] [llvm] [mlir] Reland "[Flang][OpenMP] Add lowering support for is_device_ptr clause (#169331)" (PR #170851)   via llvm-commits
• [llvm] [AArch64]SIMD fpcvt codegen for rounding nodes (PR #165546)   via llvm-commits
• [llvm] [profcheck][test] Use quotes for when not using the internal lit shell (PR #170873)   via llvm-commits
• [llvm] [profcheck][test] Use quotes for when not using the internal lit shell (PR #170873)   via llvm-commits
• [llvm] Revert "[BOLT][AArch64] Fixed indirect call instrumentation snippet" (PR #170874)   via llvm-commits
• [llvm] [SimplifyLibCalls] Recognize and simplify f[min/max]imumnum (PR #170699)   via llvm-commits
• [llvm] [AArch64] Fold tbl1 intrinsic into dup when broadcasting (PR #170872)   via llvm-commits
• [llvm] 716fffe - PowerPC: Add vec_malloc functions to AIX in RuntimeLibcalls (#167089)   via llvm-commits
• [llvm] 23f09fd - [VectorCombine] Fold permute of intrinsics into intrinsic of permutes: shuffle(intrinsic, poison/undef) -> intrinsic(shuffle) (#170052)   via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   via llvm-commits
• [llvm] [VectorCombine] Fold permute of intrinsics into intrinsic of permutes: shuffle(intrinsic, poison/undef) -> intrinsic(shuffle) (PR #170052)   via llvm-commits
• [llvm] [TLI] Handle roundeven libcall in hasOptimizedCodegen (PR #170689)   via llvm-commits
• [llvm] [IR] Add ImplicitTrunc argument to ConstantInt::get() (PR #170865)   via llvm-commits
• [llvm] [ADT] BitVector: give `subsetOf(RHS)` name to `!test(RHS)` (NFC) (PR #170875)   via llvm-commits
• [llvm] [ADT] BitVector: give `subsetOf(RHS)` name to `!test(RHS)` (NFC) (PR #170875)   via llvm-commits
• [llvm] 7f2e6f1 - [Clang][AArch64] Implement widening FMMLA intrinsics (#165282)   via llvm-commits
• [clang] [llvm] [Clang][AArch64] Implement widening FMMLA intrinsics (PR #165282)   via llvm-commits
• [llvm] 38e5878 - [profcheck][test] Use quotes for when not using the internal lit shell (#170873)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] WavePrefixSum intrinsic support (PR #167946)   via llvm-commits
• [llvm] 80760b0 - [SimplifyLibCalls] Recognize and simplify f[min/max]imumnum (#170699)   via llvm-commits
• [llvm] f26360f - [IR] Don't store switch case values as operands (#166842)   via llvm-commits
• [llvm] [DA] runtime predicates for delinearization bounds checks (PR #170713)   via llvm-commits
• [llvm] [AArch64] Only fold into ands directly if AND is one-use (PR #167371)   via llvm-commits
• [llvm] workflows/release-binaries: Use upload-release-artifact action for uploading (PR #170528)   via llvm-commits
• [llvm] [AMDGPU][NPM] Port AMDGPUArgumentUsageInfo to NPM (PR #170886)   via llvm-commits
• [llvm] a94ee7e - [InstCombine] Fix profile metadata when folding implied conditionals (#170756)   via llvm-commits
• [llvm] [AMDGPU][NPM] Port AMDGPUArgumentUsageInfo to NPM (PR #170886)   via llvm-commits
• [llvm] 69721ac - [TableGen] Report a better error when an InstAlias does not use a RegClass   via llvm-commits
• [llvm] 8505a87 - [TableGen] CodeGenInstAlias: reduce calls to isSubClassOf. NFCI   via llvm-commits
• [llvm] [SelectionDAG] Handle roundeven libcall in visitCall (PR #170690)   via llvm-commits
• [llvm] [X86] Add EltsFromConsecutiveLoads test for infinite loop if we match reverse(vzload(ptr)) patterns (PR #170889)   via llvm-commits
• [libc] [llvm] Reland Refactor WIDE_READ to allow finer control over high-performance function selection (#165613) (PR #170738)   via llvm-commits
• [compiler-rt] fb65131 - Add API to temporalily suppress usage of ASAN's fake stack (#160135)   via llvm-commits
• [llvm] [SelectionDAG] Handle roundeven libcall in visitCall (PR #170690)   via llvm-commits
• [llvm] a5b02e1 - [X86] Add EltsFromConsecutiveLoads test for infinite loop if we match reverse(vzload(ptr)) patterns (#170889)   via llvm-commits
• [compiler-rt] 190b8d0 - [clang][Darwin] Prefer the toolchain-provided libc++.dylib if there is one (#170303)   via llvm-commits
• [clang] [llvm] [LLVM][AArch64] Add "u" variants of sve.[s,u]hadd intrinsics (PR #170894)   via llvm-commits
• [clang] [llvm] [LLVM][AArch64] Add "u" variants of sve.[s,u]hadd intrinsics (PR #170894)   via llvm-commits
• [clang] [llvm] Added partial support for compiling C++20 modules and header-units without scanning. (PR #147682)   via llvm-commits
• [llvm] 2d98a36 - [LoopPeel] Fix typo Derefencebale -> Dereferenceable. NFC (#170791)   via llvm-commits
• [llvm] [Instcombine] Lower to explicit subtraction + unsigned comparison (PR #170896)   via llvm-commits
• [llvm] [Instcombine] Lower to explicit subtraction + unsigned comparison (PR #170896)   via llvm-commits
• [llvm] [Instcombine] Lower to explicit subtraction + unsigned comparison (PR #170896)   via llvm-commits
• [compiler-rt] [ASan] Do not return from void functions in asan_abi_shim.cpp (PR #170897)   via llvm-commits
• [compiler-rt] [ASan] Do not return from void functions in asan_abi_shim.cpp (PR #170897)   via llvm-commits
• [llvm] 665bc49 - [profcheck] Remove test cases fixed in #168161 from xfail list. (#170787)   via llvm-commits
• [compiler-rt] 35203a6 - [ASan] Do not return from void functions in asan_abi_shim.cpp (#170897)   via llvm-commits
• [llvm] [TableGen] Add GenericEnumClass that generates scoped enums (PR #170903)   via llvm-commits
• [llvm] [Instcombine] Lower to explicit subtraction + unsigned comparison (PR #170896)   via llvm-commits
• [llvm] [CodeGen] Replace (Min,Max)CSFrameIndex with flag on frame object [NFCI] (PR #170905)   via llvm-commits
• [llvm] [CodeGen] Replace (Min,Max)CSFrameIndex with flag on frame object [NFCI] (PR #170905)   via llvm-commits
• [libc] [llvm] [libc][fenv] Refactor x86 fenv implementations to make it work for various fenv_t. (PR #165015)   via llvm-commits
• [llvm] [Instcombine] Lower to explicit subtraction + unsigned comparison (PR #170896)   via llvm-commits
• [llvm] [LTO][Veclib] Fix vector library handling with LTO (PR #170638)   via llvm-commits
• [clang] [compiler-rt] [clang][Darwin] Prefer the toolchain-provided libc++.dylib if there is one (PR #170303)   via llvm-commits
• [llvm] c5bdc21 - [NFC][LLVM] Minor code cleanup in DebugLoc (#170757)   via llvm-commits
• [llvm] [VPlan] Replace UnrollPart for VPScalarIVSteps with start index op (NFC) (PR #170906)   via llvm-commits
• [llvm] [VPlan] Replace UnrollPart for VPScalarIVSteps with start index op (NFC) (PR #170906)   via llvm-commits
• [llvm] [VPlan] Replace UnrollPart for VPScalarIVSteps with start index op (NFC) (PR #170906)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [AArch64] Run optimizeTerminators earlier too. (PR #170907)   via llvm-commits
• [compiler-rt] [Sanitizer] Bump soft_rss_limit_mb in test (PR #170911)   via llvm-commits
• [llvm] [VPlan] Explicitly unoll replicate-regions without live-outs by VF. (PR #170212)   via llvm-commits
• [clang] [compiler-rt] Revert "[clang][Darwin] Prefer the toolchain-provided libc++.dylib if there is one" (PR #170912)   via llvm-commits
• [llvm] 7470d72 - [AArch64] Add isAppleMLike helper to check for M cores and aligned CPUs. (#170553)   via llvm-commits
• [clang] [compiler-rt] Revert "[clang][Darwin] Prefer the toolchain-provided libc++.dylib if there is one" (PR #170912)   via llvm-commits
• [compiler-rt] [Sanitizer] Bump soft_rss_limit_mb in test (PR #170911)   via llvm-commits
• [llvm] [Instcombine] Lower to explicit subtraction + unsigned comparison (PR #170896)   via llvm-commits
• [compiler-rt] Add API to temporalily suppress usage of ASAN's fake stack (PR #160135)   via llvm-commits
• [llvm] 93d64a5 - [SPIRV] Add `<2 x half>` and `<4 x half>` atomics via `SPV_NV_shader_atomic_fp16_vector` (#170213)   via llvm-commits
• [llvm] 22a2c27 - AMDGPU/PromoteAlloca: Simplify how deferred loads work (#170510)   via llvm-commits
• [llvm] f558c30 - AMDGPU/PromoteAlloca: Always use i32 for indexing (#170511)   via llvm-commits
• [libc] [llvm] [libc][fenv] Refactor x86 fenv implementations to make it work for various fenv_t. (PR #165015)   via llvm-commits
• [llvm] Add CondGroup infrastructure and unittests. (PR #170922)   via llvm-commits
• [llvm] Add CondGroup infrastructure and unittests. (PR #170922)   via llvm-commits
• [llvm] b464d77 - [RISCV] LMUL lists for indexed and strided loads (#169756)   via llvm-commits
• [libc] [llvm] [APFloat] Add exp function for APFloat::IEEESsingle using expf implementation from LLVM libc. (PR #143959)   via llvm-commits
• [flang] [llvm] [flang][OpenMP] Store list of expressions in InitializerT (PR #170923)   via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   via llvm-commits
• [llvm] [X86] Lower CTTZ/CTLZ vXi8 vectors using GF2P8AFFINEQB (PR #118012)   via llvm-commits
• [llvm] Autogenerate llvm/test/CodeGen/AArch64/wineh-pac.ll (PR #170925)   via llvm-commits
• [libc] [llvm] [APFloat] Add exp function for APFloat::IEEESsingle using expf implementation from LLVM libc. (PR #143959)   via llvm-commits
• [libc] [llvm] [APFloat] Add exp function for APFloat::IEEESsingle using expf implementation from LLVM libc. (PR #143959)   via llvm-commits
• [llvm] [DA] Use ScalarEvolution::isKnownPredicate (PR #170919)   via llvm-commits
• [compiler-rt] 58c8f57 - [compiler-rt] Add CMake flag for AArch64 Linux with 39-bit VA. (#167028)   via llvm-commits
• [compiler-rt] [hwasan] Add config for AArch64 Linux with 39-bit VA. (PR #170927)   via llvm-commits
• [compiler-rt] [hwasan] Add config for AArch64 Linux with 39-bit VA. (PR #170927)   via llvm-commits
• [compiler-rt] [asan] Add config for AArch64 Linux with 39-bit VA. (PR #170929)   via llvm-commits
• [compiler-rt] [asan] Add config for AArch64 Linux with 39-bit VA. (PR #170929)   via llvm-commits
• [llvm] 7afeea4 - Autogenerate llvm/test/CodeGen/AArch64/wineh-pac.ll (#170925)   via llvm-commits
• [libc] [llvm] [APFloat] Add exp function for APFloat::IEEESsingle using expf implementation from LLVM libc. (PR #143959)   via llvm-commits
• [llvm] 27bf5fd - DAG: Add overload of getExternalSymbol using RTLIB::LibcallImpl (#170587)   via llvm-commits
• [llvm] [MemProf] Add option to print function GUIDs during matching (PR #170946)   via llvm-commits
• [llvm] [MemProf] Add option to print function GUIDs during matching (PR #170946)   via llvm-commits
• [llvm] [NFC][OpenMP][Offload] Add tests for `use_device_ptr(fb_preserve/nullify)`. (PR #170948)   via llvm-commits
• [llvm] [DebugInfo][test] Fix llvm/test/ThinLTO/X86/pr35472.ll (NFC) (PR #170952)   via llvm-commits
• [llvm] 113b2d7 - [MemProf] Add remarks for matched allocs and calls (#170379)   via llvm-commits
• [llvm] ce2518f - [AA] Improve precision for monotonic atomic load/store operations (#158169)   via llvm-commits
• [llvm] [InstCombine] Limit canonicalization of extractelement(cast) to constant index or same basic block. (PR #166227)   via llvm-commits
• [llvm] [ObjCARC] Change autorelease to release when the pool state is not changed between the autorelease and the pool pop (PR #152353)   via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   via llvm-commits
• [llvm] Reland "AMDGPU/PromoteAlloca: Simplify how deferred loads work (#170510)" (PR #170955)   via llvm-commits
• [llvm] [AMDGPU] Add argument range annotations to intrinsics where applicable (PR #170958)   via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   via llvm-commits
• [llvm] ee77c58 - Reland "AMDGPU/PromoteAlloca: Simplify how deferred loads work (#170510)" (#170955)   via llvm-commits
• [compiler-rt] [llvm] [compiler-rt] Add check-builtins target for LLVM_ENABLE_RUNTIMES builds (PR #166837)   via llvm-commits
• [llvm] [RISCV] Use a switch in RISCVInstrInfo::verifyInstruction. NFC (PR #170961)   via llvm-commits
• [llvm] b1ee4d0 - [RISCV] Refactor some code in RISCVMergeBaseOffset.NFC (#170839)   via llvm-commits
• [llvm] [RISCV] Use a switch in RISCVInstrInfo::verifyInstruction. NFC (PR #170961)   via llvm-commits
• [llvm] e546d0f - [RISCV][TTI] Add cost model for ROTL/ROTR (#170824)   via llvm-commits
• [llvm] 472fd70 - [Github][CI] Introduce `LintHelper` class in `code-lint-helper.py` (#168827)   via llvm-commits
• [clang-tools-extra] [llvm] [Github][CI] Introduce `LintHelper` class in `code-lint-helper.py` (PR #168827)   via llvm-commits
• [llvm] Revert "[IR] Don't store switch case values as operands" (PR #170962)   via llvm-commits
• [llvm] Revert "[IR] Don't store switch case values as operands" (PR #170962)   via llvm-commits
• [llvm] 90e3ac6 - Revert "[IR] Don't store switch case values as operands" (#170962)   via llvm-commits
• [llvm] [MemProf] Merge all callee guids for indirect call VP metadata (PR #170964)   via llvm-commits
• [llvm] [MemProf] Merge all callee guids for indirect call VP metadata (PR #170964)   via llvm-commits
• [llvm] b889df3 - [MemProf] Add option to print function GUIDs during matching (#170946)   via llvm-commits
• [llvm] [AArch64] Treat NOP as a separate instruction. (PR #170968)   via llvm-commits
• [llvm] [AArch64] Treat NOP as a separate instruction. (PR #170968)   via llvm-commits
• [llvm] [AArch64] Treat NOP as a separate instruction. (PR #170968)   via llvm-commits
• [llvm] fa2eabd - [SimplifyCFG] Hoist common code for switch multi-case destinations (#165700)   via llvm-commits
• [llvm] 979462c - [AMDGPU] Eliminate InstCombineTables.td. NFC. (#170857)   via llvm-commits
• [llvm] [SimplifyLibCalls] Recognize and simplify f[min/max]imumnum (PR #170699)   via llvm-commits
• [llvm] [GVNHoist] - Split Parent when profitable to do so. (PR #106842)   via llvm-commits
• [llvm] [SelectionDAG] Handle roundeven libcall in visitCall (PR #170690)   via llvm-commits
• [llvm] Add regression tests (PR #170972)   via llvm-commits
• [llvm] [WIP][SPARC][IAS] Implement Solaris Natural Instruction extension (PR #170794)   via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) (PR #155107)   via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) (PR #155107)   via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) (PR #155107)   via llvm-commits
• [llvm] [IR] Don't store switch case values as operands (PR #170984)   via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) (PR #155107)   via llvm-commits
• [llvm] [RISCV64] liveness analysis (PR #167454)   via llvm-commits
• [llvm] [RISCV64] liveness analysis (PR #167454)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] WavePrefixSum intrinsic support (PR #167946)   via llvm-commits
• [llvm] [RISCV64] liveness analysis (PR #167454)   via llvm-commits
• [llvm] [RISCV64] liveness analysis (PR #167454)   via llvm-commits
• [llvm] [RISCV64] liveness analysis (PR #167454)   via llvm-commits
• [llvm] [RISCV64] liveness analysis (PR #167454)   via llvm-commits
• [llvm] [InstSimplify] Forbid undef folds in foldOrCommuteConstant when undef cannot be used. (PR #170670)   via llvm-commits
• [llvm] [InstSimplify] Forbid undef folds in foldOrCommuteConstant when undef cannot be used. (PR #170670)   via llvm-commits
• [llvm] [InstSimplify] Forbid undef folds in foldOrCommuteConstant when undef cannot be used. (PR #170670)   via llvm-commits
• [llvm] 0cd523e - [PHIElimination] Declare MachineLoopInfo dependency for Legacy PM (#169693)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] WavePrefixSum intrinsic support (PR #167946)   via llvm-commits
• [llvm] [RISCV64] liveness analysis (PR #167454)   via llvm-commits
• [llvm] 8dee997 - Reland "AMDGPU/PromoteAlloca: Always use i32 for indexing (#170511)" (#170956)   via llvm-commits
• [llvm] [InstCombine] Preserve range information for `Op0 -nsw umin(X, Op0) --> usub.sat(Op0, X)` (PR #170989)   via llvm-commits
• [llvm] [Instcombine] Lower to explicit subtraction + unsigned comparison (PR #170896)   via llvm-commits
• [clang] [llvm] [RISCV] Add Propeller support for RISC-V (PR #170992)   via llvm-commits
• [clang] [llvm] [RISCV] Add Propeller support for RISC-V (PR #170992)   via llvm-commits
• [clang] [llvm] [RISCV] Add Propeller support for RISC-V (PR #170992)   via llvm-commits
• [clang] [llvm] [RISCV] Add Propeller support for RISC-V (PR #170992)   via llvm-commits
• [clang] [llvm] [RISCV] Add Propeller support for RISC-V (PR #170992)   via llvm-commits
• [llvm] [Instcombine] Lower to explicit subtraction + unsigned comparison (PR #170896)   via llvm-commits
• [llvm] [Instcombine] Lower to explicit subtraction + unsigned comparison (PR #170896)   via llvm-commits
• [llvm] [SelectionDAG] Fix condition used for unsigned subtraction overflow (PR #170896)   via llvm-commits
• [llvm] [llvm-lsp] LSP server for LLVM IR (PR #161969)   via llvm-commits
• [llvm] [llvm-lsp] LSP server for LLVM IR (PR #161969)   via llvm-commits
• [clang] [llvm] [x86][AVX-VNNI] Fix VPDPWXXD Argument Types (PR #169456)   via llvm-commits
• [llvm] [VPlan] Replace ExtractLast(Elem|LanePerPart) with ExtractLast(Lane/Part) (PR #164124)   via llvm-commits
• [llvm] 49a7772 - [CodeGen] Replace (Min, Max)CSFrameIndex with flag on frame object [NFCI] (#170905)   via llvm-commits
• [llvm] [AMDGPU] Fix a crash when a bool variable is used in inline asm (PR #171004)   via llvm-commits
• [llvm] [InstCombine] Preserve range information for `Op0 -nsw umin(X, Op0) --> usub.sat(Op0, X)` (PR #170989)   via llvm-commits
• [llvm] [LLVM] Add helper class for working with caches (PR #171008)   via llvm-commits
• [llvm] [OFFLOAD] Add missing API for libomptarget migration (PR #171009)   via llvm-commits
• [llvm] [OFFLOAD] Add missing API for libomptarget migration (PR #171009)   via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #171010)   via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #171010)   via llvm-commits
• [llvm] [OFFLOAD] Add missing API for libomptarget migration (PR #171009)   via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #171010)   via llvm-commits
• [llvm] [LLVM][ADT] Add helper class for working with caches (PR #171008)   via llvm-commits
• [compiler-rt] Reapply "[compiler-rt] Default to Lit's Internal Shell" (PR #168232)   via llvm-commits
• [llvm] 0dff5b5 - [X86][APX] Compress setzucc with memory operand to setcc (#170842)   via llvm-commits
• [llvm] [CodeGen] Consider imm offsets when sorting framerefs (PR #171012)   via llvm-commits
• [llvm] Precommit test for PR #171012 (PR #171013)   via llvm-commits
• [lld] [llvm] [DTLTO][ELF][COFF] Add archive support for DTLTO. (PR #157043)   via llvm-commits
• [llvm] [InferAddressSpaces] Support address space inference from load values (PR #171019)   via llvm-commits
• [llvm] [InferAddressSpaces] Support address space inference from load values (PR #171019)   via llvm-commits
• [llvm] [InferAddressSpaces] Support address space inference from load values (PR #171019)   via llvm-commits
• [llvm] [InferAddressSpaces] Support address space inference from load values (PR #171019)   via llvm-commits
• [llvm] [InferAddressSpaces] Support address space inference from load values (PR #171019)   via llvm-commits
• [llvm] [InferAddressSpaces] Support address space inference from load values (PR #171019)   via llvm-commits
• [llvm] [InferAddressSpaces] Support address space inference from load values (PR #171019)   via llvm-commits
• [llvm] [InferAddressSpaces] Support address space inference from load values (PR #171019)   via llvm-commits
• [llvm] [InferAddressSpaces] Support address space inference from load values (PR #171019)   via llvm-commits
• [llvm] [InferAddressSpaces] Support address space inference from load values (PR #171019)   via llvm-commits
• [llvm] [InferAddressSpaces] Support address space inference from load values (PR #171019)   via llvm-commits
• [clang] [llvm] [InferAddressSpaces] Support address space inference from load values (PR #171019)   via llvm-commits
• [llvm] [DAG] Precommit test for PR #164946 - Update Tests SimplifyDemandedBits - ICMP_SLT(X,0) - only sign mask of X is required (PR #171030)   via llvm-commits
• [llvm] [DAG] Precommit test for PR #164946 - Update Tests SimplifyDemandedBits - ICMP_SLT(X,0) - only sign mask of X is required (PR #171030)   via llvm-commits
• [llvm] [InstCombine] Preserve range information for `Op0 -nsw umin(X, Op0) --> usub.sat(Op0, X)` (PR #170989)   via llvm-commits
• [llvm] [InstCombine] Preserve range information for `Op0 -nsw umin(X, Op0) --> usub.sat(Op0, X)` (PR #170989)   via llvm-commits
• [clang] [llvm] [WinEH] Fix try scopes leaking to caller on inline (PR #167176)   via llvm-commits
• [clang] [llvm] [WinEH] Fix try scopes leaking to caller on inline (PR #167176)   via llvm-commits
• [clang] [llvm] [WinEH] Fix try scopes leaking to caller on inline (PR #167176)   via llvm-commits
• [clang] [llvm] [WinEH] Fix try scopes leaking to caller on inline (PR #167176)   via llvm-commits
• [llvm] 9e7ce77 - [Clang]: Support opt-in speculative devirtualization (#159685)   via llvm-commits
• [clang] [llvm] [InferAddressSpaces] Support address space inference from load values (PR #171019)   via llvm-commits
• [llvm] [ADT] Add `llvm::conditionally_reverse()` iterator (PR #171040)   via llvm-commits
• [llvm] [ADT] Add `llvm::conditionally_reverse()` iterator (PR #171040)   via llvm-commits
• [llvm] 3fc7419 - [VPlan] Replace ExtractLast(Elem|LanePerPart) with ExtractLast(Lane/Part) (#164124)   via llvm-commits
• [clang] [llvm] [InferAddressSpaces] Support address space inference from load values (PR #171019)   via llvm-commits
• [llvm] [BOLT][ICP] Propagate parent hash to newly inserted BBs for BAT (PR #171044)   via llvm-commits
• [clang] [llvm] [InferAddressSpaces] Support address space inference from load values (PR #171019)   via llvm-commits
• [lld] [NFC][ELF] Remove pointless NEEDS_TLSGD_TO_IE (PR #171046)   via llvm-commits
• [llvm] 68fea00 - [SPIRV] Use AMDGPU ABI for AMDGCN flavoured SPIRV (#169865)   via llvm-commits
• [llvm] [InstCombine] Drop one-use check for (A & ~B) | (A ^ B) -> A ^ B (PR #171047)   via llvm-commits
• [llvm] [InstCombine] Drop one-use check for (A & ~B) | (A ^ B) -> A ^ B (PR #171047)   via llvm-commits
• [llvm] [InstCombine] Drop one-use check for (A & ~B) | (A ^ B) -> A ^ B (PR #171047)   via llvm-commits
• [llvm] [InstCombine] Fold (A & ~B) | (A ^ B) -> A ^ B (PR #171047)   via llvm-commits
• [llvm] [InstCombine] Fold (A & ~B) | (A ^ B) -> A ^ B (PR #171047)   via llvm-commits
• [llvm] [VPlan] Replace ExtractLast(Elem|LanePerPart) with ExtractLast(Lane/Part) (PR #164124)   via llvm-commits
• [llvm] [symbolizer] Add a --pdb option. (PR #171053)   via llvm-commits
• [llvm] [symbolizer] Add a --pdb option. (PR #171053)   via llvm-commits
• [llvm] ffc5581 - [SPIRV] Add support for pointers to functions with aggregate args/returns as global variables / constant initialisers (#169595)   via llvm-commits
• [llvm] [DAGCombiner] Don't peek through bitcast when checking isMulAddWithConstProfitable (PR #171056)   via llvm-commits
• [llvm] [DAGCombiner] Don't peek through bitcast when checking isMulAddWithConstProfitable (PR #171056)   via llvm-commits
• [compiler-rt] [llvm] [JITLink] Add orc-runtime support for SystemZ (PR #171062)   via llvm-commits
• [compiler-rt] [llvm] [JITLink] Add orc-runtime support for SystemZ (PR #171062)   via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #171064)   via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #171064)   via llvm-commits
• [llvm] Update actions/checkout action to v6 (PR #171065)   via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #171064)   via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #171064)   via llvm-commits
• [clang] [llvm] [InferAddressSpaces] Support address space inference from load values (PR #171019)   via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #171064)   via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #171064)   via llvm-commits
• [llvm] [SystemZ] Support fp16 vector ABI and basic codegen. (PR #171066)   via llvm-commits
• [compiler-rt] [NFC][compiler-rt] Fix typos in int_to_fp_impl (PR #171067)   via llvm-commits
• [llvm] [SystemZ] Support fp16 vector ABI and basic codegen. (PR #171066)   via llvm-commits
• [llvm] [SystemZ] Support fp16 vector ABI and basic codegen. (PR #171066)   via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] add clamp immediate operand to WMMA iu8 intrinsic (PR #171069)   via llvm-commits
• [llvm] fc92e4d - [InstCombine] Fix bail-out in `PHIsEqualValue()` (#170650)   via llvm-commits
• [clang] [llvm] [AMDGPU] Apply alignment attr for make.buffer.rsrc (PR #166914)   via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] add clamp immediate operand to WMMA iu8 intrinsic (PR #171069)   via llvm-commits
• [llvm] [WIP][SPARC][IAS] Implement Solaris Natural Instruction extension (PR #170794)   via llvm-commits
• [llvm] [DWARFLinkerParallel] Add missing version string in producer (PR #158195)   via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #171064)   via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #171064)   via llvm-commits
• [llvm] 2d80486 - [RISCV] Use a switch in RISCVInstrInfo::verifyInstruction. NFC (#170961)   via llvm-commits
• [clang] [llvm] [AMDGPU] Apply alignment attr for make.buffer.rsrc (PR #166914)   via llvm-commits
• [llvm] [NFC][RISCV] Unify all zvfbfa vl patterns and sd node patterns (PR #171072)   via llvm-commits
• [compiler-rt] b0e9842 - Revert "[FMV][AArch64] Add initial AT_HWCAP3 / AT_HWCAP4 support (#161595)" (#171071)   via llvm-commits
• [llvm] [InstCombine] Fix #163110: Fold icmp (shl X, L), (add (shl Y, L), 1<<L) to icmp X, (Y + 1) (PR #165975)   via llvm-commits
• [llvm] 6ec8c43 - [AMDGPU] Enable i8 GEP promotion for vector allocas (#166132)   via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] fix i386 build for Haiku (PR #171075)   via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] fix i386 build for Haiku (PR #171075)   via llvm-commits
• [llvm] e442904 - [AMDGPU] Apply alignment attr for make.buffer.rsrc (#166914)   via llvm-commits
• [clang] [llvm] [AMDGPU] Apply alignment attr for make.buffer.rsrc (PR #166914)   via llvm-commits
• [llvm] [AMDGPU] Generate waterfall for calls with SGPR(inreg) argument (PR #146997)   via llvm-commits
• [llvm] Reduced neon non-const strided load cost (PR #169731)   via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   via llvm-commits
• [llvm] Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (PR #163912)   via llvm-commits
• [llvm] c6f45f5 - PowerPC/VSX: Select FMINNUM and FMAXNUM (#135739)   via llvm-commits
• [llvm] [InstCombine] Fix #163110: Fold icmp (shl X, L), (add (shl Y, L), 1<<L) to icmp X, (Y + 1) (PR #165975)   via llvm-commits
• [llvm] [InstCombine] Fix #163110: Fold icmp (shl X, L), (add (shl Y, L), 1<<L) to icmp X, (Y + 1) (PR #165975)   via llvm-commits
• [llvm] [RISCV] Add short forward branch support for `lb`, `lbu`, `lh`, `lhu`, `lw`, `lwu` and `ld` (PR #170829)   via llvm-commits
• [llvm] [RISCV] Add short forward branch support for `lb`, `lbu`, `lh`, `lhu`, `lw`, `lwu` and `ld` (PR #170829)   via llvm-commits
• [llvm] [RISCV] Add short forward branch support for `lb`, `lbu`, `lh`, `lhu`, `lw`, `lwu` and `ld` (PR #170829)   via llvm-commits
• [llvm] [RISCV] Add short forward branch support for `lb`, `lbu`, `lh`, `lhu`, `lw`, `lwu` and `ld` (PR #170829)   via llvm-commits
• [llvm] [RISCV] Add short forward branch support for `lb`, `lbu`, `lh`, `lhu`, `lw`, `lwu` and `ld` (PR #170829)   via llvm-commits
• [llvm] [RISCV] Add short forward branch support for `lb`, `lbu`, `lh`, `lhu`, `lw`, `lwu` and `ld` (PR #170829)   via llvm-commits
• [llvm] [RISCV] Add short forward branch support for `lb`, `lbu`, `lh`, `lhu`, `lw`, `lwu` and `ld` (PR #170829)   via llvm-commits
• [lld] 8e39bcd - [lld][docs] Document two linker-script related options for lld ELF (#166313)   via llvm-commits
• [llvm] [IR] llvm.reloc.none intrinsic for no-op symbol references (PR #147427)   via llvm-commits
• [llvm] [RISCV] Generate Xqcilsm LWMI/SWMI load/store multiple instructions (PR #171079)   via llvm-commits
• [llvm] 4b800d3 - [RISCV] Remove last use of @llvm.experimental.vp.splat in RISCVCodeGenPrepare. NFCI (#170543)   via llvm-commits
• [clang] [llvm] [openmp] [Clang][OpenMP] Switch to __kmpc_parallel_60 with strict parameter (PR #171082)   via llvm-commits
• [clang] [llvm] [openmp] [Clang][OpenMP] Switch to __kmpc_parallel_60 with strict parameter (PR #171082)   via llvm-commits
• [llvm] [RISCV] Add short forward branch support for `lb`, `lbu`, `lh`, `lhu`, `lw`, `lwu` and `ld` (PR #170829)   via llvm-commits
• [llvm] 446a3a1 - [RISCV] Use GPRNoX0 instead of AVL for Xsfmm pseudos. NFC (#170726)   via llvm-commits
• [llvm] 46341d5 - [RISCV] Update P extension to the 018 version of the spec. (#170399)   via llvm-commits
• [llvm] [IR][RISCV] Remove @llvm.experimental.vp.splat (PR #171084)   via llvm-commits
• [llvm] [IR][RISCV] Remove @llvm.experimental.vp.splat (PR #171084)   via llvm-commits
• [llvm] [IR][RISCV] Remove @llvm.experimental.vp.splat (PR #171084)   via llvm-commits
• [llvm] [SPIRV] Addition of extension SPV_KHR_non_semantic_info and SPV_KHR_relaxed_extended_instruction (PR #169643)   via llvm-commits
• [llvm] [RISCV] Add short forward branch support for `lb`, `lbu`, `lh`, `lhu`, `lw`, `lwu` and `ld` (PR #170829)   via llvm-commits
• [llvm] [RISCV] Add short forward branch support for `lb`, `lbu`, `lh`, `lhu`, `lw`, `lwu` and `ld` (PR #170829)   via llvm-commits
• [llvm] [RISCV] Add short forward branch support for `lb`, `lbu`, `lh`, `lhu`, `lw`, `lwu` and `ld` (PR #170829)   via llvm-commits
• [clang] [llvm] [mlir] [openmp] [Clang][OpenMP] Switch to __kmpc_parallel_60 with strict parameter (PR #171082)   via llvm-commits
• [llvm] [IR][RISCV] Remove @llvm.experimental.vp.splat (PR #171084)   via llvm-commits
• [llvm] 7b65219 - [IR] Add ImplicitTrunc argument to ConstantInt::get() (#170865)   via llvm-commits
• [llvm] [AMDGPU] Limit promoting allocas that have users with dynamic index above a threshold on number of elements (PR #170327)   via llvm-commits
• [llvm] [SPIRV] Addition of extension SPV_KHR_non_semantic_info and SPV_KHR_relaxed_extended_instruction (PR #169643)   via llvm-commits
• [llvm] Revert "[AMDGPU] Enable i8 GEP promotion for vector allocas" (PR #171087)   via llvm-commits
• [llvm] [LV] Explicitly disable in-loop reductions for AnyOf and FindIV. nfc (PR #163541)   zhijian lin via llvm-commits
• [llvm] [PowerPC] FIX llc crashed at -O1/O2/O3: Assertion `isImm() && "Wrong MachineOperand mutator"' failed. (PR #170548)   zhijian lin via llvm-commits
• [llvm] [PowerPC] FIX llc crashed at -O1/O2/O3: Assertion `isImm() && "Wrong MachineOperand mutator"' failed. (PR #170548)   zhijian lin via llvm-commits
• [llvm] [PowerPC] FIX llc crashed at -O1/O2/O3: Assertion `isImm() && "Wrong MachineOperand mutator"' failed. (PR #170548)   zhijian lin via llvm-commits
• [llvm] [PowerPC] FIX llc crashed at -O1/O2/O3: Assertion `isImm() && "Wrong MachineOperand mutator"' failed. (PR #170548)   zhijian lin via llvm-commits
• [llvm] Fix [PowerPC] llc crashed at -O1/O2/O3: Assertion `isImm() && "Wrong MachineOperand mutator"' failed. (PR #170548)   zhijian lin via llvm-commits
• [llvm] Fix [PowerPC] llc crashed at -O1/O2/O3: Assertion `isImm() && "Wrong MachineOperand mutator"' failed. (PR #170548)   zhijian lin via llvm-commits
• [llvm] Fix [PowerPC] llc crashed at -O1/O2/O3: Assertion `isImm() && "Wrong MachineOperand mutator"' failed. (PR #170548)   zhijian lin via llvm-commits