[llvm] [PowerPC] cost modeling for length type VP intrinsic load/store (PR #168938)

Florian Hahn via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 3 12:40:42 PST 2025


================
@@ -1078,3 +1082,65 @@ PPCTTIImpl::getVPLegalizationStrategy(const VPIntrinsic &PI) const {
 
   return VPLegalization(VPLegalization::Legal, VPLegalization::Legal);
 }
+
+bool PPCTTIImpl::hasActiveVectorLength() const {
+  unsigned CPU = ST->getCPUDirective();
+  if (!PPCEVL)
+    return false;
+  if (CPU == PPC::DIR_PWR10 || CPU == PPC::DIR_PWR_FUTURE ||
+      (Pwr9EVL && CPU == PPC::DIR_PWR9))
+    return true;
+  return false;
----------------
fhahn wrote:

Yes, then there should be cost model tests for those.

LV checks hasActiveVectorLength and if it is true assumes that all vector predication intrinsics are available I think. Can you add a test to LV which enable EVL for PPC and check that is doing something senisble with `data-with-evl` tail-folding style?

https://github.com/llvm/llvm-project/pull/168938


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