[llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)

[Luke Lau via llvm-commits]

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@@ -7866,12 +7876,30 @@ VPWidenRecipe *VPRecipeBuilder::tryToWiden(VPInstruction *VPI) {
     // If not provably safe, use a select to form a safe divisor before widening the
     // div/rem operation itself.  Otherwise fall through to general handling below.
     if (CM.isPredicatedInst(I)) {
+      auto MayOverflow = [&](Instruction *I) {
+        Value *LHS = I->getOperand(0);
+        Value *RHS = I->getOperand(1);
+        return !Legal->isInvariant(LHS) &&
+               (!Legal->isInvariant(RHS) ||
+                (llvm::isa<llvm::ConstantInt>(RHS) &&
+                 llvm::cast<llvm::ConstantInt>(RHS)->getValue().isAllOnes()));
+      };
       SmallVector<VPValue *> Ops(VPI->operands());
       VPValue *Mask = getBlockInMask(Builder.getInsertBlock());
       VPValue *One = Plan.getConstantInt(I->getType(), 1u);
       auto *SafeRHS =
           Builder.createSelect(Mask, Ops[1], One, VPI->getDebugLoc());
       Ops[1] = SafeRHS;
+      if (VPI->getOpcode() == Instruction::SDiv ||
+          VPI->getOpcode() == Instruction::SRem) {
+        if (MayOverflow(I)) {
+          VPValue *Mask = getBlockInMask(Builder.getInsertBlock());
+          VPValue *Zero = Plan.getConstantInt(I->getType(), 0);
+          auto *SafeLHS =
+              Builder.createSelect(Mask, Ops[0], Zero, VPI->getDebugLoc());
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lukel97 wrote:

Can we not just predicate the divisor? If we divide by 1 then it shouldn't overflow

https://github.com/llvm/llvm-project/pull/170818