[llvm] [AArch64] Fix the assertion failure on `RegisterVT == PartVT && "Part… (PR #170632)

[Cheng Lingfei via llvm-commits]

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@@ -0,0 +1,46 @@
+; RUN: llc -mtriple=aarch64--linux-gnu < %s | FileCheck %s
+
+define dso_local void @_Z3fooi(i32 noundef %val) #0 {
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clingfei wrote:

> You shouldn't need the allocas, and I'm guessing a call argument with `<8 x i32>` would also work?

Yeah, it works! Thanks. 


https://github.com/llvm/llvm-project/pull/170632