[llvm] [AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (PR #167372)
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 5 01:37:39 PST 2025
================
@@ -7280,6 +7280,81 @@ static SDValue lowerLaneOp(const SITargetLowering &TLI, SDNode *N,
return DAG.getBitcast(VT, UnrolledLaneOp);
}
+static SDValue lowerWaveShuffle(const SITargetLowering &TLI, SDNode *N,
+ SelectionDAG &DAG) {
+ EVT VT = N->getValueType(0);
+ assert(VT.getSizeInBits() == 32);
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jayfoad wrote:
Nit: this shouldn't be an assert because there is nothing to stop the user from calling the intrinsic with a different type like i64. Instead you can `return SDValue()` here and the compiler should fail with a nicer "cannot select" diagnostic.
https://github.com/llvm/llvm-project/pull/167372
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