[llvm] [X86][APX] Add pattern for zext(X86setcc ..) -> SETZUCCr (PR #170806)
Phoebe Wang via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 5 01:06:39 PST 2025
https://github.com/phoebewang updated https://github.com/llvm/llvm-project/pull/170806
>From 25e53e607c0cddfc7305ac6072a5cf28ae50c1be Mon Sep 17 00:00:00 2001
From: Phoebe Wang <phoebe.wang at intel.com>
Date: Fri, 5 Dec 2025 15:21:38 +0800
Subject: [PATCH 1/2] [X86][APX] Add pattern for zext(X86setcc ..) -> SETZUCCr
---
llvm/lib/Target/X86/X86InstrCMovSetCC.td | 4 +
llvm/test/CodeGen/X86/apx/ccmp.ll | 6 +-
llvm/test/CodeGen/X86/apx/ctest.ll | 6 +-
llvm/test/CodeGen/X86/cmp.ll | 158 ++++++++++++++---------
4 files changed, 104 insertions(+), 70 deletions(-)
diff --git a/llvm/lib/Target/X86/X86InstrCMovSetCC.td b/llvm/lib/Target/X86/X86InstrCMovSetCC.td
index 7d5d7cf4a83ab..740cd0a4976f1 100644
--- a/llvm/lib/Target/X86/X86InstrCMovSetCC.td
+++ b/llvm/lib/Target/X86/X86InstrCMovSetCC.td
@@ -167,6 +167,10 @@ let Uses = [EFLAGS], isCodeGenOnly = 1, ForceDisassemble = 1,
}
}
+let Predicates = [HasNDD] in
+ def : Pat<(i32 (zext (X86setcc timm:$cond, EFLAGS))),
+ (INSERT_SUBREG (i32 (IMPLICIT_DEF)), (SETZUCCr ccode:$cond), sub_8bit)>;
+
// SALC is an undocumented instruction. Information for this instruction can be found
// here http://www.rcollins.org/secrets/opcodes/SALC.html
// Set AL if carry.
diff --git a/llvm/test/CodeGen/X86/apx/ccmp.ll b/llvm/test/CodeGen/X86/apx/ccmp.ll
index 4c58c8a980314..34538ac9816f8 100644
--- a/llvm/test/CodeGen/X86/apx/ccmp.ll
+++ b/llvm/test/CodeGen/X86/apx/ccmp.ll
@@ -1215,8 +1215,7 @@ define i32 @ccmp_nobranch(i32 noundef %a, i32 noundef %b) {
; NDD: # %bb.0: # %entry
; NDD-NEXT: testl %edi, %edi # encoding: [0x85,0xff]
; NDD-NEXT: ccmplel {dfv=} $2, %esi # encoding: [0x62,0xf4,0x04,0x0e,0x83,0xfe,0x02]
-; NDD-NEXT: setge %al # encoding: [0x0f,0x9d,0xc0]
-; NDD-NEXT: movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0]
+; NDD-NEXT: setzuge %al # encoding: [0x62,0xf4,0x7f,0x18,0x4d,0xc0]
; NDD-NEXT: retq # encoding: [0xc3]
entry:
%cmp = icmp sgt i32 %a, 0
@@ -1241,8 +1240,7 @@ define i32 @ccmp_continous_nobranch(i32 noundef %a, i32 noundef %b, i32 noundef
; NDD-NEXT: cmpl $2, %edi # encoding: [0x83,0xff,0x02]
; NDD-NEXT: ccmpll {dfv=sf} $2, %esi # encoding: [0x62,0xf4,0x24,0x0c,0x83,0xfe,0x02]
; NDD-NEXT: ccmpll {dfv=sf} $4, %edx # encoding: [0x62,0xf4,0x24,0x0c,0x83,0xfa,0x04]
-; NDD-NEXT: setge %al # encoding: [0x0f,0x9d,0xc0]
-; NDD-NEXT: movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0]
+; NDD-NEXT: setzuge %al # encoding: [0x62,0xf4,0x7f,0x18,0x4d,0xc0]
; NDD-NEXT: retq # encoding: [0xc3]
entry:
%cmp = icmp sgt i32 %a, 1
diff --git a/llvm/test/CodeGen/X86/apx/ctest.ll b/llvm/test/CodeGen/X86/apx/ctest.ll
index 5f3ec8a19d0a4..d4baf82c50e11 100644
--- a/llvm/test/CodeGen/X86/apx/ctest.ll
+++ b/llvm/test/CodeGen/X86/apx/ctest.ll
@@ -858,8 +858,7 @@ define i32 @ctest_nobranch(i32 noundef %a, i32 noundef %b) {
; NDD: # %bb.0: # %entry
; NDD-NEXT: testl %edi, %edi
; NDD-NEXT: ctestlel {dfv=} %esi, %esi
-; NDD-NEXT: setg %al
-; NDD-NEXT: movzbl %al, %eax
+; NDD-NEXT: setzug %al
; NDD-NEXT: retq
entry:
%cmp = icmp sgt i32 %a, 0
@@ -884,8 +883,7 @@ define i32 @ctest_continous_nobranch(i32 noundef %a, i32 noundef %b, i32 noundef
; NDD-NEXT: testl %edi, %edi
; NDD-NEXT: ctestlel {dfv=sf} %esi, %esi
; NDD-NEXT: ctestsl {dfv=zf} %edx, %edx
-; NDD-NEXT: setg %al
-; NDD-NEXT: movzbl %al, %eax
+; NDD-NEXT: setzug %al
; NDD-NEXT: retq
entry:
%cmp = icmp sgt i32 %a, 0
diff --git a/llvm/test/CodeGen/X86/cmp.ll b/llvm/test/CodeGen/X86/cmp.ll
index ed3f0e0f0aa71..ee938ee7b0248 100644
--- a/llvm/test/CodeGen/X86/cmp.ll
+++ b/llvm/test/CodeGen/X86/cmp.ll
@@ -177,9 +177,8 @@ define i32 @test7(i64 %res) nounwind {
;
; NDD-LABEL: test7:
; NDD: # %bb.0: # %entry
-; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
; NDD-NEXT: shrq $32, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xef,0x20]
-; NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NDD-NEXT: setzue %al # encoding: [0x62,0xf4,0x7f,0x18,0x44,0xc0]
; NDD-NEXT: retq # encoding: [0xc3]
entry:
%lnot = icmp ult i64 %res, 4294967296
@@ -199,9 +198,8 @@ define i32 @test8(i64 %res) nounwind {
; NDD-LABEL: test8:
; NDD: # %bb.0:
; NDD-NEXT: shrq $32, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xef,0x20]
-; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
; NDD-NEXT: cmpl $3, %edi # encoding: [0x83,0xff,0x03]
-; NDD-NEXT: setb %al # encoding: [0x0f,0x92,0xc0]
+; NDD-NEXT: setzub %al # encoding: [0x62,0xf4,0x7f,0x18,0x42,0xc0]
; NDD-NEXT: retq # encoding: [0xc3]
%lnot = icmp ult i64 %res, 12884901888
%lnot.ext = zext i1 %lnot to i32
@@ -218,9 +216,8 @@ define i32 @test9(i64 %res) nounwind {
;
; NDD-LABEL: test9:
; NDD: # %bb.0:
-; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
; NDD-NEXT: shrq $33, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xef,0x21]
-; NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NDD-NEXT: setzue %al # encoding: [0x62,0xf4,0x7f,0x18,0x44,0xc0]
; NDD-NEXT: retq # encoding: [0xc3]
%lnot = icmp ult i64 %res, 8589934592
%lnot.ext = zext i1 %lnot to i32
@@ -237,9 +234,8 @@ define i32 @test10(i64 %res) nounwind {
;
; NDD-LABEL: test10:
; NDD: # %bb.0:
-; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
; NDD-NEXT: shrq $32, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xef,0x20]
-; NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
+; NDD-NEXT: setzune %al # encoding: [0x62,0xf4,0x7f,0x18,0x45,0xc0]
; NDD-NEXT: retq # encoding: [0xc3]
%lnot = icmp uge i64 %res, 4294967296
%lnot.ext = zext i1 %lnot to i32
@@ -258,9 +254,8 @@ define i32 @test11(i64 %l) nounwind {
; NDD-LABEL: test11:
; NDD: # %bb.0:
; NDD-NEXT: shrq $47, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xef,0x2f]
-; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
; NDD-NEXT: cmpl $1, %edi # encoding: [0x83,0xff,0x01]
-; NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NDD-NEXT: setzue %al # encoding: [0x62,0xf4,0x7f,0x18,0x44,0xc0]
; NDD-NEXT: retq # encoding: [0xc3]
%shr.mask = and i64 %l, -140737488355328
%cmp = icmp eq i64 %shr.mask, 140737488355328
@@ -433,10 +428,9 @@ define void @test20(i32 %bf.load, i8 %x1, ptr %b_addr) {
;
; NDD-LABEL: test20:
; NDD: # %bb.0:
-; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
; NDD-NEXT: testl $16777215, %edi # encoding: [0xf7,0xc7,0xff,0xff,0xff,0x00]
; NDD-NEXT: # imm = 0xFFFFFF
-; NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
+; NDD-NEXT: setzune %al # encoding: [0x62,0xf4,0x7f,0x18,0x45,0xc0]
; NDD-NEXT: movzbl %sil, %ecx # encoding: [0x40,0x0f,0xb6,0xce]
; NDD-NEXT: addl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x01,0xc8]
; NDD-NEXT: setne (%rdx) # encoding: [0x0f,0x95,0x02]
@@ -481,9 +475,10 @@ define i32 @highmask_i64_mask64(i64 %val) {
;
; NDD-LABEL: highmask_i64_mask64:
; NDD: # %bb.0:
-; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
-; NDD-NEXT: shrq $41, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xef,0x29]
-; NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
+; NDD-NEXT: movabsq $-2199023255552, %rax # encoding: [0x48,0xb8,0x00,0x00,0x00,0x00,0x00,0xfe,0xff,0xff]
+; NDD-NEXT: # imm = 0xFFFFFE0000000000
+; NDD-NEXT: testq %rax, %rdi # encoding: [0x48,0x85,0xc7]
+; NDD-NEXT: setzune %al # encoding: [0x62,0xf4,0x7f,0x18,0x45,0xc0]
; NDD-NEXT: retq # encoding: [0xc3]
%and = and i64 %val, -2199023255552
%cmp = icmp ne i64 %and, 0
@@ -525,9 +520,9 @@ define i32 @highmask_i64_mask32(i64 %val) {
;
; NDD-LABEL: highmask_i64_mask32:
; NDD: # %bb.0:
-; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
-; NDD-NEXT: shrq $20, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xef,0x14]
-; NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NDD-NEXT: testq $-1048576, %rdi # encoding: [0x48,0xf7,0xc7,0x00,0x00,0xf0,0xff]
+; NDD-NEXT: # imm = 0xFFF00000
+; NDD-NEXT: setzue %al # encoding: [0x62,0xf4,0x7f,0x18,0x44,0xc0]
; NDD-NEXT: retq # encoding: [0xc3]
%and = and i64 %val, -1048576
%cmp = icmp eq i64 %and, 0
@@ -561,12 +556,18 @@ define i64 @highmask_i64_mask32_extra_use(i64 %val) nounwind {
}
define i32 @highmask_i64_mask8(i64 %val) {
-; CHECK-LABEL: highmask_i64_mask8:
-; CHECK: # %bb.0:
-; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
-; CHECK-NEXT: testq $-16, %rdi # encoding: [0x48,0xf7,0xc7,0xf0,0xff,0xff,0xff]
-; CHECK-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
-; CHECK-NEXT: retq # encoding: [0xc3]
+; NO-NDD-LABEL: highmask_i64_mask8:
+; NO-NDD: # %bb.0:
+; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NO-NDD-NEXT: testq $-16, %rdi # encoding: [0x48,0xf7,0xc7,0xf0,0xff,0xff,0xff]
+; NO-NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
+; NO-NDD-NEXT: retq # encoding: [0xc3]
+;
+; NDD-LABEL: highmask_i64_mask8:
+; NDD: # %bb.0:
+; NDD-NEXT: testq $-16, %rdi # encoding: [0x48,0xf7,0xc7,0xf0,0xff,0xff,0xff]
+; NDD-NEXT: setzune %al # encoding: [0x62,0xf4,0x7f,0x18,0x45,0xc0]
+; NDD-NEXT: retq # encoding: [0xc3]
%and = and i64 %val, -16
%cmp = icmp ne i64 %and, 0
%ret = zext i1 %cmp to i32
@@ -583,9 +584,10 @@ define i32 @lowmask_i64_mask64(i64 %val) {
;
; NDD-LABEL: lowmask_i64_mask64:
; NDD: # %bb.0:
-; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
-; NDD-NEXT: shlq $16, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xe7,0x10]
-; NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NDD-NEXT: movabsq $281474976710655, %rax # encoding: [0x48,0xb8,0xff,0xff,0xff,0xff,0xff,0xff,0x00,0x00]
+; NDD-NEXT: # imm = 0xFFFFFFFFFFFF
+; NDD-NEXT: testq %rax, %rdi # encoding: [0x48,0x85,0xc7]
+; NDD-NEXT: setzue %al # encoding: [0x62,0xf4,0x7f,0x18,0x44,0xc0]
; NDD-NEXT: retq # encoding: [0xc3]
%and = and i64 %val, 281474976710655
%cmp = icmp eq i64 %and, 0
@@ -627,9 +629,9 @@ define i32 @lowmask_i64_mask32(i64 %val) {
;
; NDD-LABEL: lowmask_i64_mask32:
; NDD: # %bb.0:
-; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
-; NDD-NEXT: shlq $44, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xe7,0x2c]
-; NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
+; NDD-NEXT: testl $1048575, %edi # encoding: [0xf7,0xc7,0xff,0xff,0x0f,0x00]
+; NDD-NEXT: # imm = 0xFFFFF
+; NDD-NEXT: setzune %al # encoding: [0x62,0xf4,0x7f,0x18,0x45,0xc0]
; NDD-NEXT: retq # encoding: [0xc3]
%and = and i64 %val, 1048575
%cmp = icmp ne i64 %and, 0
@@ -663,12 +665,18 @@ define i64 @lowmask_i64_mask32_extra_use(i64 %val) nounwind {
}
define i32 @lowmask_i64_mask8(i64 %val) {
-; CHECK-LABEL: lowmask_i64_mask8:
-; CHECK: # %bb.0:
-; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
-; CHECK-NEXT: testb $31, %dil # encoding: [0x40,0xf6,0xc7,0x1f]
-; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
-; CHECK-NEXT: retq # encoding: [0xc3]
+; NO-NDD-LABEL: lowmask_i64_mask8:
+; NO-NDD: # %bb.0:
+; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NO-NDD-NEXT: testb $31, %dil # encoding: [0x40,0xf6,0xc7,0x1f]
+; NO-NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NO-NDD-NEXT: retq # encoding: [0xc3]
+;
+; NDD-LABEL: lowmask_i64_mask8:
+; NDD: # %bb.0:
+; NDD-NEXT: testb $31, %dil # encoding: [0x40,0xf6,0xc7,0x1f]
+; NDD-NEXT: setzue %al # encoding: [0x62,0xf4,0x7f,0x18,0x44,0xc0]
+; NDD-NEXT: retq # encoding: [0xc3]
%and = and i64 %val, 31
%cmp = icmp eq i64 %and, 0
%ret = zext i1 %cmp to i32
@@ -676,13 +684,20 @@ define i32 @lowmask_i64_mask8(i64 %val) {
}
define i32 @highmask_i32_mask32(i32 %val) {
-; CHECK-LABEL: highmask_i32_mask32:
-; CHECK: # %bb.0:
-; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
-; CHECK-NEXT: testl $-1048576, %edi # encoding: [0xf7,0xc7,0x00,0x00,0xf0,0xff]
-; CHECK-NEXT: # imm = 0xFFF00000
-; CHECK-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
-; CHECK-NEXT: retq # encoding: [0xc3]
+; NO-NDD-LABEL: highmask_i32_mask32:
+; NO-NDD: # %bb.0:
+; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NO-NDD-NEXT: testl $-1048576, %edi # encoding: [0xf7,0xc7,0x00,0x00,0xf0,0xff]
+; NO-NDD-NEXT: # imm = 0xFFF00000
+; NO-NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
+; NO-NDD-NEXT: retq # encoding: [0xc3]
+;
+; NDD-LABEL: highmask_i32_mask32:
+; NDD: # %bb.0:
+; NDD-NEXT: testl $-1048576, %edi # encoding: [0xf7,0xc7,0x00,0x00,0xf0,0xff]
+; NDD-NEXT: # imm = 0xFFF00000
+; NDD-NEXT: setzune %al # encoding: [0x62,0xf4,0x7f,0x18,0x45,0xc0]
+; NDD-NEXT: retq # encoding: [0xc3]
%and = and i32 %val, -1048576
%cmp = icmp ne i32 %and, 0
%ret = zext i1 %cmp to i32
@@ -690,12 +705,18 @@ define i32 @highmask_i32_mask32(i32 %val) {
}
define i32 @highmask_i32_mask8(i32 %val) {
-; CHECK-LABEL: highmask_i32_mask8:
-; CHECK: # %bb.0:
-; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
-; CHECK-NEXT: testl $-16, %edi # encoding: [0xf7,0xc7,0xf0,0xff,0xff,0xff]
-; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
-; CHECK-NEXT: retq # encoding: [0xc3]
+; NO-NDD-LABEL: highmask_i32_mask8:
+; NO-NDD: # %bb.0:
+; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NO-NDD-NEXT: testl $-16, %edi # encoding: [0xf7,0xc7,0xf0,0xff,0xff,0xff]
+; NO-NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NO-NDD-NEXT: retq # encoding: [0xc3]
+;
+; NDD-LABEL: highmask_i32_mask8:
+; NDD: # %bb.0:
+; NDD-NEXT: testl $-16, %edi # encoding: [0xf7,0xc7,0xf0,0xff,0xff,0xff]
+; NDD-NEXT: setzue %al # encoding: [0x62,0xf4,0x7f,0x18,0x44,0xc0]
+; NDD-NEXT: retq # encoding: [0xc3]
%and = and i32 %val, -16
%cmp = icmp eq i32 %and, 0
%ret = zext i1 %cmp to i32
@@ -703,13 +724,20 @@ define i32 @highmask_i32_mask8(i32 %val) {
}
define i32 @lowmask_i32_mask32(i32 %val) {
-; CHECK-LABEL: lowmask_i32_mask32:
-; CHECK: # %bb.0:
-; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
-; CHECK-NEXT: testl $1048575, %edi # encoding: [0xf7,0xc7,0xff,0xff,0x0f,0x00]
-; CHECK-NEXT: # imm = 0xFFFFF
-; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
-; CHECK-NEXT: retq # encoding: [0xc3]
+; NO-NDD-LABEL: lowmask_i32_mask32:
+; NO-NDD: # %bb.0:
+; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NO-NDD-NEXT: testl $1048575, %edi # encoding: [0xf7,0xc7,0xff,0xff,0x0f,0x00]
+; NO-NDD-NEXT: # imm = 0xFFFFF
+; NO-NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NO-NDD-NEXT: retq # encoding: [0xc3]
+;
+; NDD-LABEL: lowmask_i32_mask32:
+; NDD: # %bb.0:
+; NDD-NEXT: testl $1048575, %edi # encoding: [0xf7,0xc7,0xff,0xff,0x0f,0x00]
+; NDD-NEXT: # imm = 0xFFFFF
+; NDD-NEXT: setzue %al # encoding: [0x62,0xf4,0x7f,0x18,0x44,0xc0]
+; NDD-NEXT: retq # encoding: [0xc3]
%and = and i32 %val, 1048575
%cmp = icmp eq i32 %and, 0
%ret = zext i1 %cmp to i32
@@ -717,12 +745,18 @@ define i32 @lowmask_i32_mask32(i32 %val) {
}
define i32 @lowmask_i32_mask8(i32 %val) {
-; CHECK-LABEL: lowmask_i32_mask8:
-; CHECK: # %bb.0:
-; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
-; CHECK-NEXT: testb $31, %dil # encoding: [0x40,0xf6,0xc7,0x1f]
-; CHECK-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
-; CHECK-NEXT: retq # encoding: [0xc3]
+; NO-NDD-LABEL: lowmask_i32_mask8:
+; NO-NDD: # %bb.0:
+; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NO-NDD-NEXT: testb $31, %dil # encoding: [0x40,0xf6,0xc7,0x1f]
+; NO-NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
+; NO-NDD-NEXT: retq # encoding: [0xc3]
+;
+; NDD-LABEL: lowmask_i32_mask8:
+; NDD: # %bb.0:
+; NDD-NEXT: testb $31, %dil # encoding: [0x40,0xf6,0xc7,0x1f]
+; NDD-NEXT: setzune %al # encoding: [0x62,0xf4,0x7f,0x18,0x45,0xc0]
+; NDD-NEXT: retq # encoding: [0xc3]
%and = and i32 %val, 31
%cmp = icmp ne i32 %and, 0
%ret = zext i1 %cmp to i32
>From d2d382ff2440346ca6c6e67e3601d2f5e3c2b77e Mon Sep 17 00:00:00 2001
From: Phoebe Wang <phoebe.wang at intel.com>
Date: Fri, 5 Dec 2025 17:06:17 +0800
Subject: [PATCH 2/2] Change Predicates to HasZU
---
llvm/lib/Target/X86/X86InstrCMovSetCC.td | 4 +-
llvm/test/CodeGen/X86/apx/ccmp.ll | 6 +-
llvm/test/CodeGen/X86/apx/ctest.ll | 6 +-
llvm/test/CodeGen/X86/apx/setzucc.ll | 12 ++
llvm/test/CodeGen/X86/cmp.ll | 158 +++++++++--------------
5 files changed, 84 insertions(+), 102 deletions(-)
diff --git a/llvm/lib/Target/X86/X86InstrCMovSetCC.td b/llvm/lib/Target/X86/X86InstrCMovSetCC.td
index 740cd0a4976f1..b1599f2f37045 100644
--- a/llvm/lib/Target/X86/X86InstrCMovSetCC.td
+++ b/llvm/lib/Target/X86/X86InstrCMovSetCC.td
@@ -150,7 +150,7 @@ let Uses = [EFLAGS], isCodeGenOnly = 1, ForceDisassemble = 1 in {
// SetZUCC and promoted SetCC instructions.
let Uses = [EFLAGS], isCodeGenOnly = 1, ForceDisassemble = 1,
- hasSideEffects = 0, Predicates = [In64BitMode], Predicates = [HasNDD] in {
+ hasSideEffects = 0, Predicates = [In64BitMode] in {
def SETZUCCr : I<0x40, MRMXrCC, (outs GR8:$dst), (ins ccode:$cond),
"setzu${cond}\t$dst", []>,
XD, ZU, NoCD8, Sched<[WriteSETCC]>;
@@ -167,7 +167,7 @@ let Uses = [EFLAGS], isCodeGenOnly = 1, ForceDisassemble = 1,
}
}
-let Predicates = [HasNDD] in
+let Predicates = [HasZU] in
def : Pat<(i32 (zext (X86setcc timm:$cond, EFLAGS))),
(INSERT_SUBREG (i32 (IMPLICIT_DEF)), (SETZUCCr ccode:$cond), sub_8bit)>;
diff --git a/llvm/test/CodeGen/X86/apx/ccmp.ll b/llvm/test/CodeGen/X86/apx/ccmp.ll
index 34538ac9816f8..4c58c8a980314 100644
--- a/llvm/test/CodeGen/X86/apx/ccmp.ll
+++ b/llvm/test/CodeGen/X86/apx/ccmp.ll
@@ -1215,7 +1215,8 @@ define i32 @ccmp_nobranch(i32 noundef %a, i32 noundef %b) {
; NDD: # %bb.0: # %entry
; NDD-NEXT: testl %edi, %edi # encoding: [0x85,0xff]
; NDD-NEXT: ccmplel {dfv=} $2, %esi # encoding: [0x62,0xf4,0x04,0x0e,0x83,0xfe,0x02]
-; NDD-NEXT: setzuge %al # encoding: [0x62,0xf4,0x7f,0x18,0x4d,0xc0]
+; NDD-NEXT: setge %al # encoding: [0x0f,0x9d,0xc0]
+; NDD-NEXT: movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0]
; NDD-NEXT: retq # encoding: [0xc3]
entry:
%cmp = icmp sgt i32 %a, 0
@@ -1240,7 +1241,8 @@ define i32 @ccmp_continous_nobranch(i32 noundef %a, i32 noundef %b, i32 noundef
; NDD-NEXT: cmpl $2, %edi # encoding: [0x83,0xff,0x02]
; NDD-NEXT: ccmpll {dfv=sf} $2, %esi # encoding: [0x62,0xf4,0x24,0x0c,0x83,0xfe,0x02]
; NDD-NEXT: ccmpll {dfv=sf} $4, %edx # encoding: [0x62,0xf4,0x24,0x0c,0x83,0xfa,0x04]
-; NDD-NEXT: setzuge %al # encoding: [0x62,0xf4,0x7f,0x18,0x4d,0xc0]
+; NDD-NEXT: setge %al # encoding: [0x0f,0x9d,0xc0]
+; NDD-NEXT: movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0]
; NDD-NEXT: retq # encoding: [0xc3]
entry:
%cmp = icmp sgt i32 %a, 1
diff --git a/llvm/test/CodeGen/X86/apx/ctest.ll b/llvm/test/CodeGen/X86/apx/ctest.ll
index d4baf82c50e11..5f3ec8a19d0a4 100644
--- a/llvm/test/CodeGen/X86/apx/ctest.ll
+++ b/llvm/test/CodeGen/X86/apx/ctest.ll
@@ -858,7 +858,8 @@ define i32 @ctest_nobranch(i32 noundef %a, i32 noundef %b) {
; NDD: # %bb.0: # %entry
; NDD-NEXT: testl %edi, %edi
; NDD-NEXT: ctestlel {dfv=} %esi, %esi
-; NDD-NEXT: setzug %al
+; NDD-NEXT: setg %al
+; NDD-NEXT: movzbl %al, %eax
; NDD-NEXT: retq
entry:
%cmp = icmp sgt i32 %a, 0
@@ -883,7 +884,8 @@ define i32 @ctest_continous_nobranch(i32 noundef %a, i32 noundef %b, i32 noundef
; NDD-NEXT: testl %edi, %edi
; NDD-NEXT: ctestlel {dfv=sf} %esi, %esi
; NDD-NEXT: ctestsl {dfv=zf} %edx, %edx
-; NDD-NEXT: setzug %al
+; NDD-NEXT: setg %al
+; NDD-NEXT: movzbl %al, %eax
; NDD-NEXT: retq
entry:
%cmp = icmp sgt i32 %a, 0
diff --git a/llvm/test/CodeGen/X86/apx/setzucc.ll b/llvm/test/CodeGen/X86/apx/setzucc.ll
index 6eb2d6966ecd8..d32ccf877137e 100644
--- a/llvm/test/CodeGen/X86/apx/setzucc.ll
+++ b/llvm/test/CodeGen/X86/apx/setzucc.ll
@@ -89,3 +89,15 @@ bb1:
bb2:
ret i32 0
}
+
+define i32 @highmask_i32_mask32(i32 %val) {
+; CHECK-LABEL: highmask_i32_mask32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: testl $-1048576, %edi # imm = 0xFFF00000
+; CHECK-NEXT: setzune %al
+; CHECK-NEXT: retq
+ %and = and i32 %val, -1048576
+ %cmp = icmp ne i32 %and, 0
+ %ret = zext i1 %cmp to i32
+ ret i32 %ret
+}
diff --git a/llvm/test/CodeGen/X86/cmp.ll b/llvm/test/CodeGen/X86/cmp.ll
index ee938ee7b0248..ed3f0e0f0aa71 100644
--- a/llvm/test/CodeGen/X86/cmp.ll
+++ b/llvm/test/CodeGen/X86/cmp.ll
@@ -177,8 +177,9 @@ define i32 @test7(i64 %res) nounwind {
;
; NDD-LABEL: test7:
; NDD: # %bb.0: # %entry
+; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
; NDD-NEXT: shrq $32, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xef,0x20]
-; NDD-NEXT: setzue %al # encoding: [0x62,0xf4,0x7f,0x18,0x44,0xc0]
+; NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
; NDD-NEXT: retq # encoding: [0xc3]
entry:
%lnot = icmp ult i64 %res, 4294967296
@@ -198,8 +199,9 @@ define i32 @test8(i64 %res) nounwind {
; NDD-LABEL: test8:
; NDD: # %bb.0:
; NDD-NEXT: shrq $32, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xef,0x20]
+; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
; NDD-NEXT: cmpl $3, %edi # encoding: [0x83,0xff,0x03]
-; NDD-NEXT: setzub %al # encoding: [0x62,0xf4,0x7f,0x18,0x42,0xc0]
+; NDD-NEXT: setb %al # encoding: [0x0f,0x92,0xc0]
; NDD-NEXT: retq # encoding: [0xc3]
%lnot = icmp ult i64 %res, 12884901888
%lnot.ext = zext i1 %lnot to i32
@@ -216,8 +218,9 @@ define i32 @test9(i64 %res) nounwind {
;
; NDD-LABEL: test9:
; NDD: # %bb.0:
+; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
; NDD-NEXT: shrq $33, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xef,0x21]
-; NDD-NEXT: setzue %al # encoding: [0x62,0xf4,0x7f,0x18,0x44,0xc0]
+; NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
; NDD-NEXT: retq # encoding: [0xc3]
%lnot = icmp ult i64 %res, 8589934592
%lnot.ext = zext i1 %lnot to i32
@@ -234,8 +237,9 @@ define i32 @test10(i64 %res) nounwind {
;
; NDD-LABEL: test10:
; NDD: # %bb.0:
+; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
; NDD-NEXT: shrq $32, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xef,0x20]
-; NDD-NEXT: setzune %al # encoding: [0x62,0xf4,0x7f,0x18,0x45,0xc0]
+; NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
; NDD-NEXT: retq # encoding: [0xc3]
%lnot = icmp uge i64 %res, 4294967296
%lnot.ext = zext i1 %lnot to i32
@@ -254,8 +258,9 @@ define i32 @test11(i64 %l) nounwind {
; NDD-LABEL: test11:
; NDD: # %bb.0:
; NDD-NEXT: shrq $47, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xef,0x2f]
+; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
; NDD-NEXT: cmpl $1, %edi # encoding: [0x83,0xff,0x01]
-; NDD-NEXT: setzue %al # encoding: [0x62,0xf4,0x7f,0x18,0x44,0xc0]
+; NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
; NDD-NEXT: retq # encoding: [0xc3]
%shr.mask = and i64 %l, -140737488355328
%cmp = icmp eq i64 %shr.mask, 140737488355328
@@ -428,9 +433,10 @@ define void @test20(i32 %bf.load, i8 %x1, ptr %b_addr) {
;
; NDD-LABEL: test20:
; NDD: # %bb.0:
+; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
; NDD-NEXT: testl $16777215, %edi # encoding: [0xf7,0xc7,0xff,0xff,0xff,0x00]
; NDD-NEXT: # imm = 0xFFFFFF
-; NDD-NEXT: setzune %al # encoding: [0x62,0xf4,0x7f,0x18,0x45,0xc0]
+; NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
; NDD-NEXT: movzbl %sil, %ecx # encoding: [0x40,0x0f,0xb6,0xce]
; NDD-NEXT: addl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x01,0xc8]
; NDD-NEXT: setne (%rdx) # encoding: [0x0f,0x95,0x02]
@@ -475,10 +481,9 @@ define i32 @highmask_i64_mask64(i64 %val) {
;
; NDD-LABEL: highmask_i64_mask64:
; NDD: # %bb.0:
-; NDD-NEXT: movabsq $-2199023255552, %rax # encoding: [0x48,0xb8,0x00,0x00,0x00,0x00,0x00,0xfe,0xff,0xff]
-; NDD-NEXT: # imm = 0xFFFFFE0000000000
-; NDD-NEXT: testq %rax, %rdi # encoding: [0x48,0x85,0xc7]
-; NDD-NEXT: setzune %al # encoding: [0x62,0xf4,0x7f,0x18,0x45,0xc0]
+; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NDD-NEXT: shrq $41, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xef,0x29]
+; NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
; NDD-NEXT: retq # encoding: [0xc3]
%and = and i64 %val, -2199023255552
%cmp = icmp ne i64 %and, 0
@@ -520,9 +525,9 @@ define i32 @highmask_i64_mask32(i64 %val) {
;
; NDD-LABEL: highmask_i64_mask32:
; NDD: # %bb.0:
-; NDD-NEXT: testq $-1048576, %rdi # encoding: [0x48,0xf7,0xc7,0x00,0x00,0xf0,0xff]
-; NDD-NEXT: # imm = 0xFFF00000
-; NDD-NEXT: setzue %al # encoding: [0x62,0xf4,0x7f,0x18,0x44,0xc0]
+; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NDD-NEXT: shrq $20, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xef,0x14]
+; NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
; NDD-NEXT: retq # encoding: [0xc3]
%and = and i64 %val, -1048576
%cmp = icmp eq i64 %and, 0
@@ -556,18 +561,12 @@ define i64 @highmask_i64_mask32_extra_use(i64 %val) nounwind {
}
define i32 @highmask_i64_mask8(i64 %val) {
-; NO-NDD-LABEL: highmask_i64_mask8:
-; NO-NDD: # %bb.0:
-; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
-; NO-NDD-NEXT: testq $-16, %rdi # encoding: [0x48,0xf7,0xc7,0xf0,0xff,0xff,0xff]
-; NO-NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
-; NO-NDD-NEXT: retq # encoding: [0xc3]
-;
-; NDD-LABEL: highmask_i64_mask8:
-; NDD: # %bb.0:
-; NDD-NEXT: testq $-16, %rdi # encoding: [0x48,0xf7,0xc7,0xf0,0xff,0xff,0xff]
-; NDD-NEXT: setzune %al # encoding: [0x62,0xf4,0x7f,0x18,0x45,0xc0]
-; NDD-NEXT: retq # encoding: [0xc3]
+; CHECK-LABEL: highmask_i64_mask8:
+; CHECK: # %bb.0:
+; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; CHECK-NEXT: testq $-16, %rdi # encoding: [0x48,0xf7,0xc7,0xf0,0xff,0xff,0xff]
+; CHECK-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
+; CHECK-NEXT: retq # encoding: [0xc3]
%and = and i64 %val, -16
%cmp = icmp ne i64 %and, 0
%ret = zext i1 %cmp to i32
@@ -584,10 +583,9 @@ define i32 @lowmask_i64_mask64(i64 %val) {
;
; NDD-LABEL: lowmask_i64_mask64:
; NDD: # %bb.0:
-; NDD-NEXT: movabsq $281474976710655, %rax # encoding: [0x48,0xb8,0xff,0xff,0xff,0xff,0xff,0xff,0x00,0x00]
-; NDD-NEXT: # imm = 0xFFFFFFFFFFFF
-; NDD-NEXT: testq %rax, %rdi # encoding: [0x48,0x85,0xc7]
-; NDD-NEXT: setzue %al # encoding: [0x62,0xf4,0x7f,0x18,0x44,0xc0]
+; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NDD-NEXT: shlq $16, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xe7,0x10]
+; NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
; NDD-NEXT: retq # encoding: [0xc3]
%and = and i64 %val, 281474976710655
%cmp = icmp eq i64 %and, 0
@@ -629,9 +627,9 @@ define i32 @lowmask_i64_mask32(i64 %val) {
;
; NDD-LABEL: lowmask_i64_mask32:
; NDD: # %bb.0:
-; NDD-NEXT: testl $1048575, %edi # encoding: [0xf7,0xc7,0xff,0xff,0x0f,0x00]
-; NDD-NEXT: # imm = 0xFFFFF
-; NDD-NEXT: setzune %al # encoding: [0x62,0xf4,0x7f,0x18,0x45,0xc0]
+; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NDD-NEXT: shlq $44, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0xc1,0xe7,0x2c]
+; NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
; NDD-NEXT: retq # encoding: [0xc3]
%and = and i64 %val, 1048575
%cmp = icmp ne i64 %and, 0
@@ -665,18 +663,12 @@ define i64 @lowmask_i64_mask32_extra_use(i64 %val) nounwind {
}
define i32 @lowmask_i64_mask8(i64 %val) {
-; NO-NDD-LABEL: lowmask_i64_mask8:
-; NO-NDD: # %bb.0:
-; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
-; NO-NDD-NEXT: testb $31, %dil # encoding: [0x40,0xf6,0xc7,0x1f]
-; NO-NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
-; NO-NDD-NEXT: retq # encoding: [0xc3]
-;
-; NDD-LABEL: lowmask_i64_mask8:
-; NDD: # %bb.0:
-; NDD-NEXT: testb $31, %dil # encoding: [0x40,0xf6,0xc7,0x1f]
-; NDD-NEXT: setzue %al # encoding: [0x62,0xf4,0x7f,0x18,0x44,0xc0]
-; NDD-NEXT: retq # encoding: [0xc3]
+; CHECK-LABEL: lowmask_i64_mask8:
+; CHECK: # %bb.0:
+; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; CHECK-NEXT: testb $31, %dil # encoding: [0x40,0xf6,0xc7,0x1f]
+; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; CHECK-NEXT: retq # encoding: [0xc3]
%and = and i64 %val, 31
%cmp = icmp eq i64 %and, 0
%ret = zext i1 %cmp to i32
@@ -684,20 +676,13 @@ define i32 @lowmask_i64_mask8(i64 %val) {
}
define i32 @highmask_i32_mask32(i32 %val) {
-; NO-NDD-LABEL: highmask_i32_mask32:
-; NO-NDD: # %bb.0:
-; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
-; NO-NDD-NEXT: testl $-1048576, %edi # encoding: [0xf7,0xc7,0x00,0x00,0xf0,0xff]
-; NO-NDD-NEXT: # imm = 0xFFF00000
-; NO-NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
-; NO-NDD-NEXT: retq # encoding: [0xc3]
-;
-; NDD-LABEL: highmask_i32_mask32:
-; NDD: # %bb.0:
-; NDD-NEXT: testl $-1048576, %edi # encoding: [0xf7,0xc7,0x00,0x00,0xf0,0xff]
-; NDD-NEXT: # imm = 0xFFF00000
-; NDD-NEXT: setzune %al # encoding: [0x62,0xf4,0x7f,0x18,0x45,0xc0]
-; NDD-NEXT: retq # encoding: [0xc3]
+; CHECK-LABEL: highmask_i32_mask32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; CHECK-NEXT: testl $-1048576, %edi # encoding: [0xf7,0xc7,0x00,0x00,0xf0,0xff]
+; CHECK-NEXT: # imm = 0xFFF00000
+; CHECK-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
+; CHECK-NEXT: retq # encoding: [0xc3]
%and = and i32 %val, -1048576
%cmp = icmp ne i32 %and, 0
%ret = zext i1 %cmp to i32
@@ -705,18 +690,12 @@ define i32 @highmask_i32_mask32(i32 %val) {
}
define i32 @highmask_i32_mask8(i32 %val) {
-; NO-NDD-LABEL: highmask_i32_mask8:
-; NO-NDD: # %bb.0:
-; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
-; NO-NDD-NEXT: testl $-16, %edi # encoding: [0xf7,0xc7,0xf0,0xff,0xff,0xff]
-; NO-NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
-; NO-NDD-NEXT: retq # encoding: [0xc3]
-;
-; NDD-LABEL: highmask_i32_mask8:
-; NDD: # %bb.0:
-; NDD-NEXT: testl $-16, %edi # encoding: [0xf7,0xc7,0xf0,0xff,0xff,0xff]
-; NDD-NEXT: setzue %al # encoding: [0x62,0xf4,0x7f,0x18,0x44,0xc0]
-; NDD-NEXT: retq # encoding: [0xc3]
+; CHECK-LABEL: highmask_i32_mask8:
+; CHECK: # %bb.0:
+; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; CHECK-NEXT: testl $-16, %edi # encoding: [0xf7,0xc7,0xf0,0xff,0xff,0xff]
+; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; CHECK-NEXT: retq # encoding: [0xc3]
%and = and i32 %val, -16
%cmp = icmp eq i32 %and, 0
%ret = zext i1 %cmp to i32
@@ -724,20 +703,13 @@ define i32 @highmask_i32_mask8(i32 %val) {
}
define i32 @lowmask_i32_mask32(i32 %val) {
-; NO-NDD-LABEL: lowmask_i32_mask32:
-; NO-NDD: # %bb.0:
-; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
-; NO-NDD-NEXT: testl $1048575, %edi # encoding: [0xf7,0xc7,0xff,0xff,0x0f,0x00]
-; NO-NDD-NEXT: # imm = 0xFFFFF
-; NO-NDD-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
-; NO-NDD-NEXT: retq # encoding: [0xc3]
-;
-; NDD-LABEL: lowmask_i32_mask32:
-; NDD: # %bb.0:
-; NDD-NEXT: testl $1048575, %edi # encoding: [0xf7,0xc7,0xff,0xff,0x0f,0x00]
-; NDD-NEXT: # imm = 0xFFFFF
-; NDD-NEXT: setzue %al # encoding: [0x62,0xf4,0x7f,0x18,0x44,0xc0]
-; NDD-NEXT: retq # encoding: [0xc3]
+; CHECK-LABEL: lowmask_i32_mask32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; CHECK-NEXT: testl $1048575, %edi # encoding: [0xf7,0xc7,0xff,0xff,0x0f,0x00]
+; CHECK-NEXT: # imm = 0xFFFFF
+; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; CHECK-NEXT: retq # encoding: [0xc3]
%and = and i32 %val, 1048575
%cmp = icmp eq i32 %and, 0
%ret = zext i1 %cmp to i32
@@ -745,18 +717,12 @@ define i32 @lowmask_i32_mask32(i32 %val) {
}
define i32 @lowmask_i32_mask8(i32 %val) {
-; NO-NDD-LABEL: lowmask_i32_mask8:
-; NO-NDD: # %bb.0:
-; NO-NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
-; NO-NDD-NEXT: testb $31, %dil # encoding: [0x40,0xf6,0xc7,0x1f]
-; NO-NDD-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
-; NO-NDD-NEXT: retq # encoding: [0xc3]
-;
-; NDD-LABEL: lowmask_i32_mask8:
-; NDD: # %bb.0:
-; NDD-NEXT: testb $31, %dil # encoding: [0x40,0xf6,0xc7,0x1f]
-; NDD-NEXT: setzune %al # encoding: [0x62,0xf4,0x7f,0x18,0x45,0xc0]
-; NDD-NEXT: retq # encoding: [0xc3]
+; CHECK-LABEL: lowmask_i32_mask8:
+; CHECK: # %bb.0:
+; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; CHECK-NEXT: testb $31, %dil # encoding: [0x40,0xf6,0xc7,0x1f]
+; CHECK-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
+; CHECK-NEXT: retq # encoding: [0xc3]
%and = and i32 %val, 31
%cmp = icmp ne i32 %and, 0
%ret = zext i1 %cmp to i32
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