[llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)
Shih-Po Hung via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 5 10:05:42 PST 2025
================
@@ -2878,11 +2878,21 @@ bool LoopVectorizationCostModel::isPredicatedInst(Instruction *I) const {
TheLoop->isLoopInvariant(cast<StoreInst>(I)->getValueOperand()));
}
case Instruction::UDiv:
- case Instruction::SDiv:
- case Instruction::SRem:
case Instruction::URem:
// If the divisor is loop-invariant no predication is needed.
return !Legal->isInvariant(I->getOperand(1));
+ case Instruction::SDiv:
+ case Instruction::SRem: {
+ auto *LHS = I->getOperand(0);
+ auto *RHS = I->getOperand(1);
+ // If RHS is loop-invariant, signed-division overflow is possible
+ // when RHS == −1 or when it isn’t a known constant.
+ return !Legal->isInvariant(RHS) ||
+ (!Legal->isInvariant(LHS) &&
+ (!isa<ConstantInt>(RHS) ||
+ (isa<ConstantInt>(RHS) &&
+ cast<ConstantInt>(RHS)->getValue().isAllOnes())));
----------------
arcbbb wrote:
Fixed. Thanks!
https://github.com/llvm/llvm-project/pull/170818
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