[llvm] [IR] Add CallBr intrinsics support (PR #133907)

[Robert Imschweiler via llvm-commits]

ro-i wrote:

There is an issue with expensive checks: https://lab.llvm.org/buildbot/#/builders/187/builds/14243

One aspect I forgot is to add
```c++
  // Drop into default successor.
  MIRBuilder.buildBr(*Return);
```
to the end of `IRTranslator::translateCallBr`. But another issue remains even when I fix that:
```
# executed command: [...]/build/llvm-project/bin/llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx90a
# .---command stderr------------
# |
# | # After InstructionSelect
# | # Machine code for function test_kill: IsSSA, TracksLiveness, Legalized, RegBankSelected, Selected
# | Function Live Ins: $sgpr4_sgpr5 in %3, $sgpr6_sgpr7 in %4, $sgpr8_sgpr9 in %5, $sgpr10_sgpr11 in %6, $sgpr12 in %7, $sgpr13 in %8, $sgpr14 in %9, $sgpr15 in %10
# |
# | bb.1 (%ir-block.0):
# |   successors: %bb.3(0x80000000); %bb.3(100.00%)
# |   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4
# |   %11:vgpr_32 = COPY $vgpr0
# |   %12:vgpr_32 = COPY $vgpr1
# |   %0:vreg_64_align2 = REG_SEQUENCE %11:vgpr_32, %subreg.sub0, %12:vgpr_32, %subreg.sub1
# |   %13:vgpr_32 = COPY $vgpr2
# |   %14:vgpr_32 = COPY $vgpr3
# |   %1:vreg_64_align2 = REG_SEQUENCE %13:vgpr_32, %subreg.sub0, %14:vgpr_32, %subreg.sub1
# |   %15:vgpr_32 = COPY $vgpr4
# |   %16:vgpr_32 = FLAT_LOAD_DWORD %0:vreg_64_align2, 0, 0, implicit $exec, implicit $flat_scr :: (load (s32) from %ir.src)
# |   %18:vgpr_32 = V_AND_B32_e32 1, %15:vgpr_32, implicit $exec
# |   %17:sreg_64_xexec = V_CMP_NE_U32_e64 0, %18:vgpr_32, implicit $exec
# |   SI_KILL_I1_PSEUDO %17:sreg_64_xexec, 0, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
# |   S_BRANCH %bb.3
# |
# | bb.2.kill:
# |   successors: %bb.4(0x80000000); %bb.4(100.00%)
# |
# |
# | bb.3.cont:
# | ; predecessors: %bb.1
# |   successors: %bb.4(0x80000000); %bb.4(100.00%)
# |
# |   FLAT_STORE_DWORD %1:vreg_64_align2, %16:vgpr_32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %ir.dst)
# |
# | bb.4.UnifiedReturnBlock:
# | ; predecessors: %bb.2, %bb.3
# |
# |   SI_RETURN
# |
# | # End machine code for function test_kill.
# |
# | *** Bad machine code: MBB has unexpected successors which are not branch targets, fallthrough, EHPads, or inlineasm_br targets. ***
# | - function:    test_kill
# | - basic block: %bb.2 kill (0x633fc3b5c1f0)
# | LLVM ERROR: Found 1 machine code errors.
```

which is probably due to amdgcn.unreachable not being handled correctly in GlobalISel (actually unrelated to this PR, but still an issue, ig).
I now also see that amdgcn.kill had been untested for GlobalISel before, so that's probably why this hadn't come up yet

https://github.com/llvm/llvm-project/pull/133907