[llvm] [RISCV] Inserting indirect jumps with X7 for Zicfilp (PR #170683)

Jesse Huang via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 4 11:12:25 PST 2025


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@@ -1372,8 +1372,11 @@ void RISCVInstrInfo::insertIndirectBranch(MachineBasicBlock &MBB,
                           .addMBB(&DestBB, RISCVII::MO_CALL);
 
   RS->enterBasicBlockEnd(MBB);
+  const TargetRegisterClass *RC = &RISCV::GPRRegClass;
+  if (STI.hasStdExtZicfilp())
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jaidTw wrote:

We haven't switch to check on the attribute yet, I think it's better to switch every thing to it in a single patch?

https://github.com/llvm/llvm-project/pull/170683


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