[clang] [llvm] [CIR] X86 vector masked load builtins (PR #169464)

[Andy Kaylor via llvm-commits]

andykaylor wrote:

> > Has any work been done towards having masked loads and stores in CIR?
> 
> Yes, and this PR seems to be following what the incubator does

What I meant was, has there been any consideration of having a dedicated operation like `cir.masked.load` rather than just calling the LLVM intrinsic? The LLVM dialect seems to be in an almost in-between state, having `llvm.intr.masked.load` but at least you don't have to unpack the intrinsic call to see that it's a masked load. I think that's important. It's really a fairly general operation and is important for reasoning about which vector lanes are live.

https://github.com/llvm/llvm-project/pull/169464