[clang] [llvm] [PowerPC] Add initial support for AMO load builtins (PR #168746)

[Lei Huang via llvm-commits]

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@@ -2121,14 +1863,21 @@ def LHARXL : XForm_1_memOp<31,  116, (outs gprc:$RST), (ins (memrr $RA, $RB):$ad
 
 def LWARXL : XForm_1_memOp<31,  20, (outs gprc:$RST), (ins (memrr $RA, $RB):$addr),
                      "lwarx $RST, $addr, 1", IIC_LdStLWARX, []>, isRecordForm;
+}
 
 // The atomic instructions use the destination register as well as the next one
 // or two registers in order (modulo 31).
-let hasExtraSrcRegAllocReq = 1 in
-def LWAT : X_RD5_RS5_IM5<31, 582, (outs gprc:$RST), (ins gprc:$RA, u5imm:$RB),
+let hasExtraSrcRegAllocReq = 1, mayLoad = 1, mayStore = 1 in
+def LWAT : X_RD5_RS5_IM5<31, 582, (outs g8prc:$RST), (ins g8prc:$RSTi, ptr_rc_nor0:$RA, u5imm:$RB),
                          "lwat $RST, $RA, $RB", IIC_LdStLoad>,
-           Requires<[IsISA3_0]>;
-}
+           Requires<[IsISA3_0]>,
+           RegConstraint<"$RSTi = $RST">;
+
+def LWAT_PSEUDO : PPCCustomInserterPseudo<
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lei137 wrote:

Would be good if some documentation can be provided as to why this pseudo is needed?

https://github.com/llvm/llvm-project/pull/168746