[llvm] [InstCombine] Lower flag check pattern to use a bitmask-shift (PR #169557)

[Yingwei Zheng via llvm-commits]

================
@@ -2410,6 +2410,59 @@ Value *InstCombinerImpl::reassociateBooleanAndOr(Value *LHS, Value *X, Value *Y,
   return nullptr;
 }
 
+static Value *combineAndOrOfImmCmpToBitExtract(Instruction &Or,
+                                               InstCombiner::BuilderTy &Builder,
+                                               const DataLayout &DL) {
+  ConstantComparesGatherer ConstantCompare(&Or, DL, /*OneUse=*/true);
+  // Unpack the result
+  SmallVectorImpl<ConstantInt *> &Values = ConstantCompare.Vals;
+  Value *Index = ConstantCompare.CompValue;
+
+  // TODO: Handle ConstantCompare.Extra case
+  // If expanding an existing case, only adding one extra case is still good
+  if (!Index || !isGuaranteedNotToBeUndefOrPoison(Index) ||
+      (ConstantCompare.UsedICmps + ConstantCompare.ExpansionCase) < 3 ||
+      ConstantCompare.Extra)
+    return nullptr;
+
+  unsigned MaxRegWidth = DL.getLargestLegalIntTypeSizeInBits();
+  unsigned MaxVal = 0;
+  // TODO: Handle case where some values are too large for map but some are not.
+  for (auto *CI : Values) {
+    unsigned Val = CI->getValue().getLimitedValue();
----------------
dtcxzyw wrote:

`getLimitedValue` returns a 64-bit value.

https://github.com/llvm/llvm-project/pull/169557