[llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)

[Luke Lau via llvm-commits]

================
@@ -2878,11 +2878,20 @@ bool LoopVectorizationCostModel::isPredicatedInst(Instruction *I) const {
              TheLoop->isLoopInvariant(cast<StoreInst>(I)->getValueOperand()));
   }
   case Instruction::UDiv:
-  case Instruction::SDiv:
-  case Instruction::SRem:
   case Instruction::URem:
     // If the divisor is loop-invariant no predication is needed.
     return !Legal->isInvariant(I->getOperand(1));
+  case Instruction::SDiv:
+  case Instruction::SRem: {
+    auto *LHS = I->getOperand(0);
+    auto *RHS = I->getOperand(1);
+    // If RHS is loop-invariant, signed-division overflow is possible
+    // when RHS == −1 or when it isn’t a known constant.
+    return !Legal->isInvariant(RHS) ||
+           (!Legal->isInvariant(LHS) &&
+            (!isa<ConstantInt>(RHS) ||
+             (isa<ConstantInt>(RHS) && cast<ConstantInt>(RHS)->isMinusOne())));
----------------
lukel97 wrote:

If I'm reading this correctly we already check `isSafeToSpeculativelyExecute(I)` above and early return if it's true, so at this point isSafeToSpeculativelyExecute must be false.

For SDiv/SRem this means that it's already checked the RHS may be -1 (and the LHS may be INT_MIN), so I think we don't need the RHS check. Can this be simplified to:

```suggestion
    return !Legal->isInvariant(RHS) || !Legal->isInvariant(LHS);
```

https://github.com/llvm/llvm-project/pull/170818