[clang] [llvm] [AArch64] Add intrinsics for 9.6 crypto instructions (PR #165545)

via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 1 06:36:23 PST 2025


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@@ -1841,6 +1841,23 @@ def SVPMULLT_PAIR_U64   : SInst<"svpmullt_pair[_{d}]",   "ddd", "Ul", MergeNone,
 def SVPMULLT_PAIR_N_U64 : SInst<"svpmullt_pair[_n_{d}]", "dda", "Ul", MergeNone, "aarch64_sve_pmullt_pair", [VerifyRuntimeMode]>;
 }
 
+let SVETargetGuard = "sve-aes2", SMETargetGuard = "sve-aes2,ssve-aes" in {
+def SVAESD_X2   : SInst<"svaesd_lane[_{d}_x2]",   "22di", "Uc", MergeNone, "aarch64_sve_aesd_lane_x2", [IsOverloadNone, VerifyRuntimeMode]>;
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CarolineConcatto wrote:

Can we add a check for these lanes:
Like: 
[ImmCheck<3, ImmCheck0_3>]> 
And if we do that can we create a diagnostic test for it

https://github.com/llvm/llvm-project/pull/165545


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