[clang] [llvm] [CIR] X86 vector masked load builtins (PR #169464)

Bruno Cardoso Lopes via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 2 17:37:24 PST 2025


bcardosolopes wrote:

> Has any work been done towards having masked loads and stores in CIR?

Yes, and this PR seems to be following what the incubator does

https://github.com/llvm/llvm-project/pull/169464


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