[llvm] [CodeGen][NPM] Add support for -print-regusage in New Pass Manager (PR #169761)

[Teja Alaghari via llvm-commits]

https://github.com/TejaX-Alaghari updated https://github.com/llvm/llvm-project/pull/169761

>From 85d5533099221512d7b8a5f99ab90f5ddb738f80 Mon Sep 17 00:00:00 2001
From: vikhegde <vikram.hegde at amd.com>
Date: Mon, 8 Sep 2025 11:37:49 +0530
Subject: [PATCH 1/3] Fixes to be upstreamed - 10

1. add support for DumpRegUsage in NPM (currntly I have added it in the destructor of RegisterUsageInfo, this seems to work but im not sure if it has any side effects)
---
 llvm/include/llvm/CodeGen/RegisterUsageInfo.h | 2 ++
 llvm/lib/CodeGen/RegisterUsageInfo.cpp        | 7 +++++++
 2 files changed, 9 insertions(+)

diff --git a/llvm/include/llvm/CodeGen/RegisterUsageInfo.h b/llvm/include/llvm/CodeGen/RegisterUsageInfo.h
index 9b0d30426f1d3..ada87e5632b4c 100644
--- a/llvm/include/llvm/CodeGen/RegisterUsageInfo.h
+++ b/llvm/include/llvm/CodeGen/RegisterUsageInfo.h
@@ -34,6 +34,8 @@ class TargetMachine;
 
 class PhysicalRegisterUsageInfo {
 public:
+
+  ~PhysicalRegisterUsageInfo();
   /// Set TargetMachine which is used to print analysis.
   void setTargetMachine(const TargetMachine &TM);
 
diff --git a/llvm/lib/CodeGen/RegisterUsageInfo.cpp b/llvm/lib/CodeGen/RegisterUsageInfo.cpp
index 2ef380fc7cad4..d48280642da52 100644
--- a/llvm/lib/CodeGen/RegisterUsageInfo.cpp
+++ b/llvm/lib/CodeGen/RegisterUsageInfo.cpp
@@ -56,6 +56,13 @@ bool PhysicalRegisterUsageInfo::doFinalization(Module &M) {
   return false;
 }
 
+PhysicalRegisterUsageInfo::~PhysicalRegisterUsageInfo() {
+    if (DumpRegUsage)
+      print(errs());
+    
+    RegMasks.shrink_and_clear();
+}
+
 void PhysicalRegisterUsageInfo::storeUpdateRegUsageInfo(
     const Function &FP, ArrayRef<uint32_t> RegMask) {
   RegMasks[&FP] = RegMask;

>From 3fa36fcba963c9af31897c7fbbda209ee480a7b9 Mon Sep 17 00:00:00 2001
From: Teja Alaghari <teja.alaghari at amd.com>
Date: Thu, 27 Nov 2025 10:42:36 +0530
Subject: [PATCH 2/3] Check TM validity before printing

---
 llvm/include/llvm/CodeGen/RegisterUsageInfo.h |  1 -
 llvm/lib/CodeGen/RegisterUsageInfo.cpp        | 10 ++++++----
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/llvm/include/llvm/CodeGen/RegisterUsageInfo.h b/llvm/include/llvm/CodeGen/RegisterUsageInfo.h
index ada87e5632b4c..04acaf380405e 100644
--- a/llvm/include/llvm/CodeGen/RegisterUsageInfo.h
+++ b/llvm/include/llvm/CodeGen/RegisterUsageInfo.h
@@ -34,7 +34,6 @@ class TargetMachine;
 
 class PhysicalRegisterUsageInfo {
 public:
-
   ~PhysicalRegisterUsageInfo();
   /// Set TargetMachine which is used to print analysis.
   void setTargetMachine(const TargetMachine &TM);
diff --git a/llvm/lib/CodeGen/RegisterUsageInfo.cpp b/llvm/lib/CodeGen/RegisterUsageInfo.cpp
index d48280642da52..48466381f4d3e 100644
--- a/llvm/lib/CodeGen/RegisterUsageInfo.cpp
+++ b/llvm/lib/CodeGen/RegisterUsageInfo.cpp
@@ -57,10 +57,12 @@ bool PhysicalRegisterUsageInfo::doFinalization(Module &M) {
 }
 
 PhysicalRegisterUsageInfo::~PhysicalRegisterUsageInfo() {
-    if (DumpRegUsage)
-      print(errs());
-    
-    RegMasks.shrink_and_clear();
+  // As doFinalization() is not called for analysis results in the new PM,
+  // we print the register usage information here.
+  if (DumpRegUsage && TM)
+    print(errs());
+
+  RegMasks.shrink_and_clear();
 }
 
 void PhysicalRegisterUsageInfo::storeUpdateRegUsageInfo(

>From 36355026c4a0e28343ee649eeed8a0adb2a62a50 Mon Sep 17 00:00:00 2001
From: Teja Alaghari <teja.alaghari at amd.com>
Date: Mon, 1 Dec 2025 16:20:09 +0530
Subject: [PATCH 3/3] Enable NPM for AMDGPU backend test case ipra-regmask.ll

---
 llvm/test/CodeGen/AMDGPU/ipra-regmask.ll | 1 +
 1 file changed, 1 insertion(+)

diff --git a/llvm/test/CodeGen/AMDGPU/ipra-regmask.ll b/llvm/test/CodeGen/AMDGPU/ipra-regmask.ll
index dc4bf21ab1269..052f1dd1e1c92 100644
--- a/llvm/test/CodeGen/AMDGPU/ipra-regmask.ll
+++ b/llvm/test/CodeGen/AMDGPU/ipra-regmask.ll
@@ -1,5 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -enable-ipra -print-regusage -filetype=null 2>&1 < %s | FileCheck %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -enable-new-pm=1 -enable-ipra -print-regusage -filetype=null 2>&1 < %s | FileCheck %s
 
 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -stop-after=prologepilog -o - %s \
 ; RUN:   | llc -x=mir -mtriple=amdgcn-amd-amdhsa -passes="module(require<reg-usage>,function(machine-function(reg-usage-collector)),print<reg-usage>)" -filetype=null 2>&1 \