[llvm] [AMDGPU] Fix a crash when a bool variable is used in inline asm (PR #171004)

[Shilei Tian via llvm-commits]

https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/171004

>From 00c592e03d66e63cca7d93497cb1ccbee74f1194 Mon Sep 17 00:00:00 2001
From: Shilei Tian <i at tianshilei.me>
Date: Sat, 6 Dec 2025 20:18:06 -0500
Subject: [PATCH 1/2] [AMDGPU] Fix a crash when a bool variable is used in
 inline asm

---
 llvm/lib/Target/AMDGPU/SIISelLowering.cpp       |  5 +++++
 llvm/test/CodeGen/AMDGPU/inline-asm-use-bool.ll | 15 +++++++++++++++
 2 files changed, 20 insertions(+)
 create mode 100644 llvm/test/CodeGen/AMDGPU/inline-asm-use-bool.ll

diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index ff67fd63ea75e..b5e6db178022c 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -17670,6 +17670,11 @@ SITargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI_,
       break;
     case 'v':
       switch (BitWidth) {
+      case 1:
+        RC = Subtarget->has1024AddressableVGPRs()
+                 ? &AMDGPU::VGPR_32_Lo256RegClass
+                 : &AMDGPU::VGPR_32RegClass;
+        break;
       case 16:
         RC = Subtarget->useRealTrue16Insts() ? &AMDGPU::VGPR_16RegClass
                                              : &AMDGPU::VGPR_32_Lo256RegClass;
diff --git a/llvm/test/CodeGen/AMDGPU/inline-asm-use-bool.ll b/llvm/test/CodeGen/AMDGPU/inline-asm-use-bool.ll
new file mode 100644
index 0000000000000..f26032656a2e9
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/inline-asm-use-bool.ll
@@ -0,0 +1,15 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 %s -o - | FileCheck %s
+; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 %s -o - | FileCheck %s
+
+define void @test(ptr %p, i1 %b) {
+; CHECK-LABEL: test:
+; CHECK:       ; %bb.0:
+; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; CHECK-NEXT:    ;;#ASMSTART
+; CHECK-NEXT:    global_store_byte v[0:1], v2, off glc slc
+; CHECK-NEXT:    ;;#ASMEND
+; CHECK-NEXT:    s_setpc_b64 s[30:31]
+  tail call void asm sideeffect "global_store_byte $0, $1, off glc slc", "v,v"(ptr %p, i1 %b)
+  ret void
+}

>From a925086217d0e62da30057c207309459c3668c9e Mon Sep 17 00:00:00 2001
From: Shilei Tian <i at tianshilei.me>
Date: Sun, 7 Dec 2025 19:24:46 -0500
Subject: [PATCH 2/2] move test

---
 llvm/test/CodeGen/AMDGPU/inline-asm-use-bool.ll | 15 ---------------
 llvm/test/CodeGen/AMDGPU/inline-asm.ll          | 12 ++++++++++++
 2 files changed, 12 insertions(+), 15 deletions(-)
 delete mode 100644 llvm/test/CodeGen/AMDGPU/inline-asm-use-bool.ll

diff --git a/llvm/test/CodeGen/AMDGPU/inline-asm-use-bool.ll b/llvm/test/CodeGen/AMDGPU/inline-asm-use-bool.ll
deleted file mode 100644
index f26032656a2e9..0000000000000
--- a/llvm/test/CodeGen/AMDGPU/inline-asm-use-bool.ll
+++ /dev/null
@@ -1,15 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 %s -o - | FileCheck %s
-; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 %s -o - | FileCheck %s
-
-define void @test(ptr %p, i1 %b) {
-; CHECK-LABEL: test:
-; CHECK:       ; %bb.0:
-; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; CHECK-NEXT:    ;;#ASMSTART
-; CHECK-NEXT:    global_store_byte v[0:1], v2, off glc slc
-; CHECK-NEXT:    ;;#ASMEND
-; CHECK-NEXT:    s_setpc_b64 s[30:31]
-  tail call void asm sideeffect "global_store_byte $0, $1, off glc slc", "v,v"(ptr %p, i1 %b)
-  ret void
-}
diff --git a/llvm/test/CodeGen/AMDGPU/inline-asm.ll b/llvm/test/CodeGen/AMDGPU/inline-asm.ll
index 54e7d0e6b08f3..0dd3f5abd72e2 100644
--- a/llvm/test/CodeGen/AMDGPU/inline-asm.ll
+++ b/llvm/test/CodeGen/AMDGPU/inline-asm.ll
@@ -363,3 +363,15 @@ define void @mixed_def_sgpr_vgpr_def_asm() {
   call void asm sideeffect "; use $0 ", "{s[4:5]}"(i64 %sgpr.add)
   ret void
 }
+
+define void @test(ptr %p, i1 %b) {
+; CHECK-LABEL: test:
+; CHECK:       ; %bb.0:
+; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; CHECK-NEXT:    ;;#ASMSTART
+; CHECK-NEXT:    global_store_byte v[0:1], v2, off glc slc
+; CHECK-NEXT:    ;;#ASMEND
+; CHECK-NEXT:    s_setpc_b64 s[30:31]
+  tail call void asm sideeffect "global_store_byte $0, $1, off glc slc", "v,v"(ptr %p, i1 %b)
+  ret void
+}