[clang] [llvm] [clang][NVPTX] Add missing half-precision add/mul/fma intrinsics (PR #170079)

[Alex MacLean via llvm-commits]

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@@ -1841,6 +1864,48 @@ def INT_NVVM_ADD_RZ_D : F_MATH_2<"add.rz.f64", B64, B64, B64, int_nvvm_add_rz_d>
 def INT_NVVM_ADD_RM_D : F_MATH_2<"add.rm.f64", B64, B64, B64, int_nvvm_add_rm_d>;
 def INT_NVVM_ADD_RP_D : F_MATH_2<"add.rp.f64", B64, B64, B64, int_nvvm_add_rp_d>;
 
+//
+// Sub
+//
+
+def SUB_RN_SAT_F16_NODE : SDNode<"NVPTXISD::SUB_RN_SAT_F16", SDTFPBinOp>;
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AlexMaclean wrote:

I think the naming convention for DAG nodes is lowercase snake, so this would be `sub_rn_sat`

https://github.com/llvm/llvm-project/pull/170079