[llvm] [IR] Split vector.splice into vector.splice.down and vector.splice.up (PR #170796)
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Thu Dec 4 18:47:37 PST 2025
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git-clang-format --diff origin/main HEAD --extensions cpp,h -- llvm/include/llvm/Analysis/TargetTransformInfo.h llvm/include/llvm/CodeGen/BasicTTIImpl.h llvm/include/llvm/CodeGen/ISDOpcodes.h llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp llvm/lib/CodeGen/TargetLoweringBase.cpp llvm/lib/IR/AutoUpgrade.cpp llvm/lib/IR/IRBuilder.cpp llvm/lib/IR/Verifier.cpp llvm/lib/Target/AArch64/AArch64ISelLowering.cpp llvm/lib/Target/RISCV/RISCVISelLowering.cpp --diff_from_common_commit
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diff --git a/llvm/include/llvm/Analysis/TargetTransformInfo.h b/llvm/include/llvm/Analysis/TargetTransformInfo.h
index 4be5ce9c3..ff111903f 100644
--- a/llvm/include/llvm/Analysis/TargetTransformInfo.h
+++ b/llvm/include/llvm/Analysis/TargetTransformInfo.h
@@ -1212,10 +1212,10 @@ public:
SK_PermuteSingleSrc, ///< Shuffle elements of single source vector with any
///< shuffle mask.
// TODO: Split into SK_SpliceDown + SK_SpliceUp
- SK_Splice ///< Concatenates elements from the first input vector
- ///< with elements of the second input vector. Returning
- ///< a vector of the same type as the input vectors.
- ///< Index indicates start offset in first input vector.
+ SK_Splice ///< Concatenates elements from the first input vector
+ ///< with elements of the second input vector. Returning
+ ///< a vector of the same type as the input vectors.
+ ///< Index indicates start offset in first input vector.
};
/// Additional information about an operand's possible values.
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index c88c8f300..54440eb24 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -11956,8 +11956,7 @@ SDValue TargetLowering::expandVectorSplice(SDNode *Node,
// NOTE: TrailingElts must be clamped so as not to read outside of V1:V2.
TypeSize EltByteSize = VT.getVectorElementType().getStoreSize();
- SDValue TrailingBytes =
- DAG.getConstant(Imm * EltByteSize, DL, PtrVT);
+ SDValue TrailingBytes = DAG.getConstant(Imm * EltByteSize, DL, PtrVT);
if (Imm > VT.getVectorMinNumElements())
TrailingBytes = DAG.getNode(ISD::UMIN, DL, PtrVT, TrailingBytes, VTBytes);
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https://github.com/llvm/llvm-project/pull/170796
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