[llvm] [AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (PR #167372)
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 5 01:38:19 PST 2025
================
@@ -3852,6 +3854,129 @@ bool AMDGPUInstructionSelector::selectWaveAddress(MachineInstr &MI) const {
return true;
}
+bool AMDGPUInstructionSelector::selectWaveShuffleIntrin(
+ MachineInstr &MI) const {
+ assert(MI.getNumOperands() == 4);
+ MachineBasicBlock *MBB = MI.getParent();
+ const DebugLoc &DL = MI.getDebugLoc();
+
+ Register DstReg = MI.getOperand(0).getReg();
+ Register ValReg = MI.getOperand(2).getReg();
+ Register IdxReg = MI.getOperand(3).getReg();
+
+ const LLT DstTy = MRI->getType(DstReg);
+ unsigned DstSize = DstTy.getSizeInBits();
+ const RegisterBank *DstRB = RBI.getRegBank(DstReg, *MRI, TRI);
+ const TargetRegisterClass *DstRC =
+ TRI.getRegClassForSizeOnBank(DstSize, *DstRB);
+
+ assert(DstTy == LLT::scalar(32));
----------------
jayfoad wrote:
Same here, I think you can return false.
https://github.com/llvm/llvm-project/pull/167372
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