[llvm] [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (PR #169960)
Tirthankar Mazumder via llvm-commits
llvm-commits at lists.llvm.org
Sat Dec 6 10:12:19 PST 2025
================
@@ -3440,3 +3440,79 @@ define i1 @val_is_aligend_pred_mismatch(i32 %num) {
%_0 = icmp sge i32 %num.masked, %num
ret i1 %_0
}
+
+define i1 @icmp_samesign_with_nsw_add(i32 %arg0) {
+; CHECK-LABEL: @icmp_samesign_with_nsw_add(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[V1:%.*]] = icmp sgt i32 [[ARG0:%.*]], 25
+; CHECK-NEXT: ret i1 [[V1]]
+;
+entry:
+ %v0 = add nsw i32 %arg0, -18
+ %v1 = icmp samesign ugt i32 %v0, 7
+ ret i1 %v1
+}
+
+; Negative test; Fold shouldn't fire since -124 - 12 causes signed overflow
+define i1 @icmp_samesign_with_nsw_add_neg(i8 %arg0) {
+; CHECK-LABEL: @icmp_samesign_with_nsw_add_neg(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = add i8 [[ARG0:%.*]], -121
+; CHECK-NEXT: [[V1:%.*]] = icmp ult i8 [[TMP0]], 123
+; CHECK-NEXT: ret i1 [[V1]]
+;
+entry:
+ %v0 = add nsw i8 %arg0, 12
+ %v1 = icmp samesign ugt i8 %v0, -124
+ ret i1 %v1
+}
+
+define i1 @icmp_with_nuw_add(i32 %arg0) {
+; CHECK-LABEL: @icmp_with_nuw_add(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[V1:%.*]] = icmp ult i32 [[ARG0:%.*]], 11
+; CHECK-NEXT: ret i1 [[V1]]
+;
+entry:
+ %v0 = add nuw i32 %arg0, 7
+ %v1 = icmp ult i32 %v0, 18
+ ret i1 %v1
+}
+
+define i1 @icmp_partial_negative_samesign_ult_to_slt(i8 range(i8 -1, 5) %x) {
----------------
wermos wrote:
They are indeed not required.
The reason this test is like this is to test the missed optimization in #134028 and in particular, ensure that the second item in [this comment](https://github.com/llvm/llvm-project/issues/134028#issuecomment-2771910008) is handled.
https://github.com/llvm/llvm-project/pull/169960
More information about the llvm-commits
mailing list