[llvm] [AArch64] Fix the assertion failure on `RegisterVT == PartVT && "Part… (PR #170632)

[Matt Arsenault via llvm-commits]

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@@ -0,0 +1,46 @@
+; RUN: llc -mtriple=aarch64--linux-gnu < %s | FileCheck %s
+
+define dso_local void @_Z3fooi(i32 noundef %val) #0 {
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arsenm wrote:

Not sure, I assume there's some scalable vector ABI test somewhere.

You shouldn't need the allocas, and I'm guessing a call argument with `<8 x i32>` would also work?

https://github.com/llvm/llvm-project/pull/170632