[llvm] [AMDGPU] Prevent folding of flat_scr_base_hi into a 64-bit SALU (PR #170373)

[Matt Arsenault via llvm-commits]

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@@ -0,0 +1,145 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
+# RUN: llc -mtriple=amdgcn -mcpu=gfx1250 -run-pass si-fold-operands %s -o - | FileCheck -check-prefix=GCN %s
+
+---
+name:            s_ashr_i64
+tracksRegLiveness: true
+body:             |
+  bb.0:
+
+    ; GCN-LABEL: name: s_ashr_i64
+    ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $src_flat_scratch_base_hi
+    ; GCN-NEXT: [[S_ASHR_I64_:%[0-9]+]]:sreg_64 = S_ASHR_I64 undef %2:sreg_64, [[COPY]], implicit-def $scc
+    %0:sreg_32 = COPY $src_flat_scratch_base_hi
+    %2:sreg_64 = S_ASHR_I64 undef %1:sreg_64, %0, implicit-def $scc
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arsenm wrote:

Can you avoid using undef operands in SSA tests, I want to eventually ban that in the verifier 

https://github.com/llvm/llvm-project/pull/170373