[llvm] [SPIRV] Addition of extension SPV_KHR_non_semantic_info and SPV_KHR_relaxed_extended_instruction (PR #169643)
Aadesh Premkumar via llvm-commits
llvm-commits at lists.llvm.org
Sun Dec 7 21:29:47 PST 2025
https://github.com/aadeshps-mcw updated https://github.com/llvm/llvm-project/pull/169643
>From a9a1f98c7f805cd3162a707e9e0720e7a948f242 Mon Sep 17 00:00:00 2001
From: Aadesh PremKumar <aadesh.premkumar at multicorewareinc.com>
Date: Wed, 26 Nov 2025 16:20:12 +0530
Subject: [PATCH] --Added support for the extension SPV_KHR_non_semantic_info
--Added support for the extension SPV_KHR_relaxed_extended_instruction
--Added instructions from the documentation of the extension. --Added
supporting tests for the same.
---
llvm/docs/SPIRVUsage.rst | 3 +-
.../SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp | 3 +-
llvm/lib/Target/SPIRV/SPIRV.h | 2 +-
llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp | 4 +-
.../Target/SPIRV/SPIRVEmitNonSemanticDI.cpp | 2359 +++++++++++++++--
llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h | 24 +
llvm/lib/Target/SPIRV/SPIRVInstrInfo.td | 2 +
llvm/lib/Target/SPIRV/SPIRVMCInstLower.cpp | 4 +-
llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp | 86 +-
.../lib/Target/SPIRV/SPIRVSymbolicOperands.td | 1 +
.../debug-build-identifier-storagepath.ll | 54 +
.../debug-info/debug-compilation-unit.ll | 33 +-
.../SPIRV/debug-info/debug-function.ll | 55 +
.../SPIRV/debug-info/debug-imported-entity.ll | 64 +
.../debug-info/debug-inlinedAt-Declare.ll | 164 ++
.../SPIRV/debug-info/debug-lexical-scope.ll | 62 +
.../CodeGen/SPIRV/debug-info/debug-line.ll | 117 +
.../SPIRV/debug-info/debug-macro-def.ll | 78 +
.../debug-opeation-expression-debugValue.ll | 125 +
.../SPIRV/debug-info/debug-qualifier.ll | 54 +
.../debug-scope-noscope-localvariable.ll | 83 +
.../debug-info/debug-source-continued.ll | 46 +
.../SPIRV/debug-info/debug-type-array.ll | 75 +
.../SPIRV/debug-info/debug-type-basic.ll | 117 +-
.../SPIRV/debug-info/debug-type-composite.ll | 70 +
.../SPIRV/debug-info/debug-type-enum.ll | 70 +
.../SPIRV/debug-info/debug-type-pointer.ll | 132 +-
.../debug-info/debug-type-ptrtomember.ll | 74 +
.../SPIRV/debug-info/debug-type-template.ll | 80 +
.../CodeGen/SPIRV/debug-info/debug-typedef.ll | 85 +
30 files changed, 3789 insertions(+), 337 deletions(-)
create mode 100644 llvm/test/CodeGen/SPIRV/debug-info/debug-build-identifier-storagepath.ll
create mode 100644 llvm/test/CodeGen/SPIRV/debug-info/debug-function.ll
create mode 100644 llvm/test/CodeGen/SPIRV/debug-info/debug-imported-entity.ll
create mode 100644 llvm/test/CodeGen/SPIRV/debug-info/debug-inlinedAt-Declare.ll
create mode 100644 llvm/test/CodeGen/SPIRV/debug-info/debug-lexical-scope.ll
create mode 100644 llvm/test/CodeGen/SPIRV/debug-info/debug-line.ll
create mode 100644 llvm/test/CodeGen/SPIRV/debug-info/debug-macro-def.ll
create mode 100644 llvm/test/CodeGen/SPIRV/debug-info/debug-opeation-expression-debugValue.ll
create mode 100644 llvm/test/CodeGen/SPIRV/debug-info/debug-qualifier.ll
create mode 100644 llvm/test/CodeGen/SPIRV/debug-info/debug-scope-noscope-localvariable.ll
create mode 100644 llvm/test/CodeGen/SPIRV/debug-info/debug-source-continued.ll
create mode 100644 llvm/test/CodeGen/SPIRV/debug-info/debug-type-array.ll
create mode 100644 llvm/test/CodeGen/SPIRV/debug-info/debug-type-composite.ll
create mode 100644 llvm/test/CodeGen/SPIRV/debug-info/debug-type-enum.ll
create mode 100644 llvm/test/CodeGen/SPIRV/debug-info/debug-type-ptrtomember.ll
create mode 100644 llvm/test/CodeGen/SPIRV/debug-info/debug-type-template.ll
create mode 100644 llvm/test/CodeGen/SPIRV/debug-info/debug-typedef.ll
diff --git a/llvm/docs/SPIRVUsage.rst b/llvm/docs/SPIRVUsage.rst
index e2f85ba3c2774..589fce5110c71 100644
--- a/llvm/docs/SPIRVUsage.rst
+++ b/llvm/docs/SPIRVUsage.rst
@@ -249,7 +249,8 @@ Below is a list of supported SPIR-V extensions, sorted alphabetically by their e
- Adds new pipe read and write functions that have blocking semantics instead of the non-blocking semantics of the existing pipe read/write functions.
* - ``SPV_ALTERA_arbitrary_precision_fixed_point``
- Add instructions for fixed point arithmetic. The extension works without SPV_ALTERA_arbitrary_precision_integers, but together they allow greater flexibility in representing arbitrary precision data types.
-
+ * - `` SPV_KHR_relaxed_extended_instruction``
+ - Adds the ability to have forward declaration in some specific non-semantic instructions.
SPIR-V representation in LLVM IR
================================
diff --git a/llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp b/llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
index 62f5e47c5ea3b..bf343a156ff5f 100644
--- a/llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
+++ b/llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
@@ -110,7 +110,8 @@ void SPIRVInstPrinter::printInst(const MCInst *MI, uint64_t Address,
printOpDecorate(MI, OS);
} else if (OpCode == SPIRV::OpExtInstImport) {
recordOpExtInstImport(MI);
- } else if (OpCode == SPIRV::OpExtInst) {
+ } else if (OpCode == SPIRV::OpExtInst ||
+ OpCode == SPIRV::OpExtInstWithForwardRefsKHR) {
printOpExtInst(MI, OS);
} else if (OpCode == SPIRV::UNKNOWN_type) {
printUnknownType(MI, OS);
diff --git a/llvm/lib/Target/SPIRV/SPIRV.h b/llvm/lib/Target/SPIRV/SPIRV.h
index fa85ee781c249..b7cea427a7dd1 100644
--- a/llvm/lib/Target/SPIRV/SPIRV.h
+++ b/llvm/lib/Target/SPIRV/SPIRV.h
@@ -32,7 +32,7 @@ FunctionPass *createSPIRVPreLegalizerPass();
FunctionPass *createSPIRVPostLegalizerPass();
ModulePass *createSPIRVEmitIntrinsicsPass(SPIRVTargetMachine *TM);
ModulePass *createSPIRVPrepareGlobalsPass();
-MachineFunctionPass *createSPIRVEmitNonSemanticDIPass(SPIRVTargetMachine *TM);
+ModulePass *createSPIRVEmitNonSemanticDIPass(SPIRVTargetMachine *TM);
InstructionSelector *
createSPIRVInstructionSelector(const SPIRVTargetMachine &TM,
const SPIRVSubtarget &Subtarget,
diff --git a/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp b/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
index d2a8fddc5d8e4..49132f95c55cb 100644
--- a/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
@@ -169,7 +169,9 @@ static const std::map<std::string, SPIRV::Extension::Extension, std::less<>>
{"SPV_INTEL_int4", SPIRV::Extension::Extension::SPV_INTEL_int4},
{"SPV_ALTERA_arbitrary_precision_fixed_point",
SPIRV::Extension::Extension::
- SPV_ALTERA_arbitrary_precision_fixed_point}};
+ SPV_ALTERA_arbitrary_precision_fixed_point},
+ {"SPV_KHR_relaxed_extended_instruction",
+ SPIRV::Extension::Extension::SPV_KHR_relaxed_extended_instruction}};
bool SPIRVExtensionsParser::parse(cl::Option &O, StringRef ArgName,
StringRef ArgValue,
diff --git a/llvm/lib/Target/SPIRV/SPIRVEmitNonSemanticDI.cpp b/llvm/lib/Target/SPIRV/SPIRVEmitNonSemanticDI.cpp
index 318ef0679ba03..286790fccec72 100644
--- a/llvm/lib/Target/SPIRV/SPIRVEmitNonSemanticDI.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVEmitNonSemanticDI.cpp
@@ -18,6 +18,7 @@
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/Register.h"
+#include "llvm/Config/llvm-config.h"
#include "llvm/IR/DebugInfoMetadata.h"
#include "llvm/IR/DebugProgramInstruction.h"
#include "llvm/IR/Metadata.h"
@@ -29,17 +30,244 @@
using namespace llvm;
namespace {
-struct SPIRVEmitNonSemanticDI : public MachineFunctionPass {
+struct SPIRVCodeGenContext {
+ MachineIRBuilder &MIRBuilder;
+ MachineRegisterInfo &MRI;
+ SPIRVGlobalRegistry *GR;
+ const SPIRVType *VoidTy;
+ const SPIRVType *I32Ty;
+ const SPIRVInstrInfo *TII;
+ const SPIRVRegisterInfo *TRI;
+ const RegisterBankInfo *RBI;
+ MachineFunction &MF;
+ const Register &I32ZeroReg;
+ SPIRVTargetMachine *TM;
+ SmallVector<std::pair<const DIFile *const, const Register>, 24>
+ &SourceRegPairs;
+ SmallVector<std::pair<const DIScope *const, const Register>, 24>
+ &ScopeRegPairs;
+ SmallVector<std::pair<const DISubroutineType *const, const Register>, 24>
+ &SubRoutineTypeRegPairs;
+ SmallVector<std::pair<const DIBasicType *const, const Register>, 24>
+ &BasicTypeRegPairs;
+ SmallVector<std::pair<const DICompositeType *const, const Register>, 24>
+ &CompositeTypeRegPairs;
+ SmallVector<std::pair<const DIFile *const, const Register>, 24>
+ &CompileUnitRegPairs;
+ SmallVector<std::pair<const DIDerivedType *const, const Register>, 24>
+ &PointerRegPairs;
+ SmallVector<std::pair<const DILocation *, Register>, 24> &InlinedAtRegPairs;
+ SmallVector<std::pair<const DIExpression *, Register>, 12> &ExprRegPairs;
+
+ SPIRVCodeGenContext(
+ MachineIRBuilder &Builder, MachineRegisterInfo &RegInfo,
+ SPIRVGlobalRegistry *Registry, const SPIRVType *VTy,
+ const SPIRVType *I32Ty, const SPIRVInstrInfo *TI,
+ const SPIRVRegisterInfo *TR, const RegisterBankInfo *RB,
+ MachineFunction &Function, const Register &ZeroReg,
+ SPIRVTargetMachine *TargetMachine,
+ SmallVector<std::pair<const DIFile *const, const Register>, 24>
+ &SourceRegisterPairs,
+ SmallVector<std::pair<const DIScope *const, const Register>, 24>
+ &ScopeRegisterPairs,
+ SmallVector<std::pair<const DISubroutineType *const, const Register>, 24>
+ &SubRoutineTypeRegisterPairs,
+ SmallVector<std::pair<const DIBasicType *const, const Register>, 24>
+ &BasicTypePairs,
+ SmallVector<std::pair<const DICompositeType *const, const Register>, 24>
+ &CompositeTypePairs,
+ SmallVector<std::pair<const DIFile *const, const Register>, 24>
+ &CompileUnitPairs,
+ SmallVector<std::pair<const DIDerivedType *const, const Register>, 24>
+ &PointerPairs,
+ SmallVector<std::pair<const DILocation *, Register>, 24> &InlinedAtPairs,
+ SmallVector<std::pair<const DIExpression *, Register>, 12> &ExprPairs)
+ : MIRBuilder(Builder), MRI(RegInfo), GR(Registry), VoidTy(VTy),
+ I32Ty(I32Ty), TII(TI), TRI(TR), RBI(RB), MF(Function),
+ I32ZeroReg(ZeroReg), TM(TargetMachine),
+ SourceRegPairs(SourceRegisterPairs), ScopeRegPairs(ScopeRegisterPairs),
+ SubRoutineTypeRegPairs(SubRoutineTypeRegisterPairs),
+ BasicTypeRegPairs(BasicTypePairs),
+ CompositeTypeRegPairs(CompositeTypePairs),
+ CompileUnitRegPairs(CompileUnitPairs), PointerRegPairs(PointerPairs),
+ InlinedAtRegPairs(InlinedAtPairs), ExprRegPairs(ExprPairs) {}
+};
+struct DebugInfoCollector {
+ SmallPtrSet<DIBasicType *, 12> BasicTypes;
+ SmallPtrSet<DIDerivedType *, 12> PointerDerivedTypes;
+ SmallPtrSet<DIDerivedType *, 12> QualifiedDerivedTypes;
+ SmallPtrSet<DIDerivedType *, 12> TypedefTypes;
+ SmallPtrSet<DIDerivedType *, 12> InheritedTypes;
+ SmallPtrSet<DIDerivedType *, 12> PtrToMemberTypes;
+ SmallVector<const DIImportedEntity *, 5> ImportedEntities;
+ SmallVector<const DIFile *, 4> CUFileNodes;
+ SmallVector<const DICompileUnit *, 4> CUNodes;
+ SmallPtrSet<DISubprogram *, 12> SubPrograms;
+ SmallPtrSet<DISubroutineType *, 12> SubRoutineTypes;
+ SmallPtrSet<DIScope *, 12> LexicalScopes;
+ SmallPtrSet<DICompositeType *, 12> ArrayTypes;
+ SmallPtrSet<const DICompositeType *, 8> CompositeTypesWithTemplates;
+ SmallPtrSet<const DICompositeType *, 8> CompositeTypes;
+ SmallPtrSet<const DICompositeType *, 8> EnumTypes;
+ DenseSet<const DIType *> visitedTypes;
+ SmallVector<const DIExpression *, 10> ExprList;
+ SmallSet<const DIExpression *, 10> SeenExprs;
+ SmallPtrSet<DILocalVariable *, 12> LocalVariables;
+ SmallPtrSet<DILocation *, 12> InlinedAtLoc;
+};
+struct SPIRVEmitNonSemanticDI : public ModulePass {
static char ID;
SPIRVTargetMachine *TM;
SPIRVEmitNonSemanticDI(SPIRVTargetMachine *TM = nullptr)
- : MachineFunctionPass(ID), TM(TM) {}
+ : ModulePass(ID), TM(TM) {}
- bool runOnMachineFunction(MachineFunction &MF) override;
+ bool runOnModule(llvm::Module &M) override;
private:
bool IsGlobalDIEmitted = false;
- bool emitGlobalDI(MachineFunction &MF);
+ bool emitGlobalDI(MachineFunction &MF, SPIRVCodeGenContext &Ctx,
+ DebugInfoCollector &Collector);
+ Register EmitOpString(StringRef, SPIRVCodeGenContext &Ctx);
+ uint32_t transDebugFlags(const DINode *DN);
+ uint32_t mapTagToCompositeEncoding(const DICompositeType *CT);
+ uint32_t mapTagToQualifierEncoding(unsigned Tag);
+ uint32_t mapDebugFlags(DINode::DIFlags DFlags);
+ uint32_t mapImportedTagToEncoding(const DIImportedEntity *Imported);
+
+ Register EmitDIInstruction(SPIRV::NonSemanticExtInst::NonSemanticExtInst Inst,
+ ArrayRef<Register> Operands,
+ SPIRVCodeGenContext &Ctx, bool HasForwardRef,
+ Register DefReg = Register(0));
+
+ Register getOrCreateFileRegister(const DIFile *File,
+ SPIRVCodeGenContext &Ctx);
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
+ void emitDebugLineAndScopeInstructions(SPIRVCodeGenContext &Ctx);
+
+ Register findEmittedBasicTypeReg(
+ const DIType *BaseType,
+ const SmallVectorImpl<std::pair<const DIBasicType *const, const Register>>
+ &BasicTypeRegPairs);
+
+ Register findEmittedCompositeTypeReg(
+ const DIType *BaseType,
+ const SmallVectorImpl<std::pair<const DICompositeType *const,
+ const Register>> &CompositeTypeRegPairs);
+
+ Register emitDebugSource(StringRef FilePath, StringRef FileContents,
+ SPIRVCodeGenContext &Ctx);
+
+ void extractTypeMetadata(DIType *Ty, DebugInfoCollector &Collector);
+
+ void handleCompositeType(DICompositeType *CT, DebugInfoCollector &Collector);
+ void handleDerivedType(DIDerivedType *DT, DebugInfoCollector &Collector);
+
+ void emitDebugBuildIdentifier(StringRef BuildIdentifier,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitDebugStoragePath(StringRef BuildStoragePath,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitDebugBasicTypes(const SmallPtrSetImpl<DIBasicType *> &BasicTypes,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitDebugPointerTypes(
+ const SmallPtrSetImpl<DIDerivedType *> &PointerDerivedTypes,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitDebugValueInstruction(MachineInstr &MI, SPIRVCodeGenContext &Ctx);
+
+ void emitSingleCompilationUnit(
+ StringRef FilePath, int64_t SourceLanguage, SPIRVCodeGenContext &Ctx,
+ Register DebugInfoVersionReg, Register DwarfVersionReg,
+ Register &DebugSourceResIdReg, Register &DebugCompUnitResIdReg,
+ const DIFile *FileNode, const DICompileUnit *CUNode);
+
+ void emitLexicalScopes(const SmallPtrSetImpl<DIScope *> &LexicalScopes,
+ SPIRVCodeGenContext &Ctx);
+
+ void
+ emitDebugLocalVariables(SPIRVCodeGenContext &Ctx,
+ SmallPtrSet<DILocalVariable *, 12> LocalVariables);
+
+ void emitDebugLineAndScope(MachineInstr &MI, SPIRVCodeGenContext &Ctx,
+ const DIScope *&CurrentScope,
+ const DILocation *&CurrentInlinedAt);
+
+ Register getOrCreateInlinedAt(const DILocation *Loc,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitDebugArrayTypes(const SmallPtrSetImpl<DICompositeType *> &ArrayTypes,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitDebugVectorTypes(DICompositeType *ArrayTy, Register BaseTypeReg,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitDebugTypeComposite(const DICompositeType *CompTy,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitAllTemplateDebugInstructions(
+ const SmallPtrSetImpl<const DICompositeType *> &TemplatedTypes,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitAllDebugTypeComposites(
+ const SmallPtrSetImpl<const DICompositeType *> &CompositeTypes,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitSubroutineTypes(
+ const SmallPtrSet<DISubroutineType *, 12> &SubRoutineTypes,
+ SPIRVCodeGenContext &Ctx);
+
+ Register findBaseTypeRegisterRecursive(const DIType *Ty,
+ SPIRVCodeGenContext &Ctx,
+ bool &IsForwardRef);
+
+ void emitSubprograms(const SmallPtrSet<DISubprogram *, 12> &SubPrograms,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitDebugTypeMember(const DIDerivedType *Member,
+ SPIRVCodeGenContext &Ctx,
+ const Register &CompositeReg,
+ SmallVectorImpl<Register> &MemberRegs,
+ Register DebugSourceReg);
+
+ void emitDebugMacroDefs(MachineFunction &MF, SPIRVCodeGenContext &Ctx);
+
+ void emitDebugMacroUndef(const DIMacro *MacroUndef, StringRef FileName,
+ SPIRVCodeGenContext &Ctx,
+ const DenseMap<StringRef, Register> &MacroDefRegs);
+
+ void
+ emitDebugExpressions(const SmallVectorImpl<const DIExpression *> &ExprList,
+ SPIRVCodeGenContext &Ctx);
+
+ void
+ emitDebugTypeEnum(const SmallPtrSetImpl<const DICompositeType *> &EnumTypes,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitDebugQualifiedTypes(
+ const SmallPtrSetImpl<DIDerivedType *> &QualifiedDerivedTypes,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitDebugTypedefs(const SmallPtrSetImpl<DIDerivedType *> &TypedefTypes,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitDebugImportedEntities(
+ const SmallVectorImpl<const DIImportedEntity *> &ImportedEntities,
+ SPIRVCodeGenContext &Ctx);
+
+ Register emitDebugGlobalVariable(const DIGlobalVariableExpression *GVE,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitAllDebugGlobalVariables(MachineFunction &MF,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitDebugTypePtrToMember(
+ const SmallPtrSetImpl<DIDerivedType *> &PtrToMemberTypes,
+ SPIRVCodeGenContext &Ctx);
+
+ void emitDebugEntryPoint(Register DebugFunctionReg, Register DebugCompUnitReg,
+ SPIRVCodeGenContext &Ctx);
};
} // anonymous namespace
@@ -48,8 +276,7 @@ INITIALIZE_PASS(SPIRVEmitNonSemanticDI, DEBUG_TYPE,
char SPIRVEmitNonSemanticDI::ID = 0;
-MachineFunctionPass *
-llvm::createSPIRVEmitNonSemanticDIPass(SPIRVTargetMachine *TM) {
+ModulePass *llvm::createSPIRVEmitNonSemanticDIPass(SPIRVTargetMachine *TM) {
return new SPIRVEmitNonSemanticDI(TM);
}
@@ -64,6 +291,12 @@ enum BaseTypeAttributeEncoding {
UnsignedChar = 7
};
+enum CompositeTypeAttributeEncoding { Class = 0, Struct = 1, Union = 2 };
+enum ImportedEnityAttributeEncoding {
+ ImportedModule = 0,
+ ImportedDeclaration = 1
+};
+
enum SourceLanguage {
Unknown = 0,
ESSL = 1,
@@ -77,10 +310,94 @@ enum SourceLanguage {
NZSL = 9,
WGSL = 10,
Slang = 11,
- Zig = 12
+ Zig = 12,
+ CPP = 13
+};
+
+enum QualifierTypeAttributeEncoding {
+ ConstType = 0,
+ VolatileType = 1,
+ RestrictType = 2,
+ AtomicType = 3
+};
+
+enum DebugOperation {
+ Deref = 0,
+ Plus = 1,
+ Minus = 2,
+ PlusUconst = 3,
+ BitPiece = 4,
+ Swap = 5,
+ Xderef = 6,
+ StackValue = 7,
+ Constu = 8,
+ Fragment = 9
+};
+
+enum Flag {
+ FlagIsProtected = 1 << 0,
+ FlagIsPrivate = 1 << 1,
+ FlagIsPublic = FlagIsPrivate | FlagIsProtected,
+ FlagAccess = FlagIsPublic,
+ FlagIsLocal = 1 << 2,
+ FlagIsDefinition = 1 << 3,
+ FlagIsFwdDecl = 1 << 4,
+ FlagIsArtificial = 1 << 5,
+ FlagIsExplicit = 1 << 6,
+ FlagIsPrototyped = 1 << 7,
+ FlagIsObjectPointer = 1 << 8,
+ FlagIsStaticMember = 1 << 9,
+ FlagIsIndirectVariable = 1 << 10,
+ FlagIsLValueReference = 1 << 11,
+ FlagIsRValueReference = 1 << 12,
+ FlagIsOptimized = 1 << 13,
+ FlagIsEnumClass = 1 << 14,
+ FlagTypePassByValue = 1 << 15,
+ FlagTypePassByReference = 1 << 16,
+ FlagUnknownPhysicalLayout = 1 << 17,
+ FlagBitField = 1 << 18
};
-bool SPIRVEmitNonSemanticDI::emitGlobalDI(MachineFunction &MF) {
+struct DebugOpKey {
+ DebugOperation Kind;
+ SmallVector<uint64_t, 2> Operands;
+
+ bool operator==(const DebugOpKey &Other) const {
+ if (Kind != Other.Kind || Operands.size() != Other.Operands.size())
+ return false;
+ for (size_t i = 0; i < Operands.size(); ++i)
+ if (Operands[i] != Other.Operands[i])
+ return false;
+ return true;
+ }
+ bool operator<(const DebugOpKey &Other) const {
+ if (Kind != Other.Kind)
+ return Kind < Other.Kind;
+ if (Operands.size() != Other.Operands.size())
+ return Operands.size() < Other.Operands.size();
+ for (size_t i = 0; i < Operands.size(); ++i) {
+ if (Operands[i] != Other.Operands[i])
+ return Operands[i] < Other.Operands[i];
+ }
+ return false;
+ }
+};
+
+template <typename T, typename Container>
+Register findRegisterFromMap(const T *DIType, const Container &RegPairs,
+ Register DefaultReg = Register()) {
+ if (!DIType)
+ return DefaultReg;
+ for (const auto &[DefinedType, Reg] : RegPairs) {
+ if (DefinedType == DIType)
+ return Reg;
+ }
+ return DefaultReg;
+}
+
+bool SPIRVEmitNonSemanticDI::emitGlobalDI(MachineFunction &MF,
+ SPIRVCodeGenContext &Ctx,
+ DebugInfoCollector &Collector) {
// If this MachineFunction doesn't have any BB repeat procedure
// for the next
if (MF.begin() == MF.end()) {
@@ -88,16 +405,16 @@ bool SPIRVEmitNonSemanticDI::emitGlobalDI(MachineFunction &MF) {
return false;
}
- // Required variables to get from metadata search
- LLVMContext *Context;
+ [[maybe_unused]] LLVMContext *Context;
SmallVector<SmallString<128>> FilePaths;
SmallVector<int64_t> LLVMSourceLanguages;
int64_t DwarfVersion = 0;
int64_t DebugInfoVersion = 0;
- SmallPtrSet<DIBasicType *, 12> BasicTypes;
- SmallPtrSet<DIDerivedType *, 12> PointerDerivedTypes;
- // Searching through the Module metadata to find nescessary
- // information like DwarfVersion or SourceLanguage
+ SmallString<128> BuildIdentifier;
+ SmallString<128> BuildStoragePath;
+ Register DebugCompUnitResIdReg;
+ Register DebugSourceResIdReg;
+
{
const MachineModuleInfo &MMI =
getAnalysis<MachineModuleInfoWrapperPass>().getMMI();
@@ -108,7 +425,25 @@ bool SPIRVEmitNonSemanticDI::emitGlobalDI(MachineFunction &MF) {
return false;
for (const auto *Op : DbgCu->operands()) {
if (const auto *CompileUnit = dyn_cast<DICompileUnit>(Op)) {
+ if (CompileUnit->getDWOId())
+ BuildIdentifier = std::to_string(CompileUnit->getDWOId());
+ if (!CompileUnit->getSplitDebugFilename().empty())
+ BuildStoragePath = CompileUnit->getSplitDebugFilename();
+
+ for (auto *GVE : CompileUnit->getGlobalVariables()) {
+ if (auto *DIGV = dyn_cast<DIGlobalVariable>(GVE->getVariable())) {
+ extractTypeMetadata(DIGV->getType(), Collector);
+ }
+ }
+ for (const auto *IE : CompileUnit->getImportedEntities()) {
+ if (const auto *Imported = dyn_cast<DIImportedEntity>(IE)) {
+ Collector.ImportedEntities.push_back(Imported);
+ }
+ }
+
DIFile *File = CompileUnit->getFile();
+ Collector.CUFileNodes.push_back(File);
+ Collector.CUNodes.push_back(CompileUnit);
FilePaths.emplace_back();
sys::path::append(FilePaths.back(), File->getDirectory(),
File->getFilename());
@@ -135,27 +470,37 @@ bool SPIRVEmitNonSemanticDI::emitGlobalDI(MachineFunction &MF) {
// This traversal is the only supported way to access
// instruction related DI metadata like DIBasicType
for (auto &F : *M) {
+ if (DISubprogram *SP = F.getSubprogram()) {
+ Collector.SubPrograms.insert(SP);
+ if (auto *SubType = dyn_cast<DISubroutineType>(SP->getType()))
+ Collector.SubRoutineTypes.insert(SubType);
+ }
for (auto &BB : F) {
for (auto &I : BB) {
for (DbgVariableRecord &DVR : filterDbgVars(I.getDbgRecordRange())) {
- DILocalVariable *LocalVariable = DVR.getVariable();
- if (auto *BasicType =
- dyn_cast<DIBasicType>(LocalVariable->getType())) {
- BasicTypes.insert(BasicType);
- } else if (auto *DerivedType =
- dyn_cast<DIDerivedType>(LocalVariable->getType())) {
- if (DerivedType->getTag() == dwarf::DW_TAG_pointer_type) {
- PointerDerivedTypes.insert(DerivedType);
- // DIBasicType can be unreachable from DbgRecord and only
- // pointed on from other DI types
- // DerivedType->getBaseType is null when pointer
- // is representing a void type
- if (auto *BT = dyn_cast_or_null<DIBasicType>(
- DerivedType->getBaseType()))
- BasicTypes.insert(BT);
+ if (DILocalVariable *LocalVariable = DVR.getVariable()) {
+ Collector.LocalVariables.insert(LocalVariable);
+ extractTypeMetadata(LocalVariable->getType(), Collector);
+ }
+ if (const DIExpression *Expr = DVR.getExpression()) {
+ if (Collector.SeenExprs.insert(Expr).second) {
+ Collector.ExprList.push_back(Expr);
}
}
}
+ if (const DebugLoc &DL = I.getDebugLoc()) {
+ if (const DILocation *Loc = DL.get()) {
+ DIScope *Scope = Loc->getScope();
+ if (auto *SP = dyn_cast<DISubprogram>(Scope))
+ Collector.SubPrograms.insert(SP);
+ else if (isa<DILexicalBlock>(Scope) ||
+ isa<DILexicalBlockFile>(Scope))
+ Collector.LexicalScopes.insert(Scope);
+ }
+ if (DILocation *InlinedAt = DL.getInlinedAt()) {
+ Collector.InlinedAtLoc.insert(InlinedAt);
+ }
+ }
}
}
}
@@ -163,197 +508,1845 @@ bool SPIRVEmitNonSemanticDI::emitGlobalDI(MachineFunction &MF) {
// NonSemantic.Shader.DebugInfo.100 global DI instruction emitting
{
// Required LLVM variables for emitting logic
+
+ const Register DwarfVersionReg = Ctx.GR->buildConstantInt(
+ DwarfVersion, Ctx.MIRBuilder, Ctx.I32Ty, false);
+
+ const Register DebugInfoVersionReg = Ctx.GR->buildConstantInt(
+ DebugInfoVersion, Ctx.MIRBuilder, Ctx.I32Ty, false);
+
+ for (unsigned Idx = 0; Idx < LLVMSourceLanguages.size(); ++Idx) {
+ emitSingleCompilationUnit(
+ FilePaths[Idx], LLVMSourceLanguages[Idx], Ctx, DebugInfoVersionReg,
+ DwarfVersionReg, DebugSourceResIdReg, DebugCompUnitResIdReg,
+ Collector.CUFileNodes[Idx], Collector.CUNodes[Idx]);
+ }
+ if (const DISubprogram *SP = Ctx.MF.getFunction().getSubprogram()) {
+ if (const DIFile *File = SP->getFile())
+ Ctx.GR->addDebugValue(File, DebugCompUnitResIdReg);
+ if (const DICompileUnit *Unit = SP->getUnit())
+ Ctx.GR->addDebugValue(Unit, DebugCompUnitResIdReg);
+ }
+
+ emitDebugMacroDefs(MF, Ctx);
+ emitDebugBuildIdentifier(BuildIdentifier, Ctx);
+ emitDebugStoragePath(BuildStoragePath, Ctx);
+ emitDebugBasicTypes(Collector.BasicTypes, Ctx);
+
+ emitDebugPointerTypes(Collector.PointerDerivedTypes, Ctx);
+ emitDebugQualifiedTypes(Collector.QualifiedDerivedTypes, Ctx);
+ emitDebugTypedefs(Collector.TypedefTypes, Ctx);
+
+ emitDebugArrayTypes(Collector.ArrayTypes, Ctx);
+ emitAllDebugTypeComposites(Collector.CompositeTypes, Ctx);
+ emitDebugTypeEnum(Collector.EnumTypes, Ctx);
+ emitAllTemplateDebugInstructions(Collector.CompositeTypesWithTemplates,
+ Ctx);
+ emitSubroutineTypes(Collector.SubRoutineTypes, Ctx);
+ emitSubprograms(Collector.SubPrograms, Ctx);
+ emitLexicalScopes(Collector.LexicalScopes, Ctx);
+ emitDebugTypePtrToMember(Collector.PtrToMemberTypes, Ctx);
+ emitAllDebugGlobalVariables(MF, Ctx);
+ emitDebugImportedEntities(Collector.ImportedEntities, Ctx);
+ emitDebugExpressions(Collector.ExprList, Ctx);
+ }
+ return true;
+}
+
+bool SPIRVEmitNonSemanticDI::runOnModule(llvm::Module &M) {
+ bool Changed = false;
+ IsGlobalDIEmitted = false;
+ auto *MMIWrapper = getAnalysisIfAvailable<MachineModuleInfoWrapperPass>();
+ if (!MMIWrapper) {
+ return Changed;
+ }
+ auto &MMI = MMIWrapper->getMMI();
+ if (MMI.getModule() != &M) {
+ return Changed;
+ }
+ if (M.begin() == M.end())
+ return false;
+ IsGlobalDIEmitted = false;
+ for (auto &F : M) {
+ if (F.isDeclaration())
+ continue;
+ MachineFunction *MF = MMI.getMachineFunction(F);
+ if (!MF)
+ continue;
+
+ DebugInfoCollector Collector;
+ MachineRegisterInfo &MRI = MF->getRegInfo();
+ MachineBasicBlock &MBB = *MF->begin();
+ MachineIRBuilder MIRBuilder(MBB, MBB.getFirstTerminator());
+
const SPIRVInstrInfo *TII = TM->getSubtargetImpl()->getInstrInfo();
const SPIRVRegisterInfo *TRI = TM->getSubtargetImpl()->getRegisterInfo();
const RegisterBankInfo *RBI = TM->getSubtargetImpl()->getRegBankInfo();
SPIRVGlobalRegistry *GR = TM->getSubtargetImpl()->getSPIRVGlobalRegistry();
- MachineRegisterInfo &MRI = MF.getRegInfo();
- MachineBasicBlock &MBB = *MF.begin();
-
- // To correct placement of a OpLabel instruction during SPIRVAsmPrinter
- // emission all new instructions needs to be placed after OpFunction
- // and before first terminator
- MachineIRBuilder MIRBuilder(MBB, MBB.getFirstTerminator());
-
- const auto EmitOpString = [&](StringRef SR) {
- const Register StrReg = MRI.createVirtualRegister(&SPIRV::IDRegClass);
- MRI.setType(StrReg, LLT::scalar(32));
- MachineInstrBuilder MIB = MIRBuilder.buildInstr(SPIRV::OpString);
- MIB.addDef(StrReg);
- addStringImm(SR, MIB);
- return StrReg;
- };
const SPIRVType *VoidTy =
- GR->getOrCreateSPIRVType(Type::getVoidTy(*Context), MIRBuilder,
+ GR->getOrCreateSPIRVType(Type::getVoidTy(M.getContext()), MIRBuilder,
+ SPIRV::AccessQualifier::ReadWrite, false);
+ const SPIRVType *I32Ty =
+ GR->getOrCreateSPIRVType(Type::getInt32Ty(M.getContext()), MIRBuilder,
SPIRV::AccessQualifier::ReadWrite, false);
+ const Register I32ZeroReg =
+ GR->buildConstantInt(0, MIRBuilder, I32Ty, false, false);
+
+ SmallVector<std::pair<const DIBasicType *const, const Register>, 24>
+ BasicTypeRegPairs;
+ SmallVector<std::pair<const DICompositeType *const, const Register>, 24>
+ CompositeTypeRegPairs;
+ SmallVector<std::pair<const DIFile *const, const Register>, 24>
+ SourceRegPairs;
+ SmallVector<std::pair<const DIScope *const, const Register>, 24>
+ ScopeRegPairs;
+ SmallVector<std::pair<const DISubroutineType *const, const Register>, 24>
+ SubRoutineTypeRegPairs;
+ SmallVector<std::pair<const DIFile *const, const Register>, 24>
+ CompileUnitRegPairs;
+ SmallVector<std::pair<const DIDerivedType *const, const Register>, 24>
+ PointerRegPairs;
+ SmallVector<std::pair<const DILocation *, Register>, 24> InlinedAtRegPairs;
+ SmallVector<std::pair<const DIExpression *, Register>, 12> ExprRegPairs;
+
+ SPIRVCodeGenContext Ctx(MIRBuilder, MRI, GR, VoidTy, I32Ty, TII, TRI, RBI,
+ *MF, I32ZeroReg, TM, SourceRegPairs, ScopeRegPairs,
+ SubRoutineTypeRegPairs, BasicTypeRegPairs,
+ CompositeTypeRegPairs, CompileUnitRegPairs,
+ PointerRegPairs, InlinedAtRegPairs, ExprRegPairs);
+ emitGlobalDI(*MF, Ctx, Collector);
+ emitDebugLocalVariables(Ctx, Collector.LocalVariables);
+ emitDebugLineAndScopeInstructions(Ctx);
+ }
+ return Changed;
+}
+
+void SPIRVEmitNonSemanticDI::getAnalysisUsage(AnalysisUsage &AU) const {
+ AU.addRequired<MachineModuleInfoWrapperPass>();
+ AU.setPreservesAll();
+}
+
+Register SPIRVEmitNonSemanticDI::EmitOpString(StringRef SR,
+ SPIRVCodeGenContext &Ctx) {
+ const Register StrReg = Ctx.MRI.createVirtualRegister(&SPIRV::IDRegClass);
+ Ctx.MRI.setType(StrReg, LLT::scalar(32));
+ MachineInstrBuilder MIB = Ctx.MIRBuilder.buildInstr(SPIRV::OpString);
+ MIB.addDef(StrReg);
+ addStringImm(SR, MIB);
+ return StrReg;
+}
+
+Register SPIRVEmitNonSemanticDI::EmitDIInstruction(
+ SPIRV::NonSemanticExtInst::NonSemanticExtInst Inst,
+ ArrayRef<Register> Operands, SPIRVCodeGenContext &Ctx, bool HasForwardRef,
+ Register DefReg) {
+
+ Register InstReg = DefReg;
+ if (!InstReg.isValid()) {
+ InstReg = Ctx.MRI.createVirtualRegister(&SPIRV::IDRegClass);
+ Ctx.MRI.setType(InstReg, LLT::scalar(32));
+ }
+
+ unsigned Opcode =
+ HasForwardRef ? SPIRV::OpExtInstWithForwardRefsKHR : SPIRV::OpExtInst;
+ MachineInstrBuilder MIB =
+ Ctx.MIRBuilder.buildInstr(Opcode)
+ .addDef(InstReg)
+ .addUse(Ctx.GR->getSPIRVTypeID(Ctx.VoidTy))
+ .addImm(static_cast<int64_t>(
+ SPIRV::InstructionSet::NonSemantic_Shader_DebugInfo_100))
+ .addImm(Inst);
+ for (auto Reg : Operands) {
+ MIB.addUse(Reg);
+ }
+ MIB.constrainAllUses(*Ctx.TII, *Ctx.TRI, *Ctx.RBI);
+ Ctx.GR->assignSPIRVTypeToVReg(Ctx.VoidTy, InstReg, Ctx.MF);
+
+ if (DefReg.isValid() && Ctx.GR->isForwardPlaceholder(DefReg))
+ Ctx.GR->resolveForwardPlaceholder(DefReg);
+
+ return InstReg;
+}
+
+uint32_t SPIRVEmitNonSemanticDI::transDebugFlags(const DINode *DN) {
+ uint32_t Flags = 0;
+ if (const DIGlobalVariable *GV = dyn_cast<DIGlobalVariable>(DN)) {
+ if (GV->isLocalToUnit())
+ Flags |= Flag::FlagIsLocal;
+ if (GV->isDefinition())
+ Flags |= Flag::FlagIsDefinition;
+ }
+ if (const DISubprogram *DS = dyn_cast<DISubprogram>(DN)) {
+ if (DS->isLocalToUnit())
+ Flags |= Flag::FlagIsLocal;
+ if (DS->isOptimized())
+ Flags |= Flag::FlagIsOptimized;
+ if (DS->isDefinition())
+ Flags |= Flag::FlagIsDefinition;
+ Flags |= mapDebugFlags(DS->getFlags());
+ }
+ if (DN->getTag() == dwarf::DW_TAG_reference_type)
+ Flags |= Flag::FlagIsLValueReference;
+ if (DN->getTag() == dwarf::DW_TAG_rvalue_reference_type)
+ Flags |= Flag::FlagIsRValueReference;
+ if (const DIType *DT = dyn_cast<DIType>(DN))
+ Flags |= mapDebugFlags(DT->getFlags());
+ if (const DILocalVariable *DLocVar = dyn_cast<DILocalVariable>(DN))
+ Flags |= mapDebugFlags(DLocVar->getFlags());
- const auto EmitDIInstruction =
- [&](SPIRV::NonSemanticExtInst::NonSemanticExtInst Inst,
- std::initializer_list<Register> Registers) {
- const Register InstReg =
- MRI.createVirtualRegister(&SPIRV::IDRegClass);
- MRI.setType(InstReg, LLT::scalar(32));
- MachineInstrBuilder MIB =
- MIRBuilder.buildInstr(SPIRV::OpExtInst)
- .addDef(InstReg)
- .addUse(GR->getSPIRVTypeID(VoidTy))
- .addImm(static_cast<int64_t>(
- SPIRV::InstructionSet::NonSemantic_Shader_DebugInfo_100))
- .addImm(Inst);
- for (auto Reg : Registers) {
- MIB.addUse(Reg);
+ return Flags;
+}
+
+uint32_t SPIRVEmitNonSemanticDI::mapDebugFlags(DINode::DIFlags DFlags) {
+ uint32_t Flags = 0;
+ if ((DFlags & DINode::FlagAccessibility) == DINode::FlagPublic)
+ Flags |= Flag::FlagIsPublic;
+ if ((DFlags & DINode::FlagAccessibility) == DINode::FlagProtected)
+ Flags |= Flag::FlagIsProtected;
+ if ((DFlags & DINode::FlagAccessibility) == DINode::FlagPrivate)
+ Flags |= Flag::FlagIsPrivate;
+ if (DFlags & DINode::FlagFwdDecl)
+ Flags |= Flag::FlagIsFwdDecl;
+ if (DFlags & DINode::FlagArtificial)
+ Flags |= Flag::FlagIsArtificial;
+ if (DFlags & DINode::FlagExplicit)
+ Flags |= Flag::FlagIsExplicit;
+ if (DFlags & DINode::FlagPrototyped)
+ Flags |= Flag::FlagIsPrototyped;
+ if (DFlags & DINode::FlagObjectPointer)
+ Flags |= Flag::FlagIsObjectPointer;
+ if (DFlags & DINode::FlagStaticMember)
+ Flags |= Flag::FlagIsStaticMember;
+ if (DFlags & DINode::FlagLValueReference)
+ Flags |= Flag::FlagIsLValueReference;
+ if (DFlags & DINode::FlagRValueReference)
+ Flags |= Flag::FlagIsRValueReference;
+ if (DFlags & DINode::FlagTypePassByValue)
+ Flags |= Flag::FlagTypePassByValue;
+ if (DFlags & DINode::FlagTypePassByReference)
+ Flags |= Flag::FlagTypePassByReference;
+ if (DFlags & DINode::FlagEnumClass)
+ Flags |= Flag::FlagIsEnumClass;
+ return Flags;
+}
+
+Register SPIRVEmitNonSemanticDI::emitDebugSource(StringRef FilePath,
+ StringRef FileContents,
+ SPIRVCodeGenContext &Ctx) {
+ const Register FilePathStrReg = EmitOpString(FilePath, Ctx);
+
+ if (FileContents.empty()) {
+ return EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugSource,
+ {FilePathStrReg}, Ctx, false);
+ }
+ constexpr size_t MaxNumWords = UINT16_MAX - 2;
+ constexpr size_t MaxStrSize = MaxNumWords * 4 - 1;
+ std::string RemainingSource = FileContents.str();
+ std::string FirstChunk = RemainingSource.substr(0, MaxStrSize);
+ const Register FirstTextStrReg = EmitOpString(FirstChunk, Ctx);
+
+ Register DebugSourceResIdReg =
+ EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugSource,
+ {FilePathStrReg, FirstTextStrReg}, Ctx, false);
+
+ RemainingSource.erase(0, FirstChunk.size());
+
+ while (!RemainingSource.empty()) {
+ std::string NextChunk = RemainingSource.substr(0, MaxStrSize);
+ const Register ContinuedStrReg = EmitOpString(NextChunk, Ctx);
+ EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugSourceContinued,
+ {ContinuedStrReg}, Ctx, false);
+ RemainingSource.erase(0, NextChunk.size());
+ }
+
+ return DebugSourceResIdReg;
+}
+
+void SPIRVEmitNonSemanticDI::emitDebugTypeEnum(
+ const SmallPtrSetImpl<const DICompositeType *> &EnumTypes,
+ SPIRVCodeGenContext &Ctx) {
+ for (auto *EnumTy : EnumTypes) {
+ if (!EnumTy || EnumTy->getTag() != dwarf::DW_TAG_enumeration_type)
+ continue;
+ if (Register Existing = Ctx.GR->getDebugValue(EnumTy); Existing.isValid())
+ continue;
+ Register NameStr = EmitOpString(EnumTy->getName(), Ctx);
+ bool UnderlyingTypeIsFwd = false;
+ Register UnderlyingTypeReg = findBaseTypeRegisterRecursive(
+ EnumTy->getBaseType(), Ctx, UnderlyingTypeIsFwd);
+ if (!UnderlyingTypeReg.isValid()) {
+ UnderlyingTypeReg = EmitDIInstruction(
+ SPIRV::NonSemanticExtInst::DebugInfoNone, {}, Ctx, false);
+ UnderlyingTypeIsFwd = false;
+ }
+ Register SourceReg =
+ findRegisterFromMap(EnumTy->getFile(), Ctx.SourceRegPairs);
+ Register Line = Ctx.GR->buildConstantInt(EnumTy->getLine(), Ctx.MIRBuilder,
+ Ctx.I32Ty, false);
+ Register Column =
+ Ctx.GR->buildConstantInt(1, Ctx.MIRBuilder, Ctx.I32Ty, false);
+
+ Register ParentReg = Ctx.GR->getDebugValue(EnumTy->getScope());
+ if (!ParentReg.isValid()) {
+ llvm::errs() << "Warning: Could not find Parent scope register for Enum: "
+ << EnumTy->getName() << "\n";
+ ParentReg = Ctx.GR->getDebugValue(EnumTy->getFile());
+ }
+ Register Size = Ctx.GR->buildConstantInt(EnumTy->getSizeInBits(),
+ Ctx.MIRBuilder, Ctx.I32Ty, false);
+ uint32_t Flags = transDebugFlags(EnumTy);
+ Register FlagsReg =
+ Ctx.GR->buildConstantInt(Flags, Ctx.MIRBuilder, Ctx.I32Ty, false);
+ SmallVector<Register, 16> EnumOperands;
+ for (Metadata *MD : EnumTy->getElements()) {
+ if (auto *E = dyn_cast<DIEnumerator>(MD)) {
+ Register Val = Ctx.GR->buildConstantInt(
+ E->getValue().getZExtValue(), Ctx.MIRBuilder, Ctx.I32Ty, false);
+ Register Name = EmitOpString(E->getName(), Ctx);
+ EnumOperands.push_back(Val);
+ EnumOperands.push_back(Name);
+ }
+ }
+ SmallVector<Register, 12> Ops = {
+ NameStr, UnderlyingTypeReg, SourceReg, Line,
+ Column, ParentReg, Size, FlagsReg};
+ Ops.append(EnumOperands);
+ bool HasForwardRef = UnderlyingTypeIsFwd;
+ Register DefReg;
+ Register Res = EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugTypeEnum,
+ Ops, Ctx, HasForwardRef, DefReg);
+ Ctx.GR->addDebugValue(EnumTy, Res);
+ Ctx.CompositeTypeRegPairs.emplace_back(EnumTy, Res);
+ }
+}
+
+void SPIRVEmitNonSemanticDI::emitSingleCompilationUnit(
+ StringRef FilePath, int64_t Language, SPIRVCodeGenContext &Ctx,
+ Register DebugInfoVersionReg, Register DwarfVersionReg,
+ Register &DebugSourceResIdReg, Register &DebugCompUnitResIdReg,
+ const DIFile *FileMDNode, const DICompileUnit *CUNode) {
+
+ std::string FileMDContents;
+ if (FileMDNode && FileMDNode->getRawFile() &&
+ FileMDNode->getSource().has_value())
+ FileMDContents = FileMDNode->getSource().value().str();
+
+ DebugSourceResIdReg = emitDebugSource(FilePath, FileMDContents, Ctx);
+ Ctx.SourceRegPairs.emplace_back(FileMDNode, DebugSourceResIdReg);
+
+ SourceLanguage SpirvSourceLanguage = SourceLanguage::Unknown;
+ switch (Language) {
+ case dwarf::DW_LANG_OpenCL:
+ SpirvSourceLanguage = SourceLanguage::OpenCL_C;
+ break;
+ case dwarf::DW_LANG_OpenCL_CPP:
+ SpirvSourceLanguage = SourceLanguage::OpenCL_CPP;
+ break;
+ case dwarf::DW_LANG_CPP_for_OpenCL:
+ SpirvSourceLanguage = SourceLanguage::CPP_for_OpenCL;
+ break;
+ case dwarf::DW_LANG_GLSL:
+ SpirvSourceLanguage = SourceLanguage::GLSL;
+ break;
+ case dwarf::DW_LANG_HLSL:
+ SpirvSourceLanguage = SourceLanguage::HLSL;
+ break;
+ case dwarf::DW_LANG_SYCL:
+ SpirvSourceLanguage = SourceLanguage::SYCL;
+ break;
+ case dwarf::DW_LANG_Zig:
+ SpirvSourceLanguage = SourceLanguage::Zig;
+ break;
+ case dwarf::DW_LANG_C_plus_plus_14:
+ SpirvSourceLanguage = SourceLanguage::CPP;
+ break;
+ default:
+ SpirvSourceLanguage = SourceLanguage::Unknown;
+ break;
+ }
+
+ const Register SourceLanguageReg = Ctx.GR->buildConstantInt(
+ SpirvSourceLanguage, Ctx.MIRBuilder, Ctx.I32Ty, false);
+
+ DebugCompUnitResIdReg =
+ EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugCompilationUnit,
+ {DebugInfoVersionReg, DwarfVersionReg,
+ DebugSourceResIdReg, SourceLanguageReg},
+ Ctx, false);
+ if (CUNode)
+ Ctx.GR->addDebugValue(CUNode, DebugCompUnitResIdReg);
+ Ctx.CompileUnitRegPairs.emplace_back(FileMDNode, DebugCompUnitResIdReg);
+}
+
+Register SPIRVEmitNonSemanticDI::findEmittedBasicTypeReg(
+ const DIType *BaseType,
+ const SmallVectorImpl<std::pair<const DIBasicType *const, const Register>>
+ &BasicTypeRegPairs) {
+ const DIType *Ty = BaseType;
+
+ while (Ty && !isa<DIBasicType>(Ty)) {
+ if (auto *Derived = dyn_cast<DIDerivedType>(Ty))
+ if (Derived->getBaseType())
+ Ty = Derived->getBaseType();
+ else
+ return Register();
+ else
+ return Register();
+ }
+
+ if (const auto *BT = dyn_cast<DIBasicType>(Ty)) {
+ StringRef Name = BT->getName();
+ uint64_t Size = BT->getSizeInBits();
+
+ for (const auto &[DefinedBT, Reg] : BasicTypeRegPairs) {
+ if (DefinedBT->getName() == Name && DefinedBT->getSizeInBits() == Size)
+ return Reg;
+ }
+ }
+ return Register();
+}
+
+Register SPIRVEmitNonSemanticDI::findEmittedCompositeTypeReg(
+ const DIType *BaseType,
+ const SmallVectorImpl<std::pair<const DICompositeType *const,
+ const Register>> &CompositeTypeRegPairs) {
+
+ StringRef Name = BaseType->getName();
+ uint64_t Size = BaseType->getSizeInBits();
+ unsigned Tag = BaseType->getTag();
+
+ for (const auto &[DefinedCT, Reg] : CompositeTypeRegPairs) {
+ if (DefinedCT->getName() == Name && DefinedCT->getSizeInBits() == Size &&
+ DefinedCT->getTag() == Tag)
+ return Reg;
+ }
+
+ return Register();
+}
+
+void SPIRVEmitNonSemanticDI::emitDebugBuildIdentifier(
+ StringRef BuildIdentifier, SPIRVCodeGenContext &Ctx) {
+ if (BuildIdentifier.empty())
+ return;
+
+ const Register BuildIdStrReg = EmitOpString(BuildIdentifier, Ctx);
+ uint32_t Flags = 0;
+ if (BuildIdentifier.contains("IdentifierPossibleDuplicates"))
+ Flags |= (1 << 0);
+ const Register FlagsReg =
+ Ctx.GR->buildConstantInt(Flags, Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+
+ EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugBuildIdentifier,
+ {BuildIdStrReg, FlagsReg}, Ctx, false);
+}
+
+void SPIRVEmitNonSemanticDI::emitDebugStoragePath(StringRef BuildStoragePath,
+ SPIRVCodeGenContext &Ctx) {
+ if (!BuildStoragePath.empty()) {
+ const Register PathStrReg = EmitOpString(BuildStoragePath, Ctx);
+ EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugStoragePath, {PathStrReg},
+ Ctx, false);
+ }
+}
+
+void SPIRVEmitNonSemanticDI::emitDebugBasicTypes(
+ const SmallPtrSetImpl<DIBasicType *> &BasicTypes,
+ SPIRVCodeGenContext &Ctx) {
+ // We need to store pairs because further instructions reference
+ // the DIBasicTypes and size will be always small so there isn't
+ // need for any kind of map
+ for (auto *BasicType : BasicTypes) {
+ if (!BasicType)
+ continue;
+ const Register BasicTypeStrReg = EmitOpString(BasicType->getName(), Ctx);
+
+ const Register ConstIntBitwidthReg = Ctx.GR->buildConstantInt(
+ BasicType->getSizeInBits(), Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+
+ uint64_t AttributeEncoding = BaseTypeAttributeEncoding::Unspecified;
+ switch (BasicType->getEncoding()) {
+ case dwarf::DW_ATE_signed:
+ AttributeEncoding = BaseTypeAttributeEncoding::Signed;
+ break;
+ case dwarf::DW_ATE_unsigned:
+ AttributeEncoding = BaseTypeAttributeEncoding::Unsigned;
+ break;
+ case dwarf::DW_ATE_unsigned_char:
+ AttributeEncoding = BaseTypeAttributeEncoding::UnsignedChar;
+ break;
+ case dwarf::DW_ATE_signed_char:
+ AttributeEncoding = BaseTypeAttributeEncoding::SignedChar;
+ break;
+ case dwarf::DW_ATE_float:
+ AttributeEncoding = BaseTypeAttributeEncoding::Float;
+ break;
+ case dwarf::DW_ATE_boolean:
+ AttributeEncoding = BaseTypeAttributeEncoding::Boolean;
+ break;
+ case dwarf::DW_ATE_address:
+ AttributeEncoding = BaseTypeAttributeEncoding::Address;
+ }
+
+ const Register AttributeEncodingReg = Ctx.GR->buildConstantInt(
+ AttributeEncoding, Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+
+ const Register FlagsReg = Ctx.GR->buildConstantInt(
+ transDebugFlags(BasicType), Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+
+ [[maybe_unused]]
+ const Register BasicTypeReg = EmitDIInstruction(
+ SPIRV::NonSemanticExtInst::DebugTypeBasic,
+ {BasicTypeStrReg, ConstIntBitwidthReg, AttributeEncodingReg, FlagsReg},
+ Ctx, false);
+ Ctx.GR->addDebugValue(BasicType, BasicTypeReg);
+ Ctx.BasicTypeRegPairs.emplace_back(BasicType, BasicTypeReg);
+ }
+}
+
+void SPIRVEmitNonSemanticDI::emitDebugPointerTypes(
+ const SmallPtrSetImpl<DIDerivedType *> &PointerDerivedTypes,
+ SPIRVCodeGenContext &Ctx) {
+
+ if (PointerDerivedTypes.empty())
+ return;
+
+ for (const auto *PointerDerivedType : PointerDerivedTypes) {
+ uint64_t DWARFAddrSpace = 0;
+ if (PointerDerivedType->getDWARFAddressSpace().has_value())
+ DWARFAddrSpace = PointerDerivedType->getDWARFAddressSpace().value();
+ else {
+ LLVM_DEBUG(dbgs() << "Warning: pointer DI has no DWARF address space; "
+ << "falling back to 0 (generic)\n");
+ }
+ const Register StorageClassReg = Ctx.GR->buildConstantInt(
+ addressSpaceToStorageClass(DWARFAddrSpace, *Ctx.TM->getSubtargetImpl()),
+ Ctx.MIRBuilder, Ctx.I32Ty, false);
+ const uint32_t Flags = transDebugFlags(PointerDerivedType);
+ const Register FlagsReg = Ctx.GR->buildConstantInt(Flags, Ctx.MIRBuilder,
+ Ctx.I32Ty, false, false);
+
+ const DIType *BaseTy = PointerDerivedType->getBaseType();
+ bool HasForwardRef = false;
+ Register BaseTypeReg;
+
+ if (!BaseTy) {
+ BaseTypeReg = EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugInfoNone,
+ {}, Ctx, false);
+ HasForwardRef = false;
+ } else {
+ BaseTypeReg = findBaseTypeRegisterRecursive(BaseTy, Ctx, HasForwardRef);
+ }
+ if (!BaseTypeReg.isValid()) {
+ llvm::errs() << "Warning: Failed to find base type for pointer: "
+ << PointerDerivedType->getName() << "\n";
+ BaseTypeReg = EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugInfoNone,
+ {}, Ctx, false);
+ HasForwardRef = false;
+ }
+
+ const Register DebugPointerTypeReg = EmitDIInstruction(
+ SPIRV::NonSemanticExtInst::DebugTypePointer,
+ {BaseTypeReg, StorageClassReg, FlagsReg}, Ctx, HasForwardRef);
+
+ Ctx.GR->addDebugValue(PointerDerivedType, DebugPointerTypeReg);
+ Ctx.PointerRegPairs.emplace_back(PointerDerivedType, DebugPointerTypeReg);
+ }
+}
+
+void SPIRVEmitNonSemanticDI::emitLexicalScopes(
+ const SmallPtrSetImpl<DIScope *> &LexicalScopes, SPIRVCodeGenContext &Ctx) {
+ for (DIScope *Scope : LexicalScopes) {
+ if (!Scope)
+ continue;
+
+ SmallVector<Register, 4> Operands;
+ Register ScopeSourceReg =
+ findRegisterFromMap(Scope->getFile(), Ctx.SourceRegPairs);
+ Register ScopeParentReg =
+ findRegisterFromMap(Scope->getScope(), Ctx.ScopeRegPairs);
+
+ Operands.push_back(ScopeSourceReg);
+
+ if (auto *LBF = dyn_cast<DILexicalBlockFile>(Scope)) {
+ Register Discriminator = Ctx.GR->buildConstantInt(
+ LBF->getDiscriminator(), Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+
+ Operands.push_back(Discriminator);
+ Operands.push_back(ScopeParentReg);
+
+ EmitDIInstruction(
+ SPIRV::NonSemanticExtInst::DebugLexicalBlockDiscriminator, Operands,
+ Ctx, false);
+
+ } else if (auto *LB = dyn_cast<DILexicalBlock>(Scope)) {
+ Operands.push_back(Ctx.GR->buildConstantInt(LB->getLine(), Ctx.MIRBuilder,
+ Ctx.I32Ty, false, false));
+ Operands.push_back(Ctx.GR->buildConstantInt(
+ LB->getColumn(), Ctx.MIRBuilder, Ctx.I32Ty, false, false));
+ Operands.push_back(ScopeParentReg);
+
+ Register LexicalScopeReg = EmitDIInstruction(
+ SPIRV::NonSemanticExtInst::DebugLexicalBlock, Operands, Ctx, false);
+
+ Ctx.ScopeRegPairs.emplace_back(Scope, LexicalScopeReg);
+ }
+ }
+}
+
+void SPIRVEmitNonSemanticDI::emitSubroutineTypes(
+ const SmallPtrSet<DISubroutineType *, 12> &SubRoutineTypes,
+ SPIRVCodeGenContext &Ctx) {
+
+ for (const auto *SubroutineType : SubRoutineTypes) {
+ SmallVector<Register, 6> TypeRegs;
+ bool HasForwardRef = false;
+
+ const Register FlagsReg =
+ Ctx.GR->buildConstantInt(transDebugFlags(SubroutineType),
+ Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+
+ DITypeRefArray Types = SubroutineType->getTypeArray();
+ const DIType *RetTy =
+ Types.size() > 0 ? dyn_cast_or_null<DIType>(Types[0]) : nullptr;
+ Register RetTypeReg;
+ bool RetTyIsFwd = false;
+ if (RetTy) {
+ RetTypeReg = findBaseTypeRegisterRecursive(RetTy, Ctx, RetTyIsFwd);
+ }
+ if (!RetTypeReg.isValid()) {
+ const SPIRVType *VoidTy = Ctx.GR->getOrCreateSPIRVType(
+ Type::getVoidTy(Ctx.MF.getFunction().getContext()), Ctx.MIRBuilder,
+ SPIRV::AccessQualifier::ReadWrite, false);
+ RetTypeReg = VoidTy->getOperand(0).getReg();
+ RetTyIsFwd = false;
+ }
+ TypeRegs.push_back(RetTypeReg);
+ if (RetTyIsFwd)
+ HasForwardRef = true;
+ for (unsigned I = 1; I < Types.size(); ++I) {
+ if (const DIType *ParamTy = dyn_cast_or_null<DIType>(Types[I])) {
+ bool ParamTyIsFwd = false;
+ Register ParamTypeReg =
+ findBaseTypeRegisterRecursive(ParamTy, Ctx, ParamTyIsFwd);
+
+ if (!ParamTypeReg.isValid()) {
+ llvm::errs()
+ << "Warning: Could not find type for function parameter.\n";
+ const SPIRVType *VoidTy = Ctx.GR->getOrCreateSPIRVType(
+ Type::getVoidTy(Ctx.MF.getFunction().getContext()),
+ Ctx.MIRBuilder, SPIRV::AccessQualifier::ReadWrite, false);
+ ParamTypeReg = VoidTy->getOperand(0).getReg();
+ ParamTyIsFwd = false;
+ }
+ TypeRegs.push_back(ParamTypeReg);
+ if (ParamTyIsFwd)
+ HasForwardRef = true;
+ } else {
+ const SPIRVType *VoidTy = Ctx.GR->getOrCreateSPIRVType(
+ Type::getVoidTy(Ctx.MF.getFunction().getContext()), Ctx.MIRBuilder,
+ SPIRV::AccessQualifier::ReadWrite, false);
+ Register TypeReg = VoidTy->getOperand(0).getReg();
+ TypeRegs.push_back(TypeReg);
+ }
+ }
+ Register DefReg = Ctx.GR->getDebugValue(SubroutineType);
+ SmallVector<Register, 6> Operands;
+ Operands.push_back(FlagsReg);
+ Operands.append(TypeRegs);
+ const Register FuncTypeReg =
+ EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugTypeFunction,
+ Operands, Ctx, HasForwardRef, DefReg);
+ Ctx.SubRoutineTypeRegPairs.emplace_back(SubroutineType, FuncTypeReg);
+ }
+}
+
+void SPIRVEmitNonSemanticDI::emitSubprograms(
+ const SmallPtrSet<DISubprogram *, 12> &SubPrograms,
+ SPIRVCodeGenContext &Ctx) {
+
+ for (const auto *SubProgram : SubPrograms) {
+ SmallVector<Register, 10> Operands;
+
+ Operands.push_back(EmitOpString(SubProgram->getName(), Ctx));
+ Operands.push_back(
+ findRegisterFromMap(SubProgram->getType(), Ctx.SubRoutineTypeRegPairs));
+ Operands.push_back(
+ findRegisterFromMap(SubProgram->getFile(), Ctx.SourceRegPairs));
+ Operands.push_back(Ctx.GR->buildConstantInt(
+ SubProgram->getLine(), Ctx.MIRBuilder, Ctx.I32Ty, false, false));
+ Operands.push_back(
+ Ctx.GR->buildConstantInt(1, Ctx.MIRBuilder, Ctx.I32Ty, false, false));
+ Register CUReg =
+ findRegisterFromMap(SubProgram->getFile(), Ctx.CompileUnitRegPairs);
+ Operands.push_back(CUReg);
+ Operands.push_back(EmitOpString(SubProgram->getLinkageName(), Ctx));
+ Operands.push_back(Ctx.GR->buildConstantInt(
+ SubProgram->getFlags(), Ctx.MIRBuilder, Ctx.I32Ty, false, false));
+
+ if (!SubProgram->isDefinition()) {
+ EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugFunctionDeclaration,
+ Operands, Ctx, false);
+ } else {
+ Operands.push_back(Ctx.GR->buildConstantInt(
+ SubProgram->getScopeLine(), Ctx.MIRBuilder, Ctx.I32Ty, false, false));
+ const Register FuncReg = EmitDIInstruction(
+ SPIRV::NonSemanticExtInst::DebugFunction, Operands, Ctx, false);
+
+ Ctx.ScopeRegPairs.emplace_back(dynamic_cast<const DIScope *>(SubProgram),
+ FuncReg);
+
+ const Function &MF_Func = Ctx.MF.getFunction();
+
+ if (SubProgram->describes(&MF_Func) &&
+ MF_Func.getCallingConv() == CallingConv::SPIR_KERNEL) {
+ emitDebugEntryPoint(FuncReg, CUReg, Ctx);
+ }
+ }
+ }
+}
+
+uint32_t SPIRVEmitNonSemanticDI::mapTagToQualifierEncoding(unsigned Tag) {
+ switch (Tag) {
+ case dwarf::DW_TAG_const_type:
+ return QualifierTypeAttributeEncoding::ConstType;
+ case dwarf::DW_TAG_volatile_type:
+ return QualifierTypeAttributeEncoding::VolatileType;
+ case dwarf::DW_TAG_restrict_type:
+ return QualifierTypeAttributeEncoding::RestrictType;
+ case dwarf::DW_TAG_atomic_type:
+ return QualifierTypeAttributeEncoding::AtomicType;
+ default:
+ llvm_unreachable("Unknown DWARF tag for DebugTypeQualifier");
+ }
+}
+
+uint32_t SPIRVEmitNonSemanticDI::mapImportedTagToEncoding(
+ const DIImportedEntity *Imported) {
+ switch (Imported->getTag()) {
+ case dwarf::DW_TAG_imported_module:
+ return ImportedEnityAttributeEncoding::ImportedModule;
+ case dwarf::DW_TAG_imported_declaration:
+ return ImportedEnityAttributeEncoding::ImportedDeclaration;
+ default:
+ llvm_unreachable("Unknown DWARF tag for DebugImportedEntity");
+ }
+}
+
+void SPIRVEmitNonSemanticDI::emitDebugQualifiedTypes(
+ const SmallPtrSetImpl<DIDerivedType *> &QualifiedDerivedTypes,
+ SPIRVCodeGenContext &Ctx) {
+ if (!QualifiedDerivedTypes.empty()) {
+ for (const auto *QualifiedDT : QualifiedDerivedTypes) {
+ bool IsForwardRef = false;
+ Register BaseTypeReg = findBaseTypeRegisterRecursive(
+ QualifiedDT->getBaseType(), Ctx, IsForwardRef);
+ if (!BaseTypeReg.isValid()) {
+ llvm::errs()
+ << "Warning: Could not find base type for DebugTypeQualifier.\n";
+ BaseTypeReg = EmitDIInstruction(
+ SPIRV::NonSemanticExtInst::DebugInfoNone, {}, Ctx, false);
+ IsForwardRef = false;
+ }
+ const uint32_t QualifierValue =
+ mapTagToQualifierEncoding(QualifiedDT->getTag());
+ const Register QualifierConstReg = Ctx.GR->buildConstantInt(
+ QualifierValue, Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+
+ Register DefReg;
+
+ const Register DebugQualifiedTypeReg = EmitDIInstruction(
+ SPIRV::NonSemanticExtInst::DebugTypeQualifier,
+ {BaseTypeReg, QualifierConstReg}, Ctx, IsForwardRef, DefReg);
+
+ Ctx.GR->addDebugValue(QualifiedDT, DebugQualifiedTypeReg);
+ }
+ }
+}
+
+void SPIRVEmitNonSemanticDI::emitDebugTypedefs(
+ const SmallPtrSetImpl<DIDerivedType *> &TypedefTypes,
+ SPIRVCodeGenContext &Ctx) {
+ for (const auto *TypedefDT : TypedefTypes) {
+ bool HasForwardRef = false;
+ Register BaseTypeReg = findBaseTypeRegisterRecursive(
+ TypedefDT->getBaseType(), Ctx, HasForwardRef);
+ if (!BaseTypeReg.isValid()) {
+ llvm::errs() << "Warning: Could not find base type for Typedef: "
+ << TypedefDT->getName() << "\n";
+ BaseTypeReg = EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugInfoNone,
+ {}, Ctx, false);
+ HasForwardRef = false;
+ }
+ Register DefReg;
+ Register DebugSourceReg =
+ findRegisterFromMap(TypedefDT->getFile(), Ctx.SourceRegPairs);
+ const Register TypedefNameReg = EmitOpString(TypedefDT->getName(), Ctx);
+ const Register LineReg = Ctx.GR->buildConstantInt(
+ TypedefDT->getLine(), Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+ const Register ColumnReg =
+ Ctx.GR->buildConstantInt(1, Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+ Register ScopeReg = Ctx.GR->getDebugValue(TypedefDT->getFile());
+ const Register DebugTypedefReg =
+ EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugTypedef,
+ {TypedefNameReg, BaseTypeReg, DebugSourceReg, LineReg,
+ ColumnReg, ScopeReg},
+ Ctx, HasForwardRef, DefReg);
+ Ctx.GR->addDebugValue(TypedefDT, DebugTypedefReg);
+ }
+}
+
+void SPIRVEmitNonSemanticDI::emitDebugImportedEntities(
+ const SmallVectorImpl<const DIImportedEntity *> &ImportedEntities,
+ SPIRVCodeGenContext &Ctx) {
+ for (const auto *Imported : ImportedEntities) {
+ if (!Imported->getEntity())
+ continue;
+
+ const Register NameStrReg = EmitOpString(Imported->getName(), Ctx);
+ const Register DebugSourceReg =
+ findRegisterFromMap(Imported->getFile(), Ctx.SourceRegPairs);
+ // TODO: Handle Entity as there are no current instructions for DINamespace,
+ // so replaced by DebugInfoNone
+ const DINode *Entity = Imported->getEntity();
+ bool HasForwardRef = false;
+ Register EntityReg;
+ if (auto *Ty = dyn_cast<DIType>(Entity))
+ EntityReg = findBaseTypeRegisterRecursive(Ty, Ctx, HasForwardRef);
+ else
+ EntityReg = EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugInfoNone,
+ {}, Ctx, false);
+ const Register LineReg = Ctx.GR->buildConstantInt(
+ Imported->getLine(), Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+ const Register ColumnReg =
+ Ctx.GR->buildConstantInt(1, Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+ Register ParentReg = Ctx.GR->getDebugValue(Imported->getScope());
+ if (!ParentReg.isValid()) {
+ llvm::errs() << "Warning: Could not find Parent scope register for Enum: "
+ << Imported->getName() << "\n";
+ ParentReg = Ctx.GR->getDebugValue(Imported->getFile());
+ }
+ uint32_t Tag = mapImportedTagToEncoding(Imported);
+ Register TagReg =
+ Ctx.GR->buildConstantInt(Tag, Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+
+ [[maybe_unused]]
+ const Register DebugImportedEntityReg =
+ EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugImportedEntity,
+ {NameStrReg, TagReg, DebugSourceReg, EntityReg,
+ LineReg, ColumnReg, ParentReg},
+ Ctx, false);
+ }
+}
+
+void SPIRVEmitNonSemanticDI::emitAllDebugGlobalVariables(
+ MachineFunction &MF, SPIRVCodeGenContext &Ctx) {
+
+ const DISubprogram *SP = MF.getFunction().getSubprogram();
+ if (!SP)
+ return;
+
+ const DICompileUnit *CU = SP->getUnit();
+ if (!CU)
+ return;
+
+ auto GlobalVars = CU->getGlobalVariables();
+
+ for (auto *GVE : GlobalVars) {
+ if (GVE)
+ emitDebugGlobalVariable(GVE, Ctx);
+ }
+}
+
+Register SPIRVEmitNonSemanticDI::emitDebugGlobalVariable(
+ const DIGlobalVariableExpression *GVE, SPIRVCodeGenContext &Ctx) {
+
+ const DIGlobalVariable *DIGV = GVE->getVariable();
+ StringRef Name = DIGV->getName();
+ StringRef LinkageName = DIGV->getLinkageName();
+ unsigned Line = DIGV->getLine();
+ unsigned Column = 1;
+ const DIScope *ParentScope = DIGV->getFile();
+ uint32_t Flags = transDebugFlags(DIGV);
+ Register NameStrReg = EmitOpString(Name, Ctx);
+ Register LinkageStrReg = EmitOpString(LinkageName, Ctx);
+ Register LineReg =
+ Ctx.GR->buildConstantInt(Line, Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+ Register ColumnReg =
+ Ctx.GR->buildConstantInt(Column, Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+ Register FlagsReg =
+ Ctx.GR->buildConstantInt(Flags, Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+
+ const DIType *Ty = DIGV->getType();
+ bool HasForwardRef = false;
+ Register TypeReg = findBaseTypeRegisterRecursive(Ty, Ctx, HasForwardRef);
+ if (!TypeReg.isValid()) {
+ llvm::errs() << "Warning: Could not find type for Global Variable: " << Name
+ << "\n";
+ TypeReg = EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugInfoNone, {},
+ Ctx, false);
+ HasForwardRef = false;
+ }
+ Register DebugSourceReg =
+ findRegisterFromMap(DIGV->getFile(), Ctx.SourceRegPairs);
+ Register ParentReg;
+ if (ParentScope) {
+ ParentReg = Ctx.GR->getDebugValue(ParentScope);
+ }
+ // TODO: Handle Variable Location operand
+ Register VariableReg = EmitDIInstruction(
+ SPIRV::NonSemanticExtInst::DebugInfoNone, {}, Ctx, false);
+
+ SmallVector<Register, 9> Ops = {NameStrReg, TypeReg, DebugSourceReg,
+ LineReg, ColumnReg, ParentReg,
+ LinkageStrReg, VariableReg, FlagsReg};
+
+ Register DefReg;
+
+ Register GlobalVarReg =
+ EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugGlobalVariable, Ops,
+ Ctx, HasForwardRef, DefReg);
+
+ Ctx.GR->addDebugValue(DIGV, GlobalVarReg);
+ return GlobalVarReg;
+}
+
+void SPIRVEmitNonSemanticDI::emitDebugArrayTypes(
+ const SmallPtrSetImpl<DICompositeType *> &ArrayTypes,
+ SPIRVCodeGenContext &Ctx) {
+ for (auto *ArrayTy : ArrayTypes) {
+ DIType *ElementType = ArrayTy->getBaseType();
+ bool HasForwardRef = false;
+ Register BaseTypeReg =
+ findBaseTypeRegisterRecursive(ElementType, Ctx, HasForwardRef);
+ if (!BaseTypeReg.isValid()) {
+ llvm::errs()
+ << "Warning: Could not find element type for Array/Vector.\n";
+ BaseTypeReg = EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugInfoNone,
+ {}, Ctx, false);
+ HasForwardRef = false;
+ }
+
+ DINodeArray Subranges = ArrayTy->getElements();
+ if (ArrayTy->isVector()) {
+ assert(Subranges.size() == 1 && "Only 1D vectors supported!");
+ emitDebugVectorTypes(ArrayTy, BaseTypeReg, Ctx);
+ continue;
+ }
+
+ SmallVector<Register, 4> ComponentCountRegs;
+ for (Metadata *M : Subranges) {
+ if (auto *SR = dyn_cast<DISubrange>(M)) {
+ auto CountValUnion = SR->getCount();
+ if (auto *CountCI = CountValUnion.dyn_cast<ConstantInt *>()) {
+ uint64_t CountVal = CountCI->getZExtValue();
+ Register ConstCountReg = Ctx.GR->buildConstantInt(
+ CountVal, Ctx.MIRBuilder, Ctx.I32Ty, false);
+ ComponentCountRegs.push_back(ConstCountReg);
+ } else {
+ Register ConstZero = Ctx.GR->buildConstantInt(
+ 0, Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+ ComponentCountRegs.push_back(ConstZero);
+ }
+ }
+ }
+
+ SmallVector<Register, 6> Ops;
+ Ops.push_back(BaseTypeReg);
+ llvm::append_range(Ops, ComponentCountRegs);
+
+ Register DefReg;
+ Register LocalFound =
+ findEmittedCompositeTypeReg(ArrayTy, Ctx.CompositeTypeRegPairs);
+
+ // If we found it locally, and it's a placeholder, we use it to define it.
+ // If we didn't find it locally, we create a new one (DefReg stays 0).
+ if (LocalFound.isValid() && Ctx.GR->isForwardPlaceholder(LocalFound)) {
+ DefReg = LocalFound;
+ }
+
+ Register DebugArrayTypeReg =
+ EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugTypeArray, Ops, Ctx,
+ HasForwardRef, DefReg); // Pass corrected DefReg
+
+ Ctx.GR->addDebugValue(ArrayTy, DebugArrayTypeReg);
+ Ctx.CompositeTypeRegPairs.emplace_back(ArrayTy, DebugArrayTypeReg);
+ }
+}
+
+void SPIRVEmitNonSemanticDI::emitDebugVectorTypes(DICompositeType *ArrayTy,
+ Register BaseTypeReg,
+ SPIRVCodeGenContext &Ctx) {
+ DINodeArray Subranges = ArrayTy->getElements();
+ Register ComponentCountReg;
+ if (auto *SR = dyn_cast<DISubrange>(Subranges[0])) {
+ auto CountValUnion = SR->getCount();
+ if (auto *CountCI = CountValUnion.dyn_cast<ConstantInt *>()) {
+ uint64_t CountVal = CountCI->getZExtValue();
+ ComponentCountReg = Ctx.GR->buildConstantInt(CountVal, Ctx.MIRBuilder,
+ Ctx.I32Ty, false, false);
+ } else {
+ ComponentCountReg =
+ Ctx.GR->buildConstantInt(0, Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+ }
+ }
+
+ SmallVector<Register, 4> Ops;
+ Ops.push_back(BaseTypeReg);
+ Ops.push_back(ComponentCountReg);
+
+ [[maybe_unused]]
+ Register DebugVectorTypeReg = EmitDIInstruction(
+ SPIRV::NonSemanticExtInst::DebugTypeVector, Ops, Ctx, false);
+}
+
+void SPIRVEmitNonSemanticDI::emitAllTemplateDebugInstructions(
+ const SmallPtrSetImpl<const DICompositeType *> &TemplatedTypes,
+ SPIRVCodeGenContext &Ctx) {
+ for (const DICompositeType *CompTy : TemplatedTypes) {
+ const DINodeArray TemplateParams = CompTy->getTemplateParams();
+ if (TemplateParams.empty())
+ continue;
+ Register DebugSourceReg =
+ findRegisterFromMap(CompTy->getFile(), Ctx.SourceRegPairs);
+ Register LineReg = Ctx.GR->buildConstantInt(
+ CompTy->getLine(), Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+ Register ColumnReg =
+ Ctx.GR->buildConstantInt(1, Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+
+ SmallVector<Register, 4> ParamRegs;
+ bool HasForwardRef = false;
+
+ for (const auto *MD : TemplateParams) {
+ Register TypeReg;
+ bool ParamHasForwardRef = false;
+
+ if (auto *TTP = dyn_cast<DITemplateTypeParameter>(MD)) {
+ TypeReg = findBaseTypeRegisterRecursive(TTP->getType(), Ctx,
+ ParamHasForwardRef);
+ if (!TypeReg.isValid()) {
+ llvm::errs()
+ << "Warning: Could not find type for DITemplateTypeParameter: "
+ << TTP->getName() << "\n";
+ TypeReg = EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugInfoNone,
+ {}, Ctx, false);
+ ParamHasForwardRef = false;
+ }
+
+ if (ParamHasForwardRef)
+ HasForwardRef = true;
+
+ Register NameStr = EmitOpString(TTP->getName(), Ctx);
+ Register NoneReg = EmitDIInstruction(
+ SPIRV::NonSemanticExtInst::DebugInfoNone, {}, Ctx, false);
+
+ ParamRegs.push_back(EmitDIInstruction(
+ SPIRV::NonSemanticExtInst::DebugTypeTemplateParameter,
+ {NameStr, TypeReg, NoneReg, DebugSourceReg, LineReg, ColumnReg},
+ Ctx, ParamHasForwardRef));
+
+ } else if (auto *TVP = dyn_cast<DITemplateValueParameter>(MD)) {
+ Register NameStr = EmitOpString(TVP->getName(), Ctx);
+ TypeReg =
+ findEmittedBasicTypeReg(TVP->getType(), Ctx.BasicTypeRegPairs);
+ if (!TypeReg.isValid()) {
+ bool TVPTypeForwardRef = false;
+ TypeReg = findBaseTypeRegisterRecursive(TVP->getType(), Ctx,
+ TVPTypeForwardRef);
+ if (TVPTypeForwardRef)
+ HasForwardRef = true;
+ }
+ if (!TypeReg.isValid()) {
+ llvm::errs()
+ << "Warning: Could not find type for DITemplateValueParameter: "
+ << TVP->getName() << "\n";
+ TypeReg = EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugInfoNone,
+ {}, Ctx, false);
+ }
+ int64_t ActualValue = 0;
+ if (auto *CAM = dyn_cast_or_null<ConstantAsMetadata>(TVP->getValue())) {
+ if (auto *CI = dyn_cast<ConstantInt>(CAM->getValue())) {
+ ActualValue = CI->getSExtValue();
}
- MIB.constrainAllUses(*TII, *TRI, *RBI);
- GR->assignSPIRVTypeToVReg(VoidTy, InstReg, MF);
- return InstReg;
- };
+ }
+ Register ValueReg = Ctx.GR->buildConstantInt(
+ ActualValue, Ctx.MIRBuilder, Ctx.I32Ty, false);
+ ParamRegs.push_back(EmitDIInstruction(
+ SPIRV::NonSemanticExtInst::DebugTypeTemplateParameter,
+ {NameStr, TypeReg, ValueReg, DebugSourceReg, LineReg, ColumnReg},
+ Ctx, false));
+ }
+ }
- const SPIRVType *I32Ty =
- GR->getOrCreateSPIRVType(Type::getInt32Ty(*Context), MIRBuilder,
- SPIRV::AccessQualifier::ReadWrite, false);
+ Register CompositeReg =
+ findEmittedCompositeTypeReg(CompTy, Ctx.CompositeTypeRegPairs);
+ if (!CompositeReg.isValid()) {
+ CompositeReg = Ctx.MRI.createVirtualRegister(&SPIRV::IDRegClass);
+ Ctx.MRI.setType(CompositeReg, LLT::scalar(32));
+ Ctx.GR->markAsForwardPlaceholder(CompositeReg);
+ Ctx.GR->addDebugValue(CompTy, CompositeReg);
+ Ctx.CompositeTypeRegPairs.emplace_back(CompTy, CompositeReg);
+ } else if (Ctx.GR->isForwardPlaceholder(CompositeReg)) {
+ HasForwardRef = true;
+ }
+ ParamRegs.insert(ParamRegs.begin(), CompositeReg);
+ EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugTypeTemplate, ParamRegs,
+ Ctx, HasForwardRef);
+ }
+}
- const Register DwarfVersionReg =
- GR->buildConstantInt(DwarfVersion, MIRBuilder, I32Ty, false);
+void SPIRVEmitNonSemanticDI::emitAllDebugTypeComposites(
+ const SmallPtrSetImpl<const DICompositeType *> &CompositeTypes,
+ SPIRVCodeGenContext &Ctx) {
- const Register DebugInfoVersionReg =
- GR->buildConstantInt(DebugInfoVersion, MIRBuilder, I32Ty, false);
+ for (auto *CT : CompositeTypes) {
+ emitDebugTypeComposite(CT, Ctx);
+ }
+}
- for (unsigned Idx = 0; Idx < LLVMSourceLanguages.size(); ++Idx) {
- const Register FilePathStrReg = EmitOpString(FilePaths[Idx]);
+void SPIRVEmitNonSemanticDI::emitDebugTypeComposite(
+ const DICompositeType *CompTy, SPIRVCodeGenContext &Ctx) {
- const Register DebugSourceResIdReg = EmitDIInstruction(
- SPIRV::NonSemanticExtInst::DebugSource, {FilePathStrReg});
+ if (!CompTy)
+ return;
- SourceLanguage SpirvSourceLanguage = SourceLanguage::Unknown;
- switch (LLVMSourceLanguages[Idx]) {
- case dwarf::DW_LANG_OpenCL:
- SpirvSourceLanguage = SourceLanguage::OpenCL_C;
- break;
- case dwarf::DW_LANG_OpenCL_CPP:
- SpirvSourceLanguage = SourceLanguage::OpenCL_CPP;
- break;
- case dwarf::DW_LANG_CPP_for_OpenCL:
- SpirvSourceLanguage = SourceLanguage::CPP_for_OpenCL;
- break;
- case dwarf::DW_LANG_GLSL:
- SpirvSourceLanguage = SourceLanguage::GLSL;
- break;
- case dwarf::DW_LANG_HLSL:
- SpirvSourceLanguage = SourceLanguage::HLSL;
- break;
- case dwarf::DW_LANG_SYCL:
- SpirvSourceLanguage = SourceLanguage::SYCL;
- break;
- case dwarf::DW_LANG_Zig:
- SpirvSourceLanguage = SourceLanguage::Zig;
+ Register NameStr = EmitOpString(CompTy->getName(), Ctx);
+ Register LinkageNameStr = EmitOpString(CompTy->getIdentifier(), Ctx);
+ uint32_t Tag = mapTagToCompositeEncoding(CompTy);
+ Register Tags =
+ Ctx.GR->buildConstantInt(Tag, Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+ Register DebugSourceReg =
+ findRegisterFromMap(CompTy->getFile(), Ctx.SourceRegPairs);
+ Register CURegLocal = Ctx.GR->getDebugValue(CompTy->getFile());
+ Register Line = Ctx.GR->buildConstantInt(CompTy->getLine(), Ctx.MIRBuilder,
+ Ctx.I32Ty, false, false);
+ Register Column =
+ Ctx.GR->buildConstantInt(1, Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+ Register SizeReg = Ctx.GR->buildConstantInt(
+ CompTy->getSizeInBits(), Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+ uint32_t Flags = transDebugFlags(CompTy);
+ Register FlagsReg =
+ Ctx.GR->buildConstantInt(Flags, Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+
+ Register DefReg;
+ Register LocalFound =
+ findEmittedCompositeTypeReg(CompTy, Ctx.CompositeTypeRegPairs);
+ if (LocalFound.isValid() && Ctx.GR->isForwardPlaceholder(LocalFound)) {
+ DefReg = LocalFound;
+ }
+ SmallVector<Register, 4> MemberRegs;
+ bool HasForwardRef = false;
+
+ for (Metadata *El : CompTy->getElements()) {
+ if (auto *DTM = dyn_cast<DIDerivedType>(El)) {
+ emitDebugTypeMember(DTM, Ctx, DefReg, MemberRegs, DebugSourceReg);
+
+ if (Ctx.GR->isForwardPlaceholder(MemberRegs.back()))
+ HasForwardRef = true;
+ }
+ }
+
+ SmallVector<Register, 12> Ops = {NameStr, Tags, DebugSourceReg,
+ Line, Column, CURegLocal,
+ LinkageNameStr, SizeReg, FlagsReg};
+ Ops.append(MemberRegs);
+ Register Res =
+ EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugTypeComposite, Ops, Ctx,
+ HasForwardRef, DefReg);
+ Ctx.GR->addDebugValue(CompTy, Res);
+ Ctx.CompositeTypeRegPairs.emplace_back(CompTy, Res);
+}
+
+void SPIRVEmitNonSemanticDI::emitDebugTypeMember(
+ const DIDerivedType *Member, SPIRVCodeGenContext &Ctx,
+ const Register &CompositeReg, SmallVectorImpl<Register> &MemberRegs,
+ Register DebugSourceReg) {
+
+ if (!Member || Member->getTag() != dwarf::DW_TAG_member)
+ return;
+
+ Register NameStr = EmitOpString(Member->getName(), Ctx);
+ const DIType *Ty = Member->getBaseType();
+ Register TypeReg;
+ if (isa<DICompositeType>(Ty)) {
+ TypeReg = findEmittedCompositeTypeReg(Ty, Ctx.CompositeTypeRegPairs);
+ } else {
+ TypeReg = findEmittedBasicTypeReg(Ty, Ctx.BasicTypeRegPairs);
+ }
+
+ Register LineReg = Ctx.GR->buildConstantInt(Member->getLine(), Ctx.MIRBuilder,
+ Ctx.I32Ty, false, false);
+ Register ColumnReg =
+ Ctx.GR->buildConstantInt(1, Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+ Register OffsetReg =
+ Ctx.GR->buildConstantInt(1
+ /*Member->getOffsetInBits()*/,
+ Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+ Register SizeReg = Ctx.GR->buildConstantInt(
+ Member->getSizeInBits(), Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+ uint32_t Flags = transDebugFlags(Member);
+ Register FlagsReg =
+ Ctx.GR->buildConstantInt(Flags, Ctx.MIRBuilder, Ctx.I32Ty, false, false);
+
+ SmallVector<Register, 10> Ops = {NameStr, TypeReg, DebugSourceReg,
+ LineReg, ColumnReg, OffsetReg,
+ SizeReg, FlagsReg};
+
+ Register MemberReg = EmitDIInstruction(
+ SPIRV::NonSemanticExtInst::DebugTypeMember, Ops, Ctx, false);
+
+ MemberRegs.push_back(MemberReg);
+}
+
+uint32_t
+SPIRVEmitNonSemanticDI::mapTagToCompositeEncoding(const DICompositeType *CT) {
+ switch (CT->getTag()) {
+ case dwarf::DW_TAG_structure_type:
+ return CompositeTypeAttributeEncoding::Struct;
+ case dwarf::DW_TAG_class_type:
+ return CompositeTypeAttributeEncoding::Class;
+ case dwarf::DW_TAG_union_type:
+ return CompositeTypeAttributeEncoding::Union;
+ default:
+ llvm_unreachable("Unknown DWARF tag for DebugTypeComposite");
+ }
+}
+
+void SPIRVEmitNonSemanticDI::emitDebugMacroDefs(MachineFunction &MF,
+ SPIRVCodeGenContext &Ctx) {
+
+ DenseMap<StringRef, Register> MacroDefRegs;
+ const DISubprogram *SP = MF.getFunction().getSubprogram();
+ if (!SP)
+ return;
+
+ const DICompileUnit *CU = SP->getUnit();
+ if (!CU)
+ return;
+
+ if (!CU || !CU->getMacros())
+ return;
+ const StringRef FileName =
+ CU->getFile() ? CU->getFile()->getFilename() : "<unknown>";
+
+ std::function<void(const MDNode *)> WalkMacroTree;
+ WalkMacroTree = [&](const MDNode *Node) {
+ if (const auto *Macro = dyn_cast<DIMacro>(Node)) {
+ if (Macro->getMacinfoType() == dwarf::DW_MACINFO_define) {
+ if (Macro->getLine() == 0)
+ return;
+
+ const StringRef Name = Macro->getName();
+ const StringRef Value = Macro->getValue();
+ const unsigned Line = Macro->getLine();
+ const Register SourceStrReg = EmitOpString(FileName, Ctx);
+ const Register LineConstReg =
+ Ctx.GR->buildConstantInt(Line, Ctx.MIRBuilder, Ctx.I32Ty, false);
+ const Register NameStrReg = EmitOpString(Name, Ctx);
+ const Register ValueStrReg = EmitOpString(Value, Ctx);
+
+ [[maybe_unused]] const Register DebugMacroDefReg = EmitDIInstruction(
+ SPIRV::NonSemanticExtInst::DebugMacroDef,
+ {SourceStrReg, LineConstReg, NameStrReg, ValueStrReg}, Ctx, false);
+ MacroDefRegs[Macro->getName()] = DebugMacroDefReg;
+ } else if (Macro->getMacinfoType() == dwarf::DW_MACINFO_undef) {
+ emitDebugMacroUndef(Macro, FileName, Ctx, MacroDefRegs);
}
+ } else if (const auto *MacroFile = dyn_cast<DIMacroFile>(Node)) {
+ for (const auto &Child : MacroFile->getElements())
+ WalkMacroTree(Child);
+ }
+ };
+
+ for (const auto &MacroNode : CU->getMacros()->operands()) {
+ if (const auto *MD = dyn_cast<MDNode>(MacroNode.get()))
+ WalkMacroTree(MD);
+ }
+}
+void SPIRVEmitNonSemanticDI::emitDebugMacroUndef(
+ const DIMacro *MacroUndef, StringRef FileName, SPIRVCodeGenContext &Ctx,
+ const DenseMap<StringRef, Register> &MacroDefRegs) {
+
+ const StringRef Name = MacroUndef->getName();
+ const unsigned Line = MacroUndef->getLine();
+ auto It = MacroDefRegs.find(Name);
+ if (It == MacroDefRegs.end())
+ return;
+
+ Register MacroDefReg = It->second;
+ Register SourceStrReg = EmitOpString(FileName, Ctx);
+ Register LineConstReg =
+ Ctx.GR->buildConstantInt(Line, Ctx.MIRBuilder, Ctx.I32Ty, false);
+
+ [[maybe_unused]] Register MacroUndefReg =
+ EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugMacroUndef,
+ {SourceStrReg, LineConstReg, MacroDefReg}, Ctx, false);
+}
- const Register SourceLanguageReg =
- GR->buildConstantInt(SpirvSourceLanguage, MIRBuilder, I32Ty, false);
+void SPIRVEmitNonSemanticDI::emitDebugTypePtrToMember(
+ const SmallPtrSetImpl<DIDerivedType *> &PtrToMemberTypes,
+ SPIRVCodeGenContext &Ctx) {
+ if (!PtrToMemberTypes.empty()) {
+ for (const auto *PtrToMemberType : PtrToMemberTypes) {
+ assert(PtrToMemberType->getTag() == dwarf::DW_TAG_ptr_to_member_type &&
+ "emitDebugTypePtrToMember expects DW_TAG_ptr_to_member_type");
+ bool OpHasForwardRef = false;
+ const DIType *BaseTy = PtrToMemberType->getBaseType();
+ bool MemberTypeIsFwd = false;
+ Register MemberTypeReg =
+ findBaseTypeRegisterRecursive(BaseTy, Ctx, MemberTypeIsFwd);
+ if (!MemberTypeReg.isValid()) {
+ llvm::errs()
+ << "Warning: Could not find Member Type for PtrToMember.\n";
+ MemberTypeReg = EmitDIInstruction(
+ SPIRV::NonSemanticExtInst::DebugInfoNone, {}, Ctx, false);
+ MemberTypeIsFwd = false;
+ }
+ if (MemberTypeIsFwd)
+ OpHasForwardRef = true;
+ const DIType *ClassTy = PtrToMemberType->getClassType();
+ bool ParentTypeIsFwd = false;
+ Register ParentReg =
+ findBaseTypeRegisterRecursive(ClassTy, Ctx, ParentTypeIsFwd);
+ if (ParentTypeIsFwd)
+ OpHasForwardRef = true;
+ SmallVector<Register, 3> Ops;
+ Ops.push_back(MemberTypeReg);
+ Ops.push_back(ParentReg);
+ Register DefReg;
+ Register PtrToMemberTypeReg =
+ EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugTypePtrToMember,
+ Ops, Ctx, OpHasForwardRef, DefReg);
- [[maybe_unused]]
- const Register DebugCompUnitResIdReg =
- EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugCompilationUnit,
- {DebugInfoVersionReg, DwarfVersionReg,
- DebugSourceResIdReg, SourceLanguageReg});
+ Ctx.GR->addDebugValue(PtrToMemberType, PtrToMemberTypeReg);
}
+ }
+}
- // We aren't extracting any DebugInfoFlags now so we
- // emitting zero to use as <id>Flags argument for DebugBasicType
- const Register I32ZeroReg =
- GR->buildConstantInt(0, MIRBuilder, I32Ty, false, false);
+void SPIRVEmitNonSemanticDI::emitDebugExpressions(
+ const SmallVectorImpl<const DIExpression *> &ExprList,
+ SPIRVCodeGenContext &Ctx) {
- // We need to store pairs because further instructions reference
- // the DIBasicTypes and size will be always small so there isn't
- // need for any kind of map
- SmallVector<std::pair<const DIBasicType *const, const Register>, 12>
- BasicTypeRegPairs;
- for (auto *BasicType : BasicTypes) {
- const Register BasicTypeStrReg = EmitOpString(BasicType->getName());
+ for (const DIExpression *Expr : ExprList) {
+
+ SmallVector<Register, 10> OpRegs;
+ SmallSet<DebugOpKey, 10> SeenOperations;
+
+ for (unsigned i = 0; i < Expr->getNumElements();) {
+ uint64_t Op = Expr->getElement(i++);
+
+ DebugOperation Kind;
+ DebugOpKey CurrentOp;
+ bool ValidOp = false;
+
+ switch (Op) {
+ case dwarf::DW_OP_deref:
+ Kind = DebugOperation::Deref;
+ ValidOp = true;
+ break;
+
+ case dwarf::DW_OP_plus:
+ Kind = DebugOperation::Plus;
+ ValidOp = true;
+ break;
+
+ case dwarf::DW_OP_minus:
+ Kind = DebugOperation::Minus;
+ ValidOp = true;
+ break;
- const Register ConstIntBitwidthReg = GR->buildConstantInt(
- BasicType->getSizeInBits(), MIRBuilder, I32Ty, false);
+ case dwarf::DW_OP_plus_uconst:
+ Kind = DebugOperation::PlusUconst;
+ ValidOp = true;
+ if (i < Expr->getNumElements())
+ CurrentOp.Operands.push_back(Expr->getElement(i++));
+ break;
- uint64_t AttributeEncoding = BaseTypeAttributeEncoding::Unspecified;
- switch (BasicType->getEncoding()) {
- case dwarf::DW_ATE_signed:
- AttributeEncoding = BaseTypeAttributeEncoding::Signed;
+ case dwarf::DW_OP_bit_piece:
+ Kind = DebugOperation::BitPiece;
+ ValidOp = true;
+ if (i + 1 < Expr->getNumElements()) {
+ CurrentOp.Operands.push_back(Expr->getElement(i++));
+ CurrentOp.Operands.push_back(Expr->getElement(i++));
+ }
break;
- case dwarf::DW_ATE_unsigned:
- AttributeEncoding = BaseTypeAttributeEncoding::Unsigned;
+
+ case dwarf::DW_OP_swap:
+ Kind = DebugOperation::Swap;
+ ValidOp = true;
break;
- case dwarf::DW_ATE_unsigned_char:
- AttributeEncoding = BaseTypeAttributeEncoding::UnsignedChar;
+
+ case dwarf::DW_OP_xderef:
+ Kind = DebugOperation::Xderef;
+ ValidOp = true;
break;
- case dwarf::DW_ATE_signed_char:
- AttributeEncoding = BaseTypeAttributeEncoding::SignedChar;
+
+ case dwarf::DW_OP_stack_value:
+ Kind = DebugOperation::StackValue;
+ ValidOp = true;
break;
- case dwarf::DW_ATE_float:
- AttributeEncoding = BaseTypeAttributeEncoding::Float;
+
+ case dwarf::DW_OP_constu:
+ Kind = DebugOperation::Constu;
+ ValidOp = true;
+ if (i < Expr->getNumElements())
+ CurrentOp.Operands.push_back(Expr->getElement(i++));
break;
- case dwarf::DW_ATE_boolean:
- AttributeEncoding = BaseTypeAttributeEncoding::Boolean;
+
+ case dwarf::DW_OP_LLVM_fragment:
+ Kind = DebugOperation::Fragment;
+ ValidOp = true;
+ if (i + 1 < Expr->getNumElements()) {
+ CurrentOp.Operands.push_back(Expr->getElement(i++));
+ CurrentOp.Operands.push_back(Expr->getElement(i++));
+ }
break;
- case dwarf::DW_ATE_address:
- AttributeEncoding = BaseTypeAttributeEncoding::Address;
+
+ default:
+ continue;
}
- const Register AttributeEncodingReg =
- GR->buildConstantInt(AttributeEncoding, MIRBuilder, I32Ty, false);
-
- const Register BasicTypeReg =
- EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugTypeBasic,
- {BasicTypeStrReg, ConstIntBitwidthReg,
- AttributeEncodingReg, I32ZeroReg});
- BasicTypeRegPairs.emplace_back(BasicType, BasicTypeReg);
- }
-
- if (PointerDerivedTypes.size()) {
- for (const auto *PointerDerivedType : PointerDerivedTypes) {
-
- assert(PointerDerivedType->getDWARFAddressSpace().has_value());
- const Register StorageClassReg = GR->buildConstantInt(
- addressSpaceToStorageClass(
- PointerDerivedType->getDWARFAddressSpace().value(),
- *TM->getSubtargetImpl()),
- MIRBuilder, I32Ty, false);
-
- // If the Pointer is representing a void type it's getBaseType
- // is a nullptr
- const auto *MaybeNestedBasicType =
- dyn_cast_or_null<DIBasicType>(PointerDerivedType->getBaseType());
- if (MaybeNestedBasicType) {
- for (const auto &BasicTypeRegPair : BasicTypeRegPairs) {
- const auto &[DefinedBasicType, BasicTypeReg] = BasicTypeRegPair;
- if (DefinedBasicType == MaybeNestedBasicType) {
- [[maybe_unused]]
- const Register DebugPointerTypeReg = EmitDIInstruction(
- SPIRV::NonSemanticExtInst::DebugTypePointer,
- {BasicTypeReg, StorageClassReg, I32ZeroReg});
- }
+ if (ValidOp) {
+ CurrentOp.Kind = Kind;
+ if (SeenOperations.insert(CurrentOp).second) {
+ const Register OpKindReg =
+ Ctx.GR->buildConstantInt(static_cast<uint64_t>(CurrentOp.Kind),
+ Ctx.MIRBuilder, Ctx.I32Ty, false);
+
+ SmallVector<Register, 4> Args = {OpKindReg};
+
+ for (const uint64_t Operand : CurrentOp.Operands) {
+ const Register OperandReg = Ctx.GR->buildConstantInt(
+ Operand, Ctx.MIRBuilder, Ctx.I32Ty, false);
+ Args.push_back(OperandReg);
}
- } else {
- const Register DebugInfoNoneReg =
- EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugInfoNone, {});
- [[maybe_unused]]
- const Register DebugPointerTypeReg = EmitDIInstruction(
- SPIRV::NonSemanticExtInst::DebugTypePointer,
- {DebugInfoNoneReg, StorageClassReg, I32ZeroReg});
+
+ const Register DebugOpReg = EmitDIInstruction(
+ SPIRV::NonSemanticExtInst::DebugOperation, Args, Ctx, false);
+
+ OpRegs.push_back(DebugOpReg);
}
}
}
+ [[maybe_unused]] const Register DebugExpressionReg = EmitDIInstruction(
+ SPIRV::NonSemanticExtInst::DebugExpression, OpRegs, Ctx, false);
+
+ Ctx.ExprRegPairs.emplace_back(Expr, DebugExpressionReg);
+ }
+}
+
+void SPIRVEmitNonSemanticDI::handleDerivedType(DIDerivedType *DT,
+ DebugInfoCollector &Collector) {
+ switch (DT->getTag()) {
+ case dwarf::DW_TAG_pointer_type:
+ Collector.PointerDerivedTypes.insert(DT);
+ break;
+ case dwarf::DW_TAG_const_type:
+ case dwarf::DW_TAG_volatile_type:
+ case dwarf::DW_TAG_restrict_type:
+ case dwarf::DW_TAG_atomic_type:
+ Collector.QualifiedDerivedTypes.insert(DT);
+ break;
+ case dwarf::DW_TAG_typedef:
+ Collector.TypedefTypes.insert(DT);
+ break;
+ case dwarf::DW_TAG_inheritance:
+ Collector.InheritedTypes.insert(DT);
+ break;
+ case dwarf::DW_TAG_ptr_to_member_type:
+ Collector.PtrToMemberTypes.insert(DT);
+ break;
+ case dwarf::DW_TAG_member:
+ break;
+ default:
+ break;
+ }
+ extractTypeMetadata(DT->getBaseType(), Collector);
+}
+
+void SPIRVEmitNonSemanticDI::handleCompositeType(
+ DICompositeType *CT, DebugInfoCollector &Collector) {
+ if (!CT->getTemplateParams().empty()) {
+ Collector.CompositeTypesWithTemplates.insert(CT);
+ for (const auto *MD : CT->getTemplateParams()) {
+ if (const auto *TTP = dyn_cast<DITemplateTypeParameter>(MD)) {
+ extractTypeMetadata(TTP->getType(), Collector);
+ } else if (const auto *TVP = dyn_cast<DITemplateValueParameter>(MD)) {
+ extractTypeMetadata(TVP->getType(), Collector);
+ }
+ }
+ }
+
+ if (CT->getTag() == dwarf::DW_TAG_array_type) {
+ Collector.ArrayTypes.insert(CT);
+ } else if (CT->getTag() == dwarf::DW_TAG_structure_type ||
+ CT->getTag() == dwarf::DW_TAG_class_type ||
+ CT->getTag() == dwarf::DW_TAG_union_type) {
+ Collector.CompositeTypes.insert(CT);
+ } else if (CT->getTag() == dwarf::DW_TAG_enumeration_type) {
+ Collector.EnumTypes.insert(CT);
+ }
+
+ for (Metadata *Element : CT->getElements()) {
+ if (auto *Member = dyn_cast<DIDerivedType>(Element)) {
+ extractTypeMetadata(Member, Collector);
+ } else if (auto *SR = dyn_cast<DISubrange>(Element)) {
+ if (auto *CountVar = SR->getCount().dyn_cast<DIVariable *>()) {
+ extractTypeMetadata(CountVar->getType(), Collector);
+ }
+ }
+ }
+ extractTypeMetadata(CT->getBaseType(), Collector);
+}
+
+void SPIRVEmitNonSemanticDI::extractTypeMetadata(
+ DIType *Ty, DebugInfoCollector &Collector) {
+ if (!Ty)
+ return;
+ if (!Collector.visitedTypes.insert(Ty).second)
+ return;
+ if (auto *CT = dyn_cast<DICompositeType>(Ty)) {
+ handleCompositeType(CT, Collector);
+ } else if (auto *BT = dyn_cast<DIBasicType>(Ty)) {
+ Collector.BasicTypes.insert(BT);
+ } else if (auto *DT = dyn_cast<DIDerivedType>(Ty)) {
+ handleDerivedType(DT, Collector);
+ }
+}
+
+Register SPIRVEmitNonSemanticDI::findBaseTypeRegisterRecursive(
+ const DIType *Ty, SPIRVCodeGenContext &Ctx, bool &IsForwardRef) {
+
+ if (!Ty) {
+ IsForwardRef = false;
+ return Register(0);
+ }
+ if (isa<DIBasicType>(Ty)) {
+ Register Found = findEmittedBasicTypeReg(Ty, Ctx.BasicTypeRegPairs);
+ if (Found.isValid()) {
+ IsForwardRef = false;
+ return Found;
+ }
+ }
+
+ if (const auto *DT = dyn_cast<DIDerivedType>(Ty)) {
+ for (const auto &[DefinedPtr, Reg] : Ctx.PointerRegPairs) {
+ if (DefinedPtr == DT) {
+ IsForwardRef = false;
+ return Reg;
+ }
+ }
+ return findBaseTypeRegisterRecursive(DT->getBaseType(), Ctx, IsForwardRef);
+ }
+ if (isa<DICompositeType>(Ty)) {
+ Register Found = findEmittedCompositeTypeReg(Ty, Ctx.CompositeTypeRegPairs);
+ if (Found.isValid()) {
+ IsForwardRef = Ctx.GR->isForwardPlaceholder(Found);
+ return Found;
+ }
+ Register PlaceholderReg = Ctx.MRI.createVirtualRegister(&SPIRV::IDRegClass);
+ Ctx.MRI.setType(PlaceholderReg, LLT::scalar(32));
+ Ctx.GR->markAsForwardPlaceholder(PlaceholderReg);
+ Ctx.GR->addDebugValue(Ty, PlaceholderReg);
+ IsForwardRef = true;
+ return PlaceholderReg;
+ }
+
+ IsForwardRef = false;
+ return Register(0);
+}
+
+void SPIRVEmitNonSemanticDI::emitDebugLineAndScopeInstructions(
+ SPIRVCodeGenContext &Ctx) {
+ for (auto &MBB : Ctx.MF) {
+ const DIScope *CurrentScope = nullptr;
+ const DILocation *CurrentInlinedAt = nullptr;
+ MachineInstr *LastHeaderInstr = nullptr;
+ for (auto &MI : MBB) {
+ unsigned OpCode = MI.getOpcode();
+ if (OpCode == SPIRV::OpFunction || OpCode == SPIRV::OpFunctionParameter ||
+ OpCode == SPIRV::OpLabel || OpCode == SPIRV::OpVariable) {
+ LastHeaderInstr = &MI;
+ }
+ }
+ bool PastHeader = (LastHeaderInstr == nullptr);
+ for (auto &MI : MBB) {
+ if (!PastHeader) {
+ if (&MI == LastHeaderInstr) {
+ PastHeader = true;
+ }
+ continue;
+ }
+ emitDebugLineAndScope(MI, Ctx, CurrentScope, CurrentInlinedAt);
+ if (MI.getOpcode() == TargetOpcode::DBG_VALUE) {
+ emitDebugValueInstruction(MI, Ctx);
+ continue;
+ }
+ }
}
- return true;
}
-bool SPIRVEmitNonSemanticDI::runOnMachineFunction(MachineFunction &MF) {
- bool Res = false;
- // emitGlobalDI needs to be executed only once to avoid
- // emitting duplicates
- if (!IsGlobalDIEmitted) {
- IsGlobalDIEmitted = true;
- Res = emitGlobalDI(MF);
+Register
+SPIRVEmitNonSemanticDI::getOrCreateFileRegister(const DIFile *File,
+ SPIRVCodeGenContext &Ctx) {
+ if (!File)
+ return Register();
+
+ for (const auto &Pair : Ctx.SourceRegPairs) {
+ if (Pair.first == File)
+ return Pair.second;
+ }
+ MachineBasicBlock &CurrentMBB = Ctx.MIRBuilder.getMBB();
+ MachineBasicBlock::iterator CurrentPos = Ctx.MIRBuilder.getInsertPt();
+ MachineBasicBlock &EntryMBB = *Ctx.MF.begin();
+ if (EntryMBB.empty()) {
+ Ctx.MIRBuilder.setInsertPt(EntryMBB, EntryMBB.end());
+ } else {
+ auto It = EntryMBB.begin();
+ while (It != EntryMBB.end() &&
+ (It->getOpcode() == SPIRV::OpFunction ||
+ It->getOpcode() == SPIRV::OpFunctionParameter)) {
+ ++It;
+ }
+ Ctx.MIRBuilder.setInsertPt(EntryMBB, It);
+ }
+ SmallString<128> FilePath;
+ sys::path::append(FilePath, File->getDirectory(), File->getFilename());
+ std::string FileMDContents;
+ if (File->getSource().has_value())
+ FileMDContents = File->getSource().value().str();
+ Register DebugSourceResIdReg = emitDebugSource(FilePath, FileMDContents, Ctx);
+ Ctx.SourceRegPairs.emplace_back(File, DebugSourceResIdReg);
+
+ if (CurrentPos != CurrentMBB.end()) {
+ Ctx.MIRBuilder.setInsertPt(CurrentMBB, CurrentPos);
+ } else {
+ Ctx.MIRBuilder.setInsertPt(CurrentMBB, CurrentMBB.end());
+ }
+
+ return DebugSourceResIdReg;
+}
+
+void SPIRVEmitNonSemanticDI::emitDebugLocalVariables(
+ SPIRVCodeGenContext &Ctx,
+ SmallPtrSet<DILocalVariable *, 12> LocalVariables) {
+ for (auto Variable : LocalVariables) {
+ SmallVector<Register, 8> Operands;
+ Register NameStr = EmitOpString(Variable->getName(), Ctx);
+ Operands.push_back(NameStr);
+ Register TypeReg = Ctx.GR->getDebugValue(Variable->getType());
+ if (!TypeReg.isValid()) {
+ bool IsFwd = false;
+ TypeReg = findBaseTypeRegisterRecursive(Variable->getType(), Ctx, IsFwd);
+ }
+ Operands.push_back(TypeReg);
+ Operands.push_back(
+ findRegisterFromMap(Variable->getFile(), Ctx.SourceRegPairs));
+ Operands.push_back(Ctx.GR->buildConstantInt(
+ Variable->getLine(), Ctx.MIRBuilder, Ctx.I32Ty, false, false));
+ Operands.push_back(
+ Ctx.GR->buildConstantInt(1, Ctx.MIRBuilder, Ctx.I32Ty, false, false));
+ Register ScopeReg =
+ findRegisterFromMap(Variable->getScope(), Ctx.ScopeRegPairs);
+ // 2. Fallback to Global Registry (for scopes emitted in previous
+ // functions)
+ if (!ScopeReg.isValid()) {
+ ScopeReg = Ctx.GR->getDebugValue(Variable->getScope());
+ }
+ // 3. Fallback for Subprograms if direct scope lookup failed
+ if (!ScopeReg.isValid()) {
+ if (auto *SP = dyn_cast<DISubprogram>(Variable->getScope())) {
+ ScopeReg = Ctx.GR->getDebugValue(SP);
+ }
+ }
+ Operands.push_back(ScopeReg);
+ Operands.push_back(Ctx.GR->buildConstantInt(
+ transDebugFlags(Variable), Ctx.MIRBuilder, Ctx.I32Ty, false, false));
+ if (Variable->getArg()) {
+ Operands.push_back(Ctx.GR->buildConstantInt(
+ Variable->getArg(), Ctx.MIRBuilder, Ctx.I32Ty, false, false));
+ }
+
+ Register VarReg = EmitDIInstruction(
+ SPIRV::NonSemanticExtInst::DebugLocalVariable, Operands, Ctx, false);
+ Ctx.GR->addDebugValue(Variable, VarReg);
+ }
+}
+
+Register
+SPIRVEmitNonSemanticDI::getOrCreateInlinedAt(const DILocation *Loc,
+ SPIRVCodeGenContext &Ctx) {
+ if (!Loc)
+ return Register(0);
+ Register ExistingReg = findRegisterFromMap(Loc, Ctx.InlinedAtRegPairs);
+ if (ExistingReg.isValid())
+ return ExistingReg;
+ Register ParentInlinedAt = Register(0);
+ if (const DILocation *ParentLoc = Loc->getInlinedAt()) {
+ ParentInlinedAt = getOrCreateInlinedAt(ParentLoc, Ctx);
+ }
+ SmallVector<Register, 4> Operands;
+ Operands.push_back(Ctx.GR->buildConstantInt(Loc->getLine(), Ctx.MIRBuilder,
+ Ctx.I32Ty, false, false));
+ Register ScopeReg = findRegisterFromMap(Loc->getScope(), Ctx.ScopeRegPairs);
+ if (!ScopeReg.isValid()) {
+ ScopeReg = Ctx.GR->getDebugValue(Loc->getScope());
+ }
+ if (!ScopeReg.isValid()) {
+ return Register(0);
+ }
+ Operands.push_back(ScopeReg);
+ if (ParentInlinedAt.isValid()) {
+ Operands.push_back(ParentInlinedAt);
+ }
+ Register LineReg = EmitDIInstruction(
+ SPIRV::NonSemanticExtInst::DebugInlinedAt, Operands, Ctx, false);
+
+ Ctx.InlinedAtRegPairs.emplace_back(Loc, LineReg);
+ return LineReg;
+}
+
+void SPIRVEmitNonSemanticDI::emitDebugLineAndScope(
+ MachineInstr &MI, SPIRVCodeGenContext &Ctx, const DIScope *&CurrentScope,
+ const DILocation *&CurrentInlinedAt) {
+ if (MI.getOpcode() == SPIRV::OpExtInst &&
+ MI.getOperand(2).getImm() ==
+ SPIRV::InstructionSet::NonSemantic_Shader_DebugInfo_100)
+ return;
+
+ Ctx.MIRBuilder.setInsertPt(*MI.getParent(), MI.getIterator());
+ DebugLoc DL = MI.getDebugLoc();
+ if (!DL) {
+ EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugNoLine, {}, Ctx, false);
+ } else {
+ const DILocation *DIL = DL.get();
+ Register Source = getOrCreateFileRegister(DIL->getFile(), Ctx);
+ Register LineReg = Ctx.GR->buildConstantInt(DIL->getLine(), Ctx.MIRBuilder,
+ Ctx.I32Ty, false);
+ Register ColReg = Ctx.GR->buildConstantInt(DIL->getColumn(), Ctx.MIRBuilder,
+ Ctx.I32Ty, false);
+
+ SmallVector<Register, 5> Ops = {Source, LineReg, LineReg, ColReg, ColReg};
+ EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugLine, Ops, Ctx, false);
+ }
+
+ if (!DL) {
+ if (CurrentScope != nullptr || CurrentInlinedAt != nullptr) {
+ EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugNoScope, {}, Ctx,
+ false);
+ CurrentScope = nullptr;
+ CurrentInlinedAt = nullptr;
+ }
+ } else {
+ DIScope *NewScope = DL->getScope();
+ DILocation *NewInlinedAt = DL->getInlinedAt();
+ if (NewScope != CurrentScope || NewInlinedAt != CurrentInlinedAt) {
+ CurrentScope = NewScope;
+ CurrentInlinedAt = NewInlinedAt;
+ SmallVector<Register, 2> ScopeOps;
+ Register DIScopeReg =
+ findRegisterFromMap(CurrentScope, Ctx.ScopeRegPairs);
+ if (!DIScopeReg.isValid()) {
+ DIScopeReg = Ctx.GR->getDebugValue(CurrentScope);
+ if (!DIScopeReg.isValid()) {
+ if (auto *SP = dyn_cast<DISubprogram>(CurrentScope)) {
+
+ DIScopeReg = Ctx.GR->getDebugValue(SP);
+ }
+ }
+ }
+ if (DIScopeReg.isValid()) {
+ ScopeOps.push_back(DIScopeReg);
+ if (CurrentInlinedAt) {
+ Register InlineReg = getOrCreateInlinedAt(CurrentInlinedAt, Ctx);
+
+ if (InlineReg.isValid())
+ ScopeOps.push_back(InlineReg);
+ }
+
+ EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugScope, ScopeOps, Ctx,
+ false);
+ } else {
+ EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugNoScope, {}, Ctx,
+ false);
+ }
+ }
+ }
+}
+
+void SPIRVEmitNonSemanticDI::emitDebugValueInstruction(
+ MachineInstr &MI, SPIRVCodeGenContext &Ctx) {
+ if (MI.getOpcode() != TargetOpcode::DBG_VALUE)
+ return;
+
+ const DILocalVariable *Var = MI.getDebugVariable();
+ const DIExpression *Expr = MI.getDebugExpression();
+ if (!Var || !Expr)
+ return;
+
+ Register LocalVarReg = Ctx.GR->getDebugValue(Var);
+ if (!LocalVarReg.isValid()) {
+ return;
+ }
+
+ Register ExprReg = EmitDIInstruction(
+ SPIRV::NonSemanticExtInst::DebugExpression, {}, Ctx, false);
+
+ const MachineOperand &LocOp = MI.getOperand(0);
+
+ if (LocOp.isImm() || LocOp.isFPImm() || LocOp.isCImm()) {
+ Register ConstReg;
+ if (LocOp.isImm()) {
+ ConstReg = Ctx.GR->buildConstantInt(LocOp.getImm(), Ctx.MIRBuilder,
+ Ctx.I32Ty, false);
+ } else {
+ ConstReg = Ctx.GR->buildConstantInt(0, Ctx.MIRBuilder, Ctx.I32Ty, false);
+ }
+ EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugValue,
+ {LocalVarReg, ConstReg, ExprReg}, Ctx, false);
+ return;
+ }
+ if (LocOp.isReg()) {
+ Register Reg = LocOp.getReg();
+ if (!Reg.isValid())
+ return;
+
+ MachineInstr *DefMI = Ctx.MRI.getVRegDef(Reg);
+ bool IsVariable = (DefMI && DefMI->getOpcode() == SPIRV::OpVariable);
+
+ if (IsVariable) {
+ EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugDeclare,
+ {LocalVarReg, Reg, ExprReg}, Ctx, false);
+ } else {
+ EmitDIInstruction(SPIRV::NonSemanticExtInst::DebugValue,
+ {LocalVarReg, Reg, ExprReg}, Ctx, false);
+ }
+ }
+}
+
+void SPIRVEmitNonSemanticDI::emitDebugEntryPoint(Register DebugFunctionReg,
+ Register DebugCompUnitReg,
+ SPIRVCodeGenContext &Ctx) {
+
+ std::string CompilerVersion = "LLVM " LLVM_VERSION_STRING;
+ Register CompilerSigReg = EmitOpString(CompilerVersion, Ctx);
+ std::string CommandLineArgs = "";
+ if (const NamedMDNode *CmdLine =
+ Ctx.MF.getFunction().getParent()->getNamedMetadata(
+ "llvm.commandline")) {
+ for (const auto *Op : CmdLine->operands()) {
+ if (Op->getNumOperands() > 0) {
+ if (const auto *S = dyn_cast<MDString>(Op->getOperand(0))) {
+ if (!CommandLineArgs.empty())
+ CommandLineArgs += " ";
+ CommandLineArgs += S->getString();
+ }
+ }
+ }
}
- return Res;
+ Register CommandLineArgsReg = EmitOpString(CommandLineArgs, Ctx);
+ EmitDIInstruction(
+ SPIRV::NonSemanticExtInst::DebugEntryPoint,
+ {DebugFunctionReg, DebugCompUnitReg, CompilerSigReg, CommandLineArgsReg},
+ Ctx, false);
}
diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
index 8865c618a2594..f4766789bbc83 100644
--- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
+++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
@@ -82,6 +82,9 @@ class SPIRVGlobalRegistry : public SPIRVIRMapping {
// Intrinsic::spv_assign_ptr_type instructions.
DenseMap<Value *, CallInst *> AssignPtrTypeInstr;
+ DenseMap<const Metadata *, Register> MDMap;
+ llvm::DenseSet<llvm::Register> PlaceholderRegs;
+
// Maps OpVariable and OpFunction-related v-regs to its LLVM IR definition.
DenseMap<std::pair<const MachineFunction *, Register>, const Value *> Reg2GO;
@@ -133,6 +136,27 @@ class SPIRVGlobalRegistry : public SPIRVIRMapping {
return It == FunResPointerTypes.end() ? nullptr : It->second;
}
+ Register getDebugValue(const Metadata *MD) const {
+ auto It = MDMap.find(MD);
+ if (It != MDMap.end())
+ return It->second;
+ return Register();
+ }
+
+ void addDebugValue(const Metadata *MD, Register Reg) { MDMap[MD] = Reg; }
+
+ void markAsForwardPlaceholder(llvm::Register Reg) {
+ PlaceholderRegs.insert(Reg);
+ }
+
+ bool isForwardPlaceholder(llvm::Register Reg) const {
+ return PlaceholderRegs.count(Reg);
+ }
+
+ void resolveForwardPlaceholder(llvm::Register Reg) {
+ PlaceholderRegs.erase(Reg);
+ }
+
// A registry of "assign type" records:
// - Add a record.
void addAssignPtrTypeInstr(Value *Val, CallInst *AssignPtrTyCI) {
diff --git a/llvm/lib/Target/SPIRV/SPIRVInstrInfo.td b/llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
index 815d2d7ed854b..bb4bcdc6f42de 100644
--- a/llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
+++ b/llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
@@ -148,6 +148,8 @@ def OpExtInstImport: Op<11, (outs ID:$res), (ins StringImm:$extInstsName, variab
// perspective of the instruction selection pass
def OpExtInst: Op<12, (outs ID:$res), (ins TYPE:$ty, i32imm:$set, Extension:$inst, variable_ops),
"$res = OpExtInst $ty $set $inst">;
+def OpExtInstWithForwardRefsKHR: Op<4433, (outs ID:$res), (ins TYPE:$ty, i32imm:$set, Extension:$inst, variable_ops),
+ "$res = OpExtInstWithForwardRefsKHR $ty $set $inst">;
// 3.42.5 Mode-Setting Instructions
def OpMemoryModel: Op<14, (outs), (ins AddressingModel:$addr, MemoryModel:$mem),
diff --git a/llvm/lib/Target/SPIRV/SPIRVMCInstLower.cpp b/llvm/lib/Target/SPIRV/SPIRVMCInstLower.cpp
index 9aa07b52b4081..25c94db58ad2f 100644
--- a/llvm/lib/Target/SPIRV/SPIRVMCInstLower.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVMCInstLower.cpp
@@ -56,7 +56,9 @@ void SPIRVMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI,
break;
}
case MachineOperand::MO_Immediate:
- if (MI->getOpcode() == SPIRV::OpExtInst && i == 2) {
+ if ((MI->getOpcode() == SPIRV::OpExtInst ||
+ MI->getOpcode() == SPIRV::OpExtInstWithForwardRefsKHR) &&
+ i == 2) {
MCRegister Reg = MAI->getExtInstSetReg(MO.getImm());
MCOp = MCOperand::createReg(Reg);
} else {
diff --git a/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp b/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
index 73432279c3306..f469104a9c7f9 100644
--- a/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
@@ -638,6 +638,7 @@ static void collectOtherInstr(MachineInstr &MI, SPIRV::ModuleAnalysisInfo &MAI,
// be correctly collected until these registers are globally numbered.
void SPIRVModuleAnalysis::processOtherInstrs(const Module &M) {
InstrTraces IS;
+ DenseMap<InstrSignature, MCRegister> GlobalDIMap;
for (const Function &F : M) {
if (F.isDeclaration())
continue;
@@ -649,23 +650,80 @@ void SPIRVModuleAnalysis::processOtherInstrs(const Module &M) {
if (MAI.getSkipEmission(&MI))
continue;
const unsigned OpCode = MI.getOpcode();
+ bool IsGlobalInstruction = false;
+ SPIRV::ModuleSectionType TargetSection;
if (OpCode == SPIRV::OpString) {
- collectOtherInstr(MI, MAI, SPIRV::MB_DebugStrings, IS);
- } else if (OpCode == SPIRV::OpExtInst && MI.getOperand(2).isImm() &&
+ IsGlobalInstruction = true;
+ TargetSection = SPIRV::MB_DebugStrings;
+ } else if ((OpCode == SPIRV::OpExtInst ||
+ OpCode == SPIRV::OpExtInstWithForwardRefsKHR) &&
+ MI.getOperand(2).isImm() &&
MI.getOperand(2).getImm() ==
SPIRV::InstructionSet::
NonSemantic_Shader_DebugInfo_100) {
MachineOperand Ins = MI.getOperand(3);
namespace NS = SPIRV::NonSemanticExtInst;
static constexpr int64_t GlobalNonSemanticDITy[] = {
- NS::DebugSource, NS::DebugCompilationUnit, NS::DebugInfoNone,
- NS::DebugTypeBasic, NS::DebugTypePointer};
- bool IsGlobalDI = false;
+ NS::DebugSource,
+ NS::DebugCompilationUnit,
+ NS::DebugInfoNone,
+ NS::DebugTypeBasic,
+ NS::DebugTypePointer,
+ NS::DebugBuildIdentifier,
+ NS::DebugStoragePath,
+ NS::DebugSourceContinued,
+ NS::DebugFunction,
+ NS::DebugTypeFunction,
+ NS::DebugFunctionDeclaration,
+ NS::DebugLexicalBlock,
+ NS::DebugLexicalBlockDiscriminator,
+ NS::DebugTypeQualifier,
+ NS::DebugImportedEntity,
+ NS::DebugTypedef,
+ NS::DebugGlobalVariable,
+ NS::DebugTypeArray,
+ NS::DebugTypeComposite,
+ NS::DebugTypeTemplate,
+ NS::DebugTypeTemplateParameter,
+ NS::DebugTypeMember,
+ NS::DebugMacroDef,
+ NS::DebugMacroUndef,
+ NS::DebugTypePtrToMember,
+ NS::DebugTypeEnum,
+ NS::DebugExpression,
+ NS::DebugOperation,
+ NS::DebugLocalVariable,
+ NS::DebugInlinedAt,
+ NS::DebugEntryPoint};
for (unsigned Idx = 0; Idx < std::size(GlobalNonSemanticDITy); ++Idx)
- IsGlobalDI |= Ins.getImm() == GlobalNonSemanticDITy[Idx];
- if (IsGlobalDI)
- collectOtherInstr(MI, MAI, SPIRV::MB_NonSemanticGlobalDI, IS);
- } else if (OpCode == SPIRV::OpName || OpCode == SPIRV::OpMemberName) {
+ if (Ins.getImm() == GlobalNonSemanticDITy[Idx]) {
+ IsGlobalInstruction = true;
+ TargetSection = SPIRV::MB_NonSemanticGlobalDI;
+ break;
+ }
+ }
+ if (IsGlobalInstruction) {
+ InstrSignature Sig = instrToSignature(MI, MAI, false);
+ auto It = GlobalDIMap.find(Sig);
+ if (It != GlobalDIMap.end()) {
+ if (MI.getNumOperands() > 0 && MI.getOperand(0).isReg() &&
+ MI.getOperand(0).isDef()) {
+ MAI.setRegisterAlias(MF, MI.getOperand(0).getReg(), It->second);
+ }
+ MAI.setSkipEmission(&MI);
+ continue;
+ } else {
+ if (MI.getNumOperands() > 0 && MI.getOperand(0).isReg() &&
+ MI.getOperand(0).isDef()) {
+ MCRegister GReg =
+ MAI.getRegisterAlias(MF, MI.getOperand(0).getReg());
+ GlobalDIMap[Sig] = GReg;
+ }
+ collectOtherInstr(MI, MAI, TargetSection, IS);
+ continue;
+ }
+ }
+ if (OpCode == SPIRV::OpName || OpCode == SPIRV::OpMemberName) {
collectOtherInstr(MI, MAI, SPIRV::MB_DebugNames, IS);
} else if (OpCode == SPIRV::OpEntryPoint) {
collectOtherInstr(MI, MAI, SPIRV::MB_EntryPoints, IS);
@@ -2126,6 +2184,16 @@ void addInstrRequirements(const MachineInstr &MI,
SPIRV::Capability::SubgroupMatrixMultiplyAccumulateINTEL);
break;
}
+ case SPIRV::OpExtInstWithForwardRefsKHR: {
+ if (!ST.canUseExtension(
+ SPIRV::Extension::SPV_KHR_relaxed_extended_instruction))
+ report_fatal_error("OpExtInstWithForwardRefsKHR instruction requires the "
+ "following SPIR-V "
+ "extension: SPV_KHR_relaxed_extended_instruction",
+ false);
+ Reqs.addExtension(SPIRV::Extension::SPV_KHR_relaxed_extended_instruction);
+ break;
+ }
case SPIRV::OpBitwiseFunctionINTEL: {
if (!ST.canUseExtension(
SPIRV::Extension::SPV_INTEL_ternary_bitwise_function))
diff --git a/llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td b/llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
index 078f1dff839ea..b94a8a23c55e0 100644
--- a/llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
+++ b/llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
@@ -393,6 +393,7 @@ defm SPV_INTEL_16bit_atomics : ExtensionOperand<130, [EnvVulkan, EnvOpenCL]>;
defm SPV_ALTERA_arbitrary_precision_fixed_point : ExtensionOperand<131, [EnvOpenCL, EnvVulkan]>;
defm SPV_NV_shader_atomic_fp16_vector
: ExtensionOperand<132, [EnvVulkan, EnvOpenCL]>;
+defm SPV_KHR_relaxed_extended_instruction : ExtensionOperand<133, [EnvVulkan, EnvOpenCL]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define Capabilities enum values and at the same time
diff --git a/llvm/test/CodeGen/SPIRV/debug-info/debug-build-identifier-storagepath.ll b/llvm/test/CodeGen/SPIRV/debug-info/debug-build-identifier-storagepath.ll
new file mode 100644
index 0000000000000..da33c99702e9a
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/debug-info/debug-build-identifier-storagepath.ll
@@ -0,0 +1,54 @@
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-unknown-unknown -stop-after=spirv-nonsemantic-debug-info %s -o - | FileCheck %s --check-prefix=CHECK-MIR
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
+; RUN: llc --verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_KHR_non_semantic_info %s -o - | FileCheck %s --check-prefix=CHECK-OPTION
+; RUN: %if spirv-tools %{ llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+; CHECK-MIR: [[ptr_type:%[0-9]+]]:type = OpTypePointer 5
+; CHECK-MIR: [[void_type:%[0-9]+]]:type = OpTypeVoid
+; CHECK-MIR: [[func_type:%[0-9]+]]:type = OpTypeFunction [[void_type]], [[ptr_type]], [[ptr_type]], [[ptr_type]]
+; CHECK-MIR: [[i32type:%[0-9]+]]:type(s64) = OpTypeInt 32, 0
+; CHECK-MIR: [[i32_1:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]](s64), 1
+; CHECK-MIR: [[i32_3:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]](s64), 3
+; CHECK-MIR: [[i8type:%[0-9]+]]:type = OpTypeInt 8, 0
+; CHECK-MIR: [[debug_source:%[0-9]+]]:id(s32) = OpExtInst [[void_type]], 3, 35
+; CHECK-MIR: [[debug_comp_unit:%[0-9]+]]:id(s32) = OpExtInst [[void_type]], 3, 1, [[i32_3]](s32), [[i32_1]](s32)
+; CHECK-MIR: [[string_build_id:%[0-9]+]]:id(s32) = OpString 875770417
+; CHECK-MIR: [[debug_build_id:%[0-9]+]]:id(s32) = OpExtInst [[void_type]], 3, 105, [[string_build_id]](s32)
+; CHECK-MIR: [[string_storage_path:%[0-9]+]]:id(s32) = OpString 1969382756
+; CHECK-MIR: [[debug_storage_path:%[0-9]+]]:id(s32) = OpExtInst [[void_type]], 3, 106, [[string_storage_path]](s32)
+
+; CHECK-SPIRV-DAG: [[i32type:%[0-9]+]] = OpTypeInt 32 0
+; CHECK-SPIRV-DAG: [[i8type:%[0-9]+]] = OpTypeInt 8 0
+; CHECK-SPIRV-DAG: [[void_type:%[0-9]+]] = OpTypeVoid
+; CHECK-SPIRV-DAG: [[ptr_type:%[0-9]+]] = OpTypePointer CrossWorkgroup [[i8type]]
+; CHECK-SPIRV-DAG: [[func_type:%[0-9]+]] = OpTypeFunction [[void_type]] [[ptr_type]] [[ptr_type]] [[ptr_type]]
+; CHECK-SPIRV-DAG: [[i32_1:%[0-9]+]] = OpConstant [[i32type]] 1
+; CHECK-SPIRV-DAG: [[i32_3:%[0-9]+]] = OpConstant [[i32type]] 3
+; CHECK-SPIRV-DAG: [[string_build_id:%[0-9]+]] = OpString "1234567890"
+; CHECK-SPIRV-DAG: [[string_storage_path:%[0-9]+]] = OpString "debug_storage_path.spv"
+; CHECK-SPIRV-DAG: [[debug_source:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugSource
+; CHECK-SPIRV-DAG: [[debug_comp_unit:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugCompilationUnit [[i32_3]] [[i32_1]] [[debug_source]]
+; CHECK-SPIRV-DAG: [[debug_build_id:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugBuildIdentifier [[string_build_id]]
+; CHECK-SPIRV-DAG: [[debug_storage_path:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugStoragePath [[string_storage_path]]
+
+; CHECK-OPTION-NOT: DebugBuildIdentifier
+; CHECK-OPTION-NOT: DebugStoragePath
+; CHECK-OPTION-NOT: DebugCompilationUnit
+
+define dso_local spir_kernel void @add_kernel(i32 addrspace(1)* %a, i32 addrspace(1)* %b, i32 addrspace(1)* %res) !dbg !8 {
+entry:
+ ret void, !dbg !10
+}
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!3, !4, !5}
+
+!0 = distinct !DICompileUnit( language: DW_LANG_C_plus_plus_14, file: !1, producer: "clang version test", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, splitDebugFilename: "debug_storage_path.spv", dwoId: 1234567890, enums: !2, retainedTypes: !2, globals: !2, imports: !2)
+!1 = !DIFile(filename: "debug_build_storage.cl", directory: "/path/to/source")
+!2 = !{}
+!3 = !{i32 7, !"Dwarf Version", i32 1}
+!4 = !{i32 2, !"Debug Info Version", i32 3}
+!5 = !{i32 1, !"wchar_size", i32 4}
+!8 = distinct !DISubprogram(name: "add_kernel", scope: !1, file: !1, line: 1, type: !9, unit: !0, spFlags: DISPFlagDefinition, retainedNodes: !2)
+!9 = !DISubroutineType(types: !2)
+!10 = !DILocation(line: 2, column: 1, scope: !8)
diff --git a/llvm/test/CodeGen/SPIRV/debug-info/debug-compilation-unit.ll b/llvm/test/CodeGen/SPIRV/debug-info/debug-compilation-unit.ll
index 54eb0e45dccee..3fb7a6de4a91c 100644
--- a/llvm/test/CodeGen/SPIRV/debug-info/debug-compilation-unit.ll
+++ b/llvm/test/CodeGen/SPIRV/debug-info/debug-compilation-unit.ll
@@ -1,20 +1,20 @@
-; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-unknown-unknown %s -o - 2>&1 | FileCheck %s --check-prefix=CHECK-MIR
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-unknown-unknown -stop-after=spirv-nonsemantic-debug-info %s -o - | FileCheck %s --check-prefix=CHECK-MIR
; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
; RUN: llc --verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_KHR_non_semantic_info %s -o - | FileCheck %s --check-prefix=CHECK-OPTION
; RUN: %if spirv-tools %{ llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
-; CHECK-MIR-DAG: [[type_void:%[0-9]+\:type]] = OpTypeVoid
-; CHECK-MIR-DAG: [[type_i64:%[0-9]+\:type\(s64\)]] = OpTypeInt 32, 0
-; CHECK-MIR-DAG: [[dwarf_version:%[0-9]+\:iid\(s32\)]] = OpConstantI [[type_i64]], 5
-; CHECK-MIR-DAG: [[debug_info_version:%[0-9]+\:iid\(s32\)]] = OpConstantI [[type_i64]], 3
-; CHECK-MIR-DAG: [[source_language_sycl:%[0-9]+\:iid\(s32\)]] = OpConstantI [[type_i64]], 7
-; CHECK-MIR-DAG: [[source_language_cpp:%[0-9]+\:iid\(s32\)]] = OpConstantI [[type_i64]], 4
-; CHECK-MIR-DAG: [[filename_str_sycl:%[0-9]+\:id\(s32\)]] = OpString 1094795567, 1094795585, 792805697, 1111638594, 1111638594, 1128481583, 1128481603, {{1697596227|1700545347}}, 1886216568, 1663985004, 0
-; CHECK-MIR-DAG: [[filename_str_cpp:%[0-9]+\:id\(s32\)]] = OpString 1145324591, 1145324612, 793003076, 1162167621, 1162167621, 1179010607, 1179010630, {{1697596998|1700546118}}, 1886216568, 774989164, 7368803
-; CHECK-MIR-DAG: [[debug_source_sycl:%[0-9]+\:id\(s32\)]] = OpExtInst [[type_void]], 3, 35, [[filename_str_sycl]]
-; CHECK-MIR-DAG: OpExtInst [[type_void]], 3, 1, [[debug_info_version]], [[dwarf_version]], [[debug_source_sycl]], [[source_language_sycl]]
-; CHECK-MIR-DAG: [[debug_source_cpp:%[0-9]+\:id\(s32\)]] = OpExtInst [[type_void]], 3, 35, [[filename_str_cpp]]
-; CHECK-MIR-DAG: OpExtInst [[type_void]], 3, 1, [[debug_info_version]], [[dwarf_version]], [[debug_source_cpp]], [[source_language_cpp]]
+; CHECK-MIR: [[type_void:%[0-9]+]]:type = OpTypeVoid
+; CHECK-MIR: [[type_i64:%[0-9]+]]:type(s64) = OpTypeInt 32, 0
+; CHECK-MIR: [[dwarf_version:%[0-9]+]]:iid(s32) = OpConstantI [[type_i64]](s64), 5
+; CHECK-MIR: [[debug_info_version:%[0-9]+]]:iid(s32) = OpConstantI [[type_i64]](s64), 3
+; CHECK-MIR: [[source_language_sycl:%[0-9]+]]:iid(s32) = OpConstantI [[type_i64]](s64), 7
+; CHECK-MIR: [[source_language_cpp:%[0-9]+]]:iid(s32) = OpConstantI [[type_i64]](s64), 4
+; CHECK-MIR: [[filename_str_sycl:%[0-9]+]]:id(s32) = OpString 1094795567, 1094795585
+; CHECK-MIR: [[debug_source_sycl:%[0-9]+]]:id(s32) = OpExtInst [[type_void]], 3, 35, [[filename_str_sycl]](s32)
+; CHECK-MIR: OpExtInst [[type_void]], 3, 1, [[debug_info_version]](s32), [[dwarf_version]](s32), [[debug_source_sycl]](s32), [[source_language_sycl]](s32)
+; CHECK-MIR: [[filename_str_cpp:%[0-9]+]]:id(s32) = OpString 1145324591, 1145324612, 793003076, 1162167621, 1162167621, 1179010607, 1179010630, {{1697596998|1700546118}}, 1886216568, 774989164, 7368803
+; CHECK-MIR: [[debug_source_cpp:%[0-9]+]]:id(s32) = OpExtInst [[type_void]], 3, 35, [[filename_str_cpp]](s32)
+; CHECK-MIR: OpExtInst [[type_void]], 3, 1, [[debug_info_version]](s32), [[dwarf_version]](s32), [[debug_source_cpp]](s32), [[source_language_cpp]](s32)
; CHECK-SPIRV: [[ext_inst_non_semantic:%[0-9]+]] = OpExtInstImport "NonSemantic.Shader.DebugInfo.100"
; CHECK-SPIRV: [[filename_str_sycl:%[0-9]+]] = OpString "/AAAAAAAAAA/BBBBBBBB/CCCCCCCCC{{[/\\]}}example.c"
@@ -33,13 +33,13 @@
; CHECK-OPTION-NOT: OpExtInstImport "NonSemantic.Shader.DebugInfo.100"
; CHECK-OPTION-NOT: OpString "/AAAAAAAAAA/BBBBBBBB/CCCCCCCCC{{[/\\]}}example.c"
-define spir_func void @foo() {
+define spir_func void @foo() !dbg !8 {
entry:
ret void
}
; CHECK-SPIRV-NOT: Lfunc_end0:
-define spir_func void @bar() {
+define spir_func void @bar() !dbg !9 {
entry:
ret void
}
@@ -56,3 +56,6 @@ entry:
!5 = !{i32 7, !"frame-pointer", i32 2}
!6 = distinct !DICompileUnit(language: DW_LANG_OpenCL_CPP, file: !7, producer: "clang version XX.X.XXXX (FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, splitDebugInlining: false, nameTableKind: None)
!7 = !DIFile(filename: "example1.cpp", directory: "/DDDDDDDDDD/EEEEEEEE/FFFFFFFFF", checksumkind: CSK_MD5, checksum: "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF")
+!8 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 1, type: !10, unit: !0, spFlags: DISPFlagDefinition)
+!9 = distinct !DISubprogram(name: "bar", scope: !7, file: !7, line: 1, type: !10, unit: !6, spFlags: DISPFlagDefinition)
+!10 = !DISubroutineType(types: !{})
diff --git a/llvm/test/CodeGen/SPIRV/debug-info/debug-function.ll b/llvm/test/CodeGen/SPIRV/debug-info/debug-function.ll
new file mode 100644
index 0000000000000..e69e0151b3317
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/debug-info/debug-function.ll
@@ -0,0 +1,55 @@
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-unknown-unknown -stop-after=spirv-nonsemantic-debug-info %s -o - | FileCheck %s --check-prefix=CHECK-MIR
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
+; RUN: llc --verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_KHR_non_semantic_info %s -o - | FileCheck %s --check-prefix=CHECK-OPTION
+; RUN: %if spirv-tools %{ llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+; CHECK-MIR: [[type_void:%[0-9]+]]:type = OpTypeVoid
+; CHECK-MIR: [[source:%[0-9]+]]:id(s32) = OpExtInst [[type_void]], 3, 35
+; CHECK-MIR: [[compile_unit:%[0-9]+]]:id(s32) = OpExtInst [[type_void]], 3, 1
+; CHECK-MIR: [[type_func:%[0-9]+]]:id(s32) = OpExtInst [[type_void]], 3, 8
+; CHECK-MIR: [[string_1:%[0-9]+]]:id(s32) = OpString 1953719668
+; CHECK-MIR: [[func1:%[0-9]+]]:id(s32) = OpExtInst [[type_void]], 3, 20, [[string_1]](s32), [[type_func]](s32), [[source]](s32)
+; CHECK-MIR: [[func2:%[0-9]+]]:id(s32) = OpExtInst [[type_void]], 3, 20, {{%[0-9]+}}(s32), [[type_func]](s32), [[source]](s32)
+
+; CHECK-SPIRV: %[[#ext_inst_non_semantic:]] = OpExtInstImport "NonSemantic.Shader.DebugInfo.100"
+; CHECK-SPIRV: %[[#test1:]] = OpString "test1"
+; CHECK-SPIRV: %[[#test2:]] = OpString "test2"
+; CHECK-SPIRV: %[[#void:]] = OpTypeVoid
+; CHECK-SPIRV: %[[#Ty32:]] = OpTypeInt 32 0
+; CHECK-SPIRV: %[[#zero:]] = OpConstant %[[#Ty32]] 0
+; CHECK-SPIRV: %[[#debug_source:]] = OpExtInst %[[#void]] %[[#ext_inst_non_semantic]] DebugSource
+; CHECK-SPIRV: %[[#debug_compilation:]] = OpExtInst %[[#void]] %[[#ext_inst_non_semantic]] DebugCompilationUnit
+; CHECK-SPIRV: %[[#typefunc:]] = OpExtInst %[[#void]] %[[#ext_inst_non_semantic]] DebugTypeFunction %[[#zero]]
+; CHECK-SPIRV: %[[#func1:]] = OpExtInst %[[#void]] %[[#ext_inst_non_semantic]] DebugFunction %[[#test1]] %[[#typefunc]] %[[#debug_source]] %[[#]] %[[#]] %[[#debug_compilation]]
+; CHECK-SPIRV: %[[#func2:]] = OpExtInst %[[#void]] %[[#ext_inst_non_semantic]] DebugFunction %[[#test2]] %[[#typefunc]] %[[#debug_source]] %[[#]] %[[#]] %[[#debug_compilation]]
+
+; CHECK-OPTION-NOT: OpExtInstImport "NonSemantic.Shader.DebugInfo.100"
+
+define spir_func void @test1() !dbg !5 {
+entry:
+ %a = alloca i32, align 4
+ store i32 1, ptr %a, align 4, !dbg !8
+ ret void
+}
+
+define spir_func void @test2() !dbg !9 {
+entry:
+ %b = alloca i32, align 4
+ store i32 2, ptr %b, align 4, !dbg !11
+ ret void
+}
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!2, !3}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_Zig, file: !1, producer: "clang version XX.X", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, splitDebugInlining: false, nameTableKind: None)
+!1 = !DIFile(filename: "example.c", directory: "/tmp")
+!2 = !{i32 2, !"Debug Info Version", i32 3}
+!3 = !{i32 7, !"Dwarf Version", i32 5}
+!5 = distinct !DISubprogram(name: "test1", scope: !1, file: !1, line: 1, type: !6, spFlags: DISPFlagDefinition, unit: !0)
+!6 = !DISubroutineType(types: !7)
+!7 = !{!12}
+!8 = !DILocation(line: 1, column: 3, scope: !5)
+!9 = distinct !DISubprogram(name: "test2", scope: !1, file: !1, line: 2, type: !6, spFlags: DISPFlagDefinition, unit: !0)
+!11 = !DILocation(line: 2, column: 3, scope: !9)
+!12 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
diff --git a/llvm/test/CodeGen/SPIRV/debug-info/debug-imported-entity.ll b/llvm/test/CodeGen/SPIRV/debug-info/debug-imported-entity.ll
new file mode 100644
index 0000000000000..53dd783a8d2b0
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/debug-info/debug-imported-entity.ll
@@ -0,0 +1,64 @@
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-unknown-unknown -stop-after=spirv-nonsemantic-debug-info %s -o - | FileCheck %s --check-prefix=CHECK-MIR
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
+; RUN: llc --verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_KHR_non_semantic_info %s -o - | FileCheck %s --check-prefix=CHECK-OPTION
+; RUN: %if spirv-tools %{ llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+; CHECK-MIR: [[i32_5:%[0-9]+]]:iid = OpConstantI [[i32type:%[0-9]+]], 5
+; CHECK-MIR: [[void_type:%[0-9]+]]:type(s64) = OpTypeVoid
+; CHECK-MIR: [[i32_3:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 3
+; CHECK-MIR: [[i32_13:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 13
+; CHECK-MIR: [[i32_1:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 1
+; CHECK-MIR: [[i32type:%[0-9]+]]:type = OpTypeInt 32, 0
+; CHECK-MIR: [[debug_source:%[0-9]+]]:id(s32) = OpExtInst [[void_type]](s64), 3, 35
+; CHECK-MIR: [[debug_comp_unit:%[0-9]+]]:id(s32) = OpExtInst [[void_type]](s64), 3, 1, [[i32_3]](s32), [[i32_5]], [[debug_source]](s32), [[i32_13]](s32)
+; CHECK-MIR: [[debug_info_none:%[0-9]+]]:id(s32) = OpExtInst [[void_type]](s64), 3, 0
+; CHECK-MIR: [[debug_imported_entity:%[0-9]+]]:id(s32) = OpExtInst [[void_type]](s64), 3, 34, {{%[0-9]+}}(s32), {{%[0-9]+}}, [[debug_source]](s32), [[debug_info_none]](s32), [[i32_3]](s32), [[i32_1]](s32)
+
+; CHECK-SPIRV-DAG: [[i32type:%[0-9]+]] = OpTypeInt 32 0
+; CHECK-SPIRV-DAG: [[void_type:%[0-9]+]] = OpTypeVoid
+; CHECK-SPIRV-DAG: [[debug_source:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugSource
+; CHECK-SPIRV-DAG: [[debug_comp_unit:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugCompilationUnit {{%[0-9]+}} {{%[0-9]+}} [[debug_source]] {{%[0-9]+}}
+; CHECK-SPIRV-DAG: [[debug_info_none:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugInfoNone
+; CHECK-SPIRV-DAG: [[debug_imported_entity:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugImportedEntity {{%[0-9]+}} {{%[0-9]+}} [[debug_source]] [[debug_info_none]] {{%[0-9]+}} {{%[0-9]+}} [[debug_comp_unit]]
+
+; CHECK-OPTION-NOT: DebugImportedEntity
+
+define dso_local noundef i32 @main() !dbg !13 {
+entry:
+ %retval = alloca i32, align 4
+ %r = alloca i32, align 4
+ store i32 0, ptr %retval, align 4
+ #dbg_declare(ptr %r, !18, !DIExpression(), !19)
+ %call = call noundef i32 @_ZN4myns9double_itEi(i32 noundef 5), !dbg !20
+ store i32 %call, ptr %r, align 4, !dbg !19
+ %0 = load i32, ptr %r, align 4, !dbg !21
+ ret i32 %0, !dbg !22
+}
+
+declare noundef i32 @_ZN4myns9double_itEi(i32 noundef)
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!5, !6, !7, !8, !9, !10, !11}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: !1, producer: "clang version XX.X", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, imports: !2, splitDebugInlining: false, nameTableKind: None)
+!1 = !DIFile(filename: "main.cpp", directory: "/tmp", checksumkind: CSK_MD5, checksum: "2ca3a2708747979970bbb428cfe8db65")
+!2 = !{!3}
+!3 = !DIImportedEntity(tag: DW_TAG_imported_module, scope: !0, entity: !4, file: !1, line: 3)
+!4 = !DINamespace(name: "myns", scope: null)
+!5 = !{i32 7, !"Dwarf Version", i32 5}
+!6 = !{i32 2, !"Debug Info Version", i32 3}
+!7 = !{i32 1, !"wchar_size", i32 4}
+!8 = !{i32 8, !"PIC Level", i32 2}
+!9 = !{i32 7, !"PIE Level", i32 2}
+!10 = !{i32 7, !"uwtable", i32 2}
+!11 = !{i32 7, !"frame-pointer", i32 2}
+!13 = distinct !DISubprogram(name: "main", scope: !1, file: !1, line: 5, type: !14, scopeLine: 5, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !17)
+!14 = !DISubroutineType(types: !15, flags: DIFlagPublic)
+!15 = !{!16}
+!16 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed, flags: DIFlagPublic)
+!17 = !{}
+!18 = !DILocalVariable(name: "r", scope: !13, file: !1, line: 6, type: !16, flags: DIFlagPublic)
+!19 = !DILocation(line: 6, column: 9, scope: !13)
+!20 = !DILocation(line: 6, column: 13, scope: !13)
+!21 = !DILocation(line: 7, column: 12, scope: !13)
+!22 = !DILocation(line: 7, column: 5, scope: !13)
diff --git a/llvm/test/CodeGen/SPIRV/debug-info/debug-inlinedAt-Declare.ll b/llvm/test/CodeGen/SPIRV/debug-info/debug-inlinedAt-Declare.ll
new file mode 100644
index 0000000000000..1c0540e065b44
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/debug-info/debug-inlinedAt-Declare.ll
@@ -0,0 +1,164 @@
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-unknown-unknown -stop-after=spirv-nonsemantic-debug-info %s -o - | FileCheck %s --check-prefix=CHECK-MIR
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
+; RUN: llc --verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_KHR_non_semantic_info %s -o - | FileCheck %s --check-prefix=CHECK-OPTION
+; RUN: %if spirv-tools %{ llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+; CHECK-MIR: %[[DBG_INLINED_AT:[0-9]+]]:id(s32) = OpExtInst [[VOID_T:%[0-9]+]](s64), 3, 25, [[VAL:%[0-9]+]](s32), [[func1:%[0-9]+]](s32)
+; CHECK-MIR: %[[DBG_DEC:[0-9]+]]:id(s32) = OpExtInst [[VOID_T]](s64), 3, 28, [[local_var:%[0-9]+]](s32)
+; CHECK-MIR: [[VOID_T]]:type(s64) = OpTypeVoid
+; CHECK-MIR: [[VAL]]:iid(s32) = OpConstantI {{%[0-9]+}}, 14
+; CHECK-MIR: [[string_1:%[0-9]+]]:id(s32) = OpString 1852399981, 0
+; CHECK-MIR: [[func1:%[0-9]+]]:id(s32) = OpExtInst [[VOID_T]](s64), 3, 20, [[string_1]](s32)
+; CHECK-MIR: [[string_2:%[0-9]+]]:id(s32) = OpString 110
+; CHECK-MIR: [[local_var]]:id(s32) = OpExtInst [[VOID_T]](s64), 3, 26, [[string_2]](s32)
+
+; CHECK-SPIRV: %[[STR_MAIN:[0-9]+]] = OpString "main"
+; CHECK-SPIRV: %[[STR_N:[0-9]+]] = OpString "n"
+; CHECK-SPIRV: %[[INT_T:[0-9]+]] = OpTypeInt 32 0
+; CHECK-SPIRV: %[[VOID_T:[0-9]+]] = OpTypeVoid
+; CHECK-SPIRV: %[[VAL_14:[0-9]+]] = OpConstant %[[INT_T]] 14
+; CHECK-SPIRV: %[[DBG_FUNC_MAIN:[0-9]+]] = OpExtInst %[[VOID_T]] %[[#]] DebugFunction %[[STR_MAIN]]
+; CHECK-SPIRV: %[[DBG_LOCAL:[0-9]+]] = OpExtInst {{%[0-9]+}} %[[#]] DebugLocalVariable %[[STR_N]]
+; CHECK-SPIRV: %[[DBG_INLINED_AT:[0-9]+]] = OpExtInst %[[VOID_T]] %[[#]] DebugInlinedAt %[[VAL_14]] %[[DBG_FUNC_MAIN]]
+; CHECK-SPIRV: %[[DBG_DEC:[0-9]+]] = OpExtInst %[[VOID_T]] %[[#]] DebugDeclare %[[DBG_LOCAL]]
+
+; CHECK-OPTION-NOT: DebugInlinedAt
+; CHECK-OPTION-NOT: DebugDeclare
+
+define dso_local i32 @sum_up_to(i32 noundef %0) #0 !dbg !10 {
+ %2 = alloca i32, align 4
+ %3 = alloca i32, align 4
+ %4 = alloca i32, align 4
+ store i32 %0, ptr %2, align 4
+ #dbg_declare(ptr %2, !15, !DIExpression(), !16)
+ #dbg_declare(ptr %3, !17, !DIExpression(), !18)
+ store i32 0, ptr %3, align 4, !dbg !18
+ #dbg_declare(ptr %4, !19, !DIExpression(), !21)
+ store i32 0, ptr %4, align 4, !dbg !21
+ br label %5, !dbg !22
+
+5: ; preds = %13, %1
+ %6 = load i32, ptr %4, align 4, !dbg !23
+ %7 = load i32, ptr %2, align 4, !dbg !25
+ %8 = icmp slt i32 %6, %7, !dbg !26
+ br i1 %8, label %9, label %16, !dbg !27
+
+9: ; preds = %5
+ %10 = load i32, ptr %4, align 4, !dbg !28
+ %11 = load i32, ptr %3, align 4, !dbg !30
+ %12 = add nsw i32 %11, %10, !dbg !30
+ store i32 %12, ptr %3, align 4, !dbg !30
+ br label %13, !dbg !31
+
+13: ; preds = %9
+ %14 = load i32, ptr %4, align 4, !dbg !32
+ %15 = add nsw i32 %14, 1, !dbg !32
+ store i32 %15, ptr %4, align 4, !dbg !32
+ br label %5, !dbg !33, !llvm.loop !34
+
+16: ; preds = %5
+ %17 = load i32, ptr %3, align 4, !dbg !37
+ ret i32 %17, !dbg !38
+}
+
+define dso_local i32 @main() #1 !dbg !39 {
+ %1 = alloca i32, align 4
+ %2 = alloca i32, align 4
+ %3 = alloca i32, align 4
+ %4 = alloca i32, align 4
+ %5 = alloca i32, align 4
+ store i32 0, ptr %4, align 4
+ #dbg_declare(ptr %5, !42, !DIExpression(), !43)
+ store i32 10, ptr %1, align 4
+ #dbg_declare(ptr %1, !15, !DIExpression(), !44)
+ #dbg_declare(ptr %2, !17, !DIExpression(), !46)
+ store i32 0, ptr %2, align 4, !dbg !46
+ #dbg_declare(ptr %3, !19, !DIExpression(), !47)
+ store i32 0, ptr %3, align 4, !dbg !47
+ br label %6, !dbg !48
+
+6: ; preds = %10, %0
+ %7 = load i32, ptr %3, align 4, !dbg !49
+ %8 = load i32, ptr %1, align 4, !dbg !50
+ %9 = icmp slt i32 %7, %8, !dbg !51
+ br i1 %9, label %10, label %16, !dbg !52
+
+10: ; preds = %6
+ %11 = load i32, ptr %3, align 4, !dbg !53
+ %12 = load i32, ptr %2, align 4, !dbg !54
+ %13 = add nsw i32 %12, %11, !dbg !54
+ store i32 %13, ptr %2, align 4, !dbg !54
+ %14 = load i32, ptr %3, align 4, !dbg !55
+ %15 = add nsw i32 %14, 1, !dbg !55
+ store i32 %15, ptr %3, align 4, !dbg !55
+ br label %6, !dbg !56, !llvm.loop !57
+
+16: ; preds = %6
+ %17 = load i32, ptr %2, align 4, !dbg !59
+ store i32 %17, ptr %5, align 4, !dbg !43
+ ret i32 0, !dbg !60
+}
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!2, !3, !4, !5, !6, !7, !8}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: !1, producer: "clang version XX.X.XXXX (FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, splitDebugInlining: false, nameTableKind: None)
+!1 = !DIFile(filename: "example.cpp", directory: "/AAAAAAAAAA/BBBBBBBB/CCCCCCCCC", checksumkind: CSK_MD5, checksum: "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF")
+!2 = !{i32 7, !"Dwarf Version", i32 5}
+!3 = !{i32 2, !"Debug Info Version", i32 3}
+!4 = !{i32 1, !"wchar_size", i32 4}
+!5 = !{i32 8, !"PIC Level", i32 2}
+!6 = !{i32 7, !"PIE Level", i32 2}
+!7 = !{i32 7, !"uwtable", i32 2}
+!8 = !{i32 7, !"frame-pointer", i32 2}
+!10 = distinct !DISubprogram(name: "sum_up_to", scope: !1, file: !1, line: 5, type: !11, scopeLine: 5, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !14)
+!11 = !DISubroutineType(types: !12, flags: DIFlagPublic)
+!12 = !{!13, !13}
+!13 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed, flags: DIFlagPublic)
+!14 = !{}
+!15 = !DILocalVariable(name: "n", arg: 1, scope: !10, file: !1, line: 5, type: !13, flags: DIFlagPublic)
+!16 = !DILocation(line: 5, column: 19, scope: !10)
+!17 = !DILocalVariable(name: "total", scope: !10, file: !1, line: 6, type: !13, flags: DIFlagPublic)
+!18 = !DILocation(line: 6, column: 9, scope: !10)
+!19 = !DILocalVariable(name: "i", scope: !20, file: !1, line: 7, type: !13, flags: DIFlagPublic)
+!20 = distinct !DILexicalBlock(scope: !10, file: !1, line: 7, column: 5)
+!21 = !DILocation(line: 7, column: 14, scope: !20)
+!22 = !DILocation(line: 7, column: 10, scope: !20)
+!23 = !DILocation(line: 7, column: 21, scope: !24)
+!24 = distinct !DILexicalBlock(scope: !20, file: !1, line: 7, column: 5)
+!25 = !DILocation(line: 7, column: 25, scope: !24)
+!26 = !DILocation(line: 7, column: 23, scope: !24)
+!27 = !DILocation(line: 7, column: 5, scope: !20)
+!28 = !DILocation(line: 8, column: 18, scope: !29)
+!29 = distinct !DILexicalBlock(scope: !24, file: !1, line: 7, column: 33)
+!30 = !DILocation(line: 8, column: 15, scope: !29)
+!31 = !DILocation(line: 9, column: 5, scope: !29)
+!32 = !DILocation(line: 7, column: 28, scope: !24)
+!33 = !DILocation(line: 7, column: 5, scope: !24)
+!34 = distinct !{!34, !27, !35, !36}
+!35 = !DILocation(line: 9, column: 5, scope: !20)
+!36 = !{!"llvm.loop.mustprogress"}
+!37 = !DILocation(line: 10, column: 12, scope: !10)
+!38 = !DILocation(line: 10, column: 5, scope: !10)
+!39 = distinct !DISubprogram(name: "main", scope: !1, file: !1, line: 13, type: !40, scopeLine: 13, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !14, flags: DIFlagPublic)
+!40 = !DISubroutineType(types: !41, flags: DIFlagPublic)
+!41 = !{!13}
+!42 = !DILocalVariable(name: "result", scope: !39, file: !1, line: 14, type: !13, flags: DIFlagPublic)
+!43 = !DILocation(line: 14, column: 9, scope: !39)
+!44 = !DILocation(line: 5, column: 19, scope: !10, inlinedAt: !45)
+!45 = distinct !DILocation(line: 14, column: 18, scope: !39)
+!46 = !DILocation(line: 6, column: 9, scope: !10, inlinedAt: !45)
+!47 = !DILocation(line: 7, column: 14, scope: !20, inlinedAt: !45)
+!48 = !DILocation(line: 7, column: 10, scope: !20, inlinedAt: !45)
+!49 = !DILocation(line: 7, column: 21, scope: !24, inlinedAt: !45)
+!50 = !DILocation(line: 7, column: 25, scope: !24, inlinedAt: !45)
+!51 = !DILocation(line: 7, column: 23, scope: !24, inlinedAt: !45)
+!52 = !DILocation(line: 7, column: 5, scope: !20, inlinedAt: !45)
+!53 = !DILocation(line: 8, column: 18, scope: !29, inlinedAt: !45)
+!54 = !DILocation(line: 8, column: 15, scope: !29, inlinedAt: !45)
+!55 = !DILocation(line: 7, column: 28, scope: !24, inlinedAt: !45)
+!56 = !DILocation(line: 7, column: 5, scope: !24, inlinedAt: !45)
+!57 = distinct !{!57, !52, !58, !36}
+!58 = !DILocation(line: 9, column: 5, scope: !20, inlinedAt: !45)
+!59 = !DILocation(line: 10, column: 12, scope: !10, inlinedAt: !45)
+!60 = !DILocation(line: 15, column: 5, scope: !39)
diff --git a/llvm/test/CodeGen/SPIRV/debug-info/debug-lexical-scope.ll b/llvm/test/CodeGen/SPIRV/debug-info/debug-lexical-scope.ll
new file mode 100644
index 0000000000000..2897dab85032b
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/debug-info/debug-lexical-scope.ll
@@ -0,0 +1,62 @@
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-unknown-unknown -stop-after=spirv-nonsemantic-debug-info %s -o - | FileCheck %s --check-prefix=CHECK-MIR
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
+; RUN: llc --verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_KHR_non_semantic_info %s -o - | FileCheck %s --check-prefix=CHECK-OPTION
+; RUN: %if spirv-tools %{ llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+; CHECK-MIR: [[type_void:%[0-9]+]]:type = OpTypeVoid
+; CHECK-MIR: [[source:%[0-9]+]]:id(s32) = OpExtInst [[type_void]], 3, 35
+; CHECK-MIR: [[string_1:%[0-9]+]]:id(s32) = OpString 1953719668, 49
+; CHECK-MIR: [[func1:%[0-9]+]]:id(s32) = OpExtInst [[type_void]], 3, 20, [[string_1]](s32)
+; CHECK-MIR: [[string_2:%[0-9]+]]:id(s32) = OpString 1953719668, 50
+; CHECK-MIR: [[func2:%[0-9]+]]:id(s32) = OpExtInst [[type_void]], 3, 20, [[string_2]](s32)
+; CHECK-MIR: [[lex_block1:%[0-9]+]]:id(s32) = OpExtInst [[type_void]], 3, 21, [[source]](s32), {{%[0-9]+}}, {{%[0-9]+}}(s32), [[func1]](s32)
+; CHECK-MIR: [[lex_block_discr:%[0-9]+]]:id(s32) = OpExtInst [[type_void]], 3, 22, [[source]](s32), {{%[0-9]+}}(s32), [[lex_block1]](s32)
+; CHECK-MIR: [[lex_block2:%[0-9]+]]:id(s32) = OpExtInst [[type_void]], 3, 21, [[source]](s32), {{%[0-9]+}}, {{%[0-9]+}}(s32), [[func2]](s32)
+
+; CHECK-SPIRV: %[[#ext_inst_non_semantic:]] = OpExtInstImport "NonSemantic.Shader.DebugInfo.100"
+; CHECK-SPIRV: %[[#test1:]] = OpString "test1"
+; CHECK-SPIRV: %[[#test2:]] = OpString "test2"
+; CHECK-SPIRV: %[[#void:]] = OpTypeVoid
+; CHECK-SPIRV: %[[#Ty32:]] = OpTypeInt 32 0
+; CHECK-SPIRV: %[[#zero:]] = OpConstant %[[#Ty32]] 0
+; CHECK-SPIRV: %[[#debug_source:]] = OpExtInst %[[#void]] %[[#ext_inst_non_semantic]] DebugSource
+; CHECK-SPIRV: %[[#func1:]] = OpExtInst %[[#void]] %[[#ext_inst_non_semantic]] DebugFunction %[[#test1]]
+; CHECK-SPIRV: %[[#func2:]] = OpExtInst %[[#void]] %[[#ext_inst_non_semantic]] DebugFunction %[[#test2]]
+; CHECK-SPIRV: %[[#lex_block:]] = OpExtInst %[[#void]] %[[#ext_inst_non_semantic]] DebugLexicalBlock %[[#debug_source]] %[[#]] %[[#]] %[[#func1]]
+; CHECK-SPIRV: %[[#]] = OpExtInst %[[#void]] %[[#ext_inst_non_semantic]] DebugLexicalBlockDiscriminator %[[#debug_source]] %[[#]] %[[#lex_block]]
+; CHECK-SPIRV: %[[#]] = OpExtInst %[[#void]] %[[#ext_inst_non_semantic]] DebugLexicalBlock %[[#debug_source]] %[[#]] %[[#]] %[[#func2]]
+; CHECK-OPTION-NOT: OpExtInstImport "NonSemantic.Shader.DebugInfo.100"
+
+define spir_func void @test1() !dbg !5 {
+entry:
+ %a = alloca i32, align 4
+ store i32 1, ptr %a, align 4, !dbg !15
+ ret void, !dbg !16
+}
+
+define spir_func void @test2() !dbg !9 {
+entry:
+ %b = alloca i32, align 4
+ store i32 2, ptr %b, align 4, !dbg !18
+ ret void, !dbg !19
+}
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!2, !3}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_Zig, file: !1, producer: "clang version XX.X", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, splitDebugInlining: false, nameTableKind: None)
+!1 = !DIFile(filename: "example.c", directory: "/tmp")
+!2 = !{i32 2, !"Debug Info Version", i32 3}
+!3 = !{i32 7, !"Dwarf Version", i32 5}
+!5 = distinct !DISubprogram(name: "test1", scope: !1, file: !1, line: 1, type: !6, spFlags: DISPFlagDefinition, unit: !0)
+!6 = !DISubroutineType(types: !7)
+!7 = !{!12}
+!9 = distinct !DISubprogram(name: "test2", scope: !1, file: !1, line: 2, type: !6, spFlags: DISPFlagDefinition, unit: !0)
+!12 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+!13 = distinct !DILexicalBlock(scope: !5, file: !1, line: 1, column: 5)
+!14 = !DILexicalBlockFile(scope: !13, file: !1, discriminator: 1)
+!15 = !DILocation(line: 1, column: 3, scope: !13)
+!16 = !DILocation(line: 1, column: 7, scope: !14)
+!17 = distinct !DILexicalBlock(scope: !9, file: !1, line: 2, column: 5)
+!18 = !DILocation(line: 2, column: 3, scope: !17)
+!19 = !DILocation(line: 2, column: 7, scope: !17)
diff --git a/llvm/test/CodeGen/SPIRV/debug-info/debug-line.ll b/llvm/test/CodeGen/SPIRV/debug-info/debug-line.ll
new file mode 100644
index 0000000000000..ece9e52badfc3
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/debug-info/debug-line.ll
@@ -0,0 +1,117 @@
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-unknown-unknown -stop-after=spirv-nonsemantic-debug-info %s -o - | FileCheck %s --check-prefix=CHECK-MIR
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
+; RUN: llc --verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_KHR_non_semantic_info %s -o - | FileCheck %s --check-prefix=CHECK-OPTION
+; RUN: %if spirv-tools %{ llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+; CHECK-MIR: [[TYPE_I32:%[0-9]+]]:type = OpTypeInt 32, 0
+; CHECK-MIR: [[VOID_T:%[0-9]+]]:type(s64) = OpTypeVoid
+; CHECK-MIR: [[VAL:%[0-9]+]]:iid(s32) = OpConstantI [[TYPE_I32]], 3
+; CHECK-MIR: [[STR:%[0-9]+]]:id(s32) = OpString 1094795567, 1094795585
+; CHECK-MIR: [[DBG_SOURCE:%[0-9]+]]:id(s32) = OpExtInst [[VOID_T]](s64), 3, 35, [[STR]](s32)
+; CHECK-MIR: [[DBG_NOLINE:%[0-9]+]]:id(s32) = OpExtInst [[VOID_T]](s64), 3, 104
+; CHECK-MIR: [[DBG_LINE:%[0-9]+]]:id(s32) = OpExtInst [[VOID_T]](s64), 3, 103, [[DBG_SOURCE]](s32), [[VAL]](s32), [[VAL]](s32), {{%[0-9]+}}(s32), {{%[0-9]+}}(s32)
+
+; CHECK-SPIRV: [[void_ty:%[0-9]+]] = OpTypeVoid
+; CHECK-SPIRV: [[dbg_src:%[0-9]+]] = OpExtInst [[void_ty]] %[[#]] DebugSource %[[#]]
+; CHECK-SPIRV: [[dbg_line_sum:%[0-9]+]] = OpExtInst [[void_ty]] %[[#]] DebugLine [[dbg_src]]
+; CHECK-SPIRV: [[dbg_noline_sum:%[0-9]+]] = OpExtInst [[void_ty]] %[[#]] DebugNoLine
+
+; CHECK-OPTION-NOT: DebugLine
+; CHECK-OPTION-NOT: DebugNoLine
+
+define dso_local i32 @sum_up_to(i32 noundef %n) #0 !dbg !10 {
+entry:
+ %n.addr = alloca i32, align 4
+ %total = alloca i32, align 4
+ %i = alloca i32, align 4
+ store i32 %n, ptr %n.addr, align 4
+ #dbg_declare(ptr %n.addr, !15, !DIExpression(), !16)
+ #dbg_declare(ptr %total, !17, !DIExpression(), !18)
+ store i32 0, ptr %total, align 4, !dbg !18
+ #dbg_declare(ptr %i, !19, !DIExpression(), !21)
+ store i32 0, ptr %i, align 4, !dbg !21
+ br label %for.cond, !dbg !22
+
+for.cond: ; preds = %for.inc, %entry
+ %0 = load i32, ptr %i, align 4, !dbg !23
+ %1 = load i32, ptr %n.addr, align 4, !dbg !25
+ %cmp = icmp slt i32 %0, %1, !dbg !26
+ br i1 %cmp, label %for.body, label %for.end, !dbg !27
+
+for.body: ; preds = %for.cond
+ %2 = load i32, ptr %i, align 4, !dbg !28
+ %3 = load i32, ptr %total, align 4, !dbg !30
+ %add = add nsw i32 %3, %2, !dbg !30
+ store i32 %add, ptr %total, align 4, !dbg !30
+ br label %for.inc, !dbg !31
+
+for.inc: ; preds = %for.body
+ %4 = load i32, ptr %i, align 4, !dbg !32
+ %inc = add nsw i32 %4, 1, !dbg !32
+ store i32 %inc, ptr %i, align 4, !dbg !32
+ br label %for.cond, !dbg !33, !llvm.loop !34
+
+for.end: ; preds = %for.cond
+ %5 = load i32, ptr %total, align 4, !dbg !37
+ ret i32 %5, !dbg !38
+}
+
+define dso_local i32 @main() #0 !dbg !39 {
+entry:
+ %retval = alloca i32, align 4
+ %result = alloca i32, align 4
+ store i32 0, ptr %retval, align 4
+ #dbg_declare(ptr %result, !42, !DIExpression(), !43)
+ %call = call i32 @sum_up_to(i32 noundef 10), !dbg !44
+ store i32 %call, ptr %result, align 4, !dbg !43
+ ret i32 0, !dbg !45
+}
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!2, !3, !4, !5, !6, !7, !8}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: !1, producer: "clang version XX.X.XXXX (FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, splitDebugInlining: false, nameTableKind: None)
+!1 = !DIFile(filename: "example.cpp", directory: "/AAAAAAAAAA/BBBBBBBB/CCCCCCCCC", checksumkind: CSK_MD5, checksum: "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF")
+!2 = !{i32 7, !"Dwarf Version", i32 5}
+!3 = !{i32 2, !"Debug Info Version", i32 3}
+!4 = !{i32 1, !"wchar_size", i32 4}
+!5 = !{i32 8, !"PIC Level", i32 2}
+!6 = !{i32 7, !"PIE Level", i32 2}
+!7 = !{i32 7, !"uwtable", i32 2}
+!8 = !{i32 7, !"frame-pointer", i32 2}
+!10 = distinct !DISubprogram(name: "sum_up_to", scope: !1, file: !1, line: 1, type: !11, scopeLine: 1, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !14)
+!11 = !DISubroutineType(types: !12, flags: DIFlagPublic)
+!12 = !{!13, !13}
+!13 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed, flags: DIFlagPublic)
+!14 = !{}
+!15 = !DILocalVariable(name: "n", arg: 1, scope: !10, file: !1, line: 1, type: !13, flags: DIFlagPublic)
+!16 = !DILocation(line: 1, column: 19, scope: !10)
+!17 = !DILocalVariable(name: "total", scope: !10, file: !1, line: 2, type: !13, flags: DIFlagPublic)
+!18 = !DILocation(line: 2, column: 9, scope: !10)
+!19 = !DILocalVariable(name: "i", scope: !20, file: !1, line: 3, type: !13, flags: DIFlagPublic)
+!20 = distinct !DILexicalBlock(scope: !10, file: !1, line: 3, column: 5)
+!21 = !DILocation(line: 3, column: 14, scope: !20)
+!22 = !DILocation(line: 3, column: 10, scope: !20)
+!23 = !DILocation(line: 3, column: 21, scope: !24)
+!24 = distinct !DILexicalBlock(scope: !20, file: !1, line: 3, column: 5)
+!25 = !DILocation(line: 3, column: 25, scope: !24)
+!26 = !DILocation(line: 3, column: 23, scope: !24)
+!27 = !DILocation(line: 3, column: 5, scope: !20)
+!28 = !DILocation(line: 4, column: 18, scope: !29)
+!29 = distinct !DILexicalBlock(scope: !24, file: !1, line: 3, column: 33)
+!30 = !DILocation(line: 4, column: 15, scope: !29)
+!31 = !DILocation(line: 5, column: 5, scope: !29)
+!32 = !DILocation(line: 3, column: 28, scope: !24)
+!33 = !DILocation(line: 3, column: 5, scope: !24)
+!34 = distinct !{!34, !27, !35, !36}
+!35 = !DILocation(line: 5, column: 5, scope: !20)
+!36 = !{!"llvm.loop.mustprogress"}
+!37 = !DILocation(line: 6, column: 12, scope: !10)
+!38 = !DILocation(line: 6, column: 5, scope: !10)
+!39 = distinct !DISubprogram(name: "main", scope: !1, file: !1, line: 9, type: !40, scopeLine: 9, flags: DIFlagPublic, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !14)
+!40 = !DISubroutineType(types: !41, flags: DIFlagPublic)
+!41 = !{!13}
+!42 = !DILocalVariable(name: "result", scope: !39, file: !1, line: 10, type: !13, flags: DIFlagPublic)
+!43 = !DILocation(line: 10, column: 9, scope: !39)
+!44 = !DILocation(line: 10, column: 18, scope: !39)
+!45 = !DILocation(line: 11, column: 5, scope: !39)
diff --git a/llvm/test/CodeGen/SPIRV/debug-info/debug-macro-def.ll b/llvm/test/CodeGen/SPIRV/debug-info/debug-macro-def.ll
new file mode 100644
index 0000000000000..1a5f6077151fb
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/debug-info/debug-macro-def.ll
@@ -0,0 +1,78 @@
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-unknown-unknown -stop-after=spirv-nonsemantic-debug-info %s -o - | FileCheck %s --check-prefix=CHECK-MIR
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
+; RUN: llc --verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_KHR_non_semantic_info %s -o - | FileCheck %s --check-prefix=CHECK-OPTION
+; RUN: %if spirv-tools %{ llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+; CHECK-MIR: [[i32type:%[0-9]+]]:type = OpTypeInt 32, 0
+; CHECK-MIR: [[func_type:%[0-9]+]]:type = OpTypeFunction [[i32type]]
+; CHECK-MIR: [[ptr_type:%[0-9]+]]:type = OpTypePointer 7, [[i32type]]
+; CHECK-MIR: [[i32_0:%[0-9]+]]:iid = OpConstantNull [[i32type]]
+; CHECK-MIR: [[void_type:%[0-9]+]]:type(s64) = OpTypeVoid
+; CHECK-MIR: [[i32_5:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 5
+; CHECK-MIR: [[i32_3:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 3
+; CHECK-MIR: [[i32_12:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 12
+; CHECK-MIR: [[i32_1:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 1
+; CHECK-MIR: [[debug_source:%[0-9]+]]:id(s32) = OpExtInst [[void_type]](s64), 3, 35
+; CHECK-MIR: [[debug_comp_unit:%[0-9]+]]:id(s32) = OpExtInst [[void_type]](s64), 3, 1, [[i32_3]](s32), [[i32_5]](s32), [[debug_source]](s32), [[i32_12]](s32)
+; CHECK-MIR: [[string_macro_name:%[0-9]+]]:id(s32) = OpString 778462564, 99
+; CHECK-MIR: [[string_empty:%[0-9]+]]:id(s32) = OpString 1163544915, 0
+; CHECK-MIR: [[string_macro_value:%[0-9]+]]:id(s32) = OpString 53
+; CHECK-MIR: [[debug_macrodef:%[0-9]+]]:id(s32) = OpExtInst [[void_type]](s64), 3, 32, [[string_macro_name]](s32), [[i32_1]](s32), [[string_empty]](s32), [[string_macro_value]](s32)
+
+; CHECK-SPIRV-DAG: [[i32type:%[0-9]+]] = OpTypeInt 32 0
+; CHECK-SPIRV-DAG: [[void_type:%[0-9]+]] = OpTypeVoid
+; CHECK-SPIRV-DAG: [[func_type:%[0-9]+]] = OpTypeFunction [[i32type]]
+; CHECK-SPIRV-DAG: [[ptr_type:%[0-9]+]] = OpTypePointer Function [[i32type]]
+; CHECK-SPIRV-DAG: [[i32_0:%[0-9]+]] = OpConstantNull [[i32type]]
+; CHECK-SPIRV-DAG: [[i32_5:%[0-9]+]] = OpConstant [[i32type]] 5
+; CHECK-SPIRV-DAG: [[i32_3:%[0-9]+]] = OpConstant [[i32type]] 3
+; CHECK-SPIRV-DAG: [[i32_12:%[0-9]+]] = OpConstant [[i32type]] 12
+; CHECK-SPIRV-DAG: [[i32_1:%[0-9]+]] = OpConstant [[i32type]] 1
+; CHECK-SPIRV-DAG: [[debug_source:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugSource
+; CHECK-SPIRV-DAG: [[string_macro_name:%[0-9]+]] = OpString "def.c"
+; CHECK-SPIRV-DAG: [[string_macro_value:%[0-9]+]] = OpString "5"
+; CHECK-SPIRV-DAG: [[string_size:%[0-9]+]] = OpString "SIZE"
+; CHECK-SPIRV-DAG: [[debug_comp_unit:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugCompilationUnit [[i32_3]] [[i32_5]] [[debug_source]] [[i32_12]]
+; CHECK-SPIRV-DAG: [[debug_macrodef:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugMacroDef [[string_macro_name]] [[i32_1]] [[string_size]] [[string_macro_value]]
+
+; CHECK-OPTION-NOT: DebugMacroDef
+; CHECK-OPTION-NOT: DebugSource
+; CHECK-OPTION-NOT: DebugCompilationUnit
+
+define dso_local i32 @main(i32 %dummy) !dbg !24 {
+entry:
+ %retval = alloca i32, align 4
+ store i32 0, ptr %retval, align 4
+ ret i32 0, !dbg !28
+}
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!16, !17, !18, !19, !20, !21, !22}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_Zig, file: !1, producer: "clang version XX.X" , isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, macros: !2, splitDebugInlining: false, nameTableKind: None)
+!1 = !DIFile(filename: "def.c", directory: "/tmp")
+!2 = !{!3, !7, !8, !9, !10, !11, !12, !13, !14, !15}
+!3 = !DIMacroFile(file: !1, nodes: !4)
+!4 = !{!5}
+!5 = !DIMacro(type: DW_MACINFO_define, line: 1, name: "SIZE", value: "5")
+!7 = !DIMacro(type: DW_MACINFO_define, name: "__STDC__", value: "1")
+!8 = !DIMacro(type: DW_MACINFO_define, name: "__STDC_HOSTED__", value: "1")
+!9 = !DIMacro(type: DW_MACINFO_define, name: "__STDC_VERSION__", value: "201710L")
+!10 = !DIMacro(type: DW_MACINFO_define, name: "__STDC_UTF_16__", value: "1")
+!11 = !DIMacro(type: DW_MACINFO_define, name: "__STDC_UTF_32__", value: "1")
+!12 = !DIMacro(type: DW_MACINFO_define, name: "__STDC_EMBED_NOT_FOUND__", value: "0")
+!13 = !DIMacro(type: DW_MACINFO_define, name: "__STDC_EMBED_FOUND__", value: "1")
+!14 = !DIMacro(type: DW_MACINFO_define, name: "__STDC_EMBED_EMPTY__", value: "2")
+!15 = !DIMacro(type: DW_MACINFO_define, name: "__GCC_HAVE_DWARF2_CFI_ASM", value: "1")
+!16 = !{i32 7, !"Dwarf Version", i32 5}
+!17 = !{i32 2, !"Debug Info Version", i32 3}
+!18 = !{i32 1, !"wchar_size", i32 4}
+!19 = !{i32 8, !"PIC Level", i32 2}
+!20 = !{i32 7, !"PIE Level", i32 2}
+!21 = !{i32 7, !"uwtable", i32 2}
+!22 = !{i32 7, !"frame-pointer", i32 2}
+!24 = distinct !DISubprogram(name: "main", scope: !1, file: !1, line: 4, type: !25, scopeLine: 4, spFlags: DISPFlagDefinition, unit: !0, flags: DIFlagPublic)
+!25 = !DISubroutineType(types: !26, flags: DIFlagPublic)
+!26 = !{!27}
+!27 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed , flags: DIFlagPublic)
+!28 = !DILocation(line: 5, column: 3, scope: !24)
diff --git a/llvm/test/CodeGen/SPIRV/debug-info/debug-opeation-expression-debugValue.ll b/llvm/test/CodeGen/SPIRV/debug-info/debug-opeation-expression-debugValue.ll
new file mode 100644
index 0000000000000..bb9fc43c81a8c
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/debug-info/debug-opeation-expression-debugValue.ll
@@ -0,0 +1,125 @@
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-unknown-unknown -stop-after=spirv-nonsemantic-debug-info %s -o - | FileCheck %s --check-prefix=CHECK-MIR
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
+; RUN: llc --verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_KHR_non_semantic_info %s -o - | FileCheck %s --check-prefix=CHECK-OPTION
+; RUN: %if spirv-tools %{ llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+; CHECK-MIR: [[i32type:%[0-9]+]]:type = OpTypeInt 32, 0
+; CHECK-MIR: [[void_type:%[0-9]+]]:type = OpTypeVoid
+; CHECK-MIR: [[i32_1:%[0-9]+]]:iid = OpConstantI [[i32type]], 1
+; CHECK-MIR: [[i32_0:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 0
+; CHECK-MIR: [[i32_5:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 5
+; CHECK-MIR: [[i32_3:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 3
+; CHECK-MIR: [[i32_7:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 7
+; CHECK-MIR: [[i32_32:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 32
+; CHECK-MIR: [[i32_4:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 4
+; CHECK-MIR: [[i32_8:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 8
+; CHECK-MIR: [[i32_2:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 2
+; CHECK-MIR: [[i32_6:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 6
+; CHECK-MIR: [[i32_20:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 20
+; CHECK-MIR: [[i32_9:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 9
+; CHECK-MIR: [[i32_12:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 12
+; CHECK-MIR: [[expr:%[0-9]+]]:id(s32) = OpExtInst [[void_type]], 3, 31
+; CHECK-MIR: [[debug_val:%[0-9]+]]:id(s32) = OpExtInst [[void_type]], 3, 29, [[local_var:%[0-9]+]](s32), {{%[0-9]+}}, [[expr]](s32)
+; CHECK-MIR: [[op_constu_8:%[0-9]+]]:id(s32) = OpExtInst [[void_type]], 3, 30, [[i32_8]](s32), [[i32_8]](s32)
+; CHECK-MIR: [[op_stack_value:%[0-9]+]]:id(s32) = OpExtInst [[void_type]], 3, 30, [[i32_7]](s32)
+; CHECK-MIR: [[expr_constu_stack_value:%[0-9]+]]:id(s32) = OpExtInst [[void_type]], 3, 31, [[op_constu_8]](s32), [[op_stack_value]](s32)
+; CHECK-MIR: [[op_deref:%[0-9]+]]:id(s32) = OpExtInst [[void_type]], 3, 30, [[i32_0]](s32)
+; CHECK-MIR: [[expr_deref:%[0-9]+]]:id(s32) = OpExtInst [[void_type]], 3, 31, [[op_deref]](s32)
+; CHECK-MIR: [[op_plus:%[0-9]+]]:id(s32) = OpExtInst [[void_type]], 3, 30, [[i32_1]]
+; CHECK-MIR: [[expr_plus:%[0-9]+]]:id(s32) = OpExtInst [[void_type]], 3, 31, [[op_plus]](s32)
+; CHECK-MIR: [[op_minus:%[0-9]+]]:id(s32) = OpExtInst [[void_type]], 3, 30, [[i32_2]](s32)
+; CHECK-MIR: [[expr_minus:%[0-9]+]]:id(s32) = OpExtInst [[void_type]], 3, 31, [[op_minus]](s32)
+; CHECK-MIR: [[op_xderef:%[0-9]+]]:id(s32) = OpExtInst [[void_type]], 3, 30, [[i32_6]](s32)
+; CHECK-MIR: [[expr_xderef:%[0-9]+]]:id(s32) = OpExtInst [[void_type]], 3, 31, [[op_xderef]](s32)
+; CHECK-MIR: [[op_constu_20:%[0-9]+]]:id(s32) = OpExtInst [[void_type]], 3, 30, [[i32_8]](s32), [[i32_20]](s32)
+; CHECK-MIR: [[op_swap:%[0-9]+]]:id(s32) = OpExtInst [[void_type]], 3, 30, [[i32_5]](s32)
+; CHECK-MIR: [[expr_constu_swap:%[0-9]+]]:id(s32) = OpExtInst [[void_type]], 3, 31, [[op_constu_20]](s32), [[op_swap]](s32)
+; CHECK-MIR: [[op_plus_uconst_8:%[0-9]+]]:id(s32) = OpExtInst [[void_type]], 3, 30, [[i32_3]](s32), [[i32_8]](s32)
+; CHECK-MIR: [[op_stack_value1:%[0-9]+]]:id(s32) = OpExtInst [[void_type]], 3, 30, [[i32_7]](s32)
+; CHECK-MIR: [[expr_plus_uconst_stack_value:%[0-9]+]]:id(s32) = OpExtInst [[void_type]], 3, 31, [[op_plus_uconst_8]](s32), [[op_stack_value1]](s32)
+; CHECK-MIR-DAG: [[op_fragment:%[0-9]+]]:id(s32) = OpExtInst [[void_type]], 3, 30, [[i32_9]](s32), [[i32_4]](s32), [[i32_12]](s32)
+; CHECK-MIR-DAG: [[expr_fragment:%[0-9]+]]:id(s32) = OpExtInst [[void_type]], 3, 31, [[op_fragment]](s32)
+; CHECK-MIR-DAG: [[local_var]]:id(s32) = OpExtInst [[void_type]], 3, 26
+
+; CHECK-SPIRV: [[i32type:%[0-9]+]] = OpTypeInt 32 0
+; CHECK-SPIRV: [[void_type:%[0-9]+]] = OpTypeVoid
+; CHECK-SPIRV-DAG: [[i32_0:%[0-9]+]] = OpConstant [[i32type]] 0
+; CHECK-SPIRV-DAG: [[i32_12:%[0-9]+]] = OpConstant [[i32type]] 12
+; CHECK-SPIRV-DAG: [[i32_1:%[0-9]+]] = OpConstant [[i32type]] 1
+; CHECK-SPIRV-DAG: [[i32_32:%[0-9]+]] = OpConstant [[i32type]] 32
+; CHECK-SPIRV-DAG: [[i32_20:%[0-9]+]] = OpConstant [[i32type]] 20
+; CHECK-SPIRV-DAG: [[i32_256:%[0-9]+]] = OpConstant [[i32type]] 256
+; CHECK-SPIRV-DAG: [[i32_2:%[0-9]+]] = OpConstant [[i32type]] 2
+; CHECK-SPIRV-DAG: [[i32_3:%[0-9]+]] = OpConstant [[i32type]] 3
+; CHECK-SPIRV-DAG: [[i32_4:%[0-9]+]] = OpConstant [[i32type]] 4
+; CHECK-SPIRV-DAG: [[i32_5:%[0-9]+]] = OpConstant [[i32type]] 5
+; CHECK-SPIRV-DAG: [[i32_6:%[0-9]+]] = OpConstant [[i32type]] 6
+; CHECK-SPIRV-DAG: [[i32_7:%[0-9]+]] = OpConstant [[i32type]] 7
+; CHECK-SPIRV-DAG: [[i32_8:%[0-9]+]] = OpConstant [[i32type]] 8
+; CHECK-SPIRV-DAG: [[i32_9:%[0-9]+]] = OpConstant [[i32type]] 9
+; CHECK-SPIRV: [[op_constu_8:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugOperation [[i32_8]] [[i32_8]]
+; CHECK-SPIRV: [[op_stack_value:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugOperation [[i32_7]]
+; CHECK-SPIRV: [[expr_constu_stack_value:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugExpression [[op_constu_8]] [[op_stack_value]]
+; CHECK-SPIRV: [[op_deref:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugOperation [[i32_0]]
+; CHECK-SPIRV: [[expr_deref:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugExpression [[op_deref]]
+; CHECK-SPIRV: [[op_plus:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugOperation [[i32_1]]
+; CHECK-SPIRV: [[expr_plus:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugExpression [[op_plus]]
+; CHECK-SPIRV: [[op_minus:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugOperation [[i32_2]]
+; CHECK-SPIRV: [[expr_minus:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugExpression [[op_minus]]
+; CHECK-SPIRV: [[op_xderef:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugOperation [[i32_6]]
+; CHECK-SPIRV: [[expr_xderef:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugExpression [[op_xderef]]
+; CHECK-SPIRV: [[op_constu_20:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugOperation [[i32_8]] [[i32_20]]
+; CHECK-SPIRV: [[op_swap:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugOperation [[i32_5]]
+; CHECK-SPIRV: [[expr_constu_swap:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugExpression [[op_constu_20]] [[op_swap]]
+; CHECK-SPIRV: [[op_plus_uconst_8:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugOperation [[i32_3]] [[i32_8]]
+; CHECK-SPIRV: [[expr_plus_uconst_stack_value:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugExpression [[op_plus_uconst_8]] [[op_stack_value]]
+; CHECK-SPIRV: [[op_fragment:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugOperation [[i32_9]] [[i32_4]] [[i32_12]]
+; CHECK-SPIRV: [[expr_fragment:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugExpression [[op_fragment]]
+; CHECK-SPIRV: [[LOCAL_VAR:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugLocalVariable
+; CHECK-SPIRV: [[DEBUG_VAL:%[0-9]+]] = OpExtInst [[void_type]] {{%[0-9]+}} DebugValue [[LOCAL_VAR]]
+
+; CHECK-OPTION-NOT: DebugOperation
+; CHECK-OPTION-NOT: DebugExpression
+; CHECK-OPTION-NOT: DebugTypeBasic
+; CHECK-OPTION-NOT: DebugTypePointer
+; CHECK-OPTION-NOT: DebugValue
+
+define spir_func void @test(i32 %arg) !dbg !6 {
+entry:
+ %local = add i32 %arg, 1, !dbg !15
+ call void @llvm.dbg.value(metadata i32 %local, metadata !14, metadata !DIExpression(DW_OP_constu, 8, DW_OP_stack_value)), !dbg !15
+ %d1 = bitcast i32 %arg to i32
+ call void @llvm.dbg.value(metadata i32 %local, metadata !14, metadata !DIExpression(DW_OP_deref)), !dbg !15
+ %d2 = bitcast i32 %arg to i32
+ call void @llvm.dbg.value(metadata i32 %local, metadata !14, metadata !DIExpression(DW_OP_plus)), !dbg !15
+ %d3 = bitcast i32 %arg to i32
+ call void @llvm.dbg.value(metadata i32 %local, metadata !14, metadata !DIExpression(DW_OP_minus)), !dbg !15
+ %d4 = bitcast i32 %arg to i32
+ call void @llvm.dbg.value(metadata i32 %local, metadata !14, metadata !DIExpression(DW_OP_xderef)), !dbg !15
+ %d5 = bitcast i32 %arg to i32
+ call void @llvm.dbg.value(metadata i32 %local, metadata !14, metadata !DIExpression(DW_OP_constu, 20, DW_OP_swap)), !dbg !15
+ %d6 = bitcast i32 %arg to i32
+ call void @llvm.dbg.value(metadata i32 %local, metadata !14, metadata !DIExpression(DW_OP_plus_uconst, 8, DW_OP_stack_value)), !dbg !15
+ %d7 = bitcast i32 %arg to i32
+ call void @llvm.dbg.value(metadata i32 %local, metadata !14, metadata !DIExpression(DW_OP_LLVM_fragment, 4, 12)), !dbg !15
+ %d8 = bitcast i32 %arg to i32
+ ret void
+}
+
+declare void @llvm.dbg.value(metadata, metadata, metadata)
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!2, !3, !4, !5}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_SYCL, file: !1, producer: "clang version 18.0.0", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, splitDebugInlining: false, nameTableKind: None)
+!1 = !DIFile(filename: "example.c", directory: "/dir", checksumkind: CSK_MD5, checksum: "0123456789abcdef0123456789abcdef")
+!2 = !{i32 7, !"Dwarf Version", i32 5}
+!3 = !{i32 2, !"Debug Info Version", i32 3}
+!4 = !{i32 1, !"wchar_size", i32 4}
+!5 = !{i32 7, !"frame-pointer", i32 2}
+!6 = distinct !DISubprogram(name: "test", scope: !1, file: !1, line: 1, type: !7, scopeLine: 1, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0)
+!7 = !DISubroutineType(types: !8)
+!8 = !{null, !9}
+!9 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+!14 = !DILocalVariable(name: "local", scope: !6, file: !1, line: 2, type: !9, flags: DIFlagPublic)
+!15 = !DILocation(line: 2, column: 5, scope: !6)
diff --git a/llvm/test/CodeGen/SPIRV/debug-info/debug-qualifier.ll b/llvm/test/CodeGen/SPIRV/debug-info/debug-qualifier.ll
new file mode 100644
index 0000000000000..59da7f167b372
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/debug-info/debug-qualifier.ll
@@ -0,0 +1,54 @@
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-unknown-unknown -stop-after=spirv-nonsemantic-debug-info %s -o - | FileCheck %s --check-prefix=CHECK-MIR
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
+; RUN: llc --verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_KHR_non_semantic_info %s -o - | FileCheck %s --check-prefix=CHECK-OPTION
+; RUN: %if spirv-tools %{ llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+; CHECK-MIR: [[TYPE_VOID:%[0-9]+]]:type(s64) = OpTypeVoid
+; CHECK-MIR: [[TYPE_I32:%[0-9]+]]:type = OpTypeInt 32, 0
+; CHECK-MIR: [[DBG_SOURCE:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 35
+; CHECK-MIR: [[DBG_CU:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 1
+; CHECK-MIR: [[STR_INT:%[0-9]+]]:id(s32) = OpString 7630441
+; CHECK-MIR: [[DBG_BASIC_INT:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 2, [[STR_INT]](s32)
+; CHECK-MIR: [[DBG_QUAL:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 4, [[DBG_BASIC_INT]](s32)
+
+; CHECK-SPIRV: [[int_str:%[0-9]+]] = OpString "int"
+; CHECK-SPIRV: [[a_str:%[0-9]+]] = OpString "a"
+; CHECK-SPIRV-DAG: [[type_void:%[0-9]+]] = OpTypeVoid
+; CHECK-SPIRV-DAG: [[type_i32:%[0-9]+]] = OpTypeInt 32 0
+; CHECK-SPIRV: [[dbg_src:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugSource
+; CHECK-SPIRV: [[dbg_cu:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugCompilationUnit %[[#]] %[[#]] [[dbg_src]]
+; CHECK-SPIRV: [[dbg_int:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugTypeBasic [[int_str]]
+; CHECK-SPIRV: [[dbg_qual:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugTypeQualifier [[dbg_int]]
+
+; CHECK-OPTION-NOT: OpExtInstImport "NonSemantic.Shader.DebugInfo.100"
+
+ at a = dso_local constant i32 10, align 4, !dbg !0
+
+define dso_local i32 @main() !dbg !15 {
+entry:
+ %retval = alloca i32, align 4
+ store i32 0, ptr %retval, align 4
+ ret i32 0, !dbg !18
+}
+
+!llvm.dbg.cu = !{!2}
+!llvm.module.flags = !{!7, !8, !9, !10, !11, !12, !13}
+
+!0 = !DIGlobalVariableExpression(var: !1, expr: !DIExpression())
+!1 = distinct !DIGlobalVariable(name: "a", scope: !2, file: !3, line: 1, type: !5, isLocal: false, isDefinition: true)
+!2 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: !3, producer: "clang version XX.X.XXXX (FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, globals: !4, splitDebugInlining: false, nameTableKind: None)
+!3 = !DIFile(filename: "debugqualifier.c", directory: "/AAAAAAAAAA/BBBBBBBB/CCCCCCCCC", checksumkind: CSK_MD5, checksum: "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF")
+!4 = !{!0}
+!5 = !DIDerivedType(tag: DW_TAG_volatile_type, baseType: !6, flags: DIFlagPublic)
+!6 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed, flags: DIFlagPublic)
+!7 = !{i32 7, !"Dwarf Version", i32 5}
+!8 = !{i32 2, !"Debug Info Version", i32 3}
+!9 = !{i32 1, !"wchar_size", i32 4}
+!10 = !{i32 8, !"PIC Level", i32 2}
+!11 = !{i32 7, !"PIE Level", i32 2}
+!12 = !{i32 7, !"uwtable", i32 2}
+!13 = !{i32 7, !"frame-pointer", i32 2}
+!15 = distinct !DISubprogram(name: "main", scope: !3, file: !3, line: 2, type: !16, scopeLine: 2, spFlags: DISPFlagDefinition, unit: !2, flags: DIFlagPublic)
+!16 = !DISubroutineType(types: !17, flags: DIFlagPublic)
+!17 = !{!6}
+!18 = !DILocation(line: 3, column: 3, scope: !15)
diff --git a/llvm/test/CodeGen/SPIRV/debug-info/debug-scope-noscope-localvariable.ll b/llvm/test/CodeGen/SPIRV/debug-info/debug-scope-noscope-localvariable.ll
new file mode 100644
index 0000000000000..14de2b5f0256a
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/debug-info/debug-scope-noscope-localvariable.ll
@@ -0,0 +1,83 @@
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-unknown-unknown -stop-after=spirv-nonsemantic-debug-info %s -o - | FileCheck %s --check-prefix=CHECK-MIR
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
+; RUN: llc --verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_KHR_non_semantic_info %s -o - | FileCheck %s --check-prefix=CHECK-OPTION
+; RUN: %if spirv-tools %{ llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+; CHECK-MIR: %[[SCOPE_ACT_1:[0-9]+]]:id(s32) = OpExtInst {{%[0-9]+}}(s64), 3, 23, {{%[0-9]+}}(s32)
+; CHECK-MIR: %[[SCOPE_ACT_2:[0-9]+]]:id(s32) = OpExtInst {{%[0-9]+}}(s64), 3, 24
+; CHECK-MIR: %[[VOID_TYPE:[0-9]+]]:type(s64) = OpTypeVoid
+; CHECK-MIR: %[[STR:[0-9]+]]:id(s32) = OpString 7303014
+; CHECK-MIR: %[[MD_FUNC:[0-9]+]]:id(s32) = OpExtInst %[[VOID_TYPE]](s64), 3, 20, %[[STR]](s32)
+; CHECK-MIR: %[[STR_A:[0-9]+]]:id(s32) = OpString 97
+; CHECK-MIR: %[[VAR_A:[0-9]+]]:id(s32) = OpExtInst %[[VOID_TYPE]](s64), 3, 26, %[[STR_A]](s32), {{%[0-9]+}}(s32), {{%[0-9]+}}(s32), {{%[0-9]+}}, {{%[0-9]+}}, %[[MD_FUNC]](s32)
+
+; CHECK-SPIRV: %[[STR_FOO:[0-9]+]] = OpString "foo"
+; CHECK-SPIRV: %[[STR_VAR_A:[0-9]+]] = OpString "a"
+; CHECK-SPIRV: %[[DBG_FUNC_MD:[0-9]+]] = OpExtInst {{%[0-9]+}} %[[#]] DebugFunction %[[#]]
+; CHECK-SPIRV: OpExtInst {{%[0-9]+}} %[[#]] DebugLocalVariable %[[STR_VAR_A]] {{%[0-9]+}} {{%[0-9]+}} {{%[0-9]+}} {{%[0-9]+}} %[[DBG_FUNC_MD]]
+; CHECK-SPIRV: OpExtInst {{%[0-9]+}} %[[#]] DebugScope %[[DBG_FUNC_MD]]
+; CHECK-SPIRV: OpExtInst {{%[0-9]+}} %[[#]] DebugNoScope
+
+; CHECK-OPTION-NOT: DebugScope
+; CHECK-OPTION-NOT: DebugNoScope
+; CHECK-OPTION-NOT: DebugLocalVariable
+
+define dso_local i32 @foo(i32 noundef %0) local_unnamed_addr !dbg !10 {
+ tail call void @llvm.dbg.value(metadata i32 %0, metadata !15, metadata !DIExpression()), !dbg !17
+ %2 = add nsw i32 %0, 1, !dbg !18
+ tail call void @llvm.dbg.value(metadata i32 %2, metadata !16, metadata !DIExpression()), !dbg !17
+ ret i32 %2, !dbg !19
+}
+
+define dso_local i32 @bar(i32 noundef %0) local_unnamed_addr !dbg !20 {
+ tail call void @llvm.dbg.value(metadata i32 %0, metadata !22, metadata !DIExpression()), !dbg !24
+ %2 = shl nsw i32 %0, 1, !dbg !25
+ tail call void @llvm.dbg.value(metadata i32 %2, metadata !23, metadata !DIExpression()), !dbg !24
+ ret i32 %2, !dbg !26
+}
+
+define dso_local noundef i32 @main() local_unnamed_addr !dbg !27 {
+ tail call void @llvm.dbg.value(metadata i32 4, metadata !31, metadata !DIExpression()), !dbg !33
+ tail call void @llvm.dbg.value(metadata i32 8, metadata !32, metadata !DIExpression()), !dbg !33
+ ret i32 12, !dbg !34
+}
+
+declare void @llvm.dbg.value(metadata, metadata, metadata)
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!2, !3, !4, !5, !6, !7, !8}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C11, file: !1, producer: "Ubuntu clang version 18.1.3 (1ubuntu1)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, splitDebugInlining: false, nameTableKind: None)
+!1 = !DIFile(filename: "test.c", directory: "/home/user/Ebin/llvm-project/llvm/test/CodeGen/SPIRV/debug-info", checksumkind: CSK_MD5, checksum: "f10967bf988e0df2d90961fe265242d5")
+!2 = !{i32 7, !"Dwarf Version", i32 5}
+!3 = !{i32 2, !"Debug Info Version", i32 3}
+!4 = !{i32 1, !"wchar_size", i32 4}
+!5 = !{i32 8, !"PIC Level", i32 2}
+!6 = !{i32 7, !"PIE Level", i32 2}
+!7 = !{i32 7, !"uwtable", i32 2}
+!8 = !{i32 7, !"debug-info-assignment-tracking", i1 true}
+!10 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 1, type: !11, scopeLine: 1, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !14)
+!11 = !DISubroutineType(types: !12)
+!12 = !{!13, !13}
+!13 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+!14 = !{!15, !16}
+!15 = !DILocalVariable(name: "a", arg: 1, scope: !10, file: !1, line: 1, type: !13)
+!16 = !DILocalVariable(name: "x", scope: !10, file: !1, line: 2, type: !13)
+!17 = !DILocation(line: 0, scope: !10)
+!18 = !DILocation(line: 2, column: 13, scope: !10)
+!19 = !DILocation(line: 3, column: 3, scope: !10)
+!20 = distinct !DISubprogram(name: "bar", scope: !1, file: !1, line: 6, type: !11, scopeLine: 6, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !21)
+!21 = !{!22, !23}
+!22 = !DILocalVariable(name: "b", arg: 1, scope: !20, file: !1, line: 6, type: !13)
+!23 = !DILocalVariable(name: "y", scope: !20, file: !1, line: 7, type: !13)
+!24 = !DILocation(line: 0, scope: !20)
+!25 = !DILocation(line: 7, column: 13, scope: !20)
+!26 = !DILocation(line: 8, column: 3, scope: !20)
+!27 = distinct !DISubprogram(name: "main", scope: !1, file: !1, line: 11, type: !28, scopeLine: 11, flags: DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !30)
+!28 = !DISubroutineType(types: !29)
+!29 = !{!13}
+!30 = !{!31, !32}
+!31 = !DILocalVariable(name: "v1", scope: !27, file: !1, line: 12, type: !13)
+!32 = !DILocalVariable(name: "v2", scope: !27, file: !1, line: 13, type: !13)
+!33 = !DILocation(line: 0, scope: !27)
+!34 = !DILocation(line: 14, column: 3, scope: !27)
diff --git a/llvm/test/CodeGen/SPIRV/debug-info/debug-source-continued.ll b/llvm/test/CodeGen/SPIRV/debug-info/debug-source-continued.ll
new file mode 100644
index 0000000000000..c634f56311569
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/debug-info/debug-source-continued.ll
@@ -0,0 +1,46 @@
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-unknown-unknown -stop-after=spirv-nonsemantic-debug-info %s -o - | FileCheck %s --check-prefix=CHECK-MIR
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
+; RUN: llc --verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_KHR_non_semantic_info %s -o - | FileCheck %s --check-prefix=CHECK-OPTION
+; RUN: %if spirv-tools %{ llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+; CHECK-MIR-DAG: [[type_void:%[0-9]+]]:type = OpTypeVoid
+; CHECK-MIR-DAG: OpExtInst [[type_void]], 3, 35
+; CHECK-MIR-DAG: OpExtInst [[type_void]], 3, 102
+; CHECK-MIR-DAG: OpExtInst [[type_void]], 3, 102
+
+; CHECK-SPIRV: %[[#ext_inst_non_semantic:]] = OpExtInstImport "NonSemantic.Shader.DebugInfo.100"
+
+; CHECK-SPIRV: %[[#void:]] = OpTypeVoid
+; CHECK-SPIRV: %[[#source:]] = OpExtInst %[[#void]] %[[#ext_inst_non_semantic]] DebugSource
+; CHECK-SPIRV: %[[#sourceCont1:]] = OpExtInst %[[#void]] %[[#ext_inst_non_semantic]] DebugSourceContinued
+; CHECK-SPIRV: %[[#sourceCont2:]] = OpExtInst %[[#void]] %[[#ext_inst_non_semantic]] DebugSourceContinued
+
+; CHECK-OPTION-NOT: OpExtInstImport "NonSemantic.Shader.DebugInfo.100"
+
+define spir_func void @test1() !dbg !9 {
+entry:
+ %a0 = alloca i32, align 4
+ #dbg_declare(ptr %a0, !17, !DIExpression(DW_OP_constu, 0, DW_OP_swap, DW_OP_xderef), !18)
+ store i32 1, ptr %a0, align 4, !dbg !18
+ ret void
+}
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!2, !3, !4, !5}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_Zig, file: !1, producer: "clang version XX.X.XXXX (FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, splitDebugInlining: false, nameTableKind: None)
+!1 = !DIFile(filename: "t.c", directory: "/test", source: "AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA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@@ -0,0 +1,75 @@
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-unknown-unknown -stop-after=spirv-nonsemantic-debug-info %s -o - | FileCheck %s --check-prefix=CHECK-MIR
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
+; RUN: llc --verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_KHR_non_semantic_info %s -o - | FileCheck %s --check-prefix=CHECK-OPTION
+; RUN: %if spirv-tools %{ llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+; CHECK-MIR: [[TYPE_VOID:%[0-9]+]]:type(s64) = OpTypeVoid
+; CHECK-MIR: [[STR:%[0-9]+]]:id(s32) = OpString 1094795567, 1094795585
+; CHECK-MIR: [[DBG_SOURCE:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 35, [[STR]](s32)
+; CHECK-MIR: [[DBG_CU:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 1
+; CHECK-MIR: [[STR_INT:%[0-9]+]]:id(s32) = OpString 7630441
+; CHECK-MIR: [[DBG_INT:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 2, [[STR_INT]](s32)
+; CHECK-MIR: [[DBG_ARRAY1:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 5, [[DBG_INT]](s32)
+; CHECK-MIR: [[DBG_ARRAY2:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 5, [[DBG_INT]](s32)
+; CHECK-MIR: [[DBG_GLOBAL:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 18, {{%[0-9]+}}(s32), [[DBG_ARRAY1]](s32), [[DBG_SOURCE]](s32)
+
+; CHECK-SPIRV: [[int_str:%[0-9]+]] = OpString "int"
+; CHECK-SPIRV-DAG: [[type_void:%[0-9]+]] = OpTypeVoid
+; CHECK-SPIRV: [[dbg_src:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugSource %[[#]]
+; CHECK-SPIRV: [[dbg_cu:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugCompilationUnit %[[#]] %[[#]] [[dbg_src]] %[[#]]
+; CHECK-SPIRV: [[dbg_int:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugTypeBasic [[int_str]] %[[#]] %[[#]] [[flags:%[0-9]+]]
+; CHECK-SPIRV: [[dbg_tarr_1:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugTypeArray [[dbg_int]] %[[#]] %[[#]]
+; CHECK-SPIRV: [[dbg_tarr_2:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugTypeArray [[dbg_int]] %[[#]]
+; CHECK-SPIRV: [[dbg_none:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugInfoNone
+; CHECK-SPIRV: [[dbg_global:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugGlobalVariable %[[#]] [[dbg_tarr_1]] [[dbg_src]] %[[#]] %[[#]] [[dbg_cu]] %[[#]] [[dbg_none]] %[[#]]
+
+; CHECK-OPTION-NOT: OpExtInstImport "NonSemantic.Shader.DebugInfo.100"
+
+ at __const.main.local_array = private unnamed_addr constant [2 x i32] [i32 1, i32 2], align 4
+ at global_array = dso_local global [4 x [3 x i32]] zeroinitializer, align 16, !dbg !0
+define dso_local i32 @main() !dbg !18 {
+
+entry:
+ %retval = alloca i32, align 4
+ %local_array = alloca [2 x i32], align 4
+ store i32 0, ptr %retval, align 4
+ #dbg_declare(ptr %local_array, !22, !DIExpression(), !26)
+ call void @llvm.memcpy.p0.p0.i64(ptr align 4 %local_array, ptr align 4 @__const.main.local_array, i64 8, i1 false), !dbg !26
+ %arrayidx = getelementptr inbounds [2 x i32], ptr %local_array, i64 0, i64 0, !dbg !27
+ %0 = load i32, ptr %arrayidx, align 4, !dbg !27
+ ret i32 %0, !dbg !28
+}
+
+declare void @llvm.memcpy.p0.p0.i64(ptr noalias writeonly captures(none), ptr noalias readonly captures(none), i64, i1 immarg)
+
+!llvm.dbg.cu = !{!2}
+!llvm.module.flags = !{!10, !11, !12, !13, !14, !15, !16}
+
+!0 = !DIGlobalVariableExpression(var: !1, expr: !DIExpression())
+!1 = distinct !DIGlobalVariable(name: "global_array", scope: !2, file: !3, line: 2, type: !5, isLocal: false, isDefinition: true)
+!2 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: !3, producer: "clang version XX.X.XXXX (FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, globals: !4, splitDebugInlining: false, nameTableKind: None)
+!3 = !DIFile(filename: "typearray.c", directory: "/AAAAAAAAAA/BBBBBBBB/CCCCCCCCC", checksumkind: CSK_MD5, checksum: "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF")
+!4 = !{!0}
+!5 = !DICompositeType(tag: DW_TAG_array_type, baseType: !6, size: 384, elements: !7)
+!6 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed, flags: DIFlagPublic)
+!7 = !{!8, !9}
+!8 = !DISubrange(count: 4)
+!9 = !DISubrange(count: 3)
+!10 = !{i32 7, !"Dwarf Version", i32 5}
+!11 = !{i32 2, !"Debug Info Version", i32 3}
+!12 = !{i32 1, !"wchar_size", i32 4}
+!13 = !{i32 8, !"PIC Level", i32 2}
+!14 = !{i32 7, !"PIE Level", i32 2}
+!15 = !{i32 7, !"uwtable", i32 2}
+!16 = !{i32 7, !"frame-pointer", i32 2}
+!18 = distinct !DISubprogram(name: "main", scope: !3, file: !3, line: 4, type: !19, scopeLine: 4, spFlags: DISPFlagDefinition, unit: !2, retainedNodes: !21, flags: DIFlagPublic)
+!19 = !DISubroutineType(types: !20, flags: DIFlagPublic)
+!20 = !{!6}
+!21 = !{}
+!22 = !DILocalVariable(name: "local_array", scope: !18, file: !3, line: 5, type: !23, flags: DIFlagPublic)
+!23 = !DICompositeType(tag: DW_TAG_array_type, baseType: !6, size: 64, elements: !24)
+!24 = !{!25}
+!25 = !DISubrange(count: 2)
+!26 = !DILocation(line: 5, column: 9, scope: !18)
+!27 = !DILocation(line: 6, column: 12, scope: !18)
+!28 = !DILocation(line: 6, column: 5, scope: !18)
diff --git a/llvm/test/CodeGen/SPIRV/debug-info/debug-type-basic.ll b/llvm/test/CodeGen/SPIRV/debug-info/debug-type-basic.ll
index c678d9ce350a2..f0d9eb576dd7e 100644
--- a/llvm/test/CodeGen/SPIRV/debug-info/debug-type-basic.ll
+++ b/llvm/test/CodeGen/SPIRV/debug-info/debug-type-basic.ll
@@ -1,43 +1,44 @@
-; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-unknown-unknown %s -o - 2>&1 | FileCheck %s --check-prefix=CHECK-MIR
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-unknown-unknown -stop-after=spirv-nonsemantic-debug-info %s -o - | FileCheck %s --check-prefix=CHECK-MIR
; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
; RUN: llc --verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_KHR_non_semantic_info %s -o - | FileCheck %s --check-prefix=CHECK-OPTION
; RUN: %if spirv-tools %{ llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
-; CHECK-MIR-DAG: [[type_void:%[0-9]+\:type]] = OpTypeVoid
-; CHECK-MIR-DAG: [[type_i32:%[0-9]+\:type]] = OpTypeInt 32, 0
-; CHECK-MIR-DAG: [[encoding_signedchar:%[0-9]+\:iid\(s32\)]] = OpConstantI [[type_i32]], 5
-; CHECK-MIR-DAG: [[encoding_float:%[0-9]+\:iid\(s32\)]] = OpConstantI [[type_i32]], 3
-; CHECK-MIR-DAG: [[flag_zero:%[0-9]+\:iid\(s32\)]] = OpConstantI [[type_i32]], 0
-; CHECK-MIR-DAG: [[str_bool:%[0-9]+\:id\(s32\)]] = OpString 1819242338, 0
-; CHECK-MIR-DAG: [[size_8bits:%[0-9]+\:iid\(s32\)]] = OpConstantI [[type_i32]], 8
-; CHECK-MIR-DAG: [[encoding_boolean:%[0-9]+\:iid\(s32\)]] = OpConstantI [[type_i32]], 2
-; CHECK-MIR-DAG: OpExtInst [[type_void]], 3, 2, [[str_bool]], [[size_8bits]], [[encoding_boolean]], [[flag_zero]]
-; CHECK-MIR-DAG: [[str_int:%[0-9]+\:id\(s32\)]] = OpString 7630441
-; CHECK-MIR-DAG: [[size_32bits:%[0-9]+\:iid\(s32\)]] = OpConstantI [[type_i32]], 32
-; CHECK-MIR-DAG: [[encoding_signed:%[0-9]+\:iid\(s32\)]] = OpConstantI [[type_i32]], 4
-; CHECK-MIR-DAG: OpExtInst [[type_void]], 3, 2, [[str_int]], [[size_32bits]], [[encoding_signed]], [[flag_zero]]
-; CHECK-MIR-DAG: [[str_short:%[0-9]+\:id\(s32\)]] = OpString 1919903859, 116
-; CHECK-MIR-DAG: [[size_16bits:%[0-9]+\:iid\(s32\)]] = OpConstantI [[type_i32]], 16
-; CHECK-MIR-DAG: OpExtInst [[type_void]], 3, 2, [[str_short]], [[size_16bits]], [[encoding_signed]], [[flag_zero]]
-; CHECK-MIR-DAG: [[str_char:%[0-9]+\:id\(s32\)]] = OpString 1918986339, 0
-; CHECK-MIR-DAG: OpExtInst [[type_void]], 3, 2, [[str_char]], [[size_8bits]], [[encoding_signedchar]], [[flag_zero]]
-; CHECK-MIR-DAG: [[str_long:%[0-9]+\:id\(s32\)]] = OpString 1735290732, 0
-; CHECK-MIR-DAG: [[size_64bits:%[0-9]+\:iid\(s32\)]] = OpConstantI [[type_i32]], 64
-; CHECK-MIR-DAG: OpExtInst [[type_void]], 3, 2, [[str_long]], [[size_64bits]], [[encoding_signed]], [[flag_zero]]
-; CHECK-MIR-DAG: [[str_uint:%[0-9]+\:id\(s32\)]] = OpString 1769172597, 1684368999, 1953392928, 0
-; CHECK-MIR-DAG: [[encoding_unsigned:%[0-9]+\:iid\(s32\)]] = OpConstantI [[type_i32]], 6
-; CHECK-MIR-DAG: OpExtInst [[type_void]], 3, 2, [[str_uint]], [[size_32bits]], [[encoding_unsigned]], [[flag_zero]]
-; CHECK-MIR-DAG: [[str_ushort:%[0-9]+\:id\(s32\)]] = OpString 1769172597, 1684368999, 1869116192, 29810
-; CHECK-MIR-DAG: OpExtInst [[type_void]], 3, 2, [[str_ushort]], [[size_16bits]], [[encoding_unsigned]], [[flag_zero]]
-; CHECK-MIR-DAG: [[str_uchar:%[0-9]+\:id\(s32\)]] = OpString 1769172597, 1684368999, 1634231072, 114
-; CHECK-MIR-DAG: [[encoding_unsignedchar:%[0-9]+\:iid\(s32\)]] = OpConstantI [[type_i32]], 7
-; CHECK-MIR-DAG: OpExtInst [[type_void]], 3, 2, [[str_uchar]], [[size_8bits]], [[encoding_unsignedchar]], [[flag_zero]]
-; CHECK-MIR-DAG: [[str_ulong:%[0-9]+\:id\(s32\)]] = OpString 1769172597, 1684368999, 1852795936, 103
-; CHECK-MIR-DAG: OpExtInst [[type_void]], 3, 2, [[str_ulong]], [[size_64bits]], [[encoding_unsigned]], [[flag_zero]]
-; CHECK-MIR-DAG: [[str_float:%[0-9]+\:id\(s32\)]] = OpString 1634692198, 116
-; CHECK-MIR-DAG: OpExtInst [[type_void]], 3, 2, [[str_float]], [[size_32bits]], [[encoding_float]], [[flag_zero]]
-; CHECK-MIR-DAG: [[str_double:%[0-9]+\:id\(s32\)]] = OpString 1651863396, 25964
-; CHECK-MIR-DAG: OpExtInst [[type_void]], 3, 2, [[str_double]], [[size_64bits]], [[encoding_float]], [[flag_zero]]
+; CHECK-MIR: [[type_void:%[0-9]+]]:type = OpTypeVoid
+; CHECK-MIR: [[type_i32:%[0-9]+]]:type = OpTypeInt 32, 0
+; CHECK-MIR: [[flag_zero:%[0-9]+]]:iid(s32) = OpConstantI [[type_i32]], 0
+; CHECK-MIR: [[encoding_signedchar:%[0-9]+]]:iid(s32) = OpConstantI [[type_i32]], 5
+; CHECK-MIR: [[encoding_float:%[0-9]+]]:iid(s32) = OpConstantI [[type_i32]], 3
+; CHECK-MIR: [[size_8bits:%[0-9]+]]:iid(s32) = OpConstantI [[type_i32]], 8
+; CHECK-MIR: [[encoding_boolean:%[0-9]+]]:iid(s32) = OpConstantI [[type_i32]], 2
+; CHECK-MIR: [[size_32bits:%[0-9]+]]:iid(s32) = OpConstantI [[type_i32]], 32
+; CHECK-MIR: [[encoding_signed:%[0-9]+]]:iid(s32) = OpConstantI [[type_i32]], 4
+; CHECK-MIR: [[size_16bits:%[0-9]+]]:iid(s32) = OpConstantI [[type_i32]], 16
+; CHECK-MIR: [[size_64bits:%[0-9]+]]:iid(s32) = OpConstantI [[type_i32]], 64
+; CHECK-MIR: [[encoding_unsigned:%[0-9]+]]:iid(s32) = OpConstantI [[type_i32]], 6
+; CHECK-MIR: [[encoding_unsignedchar:%[0-9]+]]:iid(s32) = OpConstantI [[type_i32]], 7
+; CHECK-MIR: [[encoding_extra:%[0-9]+]]:iid(s32) = OpConstantI [[type_i32]], 256
+; CHECK-MIR: [[str_bool:%[0-9]+]]:id(s32) = OpString 1819242338, 0
+; CHECK-MIR: OpExtInst [[type_void]], 3, 2, [[str_bool]](s32), [[size_8bits]](s32), [[encoding_boolean]](s32), [[flag_zero]](s32)
+; CHECK-MIR: [[str_int:%[0-9]+]]:id(s32) = OpString 7630441
+; CHECK-MIR: OpExtInst [[type_void]], 3, 2, [[str_int]](s32), [[size_32bits]](s32), [[encoding_signed]](s32), [[flag_zero]](s32)
+; CHECK-MIR: [[str_short:%[0-9]+]]:id(s32) = OpString 1919903859, 116
+; CHECK-MIR: OpExtInst [[type_void]], 3, 2, [[str_short]](s32), [[size_16bits]](s32), [[encoding_signed]](s32), [[flag_zero]](s32)
+; CHECK-MIR: [[str_char:%[0-9]+]]:id(s32) = OpString 1918986339, 0
+; CHECK-MIR: OpExtInst [[type_void]], 3, 2, [[str_char]](s32), [[size_8bits]](s32), [[encoding_signedchar]](s32), [[flag_zero]](s32)
+; CHECK-MIR: [[str_long:%[0-9]+]]:id(s32) = OpString 1735290732, 0
+; CHECK-MIR: OpExtInst [[type_void]], 3, 2, [[str_long]](s32), [[size_64bits]](s32), [[encoding_signed]](s32), [[flag_zero]](s32)
+; CHECK-MIR: [[str_uint:%[0-9]+]]:id(s32) = OpString 1769172597, 1684368999, 1953392928, 0
+; CHECK-MIR: OpExtInst [[type_void]], 3, 2, [[str_uint]](s32), [[size_32bits]](s32), [[encoding_unsigned]](s32), [[flag_zero]](s32)
+; CHECK-MIR: [[str_ushort:%[0-9]+]]:id(s32) = OpString 1769172597, 1684368999, 1869116192, 29810
+; CHECK-MIR: OpExtInst [[type_void]], 3, 2, [[str_ushort]](s32), [[size_16bits]](s32), [[encoding_unsigned]](s32), [[flag_zero]](s32)
+; CHECK-MIR: [[str_uchar:%[0-9]+]]:id(s32) = OpString 1769172597, 1684368999, 1634231072, 114
+; CHECK-MIR: OpExtInst [[type_void]], 3, 2, [[str_uchar]](s32), [[size_8bits]](s32), [[encoding_unsignedchar]](s32), [[flag_zero]](s32)
+; CHECK-MIR: [[str_ulong:%[0-9]+]]:id(s32) = OpString 1769172597, 1684368999, 1852795936, 103
+; CHECK-MIR: OpExtInst [[type_void]], 3, 2, [[str_ulong]](s32), [[size_64bits]](s32), [[encoding_unsigned]](s32), [[flag_zero]](s32)
+; CHECK-MIR: [[str_float:%[0-9]+]]:id(s32) = OpString 1634692198, 116
+; CHECK-MIR: OpExtInst [[type_void]], 3, 2, [[str_float]](s32), [[size_32bits]](s32), [[encoding_float]](s32), [[flag_zero]](s32)
+; CHECK-MIR: [[str_double:%[0-9]+]]:id(s32) = OpString 1651863396, 25964
+; CHECK-MIR: OpExtInst [[type_void]], 3, 2, [[str_double]](s32), [[size_64bits]](s32), [[encoding_float]](s32), [[flag_zero]](s32)
; CHECK-SPIRV: [[ext_inst_non_semantic:%[0-9]+]] = OpExtInstImport "NonSemantic.Shader.DebugInfo.100"
; CHECK-SPIRV-DAG: [[str_bool:%[0-9]+]] = OpString "bool"
@@ -174,60 +175,60 @@ entry:
!11 = !{!12}
!12 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
!13 = !{}
-!14 = !DILocalVariable(name: "b0", scope: !9, file: !1, line: 2, type: !15)
+!14 = !DILocalVariable(name: "b0", scope: !9, file: !1, line: 2, type: !15, flags: DIFlagPublic)
!15 = !DIBasicType(name: "bool", size: 8, encoding: DW_ATE_boolean)
!16 = !DILocation(line: 2, column: 8, scope: !9)
-!17 = !DILocalVariable(name: "a0", scope: !9, file: !1, line: 3, type: !12)
+!17 = !DILocalVariable(name: "a0", scope: !9, file: !1, line: 3, type: !12, flags: DIFlagPublic)
!18 = !DILocation(line: 3, column: 7, scope: !9)
-!19 = !DILocalVariable(name: "s0", scope: !9, file: !1, line: 4, type: !20)
+!19 = !DILocalVariable(name: "s0", scope: !9, file: !1, line: 4, type: !20, flags: DIFlagPublic)
!20 = !DIBasicType(name: "short", size: 16, encoding: DW_ATE_signed)
!21 = !DILocation(line: 4, column: 9, scope: !9)
-!22 = !DILocalVariable(name: "c0", scope: !9, file: !1, line: 5, type: !23)
+!22 = !DILocalVariable(name: "c0", scope: !9, file: !1, line: 5, type: !23, flags: DIFlagPublic)
!23 = !DIBasicType(name: "char", size: 8, encoding: DW_ATE_signed_char)
!24 = !DILocation(line: 5, column: 8, scope: !9)
-!25 = !DILocalVariable(name: "l0", scope: !9, file: !1, line: 6, type: !26)
+!25 = !DILocalVariable(name: "l0", scope: !9, file: !1, line: 6, type: !26, flags: DIFlagPublic)
!26 = !DIBasicType(name: "long", size: 64, encoding: DW_ATE_signed)
!27 = !DILocation(line: 6, column: 8, scope: !9)
-!28 = !DILocalVariable(name: "ua0", scope: !9, file: !1, line: 7, type: !29)
+!28 = !DILocalVariable(name: "ua0", scope: !9, file: !1, line: 7, type: !29, flags: DIFlagPublic)
!29 = !DIBasicType(name: "unsigned int", size: 32, encoding: DW_ATE_unsigned)
!30 = !DILocation(line: 7, column: 16, scope: !9)
-!31 = !DILocalVariable(name: "us0", scope: !9, file: !1, line: 8, type: !32)
+!31 = !DILocalVariable(name: "us0", scope: !9, file: !1, line: 8, type: !32, flags: DIFlagPublic)
!32 = !DIBasicType(name: "unsigned short", size: 16, encoding: DW_ATE_unsigned)
!33 = !DILocation(line: 8, column: 18, scope: !9)
-!34 = !DILocalVariable(name: "uc0", scope: !9, file: !1, line: 9, type: !35)
+!34 = !DILocalVariable(name: "uc0", scope: !9, file: !1, line: 9, type: !35, flags: DIFlagPublic)
!35 = !DIBasicType(name: "unsigned char", size: 8, encoding: DW_ATE_unsigned_char)
!36 = !DILocation(line: 9, column: 17, scope: !9)
-!37 = !DILocalVariable(name: "ul0", scope: !9, file: !1, line: 10, type: !38)
+!37 = !DILocalVariable(name: "ul0", scope: !9, file: !1, line: 10, type: !38, flags: DIFlagPublic)
!38 = !DIBasicType(name: "unsigned long", size: 64, encoding: DW_ATE_unsigned)
!39 = !DILocation(line: 10, column: 17, scope: !9)
-!40 = !DILocalVariable(name: "f0", scope: !9, file: !1, line: 11, type: !41)
+!40 = !DILocalVariable(name: "f0", scope: !9, file: !1, line: 11, type: !41, flags: DIFlagPublic)
!41 = !DIBasicType(name: "float", size: 32, encoding: DW_ATE_float)
!42 = !DILocation(line: 11, column: 9, scope: !9)
-!43 = !DILocalVariable(name: "d0", scope: !9, file: !1, line: 12, type: !44)
+!43 = !DILocalVariable(name: "d0", scope: !9, file: !1, line: 12, type: !44, flags: DIFlagPublic)
!44 = !DIBasicType(name: "double", size: 64, encoding: DW_ATE_float)
!45 = !DILocation(line: 12, column: 10, scope: !9)
!46 = !DILocation(line: 13, column: 3, scope: !9)
!47 = distinct !DISubprogram(name: "test2", linkageName: "YYYY", scope: !1, file: !1, line: 16, type: !10, scopeLine: 16, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !13)
-!48 = !DILocalVariable(name: "b1", scope: !47, file: !1, line: 17, type: !15)
+!48 = !DILocalVariable(name: "b1", scope: !47, file: !1, line: 17, type: !15, flags: DIFlagPublic)
!49 = !DILocation(line: 17, column: 8, scope: !47)
-!50 = !DILocalVariable(name: "a1", scope: !47, file: !1, line: 18, type: !12)
+!50 = !DILocalVariable(name: "a1", scope: !47, file: !1, line: 18, type: !12, flags: DIFlagPublic)
!51 = !DILocation(line: 18, column: 7, scope: !47)
-!52 = !DILocalVariable(name: "s1", scope: !47, file: !1, line: 19, type: !20)
+!52 = !DILocalVariable(name: "s1", scope: !47, file: !1, line: 19, type: !20, flags: DIFlagPublic)
!53 = !DILocation(line: 19, column: 9, scope: !47)
-!54 = !DILocalVariable(name: "c1", scope: !47, file: !1, line: 20, type: !23)
+!54 = !DILocalVariable(name: "c1", scope: !47, file: !1, line: 20, type: !23, flags: DIFlagPublic)
!55 = !DILocation(line: 20, column: 8, scope: !47)
-!56 = !DILocalVariable(name: "l1", scope: !47, file: !1, line: 21, type: !26)
+!56 = !DILocalVariable(name: "l1", scope: !47, file: !1, line: 21, type: !26, flags: DIFlagPublic)
!57 = !DILocation(line: 21, column: 8, scope: !47)
-!58 = !DILocalVariable(name: "ua1", scope: !47, file: !1, line: 22, type: !29)
+!58 = !DILocalVariable(name: "ua1", scope: !47, file: !1, line: 22, type: !29, flags: DIFlagPublic)
!59 = !DILocation(line: 22, column: 16, scope: !47)
-!60 = !DILocalVariable(name: "us1", scope: !47, file: !1, line: 23, type: !32)
+!60 = !DILocalVariable(name: "us1", scope: !47, file: !1, line: 23, type: !32, flags: DIFlagPublic)
!61 = !DILocation(line: 23, column: 18, scope: !47)
-!62 = !DILocalVariable(name: "uc1", scope: !47, file: !1, line: 24, type: !35)
+!62 = !DILocalVariable(name: "uc1", scope: !47, file: !1, line: 24, type: !35, flags: DIFlagPublic)
!63 = !DILocation(line: 24, column: 17, scope: !47)
-!64 = !DILocalVariable(name: "ul1", scope: !47, file: !1, line: 25, type: !38)
+!64 = !DILocalVariable(name: "ul1", scope: !47, file: !1, line: 25, type: !38, flags: DIFlagPublic)
!65 = !DILocation(line: 25, column: 17, scope: !47)
-!66 = !DILocalVariable(name: "f1", scope: !47, file: !1, line: 26, type: !41)
+!66 = !DILocalVariable(name: "f1", scope: !47, file: !1, line: 26, type: !41, flags: DIFlagPublic)
!67 = !DILocation(line: 26, column: 9, scope: !47)
-!68 = !DILocalVariable(name: "d1", scope: !47, file: !1, line: 27, type: !44)
+!68 = !DILocalVariable(name: "d1", scope: !47, file: !1, line: 27, type: !44, flags: DIFlagPublic)
!69 = !DILocation(line: 27, column: 10, scope: !47)
!70 = !DILocation(line: 28, column: 3, scope: !47)
diff --git a/llvm/test/CodeGen/SPIRV/debug-info/debug-type-composite.ll b/llvm/test/CodeGen/SPIRV/debug-info/debug-type-composite.ll
new file mode 100644
index 0000000000000..85cba6939baa3
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/debug-info/debug-type-composite.ll
@@ -0,0 +1,70 @@
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-unknown-unknown -stop-after=spirv-nonsemantic-debug-info %s -o - | FileCheck %s --check-prefix=CHECK-MIR
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
+; RUN: llc --verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_KHR_non_semantic_info %s -o - | FileCheck %s --check-prefix=CHECK-OPTION
+; RUN: %if spirv-tools %{ llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+; CHECK-MIR: [[TYPE_VOID:%[0-9]+]]:type(s64) = OpTypeVoid
+; CHECK-MIR: [[TYPE_I32:%[0-9]+]]:type = OpTypeInt 32, 0
+; CHECK-MIR: [[str:%[0-9]+]]:id(s32) = OpString 1094795567, 1094795585
+; CHECK-MIR: [[DEBUG_SOURCE:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 35, [[str]](s32)
+; CHECK-MIR: [[DEBUG_COMPILATION_UNIT:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 1
+; CHECK-MIR: [[str_76:%[0-9]+]]:id(s32) = OpString 7630441
+; CHECK-MIR: [[DEBUG_TYPE_BASIC:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 2, [[str_76]](s32)
+; CHECK-MIR: [[STR_POINT:%[0-9]+]]:id(s32) = OpString 1852403536, 116
+; CHECK-MIR: [[STR_MEMBER1:%[0-9]+]]:id(s32) = OpString 120
+; CHECK-MIR: [[DEBUG_MEMBER1:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 11, [[STR_MEMBER1]](s32), [[DEBUG_TYPE_BASIC]](s32), [[DEBUG_SOURCE]](s32)
+; CHECK-MIR: [[STR_MEMBER2:%[0-9]+]]:id(s32) = OpString 121
+; CHECK-MIR: [[DEBUG_MEMBER2:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 11, [[STR_MEMBER2]](s32), [[DEBUG_TYPE_BASIC]](s32), [[DEBUG_SOURCE]](s32)
+; CHECK-MIR: [[DEBUG_COMPOSITE_POINT:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 10, [[STR_POINT]](s32), {{%[0-9]+}}, [[DEBUG_SOURCE]](s32), {{%[0-9]+}}(s32), {{%[0-9]+}}, {{%[0-9]+}}(s32), {{%[0-9]+}}(s32), {{%[0-9]+}}(s32), {{%[0-9]+}}(s32), [[DEBUG_MEMBER1]](s32), [[DEBUG_MEMBER2]](s32)
+
+; CHECK-SPIRV: [[point_str:%[0-9]+]] = OpString "Point"
+; CHECK-SPIRV: [[x_str:%[0-9]+]] = OpString "x"
+; CHECK-SPIRV: [[y_str:%[0-9]+]] = OpString "y"
+; CHECK-SPIRV: [[type_void:%[0-9]+]] = OpTypeVoid
+; CHECK-SPIRV: [[dbg_src:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugSource %[[#]]
+; CHECK-SPIRV: [[dbg_cu:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugCompilationUnit %[[#]] %[[#]] [[dbg_src]] %[[#]]
+; CHECK-SPIRV: [[dbg_int:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugTypeBasic
+; CHECK-SPIRV: [[dbg_x:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugTypeMember [[x_str]] [[dbg_int]] [[dbg_src]]
+; CHECK-SPIRV: [[dbg_y:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugTypeMember [[y_str]] [[dbg_int]] [[dbg_src]]
+; CHECK-SPIRV: [[dbg_point:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugTypeComposite [[point_str]] %[[#]] [[dbg_src]] %[[#]] %[[#]] [[dbg_cu]] %[[#]] %[[#]] %[[#]] [[dbg_x]] [[dbg_y]]
+
+; CHECK-OPTION-NOT: OpExtInstImport "NonSemantic.Shader.DebugInfo.100"
+
+%struct.Point = type { i32, i32 }
+ at p = dso_local global %struct.Point zeroinitializer, align 4, !dbg !0
+
+define dso_local noundef i32 @main()!dbg !18 {
+entry:
+ %retval = alloca i32, align 4
+ store i32 0, ptr %retval, align 4
+ store i32 10, ptr @p, align 4, !dbg !21
+ store i32 20, ptr getelementptr inbounds nuw (%struct.Point, ptr @p, i32 0, i32 1), align 4, !dbg !22
+ ret i32 0, !dbg !23
+}
+
+!llvm.dbg.cu = !{!2}
+!llvm.module.flags = !{!10, !11, !12, !13, !14, !15, !16}
+
+!0 = !DIGlobalVariableExpression(var: !1, expr: !DIExpression())
+!1 = distinct !DIGlobalVariable(name: "p", scope: !2, file: !3, line: 7, type: !5, isLocal: false, isDefinition: true)
+!2 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: !3, producer: "clang version XX.X.XXXX (FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, globals: !4, splitDebugInlining: false, nameTableKind: None)
+!3 = !DIFile(filename: "composite.cpp", directory: "/AAAAAAAAAA/BBBBBBBB/CCCCCCCCC", checksumkind: CSK_MD5, checksum: "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF")
+!4 = !{!0}
+!5 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "Point", file: !3, line: 2, size: 64, flags: DIFlagTypePassByValue, elements: !6, identifier: "_ZTS5Point")
+!6 = !{!7, !9}
+!7 = !DIDerivedType(tag: DW_TAG_member, name: "x", scope: !5, file: !3, line: 3, baseType: !8, size: 32, flags: DIFlagPublic)
+!8 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed, flags: DIFlagPublic)
+!9 = !DIDerivedType(tag: DW_TAG_member, name: "y", scope: !5, file: !3, line: 4, baseType: !8, size: 32, offset: 32, flags: DIFlagPublic)
+!10 = !{i32 7, !"Dwarf Version", i32 5}
+!11 = !{i32 2, !"Debug Info Version", i32 3}
+!12 = !{i32 1, !"wchar_size", i32 4}
+!13 = !{i32 8, !"PIC Level", i32 2}
+!14 = !{i32 7, !"PIE Level", i32 2}
+!15 = !{i32 7, !"uwtable", i32 2}
+!16 = !{i32 7, !"frame-pointer", i32 2}
+!18 = distinct !DISubprogram(name: "main", scope: !3, file: !3, line: 8, type: !19, scopeLine: 8, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !2)
+!19 = !DISubroutineType(types: !20, flags: DIFlagPublic)
+!20 = !{!8}
+!21 = !DILocation(line: 9, column: 7, scope: !18)
+!22 = !DILocation(line: 10, column: 7, scope: !18)
+!23 = !DILocation(line: 11, column: 3, scope: !18)
diff --git a/llvm/test/CodeGen/SPIRV/debug-info/debug-type-enum.ll b/llvm/test/CodeGen/SPIRV/debug-info/debug-type-enum.ll
new file mode 100644
index 0000000000000..70c653bf2c85a
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/debug-info/debug-type-enum.ll
@@ -0,0 +1,70 @@
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-unknown-unknown -stop-after=spirv-nonsemantic-debug-info %s -o - | FileCheck %s --check-prefix=CHECK-MIR
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
+; RUN: llc --verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_KHR_non_semantic_info %s -o - | FileCheck %s --check-prefix=CHECK-OPTION
+; RUN: %if spirv-tools %{ llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+; CHECK-MIR: [[C_ONE:%[0-9]+]]:iid = OpConstantI [[TYPE_I32:%[0-9]+]], 1
+; CHECK-MIR: [[TYPE_VOID:%[0-9]+]]:type(s64) = OpTypeVoid
+; CHECK-MIR: [[C_FIVE:%[0-9]+]]:iid(s32) = OpConstantI [[TYPE_I32]], 5
+; CHECK-MIR: [[C_THREE:%[0-9]+]]:iid(s32) = OpConstantI [[TYPE_I32]], 3
+; CHECK-MIR: [[C_THIRTEEN:%[0-9]+]]:iid(s32) = OpConstantI [[TYPE_I32]], 13
+; CHECK-MIR: [[C_THIRTYTWO:%[0-9]+]]:iid(s32) = OpConstantI [[TYPE_I32]], 32
+; CHECK-MIR: [[C_FOUR:%[0-9]+]]:iid(s32) = OpConstantI [[TYPE_I32]], 4
+; CHECK-MIR: [[TYPE_I32]]:type = OpTypeInt 32, 0
+; CHECK-MIR: [[STR:%[0-9]+]]:id(s32) = OpString 1094795567, 1094795585
+; CHECK-MIR: [[DBG_SOURCE:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 35, [[STR]](s32)
+; CHECK-MIR: [[DBG_CU:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 1, [[C_THREE]](s32), [[C_FIVE]](s32), [[DBG_SOURCE]](s32), [[C_THIRTEEN]](s32)
+; CHECK-MIR: [[STR_RED:%[0-9]+]]:id(s32) = OpString 6579538
+; CHECK-MIR: [[STR_GREEN:%[0-9]+]]:id(s32) = OpString 1701147207, 110
+; CHECK-MIR: [[STR_BLUE:%[0-9]+]]:id(s32) = OpString 1702194242, 0
+; CHECK-MIR: [[DBG_ENUM:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 9, {{%[0-9]+}}(s32), {{%[0-9]+}}(s32), [[DBG_SOURCE]](s32), [[C_ONE]], [[C_ONE]], {{%[0-9]+}}(s32), [[C_THIRTYTWO]](s32), [[C_THREE]](s32), [[C_ONE]], [[STR_RED]](s32), {{%[0-9]+}}(s32), [[STR_GREEN]](s32), [[C_FOUR]](s32), [[STR_BLUE]](s32)
+
+; CHECK-SPIRV-DAG: %[[DBG_SRC:[0-9]+]] = OpExtInst %[[VOID:[0-9]+]] {{%[0-9]+}} DebugSource
+; CHECK-SPIRV-DAG: %[[DBG_CU:[0-9]+]] = OpExtInst %[[VOID]] {{%[0-9]+}} DebugCompilationUnit {{%[0-9]+}} {{%[0-9]+}} %[[DBG_SRC]] {{%[0-9]+}}
+; CHECK-SPIRV-DAG: %[[STR_INT:[0-9]+]] = OpString "int"
+; CHECK-SPIRV-DAG: %[[DBG_TY_INT:[0-9]+]] = OpExtInst %[[VOID]] {{%[0-9]+}} DebugTypeBasic %[[STR_INT]] {{%[0-9]+}} {{%[0-9]+}} {{%[0-9]+}}
+; CHECK-SPIRV-DAG: %[[STR_COLOR:[0-9]+]] = OpString "Color"
+; CHECK-SPIRV-DAG: %[[STR_RED:[0-9]+]] = OpString "Red"
+; CHECK-SPIRV-DAG: %[[STR_GREEN:[0-9]+]] = OpString "Green"
+; CHECK-SPIRV-DAG: %[[STR_BLUE:[0-9]+]] = OpString "Blue"
+; CHECK-SPIRV-DAG: %[[DBG_ENUM_COLOR:[0-9]+]] = OpExtInst %[[VOID]] {{%[0-9]+}} DebugTypeEnum %[[STR_COLOR]] %[[DBG_TY_INT]] %[[DBG_SRC]] {{%[0-9]+}} {{%[0-9]+}} %[[DBG_CU]] {{%[0-9]+}} {{%[0-9]+}} {{%[0-9]+}} %[[STR_RED]] {{%[0-9]+}} %[[STR_GREEN]] {{%[0-9]+}} %[[STR_BLUE]]
+
+; CHECK-OPTION-NOT: DebugTypeEnum
+
+ at c = dso_local global i32 1, align 4, !dbg !0
+
+define dso_local noundef i32 @main() !dbg !21 {
+entry:
+ %retval = alloca i32, align 4
+ store i32 0, ptr %retval, align 4
+ %0 = load i32, ptr @c, align 4, !dbg !23
+ ret i32 %0, !dbg !24
+}
+
+!llvm.dbg.cu = !{!2}
+!llvm.module.flags = !{!13, !14, !15, !16, !17, !18, !19}
+
+!0 = !DIGlobalVariableExpression(var: !1, expr: !DIExpression())
+!1 = distinct !DIGlobalVariable(name: "c", scope: !2, file: !3, line: 7, type: !5, isLocal: false, isDefinition: true)
+!2 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: !3, producer: "clang version XX.X.XXXX (FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !4, retainedTypes: !11, globals: !12, splitDebugInlining: false, nameTableKind: None)
+!3 = !DIFile(filename: "example.cpp", directory: "/AAAAAAAAAA/BBBBBBBB/CCCCCCCCC", checksumkind: CSK_MD5, checksum: "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF")
+!4 = !{!5}
+!5 = !DICompositeType(tag: DW_TAG_enumeration_type, name: "Color", file: !3, line: 1, baseType: !6, size: 32, elements: !7, identifier: "_ZTS5Color", flags: DIFlagPublic)
+!6 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed, flags: DIFlagPublic)
+!7 = !{!8, !9, !10}
+!8 = !DIEnumerator(name: "Red", value: 1)
+!9 = !DIEnumerator(name: "Green", value: 2)
+!10 = !DIEnumerator(name: "Blue", value: -4)
+!11 = !{!6}
+!12 = !{!0}
+!13 = !{i32 7, !"Dwarf Version", i32 5}
+!14 = !{i32 2, !"Debug Info Version", i32 3}
+!15 = !{i32 1, !"wchar_size", i32 4}
+!16 = !{i32 8, !"PIC Level", i32 2}
+!17 = !{i32 7, !"PIE Level", i32 2}
+!18 = !{i32 7, !"uwtable", i32 2}
+!19 = !{i32 7, !"frame-pointer", i32 2}
+!21 = distinct !DISubprogram(name: "main", scope: !3, file: !3, line: 9, type: !22, scopeLine: 9, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !2)
+!22 = !DISubroutineType(types: !11, flags: DIFlagPublic)
+!23 = !DILocation(line: 10, column: 29, scope: !21)
+!24 = !DILocation(line: 10, column: 5, scope: !21)
diff --git a/llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll b/llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
index d260c9f94d4ad..259bf4af17904 100644
--- a/llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
+++ b/llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
@@ -1,48 +1,46 @@
-; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-unknown-unknown %s -o - 2>&1 | FileCheck %s --check-prefix=CHECK-MIR
-; RUN: llc --verify-machineinstrs --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-amd-amdhsa %s -o - 2>&1 | FileCheck %s --check-prefix=CHECK-MIR
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-unknown-unknown -stop-after=spirv-nonsemantic-debug-info %s -o - | FileCheck %s --check-prefix=CHECK-MIR
; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
-; RUN: llc --verify-machineinstrs -O0 -mtriple=spirv64-amd-amdhsa %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
; RUN: llc --verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_KHR_non_semantic_info %s -o - | FileCheck %s --check-prefix=CHECK-OPTION
; TODO(#109287): When type is void * the spirv-val raises an error when DebugInfoNone is set as <id> Base Type argument of DebugTypePointer.
; DISABLED: %if spirv-tools %{ llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
-; CHECK-MIR-DAG: [[i32type:%[0-9]+\:type]] = OpTypeInt 32, 0
-; CHECK-MIR-DAG: [[void_type:%[0-9]+\:type\(s64\)]] = OpTypeVoid
-; CHECK-MIR-DAG: [[i32_8:%[0-9]+\:iid]] = OpConstantI [[i32type]], 8{{$}}
-; CHECK-MIR-DAG: [[i32_0:%[0-9]+\:iid(\(s32\))?]] = OpConstantNull [[i32type]]
-; CHECK-MIR-DAG: [[i32_5:%[0-9]+\:iid\(s32\)]] = OpConstantI [[i32type]], 5{{$}}
-; CHECK-MIR-DAG: [[enc_float:%[0-9]+\:iid\(s32\)]] = OpConstantI [[i32type]], 3{{$}}
-; CHECK-MIR-DAG: [[enc_boolean:%[0-9]+\:iid\(s32\)]] = OpConstantI [[i32type]], 2{{$}}
-; CHECK-MIR-DAG: [[bool:%[0-9]+\:id\(s32\)]] = OpExtInst [[void_type]], 3, 2, {{%[0-9]+\:[a-z0-9\(\)]+}}, [[i32_8]], [[enc_boolean]], [[i32_0]]
-; CHECK-MIR-DAG: [[i32_16:%[0-9]+\:iid\(s32\)]] = OpConstantI [[i32type]], 16{{$}}
-; CHECK-MIR-DAG: [[enc_signed:%[0-9]+\:iid\(s32\)]] = OpConstantI [[i32type]], 4{{$}}
-; CHECK-MIR-DAG: [[short:%[0-9]+\:id\(s32\)]] = OpExtInst [[void_type]], 3, 2, {{%[0-9]+\:[a-z0-9\(\)]+}}, [[i32_16]], [[enc_signed]], [[i32_0]]
-; CHECK-MIR-DAG: [[char:%[0-9]+\:id\(s32\)]] = OpExtInst [[void_type]], 3, 2, {{%[0-9]+\:[a-z0-9\(\)]+}}, [[i32_8]], [[i32_5]], [[i32_0]]
-; CHECK-MIR-DAG: [[i32_64:%[0-9]+\:iid\(s32\)]] = OpConstantI [[i32type]], 64{{$}}
-; CHECK-MIR-DAG: [[long:%[0-9]+\:id\(s32\)]] = OpExtInst [[void_type]], 3, 2, {{%[0-9]+\:[a-z0-9\(\)]+}}, [[i32_64]], [[enc_signed]], [[i32_0]]
-; CHECK-MIR-DAG: [[i32_32:%[0-9]+\:iid\(s32\)]] = OpConstantI [[i32type]], 32{{$}}
-; CHECK-MIR-DAG: [[enc_unsigned:%[0-9]+\:iid\(s32\)]] = OpConstantI [[i32type]], 6{{$}}
-; CHECK-MIR-DAG: [[unsigned_int:%[0-9]+\:id\(s32\)]] = OpExtInst [[void_type]], 3, 2, {{%[0-9]+\:[a-z0-9\(\)]+}}, [[i32_32]], [[enc_unsigned]], [[i32_0]]
-; CHECK-MIR-DAG: [[unsigned_short:%[0-9]+\:id\(s32\)]] = OpExtInst [[void_type]], 3, 2, {{%[0-9]+\:[a-z0-9\(\)]+}}, [[i32_16]], [[enc_unsigned]], [[i32_0]]
-; CHECK-MIR-DAG: [[enc_unsigned_char:%[0-9]+\:iid\(s32\)]] = OpConstantI [[i32type]], 7{{$}}
-; CHECK-MIR-DAG: [[unsigned_char:%[0-9]+\:id\(s32\)]] = OpExtInst [[void_type]], 3, 2, {{%[0-9]+\:[a-z0-9\(\)]+}}, [[i32_8]], [[enc_unsigned_char]], [[i32_0]]
-; CHECK-MIR-DAG: [[unsigned_long:%[0-9]+\:id\(s32\)]] = OpExtInst [[void_type]], 3, 2, {{%[0-9]+\:[a-z0-9\(\)]+}}, [[i32_64]], [[enc_unsigned]], [[i32_0]]
-; CHECK-MIR-DAG: [[float:%[0-9]+\:id\(s32\)]] = OpExtInst [[void_type]], 3, 2, {{%[0-9]+\:[a-z0-9\(\)]+}}, [[i32_32]], [[enc_float]], [[i32_0]]
-; CHECK-MIR-DAG: [[double:%[0-9]+\:id\(s32\)]] = OpExtInst [[void_type]], 3, 2, {{%[0-9]+\:[a-z0-9\(\)]+}}, [[i32_64]], [[enc_float]], [[i32_0]]
-; CHECK-MIR-DAG: [[int:%[0-9]+\:id\(s32\)]] = OpExtInst [[void_type]], 3, 2, {{%[0-9]+\:[a-z0-9\(\)]+}}, [[i32_32]], [[enc_signed]], [[i32_0]]
-; CHECK-MIR-DAG: OpExtInst [[void_type]], 3, 3, [[bool]], [[i32_8]], [[i32_0]]
-; CHECK-MIR-DAG: OpExtInst [[void_type]], 3, 3, [[short]], [[i32_8]], [[i32_0]]
-; CHECK-MIR-DAG: OpExtInst [[void_type]], 3, 3, [[char]], [[i32_8]], [[i32_0]]
-; CHECK-MIR-DAG: OpExtInst [[void_type]], 3, 3, [[long]], [[i32_8]], [[i32_0]]
-; CHECK-MIR-DAG: OpExtInst [[void_type]], 3, 3, [[unsigned_int]], [[i32_8]], [[i32_0]]
-; CHECK-MIR-DAG: OpExtInst [[void_type]], 3, 3, [[unsigned_short]], [[i32_8]], [[i32_0]]
-; CHECK-MIR-DAG: OpExtInst [[void_type]], 3, 3, [[unsigned_char]], [[i32_8]], [[i32_0]]
-; CHECK-MIR-DAG: OpExtInst [[void_type]], 3, 3, [[unsigned_long]], [[i32_8]], [[i32_0]]
-; CHECK-MIR-DAG: OpExtInst [[void_type]], 3, 3, [[float]], [[i32_8]], [[i32_0]]
-; CHECK-MIR-DAG: OpExtInst [[void_type]], 3, 3, [[double]], [[i32_8]], [[i32_0]]
-; CHECK-MIR-DAG: OpExtInst [[void_type]], 3, 3, [[int]], [[i32_5]], [[i32_0]]
-; CHECK-MIR-DAG: [[debug_info_none:%[0-9]+\:id\(s32\)]] = OpExtInst [[void_type]], 3, 0
-; CHECK-MIR-DAG: OpExtInst [[void_type]], 3, 3, [[debug_info_none]], [[i32_5]], [[i32_0]]
+; CHECK-MIR-DAG: [[i32type:%[0-9]+]]:type = OpTypeInt 32, 0
+; CHECK-MIR-DAG:[[i32_8:%[0-9]+]]:iid = OpConstantI [[i32type]], 8
+; CHECK-MIR: [[void_type:%[0-9]+]]:type(s64) = OpTypeVoid
+; CHECK-MIR: [[i32_5:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 5
+; CHECK-MIR: [[enc_float:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 3
+; CHECK-MIR: [[i32_32:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 32
+; CHECK-MIR: [[enc_signed:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 4
+; CHECK-MIR: [[enc_boolean:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 2
+; CHECK-MIR: [[i32_16:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 16
+; CHECK-MIR: [[i32_64:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 64
+; CHECK-MIR: [[enc_unsigned:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 6
+; CHECK-MIR: [[enc_unsigned_char:%[0-9]+]]:iid(s32) = OpConstantI [[i32type]], 7
+
+; CHECK-MIR: [[int:%[0-9]+]]:id(s32) = OpExtInst [[void_type]](s64), 3, 2, {{%[0-9]+}}(s32), [[i32_32]](s32), [[enc_signed]](s32)
+; CHECK-MIR: [[bool:%[0-9]+]]:id(s32) = OpExtInst [[void_type]](s64), 3, 2, {{%[0-9]+}}(s32), [[i32_8]], [[enc_boolean]](s32)
+; CHECK-MIR: [[unsigned_short:%[0-9]+]]:id(s32) = OpExtInst [[void_type]](s64), 3, 2, {{%[0-9]+}}(s32), [[i32_16]](s32), [[enc_signed]](s32)
+; CHECK-MIR: [[char:%[0-9]+]]:id(s32) = OpExtInst [[void_type]](s64), 3, 2, {{%[0-9]+}}(s32), [[i32_8]], [[i32_5]](s32)
+; CHECK-MIR: [[long:%[0-9]+]]:id(s32) = OpExtInst [[void_type]](s64), 3, 2, {{%[0-9]+}}(s32), [[i32_64]](s32), [[enc_signed]](s32)
+; CHECK-MIR: [[unsigned_int:%[0-9]+]]:id(s32) = OpExtInst [[void_type]](s64), 3, 2, {{%[0-9]+}}(s32), [[i32_32]](s32), [[enc_unsigned]](s32)
+; CHECK-MIR: [[short:%[0-9]+]]:id(s32) = OpExtInst [[void_type]](s64), 3, 2, {{%[0-9]+}}(s32), [[i32_16]](s32), [[enc_unsigned]](s32)
+; CHECK-MIR: [[unsigned_char:%[0-9]+]]:id(s32) = OpExtInst [[void_type]](s64), 3, 2, {{%[0-9]+}}(s32), [[i32_8]], [[enc_unsigned_char]](s32)
+; CHECK-MIR: [[unsigned_long:%[0-9]+]]:id(s32) = OpExtInst [[void_type]](s64), 3, 2, {{%[0-9]+}}(s32), [[i32_64]](s32), [[enc_unsigned]](s32)
+; CHECK-MIR: [[float:%[0-9]+]]:id(s32) = OpExtInst [[void_type]](s64), 3, 2, {{%[0-9]+}}(s32), [[i32_32]](s32), [[enc_float]](s32)
+; CHECK-MIR: [[double:%[0-9]+]]:id(s32) = OpExtInst [[void_type]](s64), 3, 2, {{%[0-9]+}}(s32), [[i32_64]](s32), [[enc_float]](s32)
+
+; CHECK-MIR: OpExtInst [[void_type]](s64), 3, 3, [[int]](s32), [[i32_5]](s32)
+; CHECK-MIR: [[debug_info_none:%[0-9]+]]:id(s32) = OpExtInst [[void_type]](s64), 3, 0
+; CHECK-MIR: OpExtInst [[void_type]](s64), 3, 3, [[debug_info_none]](s32), [[i32_5]](s32)
+; CHECK-MIR: OpExtInst [[void_type]](s64), 3, 3, [[bool]](s32), [[i32_8]]
+; CHECK-MIR: OpExtInst [[void_type]](s64), 3, 3, [[char]](s32), [[i32_8]]
+; CHECK-MIR: OpExtInst [[void_type]](s64), 3, 3, [[long]](s32), [[i32_8]]
+; CHECK-MIR: OpExtInst [[void_type]](s64), 3, 3, [[unsigned_int]](s32), [[i32_8]]
+; CHECK-MIR: OpExtInst [[void_type]](s64), 3, 3, [[short]](s32), [[i32_8]]
+; CHECK-MIR: OpExtInst [[void_type]](s64), 3, 3, [[unsigned_char]](s32), [[i32_8]]
+; CHECK-MIR: OpExtInst [[void_type]](s64), 3, 3, [[unsigned_long]](s32), [[i32_8]]
+; CHECK-MIR: OpExtInst [[void_type]](s64), 3, 3, [[float]](s32), [[i32_8]]
+; CHECK-MIR: OpExtInst [[void_type]](s64), 3, 3, [[double]](s32), [[i32_8]]
; CHECK-SPIRV: [[i32type:%[0-9]+]] = OpTypeInt 32 0
; CHECK-SPIRV-DAG: [[i32_8:%[0-9]+]] = OpConstant [[i32type]] 8{{$}}
@@ -79,7 +77,7 @@
; CHECK-SPIRV-DAG: OpExtInst {{%[0-9]+ %[0-9]+}} DebugTypePointer [[double]] [[i32_8]] [[i32_0]]
; CHECK-SPIRV-DAG: OpExtInst {{%[0-9]+ %[0-9]+}} DebugTypePointer [[int]] [[i32_5]] [[i32_0]]
; CHECK-SPIRV-DAG: [[debug_info_none:%[0-9]+]] = OpExtInst {{%[0-9]+ %[0-9]+}} DebugInfoNone
-; CHECK-SPIRV-DAG: OpExtInst {{%[0-9]+ %[0-9]+}} DebugTypePointer [[debug_info_none]] [[i32_5]] [[i32_0]]
+; CHECK-SPIRV-DAG: OpExtInst {{%[0-9]+ %[0-9]+}} DebugTypePointer [[debug_info_none]] [[i32_5]]
; CHECK-OPTION-NOT: DebugTypePointer
@@ -202,84 +200,84 @@ define spir_func i32 @test1() !dbg !72 {
!18 = !DISubroutineType(cc: DW_CC_LLVM_SpirFunction, types: !19)
!19 = !{!9}
!20 = !{}
-!21 = !DILocalVariable(name: "bp0", scope: !17, file: !3, line: 6, type: !22)
+!21 = !DILocalVariable(name: "bp0", scope: !17, file: !3, line: 6, type: !22, flags: DIFlagPublic)
!22 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !23, size: 32, dwarfAddressSpace: 4)
!23 = !DIBasicType(name: "bool", size: 8, encoding: DW_ATE_boolean)
!24 = !DILocation(line: 6, column: 9, scope: !17)
-!25 = !DILocalVariable(name: "sp0", scope: !17, file: !3, line: 7, type: !26)
+!25 = !DILocalVariable(name: "sp0", scope: !17, file: !3, line: 7, type: !26, flags: DIFlagPublic)
!26 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !27, size: 32, dwarfAddressSpace: 4)
!27 = !DIBasicType(name: "short", size: 16, encoding: DW_ATE_signed)
!28 = !DILocation(line: 7, column: 10, scope: !17)
-!29 = !DILocalVariable(name: "cp0", scope: !17, file: !3, line: 8, type: !30)
+!29 = !DILocalVariable(name: "cp0", scope: !17, file: !3, line: 8, type: !30, flags: DIFlagPublic)
!30 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !31, size: 32, dwarfAddressSpace: 4)
!31 = !DIBasicType(name: "char", size: 8, encoding: DW_ATE_signed_char)
!32 = !DILocation(line: 8, column: 9, scope: !17)
-!33 = !DILocalVariable(name: "lp0", scope: !17, file: !3, line: 9, type: !34)
+!33 = !DILocalVariable(name: "lp0", scope: !17, file: !3, line: 9, type: !34, flags: DIFlagPublic)
!34 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !35, size: 32, dwarfAddressSpace: 4)
!35 = !DIBasicType(name: "long", size: 64, encoding: DW_ATE_signed)
!36 = !DILocation(line: 9, column: 9, scope: !17)
-!37 = !DILocalVariable(name: "uip0", scope: !17, file: !3, line: 10, type: !38)
+!37 = !DILocalVariable(name: "uip0", scope: !17, file: !3, line: 10, type: !38, flags: DIFlagPublic)
!38 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !39, size: 32, dwarfAddressSpace: 4)
!39 = !DIBasicType(name: "unsigned int", size: 32, encoding: DW_ATE_unsigned)
!40 = !DILocation(line: 10, column: 17, scope: !17)
-!41 = !DILocalVariable(name: "usp0", scope: !17, file: !3, line: 11, type: !42)
+!41 = !DILocalVariable(name: "usp0", scope: !17, file: !3, line: 11, type: !42, flags: DIFlagPublic)
!42 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !43, size: 32, dwarfAddressSpace: 4)
!43 = !DIBasicType(name: "unsigned short", size: 16, encoding: DW_ATE_unsigned)
!44 = !DILocation(line: 11, column: 19, scope: !17)
-!45 = !DILocalVariable(name: "ucp0", scope: !17, file: !3, line: 12, type: !46)
+!45 = !DILocalVariable(name: "ucp0", scope: !17, file: !3, line: 12, type: !46, flags: DIFlagPublic)
!46 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !47, size: 32, dwarfAddressSpace: 4)
!47 = !DIBasicType(name: "unsigned char", size: 8, encoding: DW_ATE_unsigned_char)
!48 = !DILocation(line: 12, column: 18, scope: !17)
-!49 = !DILocalVariable(name: "ulp0", scope: !17, file: !3, line: 13, type: !50)
+!49 = !DILocalVariable(name: "ulp0", scope: !17, file: !3, line: 13, type: !50, flags: DIFlagPublic)
!50 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !51, size: 32, dwarfAddressSpace: 4)
!51 = !DIBasicType(name: "unsigned long", size: 64, encoding: DW_ATE_unsigned)
!52 = !DILocation(line: 13, column: 18, scope: !17)
-!53 = !DILocalVariable(name: "fp0", scope: !17, file: !3, line: 14, type: !54)
+!53 = !DILocalVariable(name: "fp0", scope: !17, file: !3, line: 14, type: !54, flags: DIFlagPublic)
!54 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !55, size: 32, dwarfAddressSpace: 4)
!55 = !DIBasicType(name: "float", size: 32, encoding: DW_ATE_float)
!56 = !DILocation(line: 14, column: 10, scope: !17)
-!57 = !DILocalVariable(name: "dp0", scope: !17, file: !3, line: 15, type: !58)
+!57 = !DILocalVariable(name: "dp0", scope: !17, file: !3, line: 15, type: !58, flags: DIFlagPublic)
!58 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !59, size: 32, dwarfAddressSpace: 4)
!59 = !DIBasicType(name: "double", size: 64, encoding: DW_ATE_float)
!60 = !DILocation(line: 15, column: 11, scope: !17)
-!61 = !DILocalVariable(name: "ip0", scope: !17, file: !3, line: 16, type: !8)
+!61 = !DILocalVariable(name: "ip0", scope: !17, file: !3, line: 16, type: !8, flags: DIFlagPublic)
!62 = !DILocation(line: 16, column: 8, scope: !17)
-!63 = !DILocalVariable(name: "addr0", scope: !17, file: !3, line: 17, type: !7)
+!63 = !DILocalVariable(name: "addr0", scope: !17, file: !3, line: 17, type: !7, flags: DIFlagPublic)
!64 = !DILocation(line: 17, column: 9, scope: !17)
!65 = !DILocation(line: 17, column: 17, scope: !17)
-!66 = !DILocalVariable(name: "arr0", scope: !17, file: !3, line: 18, type: !67)
+!66 = !DILocalVariable(name: "arr0", scope: !17, file: !3, line: 18, type: !67, flags: DIFlagPublic)
!67 = !DICompositeType(tag: DW_TAG_array_type, baseType: !9, size: 256, elements: !68)
!68 = !{!69}
!69 = !DISubrange(count: 8)
!70 = !DILocation(line: 18, column: 7, scope: !17)
!71 = !DILocation(line: 19, column: 3, scope: !17)
!72 = distinct !DISubprogram(name: "test1", linkageName: "test1", scope: !3, file: !3, line: 22, type: !18, scopeLine: 22, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !2, retainedNodes: !20)
-!73 = !DILocalVariable(name: "bp1", scope: !72, file: !3, line: 23, type: !22)
+!73 = !DILocalVariable(name: "bp1", scope: !72, file: !3, line: 23, type: !22, flags: DIFlagPublic)
!74 = !DILocation(line: 23, column: 9, scope: !72)
-!75 = !DILocalVariable(name: "sp1", scope: !72, file: !3, line: 24, type: !26)
+!75 = !DILocalVariable(name: "sp1", scope: !72, file: !3, line: 24, type: !26, flags: DIFlagPublic)
!76 = !DILocation(line: 24, column: 10, scope: !72)
-!77 = !DILocalVariable(name: "cp1", scope: !72, file: !3, line: 25, type: !30)
+!77 = !DILocalVariable(name: "cp1", scope: !72, file: !3, line: 25, type: !30, flags: DIFlagPublic)
!78 = !DILocation(line: 25, column: 9, scope: !72)
-!79 = !DILocalVariable(name: "lp1", scope: !72, file: !3, line: 26, type: !34)
+!79 = !DILocalVariable(name: "lp1", scope: !72, file: !3, line: 26, type: !34, flags: DIFlagPublic)
!80 = !DILocation(line: 26, column: 9, scope: !72)
-!81 = !DILocalVariable(name: "uip1", scope: !72, file: !3, line: 27, type: !38)
+!81 = !DILocalVariable(name: "uip1", scope: !72, file: !3, line: 27, type: !38, flags: DIFlagPublic)
!82 = !DILocation(line: 27, column: 17, scope: !72)
-!83 = !DILocalVariable(name: "usp1", scope: !72, file: !3, line: 28, type: !42)
+!83 = !DILocalVariable(name: "usp1", scope: !72, file: !3, line: 28, type: !42, flags: DIFlagPublic)
!84 = !DILocation(line: 28, column: 19, scope: !72)
-!85 = !DILocalVariable(name: "ucp1", scope: !72, file: !3, line: 29, type: !46)
+!85 = !DILocalVariable(name: "ucp1", scope: !72, file: !3, line: 29, type: !46, flags: DIFlagPublic)
!86 = !DILocation(line: 29, column: 18, scope: !72)
-!87 = !DILocalVariable(name: "ulp1", scope: !72, file: !3, line: 30, type: !50)
+!87 = !DILocalVariable(name: "ulp1", scope: !72, file: !3, line: 30, type: !50, flags: DIFlagPublic)
!88 = !DILocation(line: 30, column: 18, scope: !72)
-!89 = !DILocalVariable(name: "fp1", scope: !72, file: !3, line: 31, type: !54)
+!89 = !DILocalVariable(name: "fp1", scope: !72, file: !3, line: 31, type: !54, flags: DIFlagPublic)
!90 = !DILocation(line: 31, column: 10, scope: !72)
-!91 = !DILocalVariable(name: "dp1", scope: !72, file: !3, line: 32, type: !58)
+!91 = !DILocalVariable(name: "dp1", scope: !72, file: !3, line: 32, type: !58, flags: DIFlagPublic)
!92 = !DILocation(line: 32, column: 11, scope: !72)
-!93 = !DILocalVariable(name: "ip1", scope: !72, file: !3, line: 33, type: !8)
+!93 = !DILocalVariable(name: "ip1", scope: !72, file: !3, line: 33, type: !8, flags: DIFlagPublic)
!94 = !DILocation(line: 33, column: 8, scope: !72)
-!95 = !DILocalVariable(name: "addr1", scope: !72, file: !3, line: 34, type: !7)
+!95 = !DILocalVariable(name: "addr1", scope: !72, file: !3, line: 34, type: !7, flags: DIFlagPublic)
!96 = !DILocation(line: 34, column: 9, scope: !72)
!97 = !DILocation(line: 34, column: 17, scope: !72)
-!98 = !DILocalVariable(name: "arr1", scope: !72, file: !3, line: 35, type: !67)
+!98 = !DILocalVariable(name: "arr1", scope: !72, file: !3, line: 35, type: !67, flags: DIFlagPublic)
!99 = !DILocation(line: 35, column: 7, scope: !72)
!100 = !DILocation(line: 36, column: 3, scope: !72)
!101 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !67, size: 32, dwarfAddressSpace: 4)
diff --git a/llvm/test/CodeGen/SPIRV/debug-info/debug-type-ptrtomember.ll b/llvm/test/CodeGen/SPIRV/debug-info/debug-type-ptrtomember.ll
new file mode 100644
index 0000000000000..c4653986d8e97
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/debug-info/debug-type-ptrtomember.ll
@@ -0,0 +1,74 @@
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-unknown-unknown -stop-after=spirv-nonsemantic-debug-info %s -o - | FileCheck %s --check-prefix=CHECK-MIR
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
+; RUN: llc --verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_KHR_non_semantic_info %s -o - | FileCheck %s --check-prefix=CHECK-OPTION
+; RUN: %if spirv-tools %{ llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+; CHECK-MIR: [[TYPE_VOID:%[0-9]+]]:type(s64) = OpTypeVoid
+; CHECK-MIR: [[DBG_SOURCE:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 35
+; CHECK-MIR: [[DBG_CU:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 1
+; CHECK-MIR: [[STR_INT:%[0-9]+]]:id(s32) = OpString 7630441
+; CHECK-MIR: [[DBG_INT:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 2, [[STR_INT]](s32)
+; CHECK-MIR: [[STR_S:%[0-9]+]]:id(s32) = OpString 97
+; CHECK-MIR: [[DBG_VAR_S:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 11, [[STR_S]](s32), [[DBG_INT]](s32), [[DBG_SOURCE]](s32)
+; CHECK-MIR: [[DBG_FUNC:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 10, {{%[0-9]+}}(s32), {{%[0-9]+}}(s32), [[DBG_SOURCE]](s32)
+; CHECK-MIR: [[dbg_global1:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 13, [[DBG_INT]](s32), [[DBG_FUNC]](s32)
+
+; CHECK-SPIRV-DAG: [[int_str:%[0-9]+]] = OpString "int"
+; CHECK-SPIRV-DAG: [[struct_str:%[0-9]+]] = OpString "S"
+; CHECK-SPIRV-DAG: [[member_a_str:%[0-9]+]] = OpString "a"
+; CHECK-SPIRV-DAG: [[ptr_str:%[0-9]+]] = OpString "ptr"
+; CHECK-SPIRV: [[dbg_src:%[0-9]+]] = OpExtInst [[void_ty:%[0-9]+]] %[[#]] DebugSource %[[#]]
+; CHECK-SPIRV: [[dbg_cu:%[0-9]+]] = OpExtInst [[void_ty]] %[[#]] DebugCompilationUnit %[[#]] %[[#]] [[dbg_src]] %[[#]]
+; CHECK-SPIRV: [[dbg_int:%[0-9]+]] = OpExtInst [[void_ty]] %[[#]] DebugTypeBasic [[int_str]] %[[#]] %[[#]] %[[#]]
+; CHECK-SPIRV: [[dbg_member:%[0-9]+]] = OpExtInst [[void_ty]] %[[#]] DebugTypeMember [[member_a_str]] [[dbg_int]] [[dbg_src]] %[[#]] %[[#]] %[[#]] %[[#]] %[[#]]
+; CHECK-SPIRV: [[dbg_struct:%[0-9]+]] = OpExtInst [[void_ty]] %[[#]] DebugTypeComposite [[struct_str]] %[[#]] [[dbg_src]] %[[#]] %[[#]] [[dbg_cu]] %[[#]] %[[#]] %[[#]] [[dbg_member]]
+; CHECK-SPIRV: [[dbg_ptr:%[0-9]+]] = OpExtInst [[void_ty]] %[[#]] DebugTypePtrToMember [[dbg_int]] [[dbg_struct]]
+
+; CHECK-OPTION-NOT: OpExtInstImport "NonSemantic.Shader.DebugInfo.100"
+
+%struct.S = type { i32 }
+ at ptr = dso_local global i64 0, align 8, !dbg !0
+ at __const._Z3usev.s = private unnamed_addr constant %struct.S { i32 42 }, align 4
+
+define dso_local noundef i32 @_Z3usev() !dbg !18 {
+entry:
+ %s = alloca %struct.S, align 4
+ #dbg_declare(ptr %s, !22, !DIExpression(), !23)
+ call void @llvm.memcpy.p0.p0.i64(ptr align 4 %s, ptr align 4 @__const._Z3usev.s, i64 4, i1 false), !dbg !23
+ %0 = load i64, ptr @ptr, align 8, !dbg !24
+ %memptr.offset = getelementptr inbounds i8, ptr %s, i64 %0, !dbg !25
+ %1 = load i32, ptr %memptr.offset, align 4, !dbg !25
+ ret i32 %1, !dbg !26
+}
+
+declare void @llvm.memcpy.p0.p0.i64(ptr noalias writeonly captures(none), ptr noalias readonly captures(none), i64, i1 immarg)
+
+!llvm.dbg.cu = !{!2}
+!llvm.module.flags = !{!10, !11, !12, !13, !14, !15, !16}
+
+!0 = !DIGlobalVariableExpression(var: !1, expr: !DIExpression())
+!1 = distinct !DIGlobalVariable(name: "ptr", scope: !2, file: !3, line: 7, type: !5, isLocal: false, isDefinition: true)
+!2 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: !3, producer: "clang version XX.X.XXXX (FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, globals: !4, splitDebugInlining: false, nameTableKind: None)
+!3 = !DIFile(filename: "ptrtomember.cpp", directory: "/AAAAAAAAAA/BBBBBBBB/CCCCCCCCC", checksumkind: CSK_MD5, checksum: "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF")
+!4 = !{!0}
+!5 = !DIDerivedType(tag: DW_TAG_ptr_to_member_type, baseType: !6, size: 64, extraData: !7)
+!6 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+!7 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "S", file: !3, line: 3, size: 32, flags: DIFlagTypePassByValue, elements: !8, identifier: "_ZTS1S")
+!8 = !{!9}
+!9 = !DIDerivedType(tag: DW_TAG_member, name: "a", scope: !7, file: !3, line: 4, baseType: !6, size: 32)
+!10 = !{i32 7, !"Dwarf Version", i32 5}
+!11 = !{i32 2, !"Debug Info Version", i32 3}
+!12 = !{i32 1, !"wchar_size", i32 4}
+!13 = !{i32 8, !"PIC Level", i32 2}
+!14 = !{i32 7, !"PIE Level", i32 2}
+!15 = !{i32 7, !"uwtable", i32 2}
+!16 = !{i32 7, !"frame-pointer", i32 2}
+!18 = distinct !DISubprogram(name: "use", linkageName: "_Z3usev", scope: !3, file: !3, line: 9, type: !19, scopeLine: 9, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !2, retainedNodes: !21)
+!19 = !DISubroutineType(types: !20, flags: DIFlagPublic)
+!20 = !{!6}
+!21 = !{}
+!22 = !DILocalVariable(name: "s", scope: !18, file: !3, line: 10, type: !7, flags: DIFlagPublic)
+!23 = !DILocation(line: 10, column: 5, scope: !18)
+!24 = !DILocation(line: 11, column: 13, scope: !18)
+!25 = !DILocation(line: 11, column: 11, scope: !18)
+!26 = !DILocation(line: 11, column: 3, scope: !18)
diff --git a/llvm/test/CodeGen/SPIRV/debug-info/debug-type-template.ll b/llvm/test/CodeGen/SPIRV/debug-info/debug-type-template.ll
new file mode 100644
index 0000000000000..c18a1028f2bdb
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/debug-info/debug-type-template.ll
@@ -0,0 +1,80 @@
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-unknown-unknown -stop-after=spirv-nonsemantic-debug-info %s -o - | FileCheck %s --check-prefix=CHECK-MIR
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
+; RUN: llc --verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_KHR_non_semantic_info %s -o - | FileCheck %s --check-prefix=CHECK-OPTION
+; RUN: %if spirv-tools %{ llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+; CHECK-MIR: [[VOID:%[0-9]+]]:type(s64) = OpTypeVoid
+; CHECK-MIR: [[I32:%[0-9]+]]:type = OpTypeInt 32, 0
+; CHECK-MIR: [[STR:%[0-9]+]]:id(s32) = OpString 1094795567, 1094795585
+; CHECK-MIR: [[DBG_SOURCE:%[0-9]+]]:id(s32) = OpExtInst [[VOID]](s64), 3, 35, [[STR]](s32)
+; CHECK-MIR: [[DBG_CU:%[0-9]+]]:id(s32) = OpExtInst [[VOID]](s64), 3, 1
+; CHECK-MIR: [[STR_INT:%[0-9]+]]:id(s32) = OpString 7630441
+; CHECK-MIR: [[DBG_INT:%[0-9]+]]:id(s32) = OpExtInst [[VOID]](s64), 3, 2, [[STR_INT]](s32)
+; CHECK-MIR: [[DBG_ARRAY:%[0-9]+]]:id(s32) = OpExtInst [[VOID]](s64), 3, 5, [[DBG_INT]](s32), {{%[0-9]+}}
+; CHECK-MIR: [[STR_STRUCT:%[0-9]+]]:id(s32) = OpString 1635017060, 0
+; CHECK-MIR: [[DBG_STRUCT:%[0-9]+]]:id(s32) = OpExtInst [[VOID]](s64), 3, 11, [[STR_STRUCT]](s32), [[DBG_ARRAY]](s32), [[DBG_SOURCE]](s32), {{%[0-9]+}}
+; CHECK-MIR: [[DBG_FUNC:%[0-9]+]]:id(s32) = OpExtInst [[VOID]](s64), 3, 10, {{%[0-9]+}}(s32), {{%[0-9]+}}(s32), [[DBG_SOURCE]](s32)
+; CHECK-MIR: [[DBG_INFO:%[0-9]+]]:id(s32) = OpExtInst [[VOID]](s64), 3, 0
+; CHECK-MIR: [[DBG_TEMPL:%[0-9]+]]:id(s32) = OpExtInst [[VOID]](s64), 3, 15, {{%[0-9]+}}(s32), {{%[0-9]+}}(s32), [[DBG_INFO]](s32)
+; CHECK-MIR: [[STR_X:%[0-9]+]]:id(s32) = OpString 78
+; CHECK-MIR: [[DBG_X:%[0-9]+]]:id(s32) = OpExtInst [[VOID]](s64), 3, 15, [[STR_X]](s32), [[DBG_INT]](s32)
+; CHECK-MIR: [[DBG_COMPOSITE:%[0-9]+]]:id(s32) = OpExtInst [[VOID]](s64), 3, 14, [[DBG_FUNC]](s32), [[DBG_TEMPL]](s32), [[DBG_X]](s32)
+
+; CHECK-SPIRV: [[data_str:%[0-9]+]] = OpString "data"
+; CHECK-SPIRV: [[T_str:%[0-9]+]] = OpString "T"
+; CHECK-SPIRV: [[N_str:%[0-9]+]] = OpString "N"
+; CHECK-SPIRV: [[fa_global_str:%[0-9]+]] = OpString "fa_global"
+; CHECK-SPIRV-DAG: [[type_int:%[0-9]+]] = OpTypeInt 32 0
+; CHECK-SPIRV-DAG: [[type_void:%[0-9]+]] = OpTypeVoid
+; CHECK-SPIRV: [[dbg_src:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugSource %[[#]]
+; CHECK-SPIRV: [[dbg_cu:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugCompilationUnit %[[#]] %[[#]] [[dbg_src]] %[[#]]
+; CHECK-SPIRV: [[dbg_int:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugTypeBasic %[[#]] %[[#]] %[[#]] %[[#]]
+; CHECK-SPIRV: [[dbg_arr:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugTypeArray [[dbg_int]] %[[#]]
+; CHECK-SPIRV: [[dbg_member:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugTypeMember [[data_str]] [[dbg_arr]] [[dbg_src]] %[[#]] %[[#]] %[[#]] %[[#]] %[[#]]
+; CHECK-SPIRV: [[dbg_comp:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugTypeComposite %[[#]] %[[#]] [[dbg_src]] %[[#]] %[[#]] [[dbg_cu]] %[[#]] %[[#]] %[[#]] [[dbg_member]]
+; CHECK-SPIRV: [[dbg_none_1:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugInfoNone
+; CHECK-SPIRV: [[dbg_tparam_T:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugTypeTemplateParameter [[T_str]] [[dbg_int]] [[dbg_none_1]] [[dbg_src]] %[[#]] %[[#]]
+; CHECK-SPIRV: [[dbg_tparam_N:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugTypeTemplateParameter [[N_str]] [[dbg_int]] %[[#]] [[dbg_src]] %[[#]] %[[#]]
+; CHECK-SPIRV: [[dbg_templ_1:%[0-9]+]] = OpExtInst [[type_void]] %[[#]] DebugTypeTemplate [[dbg_comp]] [[dbg_tparam_T]] [[dbg_tparam_N]]
+
+; CHECK-OPTION-NOT: OpExtInstImport "NonSemantic.Shader.DebugInfo.100"
+
+%struct.FixedArray = type { [10 x i32] }
+ at fa_global = dso_local global %struct.FixedArray zeroinitializer, align 4, !dbg !0
+
+define dso_local noundef i32 @main() !dbg !23 {
+entry:
+ %retval = alloca i32, align 4
+ store i32 0, ptr %retval, align 4
+ ret i32 0, !dbg !26
+}
+
+!llvm.dbg.cu = !{!2}
+!llvm.module.flags = !{!15, !16, !17, !18, !19, !20, !21}
+
+!0 = !DIGlobalVariableExpression(var: !1, expr: !DIExpression())
+!1 = distinct !DIGlobalVariable(name: "fa_global", scope: !2, file: !3, line: 8, type: !5, isLocal: false, isDefinition: true)
+!2 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: !3, producer: "clang version XX.X.XXXX (FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, globals: !4, splitDebugInlining: false, nameTableKind: None)
+!3 = !DIFile(filename: "template.cpp", directory: "/AAAAAAAAAA/BBBBBBBB/CCCCCCCCC", checksumkind: CSK_MD5, checksum: "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF")
+!4 = !{!0}
+!5 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "FixedArray<int, 10>", file: !3, line: 4, size: 320, flags: DIFlagTypePassByValue, elements: !6, templateParams: !12, identifier: "_ZTS10FixedArrayIiLi10EE")
+!6 = !{!7}
+!7 = !DIDerivedType(tag: DW_TAG_member, name: "data", scope: !5, file: !3, line: 5, baseType: !8, size: 320, flags: DIFlagPublic)
+!8 = !DICompositeType(tag: DW_TAG_array_type, baseType: !9, size: 320, elements: !10)
+!9 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed, flags: DIFlagPublic)
+!10 = !{!11}
+!11 = !DISubrange(count: 10)
+!12 = !{!13, !14}
+!13 = !DITemplateTypeParameter(name: "T", type: !9)
+!14 = !DITemplateValueParameter(name: "N", type: !9, value: i32 10)
+!15 = !{i32 7, !"Dwarf Version", i32 5}
+!16 = !{i32 2, !"Debug Info Version", i32 3}
+!17 = !{i32 1, !"wchar_size", i32 4}
+!18 = !{i32 8, !"PIC Level", i32 2}
+!19 = !{i32 7, !"PIE Level", i32 2}
+!20 = !{i32 7, !"uwtable", i32 2}
+!21 = !{i32 7, !"frame-pointer", i32 2}
+!23 = distinct !DISubprogram(name: "main", scope: !3, file: !3, line: 10, type: !24, scopeLine: 10, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !2)
+!24 = !DISubroutineType(types: !25, flags: DIFlagPublic)
+!25 = !{!9}
+!26 = !DILocation(line: 11, column: 3, scope: !23)
diff --git a/llvm/test/CodeGen/SPIRV/debug-info/debug-typedef.ll b/llvm/test/CodeGen/SPIRV/debug-info/debug-typedef.ll
new file mode 100644
index 0000000000000..b799e447fe810
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/debug-info/debug-typedef.ll
@@ -0,0 +1,85 @@
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-unknown-unknown -stop-after=spirv-nonsemantic-debug-info %s -o - | FileCheck %s --check-prefix=CHECK-MIR
+; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
+; RUN: llc --verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_KHR_non_semantic_info %s -o - | FileCheck %s --check-prefix=CHECK-OPTION
+; RUN: %if spirv-tools %{ llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+; CHECK-MIR: [[TYPE_I32:%[0-9]+]]:type = OpTypeInt 32, 0
+; CHECK-MIR: [[TYPE_VOID:%[0-9]+]]:type(s64) = OpTypeVoid
+; CHECK-MIR: [[DBG_SOURCE:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 35
+; CHECK-MIR: [[DBG_CU:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 1
+; CHECK-MIR: [[STR_INT:%[0-9]+]]:id(s32) = OpString 7630441
+; CHECK-MIR: [[DBG_INT:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 2, [[STR_INT]](s32)
+; CHECK-MIR: [[STR_TYPEDEF:%[0-9]+]]:id(s32) = OpString 1852406125, 116
+; CHECK-MIR: [[DBG_TYPEDEF:%[0-9]+]]:id(s32) = OpExtInst [[TYPE_VOID]](s64), 3, 7, [[STR_TYPEDEF]](s32), [[DBG_INT]](s32), [[DBG_SOURCE]](s32)
+
+; CHECK-SPIRV-DAG: [[int_str:%[0-9]+]] = OpString "int"
+; CHECK-SPIRV-DAG: [[typedef_str:%[0-9]+]] = OpString "myint"
+; CHECK-SPIRV: [[dbg_src:%[0-9]+]] = OpExtInst [[void_ty:%[0-9]+]] %[[#]] DebugSource
+; CHECK-SPIRV: OpExtInst [[void_ty]] %[[#]] DebugCompilationUnit %[[#]] %[[#]] [[dbg_src]] %[[#]]
+; CHECK-SPIRV: [[dbg_int:%[0-9]+]] = OpExtInst [[void_ty]] %[[#]] DebugTypeBasic [[int_str]] %[[#]] %[[#]] %[[#]]
+; CHECK-SPIRV: OpExtInst [[void_ty]] %[[#]] DebugTypedef [[typedef_str]] [[dbg_int]] [[dbg_src]] %[[#]] %[[#]] %[[#]]
+
+; CHECK-OPTION-NOT: OpExtInstImport "NonSemantic.Shader.DebugInfo.100"
+
+define dso_local i32 @square(i32 noundef %x)!dbg !10 {
+entry:
+ %x.addr = alloca i32, align 4
+ store i32 %x, ptr %x.addr, align 4
+ #dbg_declare(ptr %x.addr, !16, !DIExpression(), !17)
+ %0 = load i32, ptr %x.addr, align 4, !dbg !18
+ %1 = load i32, ptr %x.addr, align 4, !dbg !19
+ %mul = mul nsw i32 %0, %1, !dbg !20
+ ret i32 %mul, !dbg !21
+}
+
+define dso_local i32 @main() !dbg !22 {
+entry:
+ %retval = alloca i32, align 4
+ %val = alloca i32, align 4
+ %result = alloca i32, align 4
+ store i32 0, ptr %retval, align 4
+ #dbg_declare(ptr %val, !25, !DIExpression(), !26)
+ store i32 7, ptr %val, align 4, !dbg !26
+ #dbg_declare(ptr %result, !27, !DIExpression(), !28)
+ %0 = load i32, ptr %val, align 4, !dbg !29
+ %call = call i32 @square(i32 noundef %0), !dbg !30
+ store i32 %call, ptr %result, align 4, !dbg !28
+ %1 = load i32, ptr %result, align 4, !dbg !31
+ ret i32 %1, !dbg !32
+}
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!2, !3, !4, !5, !6, !7, !8}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: !1, producer: "clang version XX.X.XXXX (FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, splitDebugInlining: false, nameTableKind: None)
+!1 = !DIFile(filename: "typedef.c", directory: "/AAAAAAAAAA/BBBBBBBB/CCCCCCCCC", checksumkind: CSK_MD5, checksum: "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF")
+!2 = !{i32 7, !"Dwarf Version", i32 5}
+!3 = !{i32 2, !"Debug Info Version", i32 3}
+!4 = !{i32 1, !"wchar_size", i32 4}
+!5 = !{i32 8, !"PIC Level", i32 2}
+!6 = !{i32 7, !"PIE Level", i32 2}
+!7 = !{i32 7, !"uwtable", i32 2}
+!8 = !{i32 7, !"frame-pointer", i32 2}
+!10 = distinct !DISubprogram(name: "square", scope: !1, file: !1, line: 5, type: !11, scopeLine: 5, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !15)
+!11 = !DISubroutineType(types: !12, flags: DIFlagPublic)
+!12 = !{!13, !13}
+!13 = !DIDerivedType(tag: DW_TAG_typedef, name: "myint", file: !1, line: 3, baseType: !14)
+!14 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed, flags: DIFlagPublic)
+!15 = !{}
+!16 = !DILocalVariable(name: "x", arg: 1, scope: !10, file: !1, line: 5, type: !13, flags: DIFlagPublic)
+!17 = !DILocation(line: 5, column: 20, scope: !10)
+!18 = !DILocation(line: 6, column: 12, scope: !10)
+!19 = !DILocation(line: 6, column: 16, scope: !10)
+!20 = !DILocation(line: 6, column: 14, scope: !10)
+!21 = !DILocation(line: 6, column: 5, scope: !10)
+!22 = distinct !DISubprogram(name: "main", scope: !1, file: !1, line: 9, type: !23, scopeLine: 9, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !15)
+!23 = !DISubroutineType(types: !24, flags: DIFlagPublic)
+!24 = !{!14}
+!25 = !DILocalVariable(name: "val", scope: !22, file: !1, line: 10, type: !13, flags: DIFlagPublic)
+!26 = !DILocation(line: 10, column: 11, scope: !22)
+!27 = !DILocalVariable(name: "result", scope: !22, file: !1, line: 11, type: !13, flags: DIFlagPublic)
+!28 = !DILocation(line: 11, column: 11, scope: !22)
+!29 = !DILocation(line: 11, column: 27, scope: !22)
+!30 = !DILocation(line: 11, column: 20, scope: !22)
+!31 = !DILocation(line: 12, column: 12, scope: !22)
+!32 = !DILocation(line: 12, column: 5, scope: !22)
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