[llvm] [llvm-exegesis] Add AArch64 operand initializers, SetRegTo (PR #169912)

[Simon Wallis via llvm-commits]

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@@ -106,6 +149,110 @@ static MCInst loadFPImmediate(MCRegister Reg, unsigned RegBitWidth,
   return Instructions;
 }
 
+// Generates instructions to load an immediate value into a DD Reg
+static std::vector<MCInst>
+loadDDRegImmediate(MCRegister Reg, unsigned RegBitWidth, const APInt &Value) {
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simonwallis2 wrote:

Done

https://github.com/llvm/llvm-project/pull/169912