[llvm] [RISCV][llvm] Support VFADD, VFSUB, VFMUL codegen for Zvfbfa (PR #170612)

[Luke Lau via llvm-commits]

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@@ -0,0 +1,163 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-zvfbfa,+v \
+; RUN:     -target-abi=ilp32d -verify-machineinstrs < %s | FileCheck %s
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lukel97 wrote:

Nit, can we leave out the -target-abi flag?

https://github.com/llvm/llvm-project/pull/170612