[llvm] [RISCV] Use a valid AVL immedaite in allone-masked-to-unmasked.mir. NFC (PR #170747)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-risc-v

Author: Craig Topper (topperc)

<details>
<summary>Changes</summary>

AVL operands should be a register, a uimm5, or -1.

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Full diff: https://github.com/llvm/llvm-project/pull/170747.diff


1 Files Affected:

- (modified) llvm/test/CodeGen/RISCV/rvv/allone-masked-to-unmasked.mir (+2-2) 


``````````diff
diff --git a/llvm/test/CodeGen/RISCV/rvv/allone-masked-to-unmasked.mir b/llvm/test/CodeGen/RISCV/rvv/allone-masked-to-unmasked.mir
index 97654c050f81c..a1e45a6740d70 100644
--- a/llvm/test/CodeGen/RISCV/rvv/allone-masked-to-unmasked.mir
+++ b/llvm/test/CodeGen/RISCV/rvv/allone-masked-to-unmasked.mir
@@ -9,8 +9,8 @@ body: |
     ; CHECK-LABEL: name: vcpop.m
     ; CHECK: %allones:vr = PseudoVMSET_M_B64 $noreg, 0 /* e8 */
     ; CHECK-NEXT: $v0 = COPY %allones
-    ; CHECK-NEXT: [[PseudoVCPOP_M_B64_:%[0-9]+]]:gpr = PseudoVCPOP_M_B64 $noreg, 42, 0 /* e8 */
+    ; CHECK-NEXT: [[PseudoVCPOP_M_B64_:%[0-9]+]]:gpr = PseudoVCPOP_M_B64 $noreg, 21, 0 /* e8 */
     %allones:vr = PseudoVMSET_M_B64 $noreg, 0
     $v0 = COPY %allones
-    %2:gpr = PseudoVCPOP_M_B64_MASK $noreg, $v0, 42, 0
+    %2:gpr = PseudoVCPOP_M_B64_MASK $noreg, $v0, 21, 0
 ...

``````````

</details>


https://github.com/llvm/llvm-project/pull/170747