[llvm] [AMDGPU][DAGCombiner][GlobalISel] Prevent FMA contraction when multiply cannot be eliminated (PR #169735)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 1 09:06:39 PST 2025
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@@ -184,18 +165,15 @@ define amdgpu_kernel void @multiple_use_fadd_fmad_f32(ptr addrspace(1) %out, flo
; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
; GFX11-NEXT: v_mov_b32_e32 v0, 0
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-NEXT: v_add_f32_e64 v1, |s2|, |s2|
-; GFX11-NEXT: v_fma_f32 v2, |s2|, 2.0, s3
-; GFX11-NEXT: global_store_b32 v0, v1, s[0:1] dlc
-; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
-; GFX11-NEXT: global_store_b32 v0, v2, s[0:1] offset:4 dlc
+; GFX11-NEXT: v_fma_f32 v1, |s2|, 2.0, s3
+; GFX11-NEXT: global_store_b32 v0, v1, s[0:1] offset:4 dlc
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-NEXT: s_endpgm
%out.gep.1 = getelementptr float, ptr addrspace(1) %out, i32 1
%x.abs = call float @llvm.fabs.f32(float %x)
%mul2 = fmul fast float %x.abs, 2.0
%mad = fadd fast float %mul2, %y
- store volatile float %mul2, ptr addrspace(1) %out
+ ; store volatile float %mul2, ptr addrspace(1) %out
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arsenm wrote:
Accidental break of existing test
https://github.com/llvm/llvm-project/pull/169735
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