[llvm] [RISCV] Make RISCVInstrInfo::verifyInstruction stricter for immediate-only operands (PR #170736)
Min-Yih Hsu via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 4 14:07:34 PST 2025
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@@ -864,10 +864,17 @@ Error ExegesisRISCVTarget::randomizeTargetMCOperand(
// 5-bit unsigned immediate value.
AssignedValue = MCOperand::createImm(randomIndex(31));
break;
+ case RISCVOp::OPERAND_SIMM12_LO:
+ case RISCVOp::OPERAND_UIMM20_LUI:
+ case RISCVOp::OPERAND_UIMM20_AUIPC:
+ case RISCVOp::OPERAND_BARE_SIMM32:
+ AssignedValue = MCOperand::createImm(0);
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mshockwave wrote:
oh nvm, you split it out of immediate
https://github.com/llvm/llvm-project/pull/170736
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