The Week Of Monday 6 January 2025 Archives by author
Starting: Mon Jan 6 00:02:48 PST 2025
Ending: Sun Jan 12 23:59:03 PST 2025
Messages: 5683
- [clang] [clang-tools-extra] [libcxx] [llvm] [libc++] implement views::concat (PR #120920)
A. Jiang via llvm-commits
- [clang] [clang-tools-extra] [libcxx] [llvm] [libc++] implement views::concat (PR #120920)
A. Jiang via llvm-commits
- [clang] [clang-tools-extra] [libcxx] [llvm] [libc++] implement views::concat (PR #120920)
A. Jiang via llvm-commits
- [clang] [clang-tools-extra] [libcxx] [llvm] [libc++] implement views::concat (PR #120920)
A. Jiang via llvm-commits
- [clang] [clang-tools-extra] [libcxx] [llvm] [libc++] implement views::concat (PR #120920)
A. Jiang via llvm-commits
- [clang] [clang-tools-extra] [libcxx] [llvm] [libc++] implement views::concat (PR #120920)
A. Jiang via llvm-commits
- [clang] [clang-tools-extra] [libcxx] [llvm] [libc++] implement views::concat (PR #120920)
A. Jiang via llvm-commits
- [clang] [clang-tools-extra] [libcxx] [llvm] [libc++] implement views::concat (PR #120920)
A. Jiang via llvm-commits
- [clang] [clang-tools-extra] [libcxx] [llvm] [libc++] implement views::concat (PR #120920)
A. Jiang via llvm-commits
- [clang] [clang-tools-extra] [libcxx] [llvm] [libc++] implement views::concat (PR #120920)
A. Jiang via llvm-commits
- [clang] [clang-tools-extra] [libcxx] [llvm] [libc++][ranges] P2542R8: Implement `views::concat` (PR #120920)
A. Jiang via llvm-commits
- [clang] [clang-tools-extra] [libcxx] [llvm] [libc++][ranges] P2542R8: Implement `views::concat` (PR #120920)
A. Jiang via llvm-commits
- [clang] [clang-tools-extra] [libcxx] [llvm] [libc++][ranges] P2542R8: Implement `views::concat` (PR #120920)
A. Jiang via llvm-commits
- [llvm] [llvm][Docs] add discord bot calendar capability notes (PR #122140)
Aaron Ballman via llvm-commits
- [llvm] [llvm][Docs] add discord bot calendar capability notes (PR #122140)
Aaron Ballman via llvm-commits
- [llvm] [llvm][Docs] add discord bot calendar capability notes (PR #122140)
Aaron Ballman via llvm-commits
- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
Aaron Ballman via llvm-commits
- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
Aaron Ballman via llvm-commits
- [llvm] Boundary condition check hidden under assert (PR #122005)
Abhay Kanhere via llvm-commits
- [llvm] Boundary condition check hidden under assert (PR #122005)
Abhay Kanhere via llvm-commits
- [llvm] Boundary condition check hidden under assert (PR #122005)
Abhay Kanhere via llvm-commits
- [llvm] Boundary condition check hidden under assert (PR #122005)
Abhay Kanhere via llvm-commits
- [llvm] Boundary condition check hidden under assert (PR #122005)
Abhay Kanhere via llvm-commits
- [llvm] Boundary condition check hidden under assert (PR #122005)
Abhay Kanhere via llvm-commits
- [llvm] Boundary condition check hidden under assert (PR #122009)
Abhay Kanhere via llvm-commits
- [llvm] [CodeGen][DebugValues] Fix unhandled error condition in VarLoc (PR #122019)
Abhay Kanhere via llvm-commits
- [llvm] Boundary condition check hidden under assert (PR #122009)
Abhay Kanhere via llvm-commits
- [llvm] Boundary condition check hidden under assert (PR #122009)
Abhay Kanhere via llvm-commits
- [llvm] [CodeGen][DebugValues] Fix unhandled error condition in VarLoc (PR #122019)
Abhay Kanhere via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Abhina Sree via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Abhina Sree via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Abhina Sree via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Abhina Sree via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Abhina Sree via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Abhina Sree via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Abhina Sree via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Abhina Sree via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Abhina Sree via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Abhina Sree via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Abhina Sree via llvm-commits
- [llvm] [AMDGPU] Handle nontemporal and amdgpu.last.use metadata in amdgpu-lower-buffer-fat-pointers (PR #120139)
Acim Maravic via llvm-commits
- [llvm] [AMDGPU] Handle nontemporal and amdgpu.last.use metadata in amdgpu-lower-buffer-fat-pointers (PR #120139)
Acim Maravic via llvm-commits
- [llvm] [AMDGPU] Handle nontemporal and amdgpu.last.use metadata in amdgpu-lower-buffer-fat-pointers (PR #120139)
Acim Maravic via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `WaveActiveSum` intrinsic (PR #118580)
Adam Yang via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `WaveActiveSum` intrinsic (PR #118580)
Adam Yang via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `WaveActiveSum` intrinsic (PR #118580)
Adam Yang via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `WaveActiveSum` intrinsic (PR #118580)
Adam Yang via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `WaveActiveSum` intrinsic (PR #118580)
Adam Yang via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `WaveActiveSum` intrinsic (PR #118580)
Adam Yang via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `WaveActiveSum` intrinsic (PR #118580)
Adam Yang via llvm-commits
- [llvm] [Github] Explicitly requesting Ubuntu 22.04 for SPIRV test (PR #122395)
Adam Yang via llvm-commits
- [llvm] [Github] Explicitly requesting Ubuntu 22.04 for SPIRV test (PR #122395)
Adam Yang via llvm-commits
- [llvm] [Github] Explicitly requesting Ubuntu 22.04 for SPIRV test (PR #122395)
Adam Yang via llvm-commits
- [llvm] [Github] Explicitly requesting Ubuntu 22.04 for SPIRV test (PR #122395)
Adam Yang via llvm-commits
- [llvm] [Github] Explicitly requesting Ubuntu 22.04 for SPIRV test (PR #122395)
Adam Yang via llvm-commits
- [llvm] [LLVM] Update debuginfo maintainers (PR #120231)
Adrian Prantl via llvm-commits
- [llvm] Add SD matchers and unit test coverage for ISD::VECTOR_SHUFFLE (PR #119592)
Aidan Goldfarb via llvm-commits
- [llvm] [SPIR-V] Add pre-commit CI workflow (PR #74092)
Aiden Grossman via llvm-commits
- [llvm] [RISCV][llvm-exegesis] Add default Pfm cycle counter. (PR #121866)
Aiden Grossman via llvm-commits
- [llvm] [RISCV][llvm-exegesis] Add default Pfm cycle counter. (PR #121866)
Aiden Grossman via llvm-commits
- [llvm] [RISCV][llvm-exegesis] Add unittests. NFC (PR #121862)
Aiden Grossman via llvm-commits
- [llvm] [RISCV][llvm-exegesis] Add default Pfm cycle counter. (PR #121866)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis] Use TestBase for TargetTest (PR #121895)
Aiden Grossman via llvm-commits
- [llvm] [SPIR-V] Add pre-commit CI workflow (PR #74092)
Aiden Grossman via llvm-commits
- [llvm] [Exegesis] Add `--dry-run-measurement` (PR #121991)
Aiden Grossman via llvm-commits
- [llvm] [Exegesis] Add the ability to dry-run the measurement phase (PR #121991)
Aiden Grossman via llvm-commits
- [llvm] [Github] Add sudo to CI container (PR #122036)
Aiden Grossman via llvm-commits
- [llvm] [Github] Add sudo to CI container (PR #122036)
Aiden Grossman via llvm-commits
- [llvm] [Github] Fix llvm project tests after default user changed in container (PR #122044)
Aiden Grossman via llvm-commits
- [llvm] [Github] Fix llvm project tests after default user changed in container (PR #122044)
Aiden Grossman via llvm-commits
- [llvm] [Github] Add sccache to CI container (PR #122063)
Aiden Grossman via llvm-commits
- [llvm] [Github] Add sccache to CI container (PR #122063)
Aiden Grossman via llvm-commits
- [llvm] [Github] Add sccache to CI container (PR #122063)
Aiden Grossman via llvm-commits
- [llvm] [Github] Add sudo to CI container (PR #122036)
Aiden Grossman via llvm-commits
- [llvm] Add pre-merge workflow for HLSL testing (PR #122184)
Aiden Grossman via llvm-commits
- [llvm] Add pre-merge workflow for HLSL testing (PR #122184)
Aiden Grossman via llvm-commits
- [llvm] Add pre-merge workflow for HLSL testing (PR #122184)
Aiden Grossman via llvm-commits
- [llvm] Add pre-merge workflow for HLSL testing (PR #122184)
Aiden Grossman via llvm-commits
- [llvm] Add pre-merge workflow for HLSL testing (PR #122184)
Aiden Grossman via llvm-commits
- [llvm] Add pre-merge workflow for HLSL testing (PR #122184)
Aiden Grossman via llvm-commits
- [llvm] Add pre-merge workflow for HLSL testing (PR #122184)
Aiden Grossman via llvm-commits
- [llvm] [Github] Add sccache to CI container (PR #122063)
Aiden Grossman via llvm-commits
- [llvm] [Github] Add sccache to CI container (PR #122063)
Aiden Grossman via llvm-commits
- [llvm] [Exegesis] Add supports to serialize/deserialize object files into benchmarks (PR #121993)
Aiden Grossman via llvm-commits
- [llvm] [Exegesis] Add supports to serialize/deserialize object files into benchmarks (PR #121993)
Aiden Grossman via llvm-commits
- [llvm] [Exegesis] Add supports to serialize/deserialize object files into benchmarks (PR #121993)
Aiden Grossman via llvm-commits
- [llvm] [Exegesis] Add supports to serialize/deserialize object files into benchmarks (PR #121993)
Aiden Grossman via llvm-commits
- [llvm] [Github] Add sccache to CI container (PR #122063)
Aiden Grossman via llvm-commits
- [llvm] Testing (PR #122221)
Aiden Grossman via llvm-commits
- [llvm] Testing (PR #122221)
Aiden Grossman via llvm-commits
- [llvm] Testing (PR #122221)
Aiden Grossman via llvm-commits
- [llvm] Testing (PR #122221)
Aiden Grossman via llvm-commits
- [llvm] Testing (PR #122221)
Aiden Grossman via llvm-commits
- [llvm] Testing (PR #122221)
Aiden Grossman via llvm-commits
- [llvm] Testing (PR #122221)
Aiden Grossman via llvm-commits
- [llvm] [Github] Fix LLVM Project Tests Workflow on Linux (PR #122221)
Aiden Grossman via llvm-commits
- [llvm] [Github] Fix LLVM Project Tests Workflow on Linux (PR #122221)
Aiden Grossman via llvm-commits
- [llvm] [Github] Fix LLVM Project Tests Workflow on Linux (PR #122221)
Aiden Grossman via llvm-commits
- [llvm] [Github] Fix LLVM Project Tests Workflow on Linux (PR #122221)
Aiden Grossman via llvm-commits
- [llvm] [Github] Fix LLVM Project Tests Workflow on Linux (PR #122221)
Aiden Grossman via llvm-commits
- [llvm] [Github] Explicitly requesting Ubuntu 22.04 for SPIRV test (PR #122395)
Aiden Grossman via llvm-commits
- [llvm] [Github] Explicitly requesting Ubuntu 22.04 for SPIRV test (PR #122395)
Aiden Grossman via llvm-commits
- [llvm] [ci] Handle the case where all reported tests pass but the build is still a failure (PR #120264)
Aiden Grossman via llvm-commits
- [llvm] [ci] Handle the case where all reported tests pass but the build is still a failure (PR #120264)
Aiden Grossman via llvm-commits
- [llvm] [Github] Explicitly requesting Ubuntu 22.04 for SPIRV test (PR #122395)
Aiden Grossman via llvm-commits
- [llvm] [CI] Detect step failures in metrics job (PR #122564)
Aiden Grossman via llvm-commits
- [llvm] [hlsl] Pin hlsl-test-all resusable workflow to main branch (PR #122518)
Aiden Grossman via llvm-commits
- [llvm] [CI] Detect step failures in metrics job (PR #122564)
Aiden Grossman via llvm-commits
- [llvm] [CI] Detect step failures in metrics job (PR #122564)
Aiden Grossman via llvm-commits
- [llvm] [Github][CI] Add Windows Premerge Job for Testing (PR #122661)
Aiden Grossman via llvm-commits
- [llvm] [Github][CI] Add Windows Premerge Job for Testing (PR #122661)
Aiden Grossman via llvm-commits
- [llvm] Revert "[Support] Recycler: Enforce minimum allocation size" (PR #121735)
Akshat Oke via llvm-commits
- [llvm] Revert "[Support] Recycler: Enforce minimum allocation size" (PR #121735)
Akshat Oke via llvm-commits
- [llvm] [Support] Recycler: Implement move constructor (PR #120555)
Akshat Oke via llvm-commits
- [llvm] [Support] Recycler: Implement move constructor (PR #120555)
Akshat Oke via llvm-commits
- [llvm] [Support] Recycler: Implement move constructor (PR #120555)
Akshat Oke via llvm-commits
- [llvm] [Support] Recycler: Match dealloc size and enforce min size (PR #121889)
Akshat Oke via llvm-commits
- [llvm] [CodeGen][NewPM] Port RegAllocEvictionAdvisor analysis to NPM (PR #117309)
Akshat Oke via llvm-commits
- [llvm] [CodeGen][NewPM] Port RegAllocEvictionAdvisor analysis to NPM (PR #117309)
Akshat Oke via llvm-commits
- [llvm] [Support] Recycler: Match dealloc size and enforce min size (PR #121889)
Akshat Oke via llvm-commits
- [llvm] [Support] Recycler: Match dealloc size and enforce min size (PR #121889)
Akshat Oke via llvm-commits
- [llvm] [CodeGen][NewPM] Use proper NPM AtomicExpandPass in AMDGPU (PR #122086)
Akshat Oke via llvm-commits
- [llvm] [CodeGen][NewPM] Use proper NPM AtomicExpandPass in AMDGPU (PR #122086)
Akshat Oke via llvm-commits
- [llvm] [CodeGen][NewPM] Port RegAllocEvictionAdvisor analysis to NPM (PR #117309)
Akshat Oke via llvm-commits
- [llvm] [Support] Recycler: Match dealloc size and enforce min size (PR #121889)
Akshat Oke via llvm-commits
- [llvm] Spiller: Detach legacy pass and supply analyses instead (PR #119181)
Akshat Oke via llvm-commits
- [llvm] [CodeGen][NewPM] Port RegAllocEvictionAdvisor analysis to NPM (PR #117309)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][NewPM] Port AMDGPURemoveIncompatibleFunctions to NPM (PR #122261)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][NewPM] Port AMDGPURemoveIncompatibleFunctions to NPM (PR #122261)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][NewPM] Port AMDGPURemoveIncompatibleFunctions to NPM (PR #122261)
Akshat Oke via llvm-commits
- [llvm] Spiller: Detach legacy pass and supply analyses instead (PR #119181)
Akshat Oke via llvm-commits
- [llvm] [CodeGen][NewPM] Port RegAllocEvictionAdvisor analysis to NPM (PR #117309)
Akshat Oke via llvm-commits
- [llvm] Revert "Spiller: Detach legacy pass and supply analyses instead (#119… (PR #122426)
Akshat Oke via llvm-commits
- [llvm] Revert "Spiller: Detach legacy pass and supply analyses instead (#119… (PR #122426)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][NewPM] Port AMDGPUOpenCLEnqueuedBlockLowering to NPM (PR #122434)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][NewPM] Port AMDGPUOpenCLEnqueuedBlockLowering to NPM (PR #122434)
Akshat Oke via llvm-commits
- [llvm] Revert "Spiller: Detach legacy pass and supply analyses instead (#119… (PR #122426)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][NewPM] Port AMDGPUOpenCLEnqueuedBlockLowering to NPM (PR #122434)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][NewPM] Port AMDGPUOpenCLEnqueuedBlockLowering to NPM (PR #122434)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][NewPM] Port AMDGPUOpenCLEnqueuedBlockLowering to NPM (PR #122434)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][NewPM] Port AMDGPUOpenCLEnqueuedBlockLowering to NPM (PR #122434)
Akshat Oke via llvm-commits
- [llvm] [Spiller] Deatach legacy pass and supply analyses instead (PR #122665)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][NewPM] Port AMDGPURemoveIncompatibleFunctions to NPM (PR #122261)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][NewPM] Port AMDGPUOpenCLEnqueuedBlockLowering to NPM (PR #122434)
Akshat Oke via llvm-commits
- [llvm] Reapply "Spiller: Detach legacy pass and supply analyses instead (#119181)" (PR #122665)
Akshat Oke via llvm-commits
- [llvm] Reapply "Spiller: Detach legacy pass and supply analyses instead (#119181)" (PR #122665)
Akshat Oke via llvm-commits
- [llvm] Reapply "Spiller: Detach legacy pass and supply analyses instead" (PR #122665)
Akshat Oke via llvm-commits
- [llvm] Reapply "Spiller: Detach legacy pass and supply analyses instead (#119181)" (PR #122665)
Akshat Oke via llvm-commits
- [llvm] Reapply "Spiller: Detach legacy pass and supply analyses instead (#119181)" (PR #122665)
Akshat Oke via llvm-commits
- [llvm] Reapply "Spiller: Detach legacy pass and supply analyses instead (#119181)" (PR #122665)
Akshat Oke via llvm-commits
- [llvm] [CodeGen][NewPM] Use proper NPM AtomicExpandPass in AMDGPU (PR #122086)
Akshat Oke via llvm-commits
- [llvm] Reapply "Spiller: Detach legacy pass and supply analyses instead (#119181)" (PR #122665)
Akshat Oke via llvm-commits
- [llvm] Reapply "Spiller: Detach legacy pass and supply analyses instead (#119181)" (PR #122665)
Akshat Oke via llvm-commits
- [llvm] Reapply "Spiller: Detach legacy pass and supply analyses instead (#119181)" (PR #122665)
Akshat Oke via llvm-commits
- [llvm] [ARM] Prefer MUL to MULS on some implementations (PR #112540)
Albert Huang via llvm-commits
- [llvm] [LLVM] Update RISCV maintainers (PR #121301)
Alex Bradbury via llvm-commits
- [llvm] [NVPTX][InferAS] assume alloca instructions are in local AS (PR #121710)
Alex MacLean via llvm-commits
- [llvm] [NVPTX][InferAS] assume alloca instructions are in local AS (PR #121710)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] designate fabs and fneg as free (PR #121513)
Alex MacLean via llvm-commits
- [clang] [llvm] [mlir] [NVPTX] Switch front-ends and tests to ptx_kernel cc (PR #120806)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] designate fabs and fneg as free (PR #121513)
Alex MacLean via llvm-commits
- [clang] [llvm] [mlir] [NVPTX] Switch front-ends and tests to ptx_kernel cc (PR #120806)
Alex MacLean via llvm-commits
- [llvm] [KernelInfo] Implement new LLVM IR pass for GPU code analysis (PR #102944)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] designate fabs and fneg as free (PR #121513)
Alex MacLean via llvm-commits
- [clang] [llvm] [mlir] [NVPTX] Switch front-ends and tests to ptx_kernel cc (PR #120806)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] designate fabs and fneg as free (PR #121513)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] designate fabs and fneg as free (PR #121513)
Alex MacLean via llvm-commits
- [clang] [llvm] [mlir] [NVPTX] Switch front-ends and tests to ptx_kernel cc (PR #120806)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Support address offsets added with disjoint or (PR #122042)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Improve support for {ex2,lg2}.approx (PR #120519)
Alex MacLean via llvm-commits
- [llvm] [OptTable] Fix typo VALUE => VALUES (NFCI) (PR #121523)
Alex MacLean via llvm-commits
- [llvm] [ValueTracking] Add rotate idiom to haveNoCommonBitsSet special cases (PR #122165)
Alex MacLean via llvm-commits
- [llvm] [NVPTX][InferAS] assume alloca instructions are in local AS (PR #121710)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Support address offsets added with disjoint or (PR #122042)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Support address offsets added with disjoint or (PR #122042)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Support address offsets added with disjoint or (PR #122042)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Support address offsets added with disjoint or (PR #122042)
Alex MacLean via llvm-commits
- [llvm] [ValueTracking] Add rotate idiom to haveNoCommonBitsSet special cases (PR #122165)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] designate fabs and fneg as free (PR #121513)
Alex MacLean via llvm-commits
- [clang] [llvm] [OpenMP] Replace nvvm.annotation usage with kernel calling conventions (PR #122320)
Alex MacLean via llvm-commits
- [clang] [llvm] [OpenMP] Replace nvvm.annotation usage with kernel calling conventions (PR #122320)
Alex MacLean via llvm-commits
- [llvm] [ValueTracking] Add rotate idiom to haveNoCommonBitsSet special cases (PR #122165)
Alex MacLean via llvm-commits
- [llvm] [ValueTracking] Add rotate idiom to haveNoCommonBitsSet special cases (PR #122165)
Alex MacLean via llvm-commits
- [llvm] [ValueTracking] Add rotate idiom to haveNoCommonBitsSet special cases (PR #122165)
Alex MacLean via llvm-commits
- [llvm] [SLPVectorizer] minor tweaks around lambdas for compatibilty with older compilers (PR #122348)
Alex MacLean via llvm-commits
- [llvm] [SLPVectorizer] minor tweaks around lambdas for compatibilty with older compilers (PR #122348)
Alex MacLean via llvm-commits
- [llvm] [ValueTracking] Add rotate idiom to haveNoCommonBitsSet special cases (PR #122165)
Alex MacLean via llvm-commits
- [llvm] [SLPVectorizer] minor tweaks around lambdas for compatibilty with older compilers (PR #122348)
Alex MacLean via llvm-commits
- [llvm] [DSE] Use alias analysis to identify no-op stores (PR #122610)
Alex MacLean via llvm-commits
- [llvm] [FunctionAttrs] Treat byval calls as only reading ptrs (PR #122618)
Alex MacLean via llvm-commits
- [llvm] [FunctionAttrs] Treat byval calls as only reading ptrs (PR #122618)
Alex MacLean via llvm-commits
- [llvm] [FunctionAttrs] Treat byval calls as only reading ptrs (PR #122618)
Alex MacLean via llvm-commits
- [llvm] [FunctionAttrs] Treat byval calls as only reading ptrs (PR #122618)
Alex MacLean via llvm-commits
- [llvm] [FunctionAttrs] Treat byval calls as only reading ptrs (PR #122618)
Alex MacLean via llvm-commits
- [llvm] [SLP] Normalize debug messages for newTreeEntry. (PR #119514)
Alexander Kornienko via llvm-commits
- [llvm] [SLP]Add cost estimation for gather node reshuffling (PR #115201)
Alexander Kornienko via llvm-commits
- [llvm] [SLP] Normalize debug messages for newTreeEntry. (PR #119514)
Alexander Kornienko via llvm-commits
- [clang] [llvm] Handle leading underscores in update_cc_test_checks.py (PR #121800)
Alexander Richardson via llvm-commits
- [clang] [llvm] Handle leading underscores in update_cc_test_checks.py (PR #121800)
Alexander Richardson via llvm-commits
- [clang] [llvm] Handle leading underscores in update_cc_test_checks.py (PR #121800)
Alexander Richardson via llvm-commits
- [compiler-rt] [Darwin][CompilerRT] Set compiler ID to 'Clang' for Compiler RT Tests for Apple Clang (PR #121858)
Alexander Richardson via llvm-commits
- [compiler-rt] [Darwin][CompilerRT] Set compiler ID to 'Clang' for Compiler RT Tests for Apple Clang (PR #121858)
Alexander Richardson via llvm-commits
- [compiler-rt] [Darwin][CompilerRT] Set compiler ID to 'Clang' for Compiler RT Tests for Apple Clang (PR #121858)
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- [compiler-rt] [Darwin][CompilerRT] Set compiler ID to 'Clang' for Compiler RT Tests for Apple Clang (PR #121858)
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- [compiler-rt] [Darwin][CompilerRT] Set compiler ID to 'Clang' for Compiler RT Tests for Apple Clang (PR #121858)
Alexander Richardson via llvm-commits
- [compiler-rt] [Darwin][CompilerRT] Set compiler ID to 'Clang' for Compiler RT Tests for Apple Clang (PR #121858)
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- [clang] [llvm] Handle leading underscores in update_cc_test_checks.py (PR #121800)
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- [clang] [llvm] Handle leading underscores in update_cc_test_checks.py (PR #121800)
Alexander Richardson via llvm-commits
- [clang] [llvm] Handle leading underscores in update_cc_test_checks.py (PR #121800)
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- [clang] [llvm] Handle leading underscores in update_cc_test_checks.py (PR #121800)
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- [clang] [llvm] Handle leading underscores in update_cc_test_checks.py (PR #121800)
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- [compiler-rt] [Darwin][CompilerRT] Set compiler ID to 'Clang' for Compiler RT Tests for Apple Clang (PR #121858)
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- [llvm] [UpdateTestChecks][NFC] - Fix typos (PR #121964)
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- [clang] [llvm] Handle leading underscores in update_cc_test_checks.py (PR #121800)
Alexander Richardson via llvm-commits
- [clang] [llvm] Handle leading underscores in update_cc_test_checks.py (PR #121800)
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- [llvm] [ObjCopy] Respect requirements of LC_ENCRYPTION_INFO commands (PR #120995)
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- [llvm] [LLVM][DWARF] Create debug names entry for non-tu top level DIE (PR #121856)
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- [llvm] [LLVM][DWARF] Create debug names entry for non-tu top level DIE (PR #121856)
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- [llvm] [LLVM][DWARF] Create debug names entry for non-tu top level DIE (PR #121856)
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- [llvm] [LLVM][DWARF] Create debug names entry for non-tu top level DIE (PR #121856)
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- [llvm] [TOOLS][DWARFDUMP][DWARF] Print full DIE offset for a CU or local TU (PR #121877)
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- [llvm] [LLVM][DWARF] Create debug names entry for non-tu top level DIE (PR #121856)
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- [llvm] [LLVM][DWARF] Create debug names entry for non-tu top level DIE (PR #121856)
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- [llvm] [LLVM][DWARF] Create debug names entry for non-tu top level DIE (PR #121856)
Alexander Yermolovich via llvm-commits
- [llvm] [LLVM][DWARF] Create debug names entry for non-tu top level DIE (PR #121856)
Alexander Yermolovich via llvm-commits
- [llvm] [AArch64] Generate BSP instead of TBL for select shuffles. (PR #121474)
Alexandros Lamprineas via llvm-commits
- [llvm] [AArch64] Generate BSP instead of TBL for select shuffles. (PR #121474)
Alexandros Lamprineas via llvm-commits
- [llvm] [AArch64] Generate BSP instead of TBL for select shuffles. (PR #121474)
Alexandros Lamprineas via llvm-commits
- [llvm] [FMV][GlobalOpt] Statically resolve calls to versioned functions. (PR #87939)
Alexandros Lamprineas via llvm-commits
- [llvm] [FMV][GlobalOpt] Statically resolve calls to versioned functions. (PR #87939)
Alexandros Lamprineas via llvm-commits
- [llvm] [FMV][GlobalOpt] Statically resolve calls to versioned functions. (PR #87939)
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- [llvm] [FMV][GlobalOpt] Statically resolve calls to versioned functions. (PR #87939)
Alexandros Lamprineas via llvm-commits
- [llvm] [FMV][GlobalOpt] Statically resolve calls to versioned functions. (PR #87939)
Alexandros Lamprineas via llvm-commits
- [llvm] [FMV][GlobalOpt] Statically resolve calls to versioned functions. (PR #87939)
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- [clang] [llvm] [FMV][AArch64] Simplify version selection according to ACLE. (PR #121921)
Alexandros Lamprineas via llvm-commits
- [llvm] [FMV][GlobalOpt] Statically resolve calls to versioned functions. (PR #87939)
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- [clang] [llvm] [FMV][AArch64] Simplify version selection according to ACLE. (PR #121921)
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- [clang] [llvm] [FMV][AArch64] Simplify version selection according to ACLE. (PR #121921)
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- [clang] [llvm] [FMV][AArch64] Simplify version selection according to ACLE. (PR #121921)
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- [clang] [llvm] [FMV][AArch64] Simplify version selection according to ACLE. (PR #121921)
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- [clang] [llvm] [FMV][AArch64] Simplify version selection according to ACLE. (PR #121921)
Alexandros Lamprineas via llvm-commits
- [llvm] [FMV][GlobalOpt] Statically resolve calls to versioned functions. (PR #87939)
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- [clang] [llvm] [FMV][AArch64] Simplify version selection according to ACLE. (PR #121921)
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- [clang] [llvm] [FMV][AArch64] Simplify version selection according to ACLE. (PR #121921)
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- [clang] [llvm] [FMV][AArch64] Simplify version selection according to ACLE. (PR #121921)
Alexandros Lamprineas via llvm-commits
- [llvm] [FMV][GlobalOpt] Statically resolve calls to versioned functions. (PR #87939)
Alexandros Lamprineas via llvm-commits
- [llvm] [FMV][GlobalOpt] Statically resolve calls to versioned functions. (PR #87939)
Alexandros Lamprineas via llvm-commits
- [llvm] [FMV][GlobalOpt] Statically resolve calls to versioned functions. (PR #87939)
Alexandros Lamprineas via llvm-commits
- [llvm] [CostModel][X86] getShuffleCost - use processShuffleMasks for all shuffle kinds to legal types (#120599) (PR #121760)
Alexey Bataev via llvm-commits
- [llvm] [RISCV][CG]Use processShuffleMasks for per-register shuffles (PR #121765)
Alexey Bataev via llvm-commits
- [llvm] [RISCV][CG]Use processShuffleMasks for per-register shuffles (PR #121765)
Alexey Bataev via llvm-commits
- [llvm] [VPlan] Preserve underlying value when EVL transforming intrinsics/casts (PR #121552)
Alexey Bataev via llvm-commits
- [llvm] [VPlan] Preserve underlying value when EVL transforming intrinsics/casts (PR #121552)
Alexey Bataev via llvm-commits
- [llvm] [LV]Fix/improve max safe distance analysis (PR #121156)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Improved reduction cost/codegen (PR #118293)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Initial non-power-of-2 (but still whole register) for remaining nodes (PR #113356)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Improved reduction cost/codegen (PR #118293)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Improved reduction cost/codegen (PR #118293)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Improved reduction cost/codegen (PR #118293)
Alexey Bataev via llvm-commits
- [llvm] [CostModel][X86] Attempt to match cheap v4f32 shuffles that map to SHUFPS instruction (PR #121778)
Alexey Bataev via llvm-commits
- [llvm] [CostModel][X86] Attempt to match cheap v4f32 shuffles that map to SHUFPS instruction (PR #121778)
Alexey Bataev via llvm-commits
- [llvm] [AArch64] Add a subvector extract cost. (PR #121472)
Alexey Bataev via llvm-commits
- [llvm] [CostModel][X86] Attempt to match cheap v4f32 shuffles that map to SHUFPS instruction (PR #121778)
Alexey Bataev via llvm-commits
- [llvm] [LV]Fix/improve max safe distance analysis (PR #121156)
Alexey Bataev via llvm-commits
- [llvm] [LV]Fix/improve max safe distance analysis (PR #121156)
Alexey Bataev via llvm-commits
- [llvm] [VPlan] Add transformation to narrow interleave groups. (PR #106441)
Alexey Bataev via llvm-commits
- [llvm] [VPlan] Add transformation to narrow interleave groups. (PR #106441)
Alexey Bataev via llvm-commits
- [llvm] [RISCV][CG]Use processShuffleMasks for per-register shuffles (PR #121765)
Alexey Bataev via llvm-commits
- [llvm] [RISCV][CG]Use processShuffleMasks for per-register shuffles (PR #121765)
Alexey Bataev via llvm-commits
- [llvm] [RISCV][CG]Use processShuffleMasks for per-register shuffles (PR #121765)
Alexey Bataev via llvm-commits
- [llvm] 1160994 - [SLP]Fix a crash for very long GEP chains
Alexey Bataev via llvm-commits
- [llvm] [RISCV][CG]Use processShuffleMasks for per-register shuffles (PR #121765)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Improved reduction cost/codegen (PR #118293)
Alexey Bataev via llvm-commits
- [llvm] [RISCV][CG]Use processShuffleMasks for per-register shuffles (PR #121765)
Alexey Bataev via llvm-commits
- [llvm] [RISCV][CG]Use processShuffleMasks for per-register shuffles (PR #121765)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Initial non-power-of-2 (but still whole register) for remaining nodes (PR #113356)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Initial non-power-of-2 (but still whole register) for remaining nodes (PR #113356)
Alexey Bataev via llvm-commits
- [llvm] [LV]Fix max safe elements calculations (PR #122148)
Alexey Bataev via llvm-commits
- [llvm] [SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (PR #120198)
Alexey Bataev via llvm-commits
- [llvm] [SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (PR #120198)
Alexey Bataev via llvm-commits
- [llvm] [SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (PR #120198)
Alexey Bataev via llvm-commits
- [llvm] 0d921f9 - [SLP][NFC]Introduce and use createInsertVector helper function, NFC
Alexey Bataev via llvm-commits
- [llvm] 5b76a2e - [SLP]Correctly calculate mask for the inserted vector
Alexey Bataev via llvm-commits
- [llvm] [SLPVectorizer] Refine the scope of RdxOpcode in HorizontalReduction::createOp (NFC) (PR #122239)
Alexey Bataev via llvm-commits
- [llvm] [SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (PR #120198)
Alexey Bataev via llvm-commits
- [llvm] [SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (PR #120198)
Alexey Bataev via llvm-commits
- [llvm] [SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (PR #120198)
Alexey Bataev via llvm-commits
- [llvm] [SLP] NFC. Refactor getSameOpcode and reduce for loop iterations. (PR #122241)
Alexey Bataev via llvm-commits
- [llvm] [SLP] NFC. Refactor getSameOpcode and reduce for loop iterations. (PR #122241)
Alexey Bataev via llvm-commits
- [llvm] [SLPVectorizer] Refactor HorizontalReduction::createOp (NFC) (PR #121549)
Alexey Bataev via llvm-commits
- [llvm] [SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (PR #120198)
Alexey Bataev via llvm-commits
- [llvm] [SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (PR #120198)
Alexey Bataev via llvm-commits
- [llvm] [SLP] NFC. Refactor getSameOpcode and reduce for loop iterations. (PR #122241)
Alexey Bataev via llvm-commits
- [llvm] [SLPVectorizer] minor tweaks around lambdas for compatibilty with older compilers (PR #122348)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Add cost estimation for gather node reshuffling (PR #115201)
Alexey Bataev via llvm-commits
- [llvm] [SLPVectorizer] minor tweaks around lambdas for compatibilty with older compilers (PR #122348)
Alexey Bataev via llvm-commits
- [llvm] 920c589 - [SLP][NFC]Add a test with the mask translate after buildvector shuffle cost estimation
Alexey Bataev via llvm-commits
- [llvm] 547ba97 - [SLP]Fix mask generation after cost estimation
Alexey Bataev via llvm-commits
- [llvm] [SLP]Add cost estimation for gather node reshuffling (PR #115201)
Alexey Bataev via llvm-commits
- [llvm] 3c9c94a - Revert "[SLP]Fix mask generation after cost estimation"
Alexey Bataev via llvm-commits
- [llvm] 681c83a - [SLP]Fix mask generation after cost estimation
Alexey Bataev via llvm-commits
- [llvm] [LV][EVL] Disable fixed-order recurrence idiom with EVL tail folding. (PR #122458)
Alexey Bataev via llvm-commits
- [llvm] [LV][EVL] Pre-commit test case for fixed-order recurrence with EVL tail folding. (NFC) (PR #122456)
Alexey Bataev via llvm-commits
- [llvm] [SLPVectorizer] Refactor HorizontalReduction::createOp (NFC) (PR #121549)
Alexey Bataev via llvm-commits
- [clang] [llvm] [Hexagon] Add V79 support to compiler and assembler (PR #120983)
Alexey Karyakin via llvm-commits
- [llvm] [BOLT][AArch64] Exclude JT pattern matching under assert failure (PR #122298)
Alexey Moksyakov via llvm-commits
- [llvm] [BOLT][AArch64] Add isPush & isPop (PR #120713)
Alexey Moksyakov via llvm-commits
- [llvm] [BOLT][AArch64] Exclude JT pattern matching under assert failure (PR #122298)
Alexey Moksyakov via llvm-commits
- [libc] [llvm] [libc] Remove some unused includes from headers under src/math/generic. (PR #121632)
Alexey Samsonov via llvm-commits
- [llvm] [libc][bazel] Simplify libc_build_rules by grouping release copts (PR #121630)
Alexey Samsonov via llvm-commits
- [llvm] [libc][bazel] Remove customization from several libc BUILD rules. (PR #121843)
Alexey Samsonov via llvm-commits
- [llvm] [libc][bazel] Remove customization from several libc BUILD rules. (PR #121843)
Alexey Samsonov via llvm-commits
- [libc] [llvm] [libc] Add hardening for FixedVector data structure and fix exposed bug. (PR #122159)
Alexey Samsonov via llvm-commits
- [libc] [llvm] [libc] Add hardening for FixedVector data structure and fix exposed bug. (PR #122159)
Alexey Samsonov via llvm-commits
- [libc] [llvm] [libc] Add hardening for FixedVector data structure and fix exposed bug. (PR #122159)
Alexey Samsonov via llvm-commits
- [libc] [llvm] [libc] Add hardening for FixedVector data structure and fix exposed bug. (PR #122159)
Alexey Samsonov via llvm-commits
- [llvm] undo breaking changes from "Reduce AsmPrinterHandlers virt. fn calls" without reverting the performance gains (PR #122297)
Alexis Engelke via llvm-commits
- [clang] [llvm] [X86] Extend kCFI with a 3-bit arity indicator (PR #121070)
Alice Ryhl via llvm-commits
- [llvm] [GVN] MemorySSA for GVN: add optional `AllowMemorySSA` (PR #120982)
Alina Sbirlea via llvm-commits
- [llvm] [GVN] MemorySSA for GVN: add optional `AllowMemorySSA` (PR #120982)
Alina Sbirlea via llvm-commits
- [llvm] [GVN] MemorySSA for GVN: add optional `AllowMemorySSA` (PR #120982)
Alina Sbirlea via llvm-commits
- [llvm] 29e5c1c - [Hexagon] Fix test after 9d7df23f4d6537752854d54b0c4c583512b930d0
Alina Sbirlea via llvm-commits
- [llvm] Reapply "[GVN] MemorySSA for GVN: add optional AllowMemorySSA" (PR #122482)
Alina Sbirlea via llvm-commits
- [llvm] Reapply "[GVN] MemorySSA for GVN: add optional AllowMemorySSA" (PR #122482)
Alina Sbirlea via llvm-commits
- [llvm] Reapply "[GVN] MemorySSA for GVN: add optional AllowMemorySSA" (PR #122482)
Alina Sbirlea via llvm-commits
- [llvm] Reapply "[GVN] MemorySSA for GVN: add optional AllowMemorySSA" (PR #122482)
Alina Sbirlea via llvm-commits
- [llvm] [AArch64][GlobalISel] Add support for widening vector store elements to s8. (PR #121170)
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- [compiler-rt] [AArch64][SME] Fix broken compiler check for SME2 support in compiler-rt (PR #121625)
Amara Emerson via llvm-commits
- [compiler-rt] cb5d866 - [AArch64][SME] Add Darwin specific SME ABI routines.
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Add support for lowering trunc stores of vector bools. (PR #121169)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Add support for lowering trunc stores of vector bools. (PR #121169)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Fix legalization for <4 x i1> vector stores. (PR #121185)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Fix legalization for <4 x i1> vector stores. (PR #121185)
Amara Emerson via llvm-commits
- [llvm] [RISCV][GISel] Support G_MERGE_VALUES/G_UNMERGE_VALUES with Zfa. (PR #120379)
Amara Emerson via llvm-commits
- [llvm] [BOLT] Add --pad-funcs-before=func:n (PR #117924)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Fix --pad-funcs{, -before} state misinteraction (PR #121918)
Amir Ayupov via llvm-commits
- [llvm] [Bolt][CMake] Don't export bolt libraries in LLVMExports.cmake (PR #121936)
Amir Ayupov via llvm-commits
- [compiler-rt] [libFuzzer] Add missing space in FuzzerFlags.def (PR #122619)
Amir Livneh via llvm-commits
- [llvm] [InstCombine] Convert fshl(x, 0, y) to shl(x, and(y, BitWidth - 1)) when BitWidth is pow2 (PR #122362)
Amr Hesham via llvm-commits
- [llvm] [SDPatternMatch] Add Matcher m_Undef (PR #122521)
Amr Hesham via llvm-commits
- [llvm] [InstCombine] Convert fshl(x, 0, y) to shl(x, and(y, BitWidth - 1)) when BitWidth is pow2 (PR #122362)
Amr Hesham via llvm-commits
- [llvm] [InstCombine] Convert fshl(x, 0, y) to shl(x, and(y, BitWidth - 1)) when BitWidth is pow2 (PR #122362)
Amr Hesham via llvm-commits
- [llvm] [SDPatternMatch] Add Matcher m_Undef (PR #122521)
Amr Hesham via llvm-commits
- [llvm] [SDPatternMatch] Add Matcher m_Undef (PR #122521)
Amr Hesham via llvm-commits
- [llvm] [InstCombine] Convert fshl(x, 0, y) to shl(x, and(y, BitWidth - 1)) when BitWidth is pow2 (PR #122362)
Amr Hesham via llvm-commits
- [llvm] [InstCombine] Convert fshl(x, 0, y) to shl(x, and(y, BitWidth - 1)) when BitWidth is pow2 (PR #122362)
Amr Hesham via llvm-commits
- [llvm] [SDPatternMatch] Add Matcher m_Undef (PR #122521)
Amr Hesham via llvm-commits
- [llvm] [InstCombine] Convert fshl(x, 0, y) to shl(x, and(y, BitWidth - 1)) when BitWidth is pow2 (PR #122362)
Amr Hesham via llvm-commits
- [llvm] [InstCombine] Convert fshl(x, 0, y) to shl(x, and(y, BitWidth - 1)) when BitWidth is pow2 (PR #122362)
Amr Hesham via llvm-commits
- [llvm] [InstCombine] Convert fshl(x, 0, y) to shl(x, and(y, BitWidth - 1)) when BitWidth is pow2 (PR #122362)
Amr Hesham via llvm-commits
- [llvm] [InstCombine] Convert fshl(x, 0, y) to shl(x, and(y, BitWidth - 1)) when BitWidth is pow2 (PR #122362)
Amr Hesham via llvm-commits
- [llvm] [InstCombine] Convert fshl(x, 0, y) to shl(x, and(y, BitWidth - 1)) when BitWidth is pow2 (PR #122362)
Amr Hesham via llvm-commits
- [llvm] [InstCombine] Convert fshl(x, 0, y) to shl(x, and(y, BitWidth - 1)) when BitWidth is pow2 (PR #122362)
Amr Hesham via llvm-commits
- [llvm] [InstCombine] Convert fshl(x, 0, y) to shl(x, and(y, BitWidth - 1)) when BitWidth is pow2 (PR #122362)
Amr Hesham via llvm-commits
- [llvm] [InstCombine] Convert fshl(x, 0, y) to shl(x, and(y, BitWidth - 1)) when BitWidth is pow2 (PR #122362)
Amr Hesham via llvm-commits
- [llvm] [SDPatternMatch] Add Matcher m_Undef (PR #122521)
Amr Hesham via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Anatoly Trosinenko via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Anatoly Trosinenko via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Anatoly Trosinenko via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Anatoly Trosinenko via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Anatoly Trosinenko via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Anatoly Trosinenko via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Anatoly Trosinenko via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Anatoly Trosinenko via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Anatoly Trosinenko via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Anatoly Trosinenko via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Anatoly Trosinenko via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Anatoly Trosinenko via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Anatoly Trosinenko via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Anatoly Trosinenko via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Anatoly Trosinenko via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Anatoly Trosinenko via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Anatoly Trosinenko via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Anatoly Trosinenko via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Anatoly Trosinenko via llvm-commits
- [llvm] [InstCombine] Fold (trunc X to i1) & !iszero(X & Pow2)) -> (X & (1 | Pow2)) == (1 | Pow2) (PR #119196)
Andreas Jonson via llvm-commits
- [llvm] [InstCombine] Fold (trunc X to i1) & !iszero(X & Pow2)) -> (X & (1 | Pow2)) == (1 | Pow2) (PR #119196)
Andreas Jonson via llvm-commits
- [llvm] [InstCombine] Fold (trunc X to i1) & !iszero(X & Pow2)) -> (X & (1 | Pow2)) == (1 | Pow2) (PR #119196)
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- [llvm] 15d3e4a - [InstCombine] Test for two types of bittests (NFC)
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- [llvm] [InstCombine] move foldAndOrOfICmpsOfAndWithPow2 in to foldLogOpOfMaskedICmps (PR #121970)
Andreas Jonson via llvm-commits
- [llvm] [InstCombine] move foldAndOrOfICmpsOfAndWithPow2 in to foldLogOpOfMaskedICmps (PR #121970)
Andreas Jonson via llvm-commits
- [llvm] [InstCombine] move foldAndOrOfICmpsOfAndWithPow2 into foldLogOpOfMaskedICmps (PR #121970)
Andreas Jonson via llvm-commits
- [llvm] [InstCombine] move foldAndOrOfICmpsOfAndWithPow2 into foldLogOpOfMaskedICmps (PR #121970)
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- [llvm] [InstCombine] Move foldLogOpOfMaskedICmps to make it possible to handle trunc to i1. (PR #122179)
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- [llvm] [InstCombine] Prepare foldLogOpOfMaskedICmps to handle trunc to i1. (NFC) (PR #122179)
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Antonio Frighetto via llvm-commits
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Antonio Frighetto via llvm-commits
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Antonio Frighetto via llvm-commits
- [llvm] [InstCombine] Handle ceil division idiom (PR #100977)
Antonio Frighetto via llvm-commits
- [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #109914)
Arjun Patel via llvm-commits
- [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #109914)
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- [llvm] [NVPTX] Do not run the NVVMReflect pass as part of the normal pipeline (PR #121834)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Do not run the NVVMReflect pass as part of the normal pipeline (PR #121834)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Do not run the NVVMReflect pass as part of the normal pipeline (PR #121834)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Do not run the NVVMReflect pass as part of the normal pipeline (PR #121834)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Do not run the NVVMReflect pass as part of the normal pipeline (PR #121834)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Do not run the NVVMReflect pass as part of the normal pipeline (PR #121834)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Do not run the NVVMReflect pass as part of the normal pipeline (PR #121834)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Do not run the NVVMReflect pass as part of the normal pipeline (PR #121834)
Artem Belevich via llvm-commits
- [clang] [llvm] [mlir] [NVPTX] Switch front-ends and tests to ptx_kernel cc (PR #120806)
Artem Belevich via llvm-commits
- [clang] [llvm] [mlir] [NVPTX] Switch front-ends and tests to ptx_kernel cc (PR #120806)
Artem Belevich via llvm-commits
- [clang] [llvm] [mlir] [NVPTX] Switch front-ends and tests to ptx_kernel cc (PR #120806)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] designate fabs and fneg as free (PR #121513)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Constant fold NVVM fmin and fmax (PR #121966)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Constant fold NVVM fmin and fmax (PR #121966)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Constant fold NVVM fmin and fmax (PR #121966)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Constant fold NVVM fmin and fmax (PR #121966)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Constant fold NVVM fmin and fmax (PR #121966)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Constant fold NVVM fmin and fmax (PR #121966)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] designate fabs and fneg as free (PR #121513)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] designate fabs and fneg as free (PR #121513)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] designate fabs and fneg as free (PR #121513)
Artem Belevich via llvm-commits
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Artem Belevich via llvm-commits
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Artem Belevich via llvm-commits
- [llvm] [NVPTX] Attempt to load params using symbol addition node directly (PR #119935)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] designate fabs and fneg as free (PR #121513)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Attempt to load params using symbol addition node directly (PR #119935)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Support address offsets added with disjoint or (PR #122042)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Attempt to load params using symbol addition node directly (PR #119935)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Attempt to load params using symbol addition node directly (PR #119935)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Attempt to load params using symbol addition node directly (PR #119935)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Attempt to load params using symbol addition node directly (PR #119935)
Artem Belevich via llvm-commits
- [llvm] [NVPTX][InferAS] assume alloca instructions are in local AS (PR #121710)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Fix segfault with i128 types in arrays (PR #120562)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Fix segfault with i128 types in arrays (PR #120562)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Fix segfault with i128 types in arrays (PR #120562)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Fix segfault with i128 types in arrays (PR #120562)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Constant fold NVVM fmin and fmax (PR #121966)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Constant fold NVVM fmin and fmax (PR #121966)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Attempt to load params using symbol addition node directly (PR #119935)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Attempt to load params using symbol addition node directly (PR #119935)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Attempt to load params using symbol addition node directly (PR #119935)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Attempt to load params using symbol addition node directly (PR #119935)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Attempt to load params using symbol addition node directly (PR #119935)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Attempt to load params using symbol addition node directly (PR #119935)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Add float to tf32 conversion intrinsic (PR #121507)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Attempt to load params using symbol addition node directly (PR #119935)
Artem Belevich via llvm-commits
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Artem Belevich via llvm-commits
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Artem Belevich via llvm-commits
- [llvm] [NVPTX] Add float to tf32 conversion intrinsics (PR #121507)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Fix segfault with i128 types in arrays (PR #120562)
Artem Belevich via llvm-commits
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Artem Belevich via llvm-commits
- [llvm] [NVPTX] Add TMA Bulk Copy intrinsics (PR #122344)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Add TMA Bulk Copy intrinsics (PR #122344)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Add TMA Bulk Copy intrinsics (PR #122344)
Artem Belevich via llvm-commits
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Artem Belevich via llvm-commits
- [llvm] [NVPTX] Select bfloat16 add/mul/sub as fma on SM80 (PR #121065)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Select bfloat16 add/mul/sub as fma on SM80 (PR #121065)
Artem Belevich via llvm-commits
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Artem Belevich via llvm-commits
- [llvm] [NVPTX] Attempt to load params using symbol addition node directly (PR #119935)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Attempt to load params using symbol addition node directly (PR #119935)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Fix segfault with i128 types in arrays (PR #120562)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Constant fold NVVM fmin and fmax (PR #121966)
Artem Belevich via llvm-commits
- [llvm] [NFC][NVPTX] Small style cleanup for NVPTXISelDAGToDAG.* (PR #122538)
Artem Belevich via llvm-commits
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Artem Pianykh via llvm-commits
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Artem Pianykh via llvm-commits
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Artem Pianykh via llvm-commits
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Artem Pianykh via llvm-commits
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Artem Pianykh via llvm-commits
- [llvm] [Coro] Prebuild a module-level debug info set and share it between all coroutine clones (PR #118628)
Artem Pianykh via llvm-commits
- [llvm] [Coro] Use DebugInfoCache to speed up cloning in CoroSplitPass (PR #118630)
Artem Pianykh via llvm-commits
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Artem Pianykh via llvm-commits
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Artem Pianykh via llvm-commits
- [llvm] [Utils] Identity map module-level debug info on first use in CloneFunction* (PR #118627)
Artem Pianykh via llvm-commits
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Arthur Eubanks via llvm-commits
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Arthur Eubanks via llvm-commits
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Arthur Eubanks via llvm-commits
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Arthur Eubanks via llvm-commits
- [llvm] [Coroutines][LazyCallGraph] resumes are not really SCC (PR #116285)
Arthur Eubanks via llvm-commits
- [clang] [llvm] [HLSL] Implement elementwise firstbitlow builtin (PR #116858)
Ashley Coleman via llvm-commits
- [clang] [llvm] [HLSL] Implement elementwise firstbitlow builtin (PR #116858)
Ashley Coleman via llvm-commits
- [clang] [llvm] [HLSL] Implement elementwise firstbitlow builtin (PR #116858)
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Ashley Coleman via llvm-commits
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- [llvm] Add SD matchers and unit test coverage for ISD::VECTOR_SHUFFLE (PR #119592)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add stack clash vector support (PR #119458)
Craig Topper via llvm-commits
- [llvm] [AArch64] Migrate from SearchableTable to GenericTable/Enum. NFC (PR #121661)
Craig Topper via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Craig Topper via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Craig Topper via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Craig Topper via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Craig Topper via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Craig Topper via llvm-commits
- [llvm] [RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (PR #121705)
Craig Topper via llvm-commits
- [llvm] [RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (PR #121705)
Craig Topper via llvm-commits
- [llvm] [RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (PR #121705)
Craig Topper via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Craig Topper via llvm-commits
- [llvm] [AArch64] Simplify ExactFPImm GenericTable. NFC (PR #121827)
Craig Topper via llvm-commits
- [llvm] [ARM] Migrate from SearachableTable to GenericTable. NFC (PR #121840)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use ISD::XOR instead of RISCVISD::VMXOR_VL in lowerVectorMaskVecReduction of scalable ISD::VECREDUCE_AND (PR #121812)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use ISD::XOR instead of RISCVISD::VMXOR_VL in lowerVectorMaskVecReduction of scalable ISD::VECREDUCE_AND (PR #121812)
Craig Topper via llvm-commits
- [llvm] [RISCV][llvm-exegesis] Add default Pfm cycle counter. (PR #121866)
Craig Topper via llvm-commits
- [llvm] [RISCV][llvm-exegesis] Add default Pfm cycle counter. (PR #121866)
Craig Topper via llvm-commits
- [llvm] [RISCV] Fix the cost of `llvm.vector.reduce.and` (PR #119160)
Craig Topper via llvm-commits
- [llvm] [RISCV] Fix the cost of `llvm.vector.reduce.and` (PR #119160)
Craig Topper via llvm-commits
- [llvm] [RISCV] Fix the cost of `llvm.vector.reduce.and` (PR #119160)
Craig Topper via llvm-commits
- [llvm] [ARM] Migrate from SearchableTable to GenericTable. NFC (PR #121840)
Craig Topper via llvm-commits
- [llvm] [RISCV][llvm-exegesis] Add unittests. NFC (PR #121862)
Craig Topper via llvm-commits
- [llvm] [RISCV][llvm-exegesis] Add unittests. NFC (PR #121862)
Craig Topper via llvm-commits
- [llvm] [RISCV][llvm-exegesis] Add default Pfm cycle counter. (PR #121866)
Craig Topper via llvm-commits
- [llvm] [RISCV][llvm-exegesis] Add unittests. NFC (PR #121862)
Craig Topper via llvm-commits
- [llvm] [RISCV][llvm-exegesis] Add unittests. NFC (PR #121862)
Craig Topper via llvm-commits
- [llvm] [RISCV][llvm-exegesis] Add unittests. NFC (PR #121862)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Support G_MERGE_VALUES/G_UNMERGE_VALUES with Zfa. (PR #120379)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Add riscv_atomic.h and Zawrs builtins (PR #96283)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Add riscv_atomic.h and Zawrs builtins (PR #96283)
Craig Topper via llvm-commits
- [llvm] [RISCV][llvm-exegesis] Add default Pfm cycle counter. (PR #121866)
Craig Topper via llvm-commits
- [llvm] [ARM] Migrate from SearchableTable to GenericTable. NFC (PR #121840)
Craig Topper via llvm-commits
- [llvm] [RISCV] Fold vector shift of sext/zext to widening multiply (PR #121563)
Craig Topper via llvm-commits
- [llvm] [AArch64] Simplify ExactFPImm GenericTable. NFC (PR #121827)
Craig Topper via llvm-commits
- [llvm] RISCV: Implement isLoadFromStackSlot/isStoreToStackSlot for rvv (PR #120524)
Craig Topper via llvm-commits
- [llvm] [RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (PR #121705)
Craig Topper via llvm-commits
- [llvm] [RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (PR #121705)
Craig Topper via llvm-commits
- [llvm] [RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (PR #121705)
Craig Topper via llvm-commits
- [llvm] [RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (PR #121705)
Craig Topper via llvm-commits
- [llvm] [RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (PR #121705)
Craig Topper via llvm-commits
- [llvm] [AArch64] Use GenericTable PrimaryKey to remove one of the SearchIndexes for SysRegs. NFC (PR #122001)
Craig Topper via llvm-commits
- [llvm] 2015c0a - [AArch64] Remove unused AltName field from PHint GenericTable. NFC
Craig Topper via llvm-commits
- [llvm] [RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (PR #121705)
Craig Topper via llvm-commits
- [llvm] [RISCV] Update the latencies of MUL and CPOP in SiFive P400 scheduling model (PR #122007)
Craig Topper via llvm-commits
- [llvm] [RISCV][VLOpt] Kill all uses of and remove twoTimesVLMUL [NFC] (PR #122003)
Craig Topper via llvm-commits
- [llvm] [RISCV][VLOPT] Add masked load to isSupported and getOperandInfo (PR #122030)
Craig Topper via llvm-commits
- [llvm] [RISCV][VLOPT] Add mask load to isSupported and getOperandInfo (PR #122030)
Craig Topper via llvm-commits
- [llvm] [RISCV] GISel custom lowering for G_ADD/G_SUB (PR #121587)
Craig Topper via llvm-commits
- [llvm] [RISCV][VLOPT] Add mask load to isSupported and getOperandInfo (PR #122030)
Craig Topper via llvm-commits
- [llvm] 9020d19 - [RISCV][GISel] Re-generate combine-neg-abs.ll to fix build bot failure. NFC
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Add riscv_atomic.h and Zawrs builtins (PR #96283)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Add riscv_atomic.h and Zawrs builtins (PR #96283)
Craig Topper via llvm-commits
- [llvm] [AArch64] Use GenericTable PrimaryKey to remove one of the SearchIndexes for SysRegs. NFC (PR #122001)
Craig Topper via llvm-commits
- [llvm] [AArch64] Simplify ExactFPImm GenericTable. NFC (PR #121827)
Craig Topper via llvm-commits
- [llvm] [SelectionDAG] Use SDNode::op_iterator instead of SDNodeIterator. NFC (PR #122147)
Craig Topper via llvm-commits
- [llvm] [X86] Added support for 16bit LEA instruction (PR #122102)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Add -mcpu=sifive-p550. (PR #122164)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add call preserved regmask to tail calls. (PR #122181)
Craig Topper via llvm-commits
- [llvm] [SelectionDAG] Use SDNode::op_iterator instead of SDNodeIterator. NFC (PR #122147)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add call preserved regmask to tail calls. (PR #122181)
Craig Topper via llvm-commits
- [llvm] [RISCV] Fix the cost of `llvm.vector.reduce.and` (PR #119160)
Craig Topper via llvm-commits
- [llvm] [RISCV] Fix the cost of `llvm.vector.reduce.and` (PR #119160)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Add -mcpu=sifive-p550. (PR #122164)
Craig Topper via llvm-commits
- [llvm] [RISCV] Support vp.{gather,scatter} in RISCVGatherScatterLowering (PR #122232)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Add -mcpu=sifive-p550. (PR #122164)
Craig Topper via llvm-commits
- [llvm] [RISCV][VLOPT] Add vfirst and vcpop to getOperandInfo (PR #122295)
Craig Topper via llvm-commits
- [llvm] [SelectionDAG] Use SDNode::op_iterator instead of SDNodeIterator. NFC (PR #122147)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Add Qualcomm uC Xqciint (Interrupts) extension (PR #122256)
Craig Topper via llvm-commits
- [llvm] [RISCV][VLOPT] Add fp-reductions to getOperandInfo (PR #122151)
Craig Topper via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for more floating point instructions (PR #122326)
Craig Topper via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for more floating point instructions (PR #122326)
Craig Topper via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for more floating point instructions (PR #122326)
Craig Topper via llvm-commits
- [llvm] [RISCV][VLOPT] Fix VCFCT incompatible EEW test (PR #122327)
Craig Topper via llvm-commits
- [llvm] [RISCV][VLOPT] Add vfirst and vcpop to getOperandInfo (PR #122295)
Craig Topper via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for more floating point instructions (PR #122326)
Craig Topper via llvm-commits
- [llvm] [RISCV][VLOPT] Simplify code by removing extra temporary variables. NFC (PR #122333)
Craig Topper via llvm-commits
- [llvm] [RISCV][VLOPT] Add vadcto isSupportedInstr (PR #122345)
Craig Topper via llvm-commits
- [llvm] [RISCV] Fix the cost of `llvm.vector.reduce.and` (PR #119160)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add stack clash vector support (PR #119458)
Craig Topper via llvm-commits
- [llvm] [RISCV] Support vp.{gather,scatter} in RISCVGatherScatterLowering (PR #122232)
Craig Topper via llvm-commits
- [llvm] [RISCV] Support vp.{gather,scatter} in RISCVGatherScatterLowering (PR #122232)
Craig Topper via llvm-commits
- [llvm] 5d88a84 - [RISCV] Simplify some RISCVInstrInfoC classes by removing arguments that never change. NFC
Craig Topper via llvm-commits
- [llvm] [RISCV] Attempt to widen SEW before generic shuffle lowering (PR #122311)
Craig Topper via llvm-commits
- [llvm] [RISCV] Correct the cost model for the i1 reduce.add and reduce.or. (PR #122349)
Craig Topper via llvm-commits
- [llvm] [RISCV][VLOPT] Simplify code by removing extra temporary variables. NFC (PR #122333)
Craig Topper via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Craig Topper via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Craig Topper via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Craig Topper via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Craig Topper via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Craig Topper via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add a default common assignment of Inst{6-2} to the RVInst16CI base class. NFC (PR #122377)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Add Qualcomm uC Xqciint (Interrupts) extension (PR #122256)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add stack clash vector support (PR #119458)
Craig Topper via llvm-commits
- [llvm] [RISCV] Rework memcpy test (PR #120364)
Craig Topper via llvm-commits
- [llvm] [RISCV] Support .option (no)autocompress (PR #122483)
Craig Topper via llvm-commits
- [llvm] [RISCV][CostModel] Add cost for @llvm.experimental.vp.splice (PR #122223)
Craig Topper via llvm-commits
- [llvm] [RISCV][CostModel] Add cost for @llvm.experimental.vp.splice (PR #122223)
Craig Topper via llvm-commits
- [llvm] [RISCV][CostModel] Add cost for @llvm.experimental.vp.splice (PR #122223)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Add -mcpu=sifive-p550. (PR #122164)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Add -mcpu=sifive-p550. (PR #122164)
Craig Topper via llvm-commits
- [llvm] [X86] Use loaded/stored element size when parsing/printing gather/scatter pointer size in Intel syntax. (PR #122530)
Craig Topper via llvm-commits
- [llvm] [X86] Correct the cdisp8 encoding for VSCATTER/VGATHER prefetch (PR #122051)
Craig Topper via llvm-commits
- [llvm] [X86] Use loaded/stored element size when parsing/printing gather/scatter pointer size in Intel syntax. (PR #122530)
Craig Topper via llvm-commits
- [llvm] 7979e1b - [RISCV] Add a default assignment of Inst{12-7} to RVInst16CSS. NFC
Craig Topper via llvm-commits
- [llvm] [RISCV] Stack clash protection for dynamic alloca (PR #122508)
Craig Topper via llvm-commits
- [llvm] [RISCV] Stack clash protection for dynamic alloca (PR #122508)
Craig Topper via llvm-commits
- [llvm] [RISCV] Stack clash protection for dynamic alloca (PR #122508)
Craig Topper via llvm-commits
- [llvm] [RISCV] Stack clash protection for dynamic alloca (PR #122508)
Craig Topper via llvm-commits
- [llvm] [RISCV] Stack clash protection for dynamic alloca (PR #122508)
Craig Topper via llvm-commits
- [llvm] [RISCV] Stack clash protection for dynamic alloca (PR #122508)
Craig Topper via llvm-commits
- [llvm] [RISCV] Stack clash protection for dynamic alloca (PR #122508)
Craig Topper via llvm-commits
- [llvm] a418eb1 - [ARM] Use GenericTable PrimaryKey to remove one of the SearchIndexes for BankedRegsList. NFC
Craig Topper via llvm-commits
- [llvm] 0384069 - [AArch64] Use GenericTable PrimaryKey to remove some SearchIndexes. NFC
Craig Topper via llvm-commits
- [llvm] [RISCV] Support [mh]edelegh (PR #121634)
Craig Topper via llvm-commits
- [llvm] [RISCV][CostModel] Add cost for @llvm.experimental.vp.splice (PR #122223)
Craig Topper via llvm-commits
- [llvm] [RISCV][CostModel] Add cost for @llvm.experimental.vp.splice (PR #122223)
Craig Topper via llvm-commits
- [llvm] [X86][AVX-VNNI] Fix VNNI intrinsics argument types (PR #122649)
Craig Topper via llvm-commits
- [llvm] [X86] Use loaded/stored element size when parsing/printing gather/scatter pointer size in Intel syntax. (PR #122530)
Craig Topper via llvm-commits
- [llvm] [AArch64] Combine and and lsl into ubfiz (PR #118974)
Cullen Rhodes via llvm-commits
- [llvm] [AArch64] Combine and and lsl into ubfiz (PR #118974)
Cullen Rhodes via llvm-commits
- [llvm] [AArch64] Combine and and lsl into ubfiz (PR #118974)
Cullen Rhodes via llvm-commits
- [llvm] [AArch64] Combine and and lsl into ubfiz (PR #118974)
Cullen Rhodes via llvm-commits
- [llvm] [AArch664] Replace uaddlv with addv for popcount operation (PR #121934)
Cullen Rhodes via llvm-commits
- [llvm] [AArch664] Replace uaddlv with addv for popcount operation (PR #121934)
Cullen Rhodes via llvm-commits
- [llvm] [AArch664] Replace uaddlv with addv for popcount operation (PR #121934)
Cullen Rhodes via llvm-commits
- [llvm] [AArch64] Replace uaddlv with addv for popcount operation (PR #121934)
Cullen Rhodes via llvm-commits
- [llvm] [WebAssembly] Add -wasm-use-legacy-eh option (PR #122158)
Dan Gohman via llvm-commits
- [llvm] [WebAssembly] Format WebAssembly ReleaseNote entries (PR #122203)
Dan Gohman via llvm-commits
- [compiler-rt] [TySan] Intercept malloc_size on Apple platforms. (PR #122133)
Dan Liew via llvm-commits
- [compiler-rt] [TySan] Intercept malloc_size on Apple platforms. (PR #122133)
Dan Liew via llvm-commits
- [compiler-rt] [TySan] Intercept malloc_size on Apple platforms. (PR #122133)
Dan Liew via llvm-commits
- [compiler-rt] [TySan] Intercept malloc_size on Apple platforms. (PR #122133)
Dan Liew via llvm-commits
- [llvm] [aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (PR #121516)
Daniel Paoliello via llvm-commits
- [llvm] [aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (PR #121516)
Daniel Paoliello via llvm-commits
- [llvm] [aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (PR #121516)
Daniel Paoliello via llvm-commits
- [llvm] [aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (PR #121516)
Daniel Paoliello via llvm-commits
- [llvm] [aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (PR #121516)
Daniel Paoliello via llvm-commits
- [llvm] [aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (PR #121516)
Daniel Paoliello via llvm-commits
- [llvm] [aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (PR #121516)
Daniel Paoliello via llvm-commits
- [llvm] [aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (PR #121516)
Daniel Paoliello via llvm-commits
- [llvm] [llvm][aarch64] Add support for the MS qualifiers __ptr32, __ptr64, _sptr, __uptr (PR #112793)
Daniel Paoliello via llvm-commits
- [llvm] [aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (PR #121516)
Daniel Paoliello via llvm-commits
- [llvm] [aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (PR #121516)
Daniel Paoliello via llvm-commits
- [llvm] [aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (PR #121516)
Daniel Paoliello via llvm-commits
- [llvm] [aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (PR #121516)
Daniel Paoliello via llvm-commits
- [llvm] [aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (PR #121516)
Daniel Paoliello via llvm-commits
- [llvm] Fix build break in MIRPrinter (PR #122630)
Daniel Paoliello via llvm-commits
- [llvm] Fix build break in MIRPrinter (PR #122630)
Daniel Paoliello via llvm-commits
- [lld] [lld-macho] Fix branch extension thunk estimation logic (PR #120529)
Daniel Rodríguez Troitiño via llvm-commits
- [lld] [lld-macho] Fix branch extension thunk estimation logic (PR #120529)
Daniel Rodríguez Troitiño via llvm-commits
- [lld] [lld-macho] Fix branch extension thunk estimation logic (PR #120529)
Daniel Rodríguez Troitiño via llvm-commits
- [llvm] [ObjCopy] Respect requirements of LC_ENCRYPTION_INFO commands (PR #120995)
Daniel Rodríguez Troitiño via llvm-commits
- [llvm] [ObjCopy] Respect requirements of LC_ENCRYPTION_INFO commands (PR #120995)
Daniel Rodríguez Troitiño via llvm-commits
- [llvm] [GSYM] Add support for querying merged functions in llvm-gsymutil (PR #120991)
Daniel Thornburgh via llvm-commits
- [llvm] [GSYM] Add support for querying merged functions in llvm-gsymutil (PR #120991)
Daniel Thornburgh via llvm-commits
- [libc] [llvm] [libc] add basic arena allocator (PR #121173)
Daniel Thornburgh via llvm-commits
- [libc] [llvm] [libc] add basic arena allocator (PR #121173)
Daniel Thornburgh via llvm-commits
- [libc] [llvm] [libc] add basic arena allocator (PR #121173)
Daniel Thornburgh via llvm-commits
- [libc] [llvm] [libc] add basic arena allocator (PR #121173)
Daniel Thornburgh via llvm-commits
- [libc] [llvm] [libc] add basic arena allocator (PR #121173)
Daniel Thornburgh via llvm-commits
- [libc] [llvm] [libc] add basic arena allocator (PR #121173)
Daniel Thornburgh via llvm-commits
- [libc] [llvm] [libc] add basic arena allocator (PR #121173)
Daniel Thornburgh via llvm-commits
- [libc] [llvm] [libc] add basic arena allocator (PR #121173)
Daniel Thornburgh via llvm-commits
- [libc] [llvm] [libc] add basic arena allocator (PR #121173)
Daniel Thornburgh via llvm-commits
- [lld] [PAC][lld][AArch64][ELF] Support signed TLSDESC (PR #113817)
Daniil Kovalev via llvm-commits
- [lld] [PAC][lld][AArch64][ELF] Support signed TLSDESC (PR #113817)
Daniil Kovalev via llvm-commits
- [lld] [PAC][lld][AArch64][ELF] Support signed TLSDESC (PR #113817)
Daniil Kovalev via llvm-commits
- [lld] [PAC][lld][AArch64][ELF] Support signed TLSDESC (PR #113817)
Daniil Kovalev via llvm-commits
- [lld] [PAC][lld][AArch64][ELF] Support signed TLSDESC (PR #113817)
Daniil Kovalev via llvm-commits
- [lld] [PAC][lld][AArch64][ELF] Support signed TLSDESC (PR #113817)
Daniil Kovalev via llvm-commits
- [lld] [PAC][lld][AArch64][ELF] Support signed TLSDESC (PR #113817)
Daniil Kovalev via llvm-commits
- [llvm] [LoopVectorize] Add an option to test potential issues with VPlan (PR #121154)
Danila Malyutin via llvm-commits
- [llvm] [LLVM] Update debuginfo maintainers (PR #120231)
David Blaikie via llvm-commits
- [llvm] [TOOLS][DWARFDUMP][DWARF] Print full DIE offset for a CU or local TU (PR #121877)
David Blaikie via llvm-commits
- [llvm] [LLVM][DWARF] Create debug names entry for non-tu top level DIE (PR #121856)
David Blaikie via llvm-commits
- [llvm] [LLVM][DWARF] Create debug names entry for non-tu top level DIE (PR #121856)
David Blaikie via llvm-commits
- [llvm] [CodeGen][DebugValues] Fix unhandled error condition in VarLoc (PR #122019)
David Blaikie via llvm-commits
- [llvm] [TOOLS][DWARFDUMP][DWARF] Print full DIE offset for a CU or local TU (PR #121877)
David Blaikie via llvm-commits
- [llvm] [LLVM][DWARF] Create debug names entry for non-tu top level DIE (PR #121856)
David Blaikie via llvm-commits
- [compiler-rt] [compiler-rt][rtsan] Reland posix part of #121616 setbuf, setvbuf. (PR #121658)
David CARLIER via llvm-commits
- [compiler-rt] [compiler-rt][asan] _aligned_malloc/_aligned_free interception. (PR #82049)
David CARLIER via llvm-commits
- [compiler-rt] [compiler-rt][rtsan] Reland posix part of #121616 setbuf, setvbuf. (PR #121658)
David CARLIER via llvm-commits
- [compiler-rt] [compiler-rt][rtsan] Reland posix part of #121616 setbuf, setvbuf. (PR #121658)
David CARLIER via llvm-commits
- [compiler-rt] [compiler-rt][rtsan] Reland posix part of #121616 setbuf, setvbuf. (PR #121658)
David CARLIER via llvm-commits
- [compiler-rt] [compiler-rt][rtsan] adding setlinebuf/setbuffer interception. (PR #122018)
David CARLIER via llvm-commits
- [compiler-rt] [compiler-rt][rtsan] adding setlinebuf/setbuffer interception. (PR #122018)
David CARLIER via llvm-commits
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David CARLIER via llvm-commits
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David CARLIER via llvm-commits
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David CARLIER via llvm-commits
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David CARLIER via llvm-commits
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David CARLIER via llvm-commits
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David CARLIER via llvm-commits
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David CARLIER via llvm-commits
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David CARLIER via llvm-commits
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David CARLIER via llvm-commits
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David CARLIER via llvm-commits
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David CARLIER via llvm-commits
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David CARLIER via llvm-commits
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David CARLIER via llvm-commits
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David CARLIER via llvm-commits
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David CARLIER via llvm-commits
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David CARLIER via llvm-commits
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David CARLIER via llvm-commits
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David CARLIER via llvm-commits
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David CARLIER via llvm-commits
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David CARLIER via llvm-commits
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David Green via llvm-commits
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David Green via llvm-commits
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David Green via llvm-commits
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David Green via llvm-commits
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David Green via llvm-commits
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David Green via llvm-commits
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David Green via llvm-commits
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David Green via llvm-commits
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David Green via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
- [llvm] [LoopVectorize] Enable vectorisation of early exit loops with live-outs (PR #120567)
David Sherwood via llvm-commits
- [llvm] [LoopVectorize] Enable vectorisation of early exit loops with live-outs (PR #120567)
David Sherwood via llvm-commits
- [llvm] [LoopVectorize] Enable vectorisation of early exit loops with live-outs (PR #120567)
David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
- [llvm] [AArch64] Don't try to sink and(load) (PR #122274)
David Sherwood via llvm-commits
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David Spickett via llvm-commits
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David Spickett via llvm-commits
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David Spickett via llvm-commits
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David Spickett via llvm-commits
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David Spickett via llvm-commits
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David Spickett via llvm-commits
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David Spickett via llvm-commits
- [llvm] [llvm] Fix crash caused by reprocessing complex reductions (PR #122077)
David Spickett via llvm-commits
- [llvm] [llvm] Fix crash caused by reprocessing complex reductions (PR #122077)
David Spickett via llvm-commits
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David Spickett via llvm-commits
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Dhruv Srivastava via llvm-commits
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Dhruv Srivastava via llvm-commits
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Dhruv Srivastava via llvm-commits
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Dmitry Sidorov via llvm-commits
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Dmitry Sidorov via llvm-commits
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Dmitry Sidorov via llvm-commits
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Dmitry Sidorov via llvm-commits
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Dmitry Sidorov via llvm-commits
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Dmitry Sidorov via llvm-commits
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Dmitry Sidorov via llvm-commits
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Dmitry Sidorov via llvm-commits
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Dmitry Sidorov via llvm-commits
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Dmitry Sidorov via llvm-commits
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Dmitry Sidorov via llvm-commits
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Florian Hahn via llvm-commits
- [llvm] [LV] Teach LoopVectorizationLegality about struct vector calls (PR #119221)
Florian Hahn via llvm-commits
- [llvm] LAA: add missed swap when inverting src, sink (NFC) (PR #122254)
Florian Hahn via llvm-commits
- [llvm] LAA: refactor dependence class to prep for scaled strides (NFC) (PR #122113)
Florian Hahn via llvm-commits
- [llvm] LAA: refactor dependence class to prep for scaled strides (NFC) (PR #122113)
Florian Hahn via llvm-commits
- [llvm] LAA: refactor dependence class to prep for scaled strides (NFC) (PR #122113)
Florian Hahn via llvm-commits
- [compiler-rt] [TySan] Intercept malloc_size on Apple platforms. (PR #122133)
Florian Hahn via llvm-commits
- [llvm] LAA: refactor dependence class to prep for scaled strides (NFC) (PR #122113)
Florian Hahn via llvm-commits
- [compiler-rt] [TySan] Intercept malloc_size on Apple platforms. (PR #122133)
Florian Hahn via llvm-commits
- [llvm] [LV] Only check isVectorizableEarlyExitLoop with multiple exits. (PR #121994)
Florian Hahn via llvm-commits
- [compiler-rt] [compiler-rt][tysan] adding posix strndup interception. (PR #122255)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Update final IV exit value via VPlan. (PR #112147)
Florian Hahn via llvm-commits
- [llvm] [Loads] Also consider getPointerAlignment when checking assumptions. (PR #120916)
Florian Hahn via llvm-commits
- [compiler-rt] [TySan] Intercept malloc_size on Apple platforms. (PR #122133)
Florian Hahn via llvm-commits
- [compiler-rt] [TySan] Intercept malloc_size on Apple platforms. (PR #122133)
Florian Hahn via llvm-commits
- [llvm] [Loads] Also consider getPointerAlignment when checking assumptions. (PR #120916)
Florian Hahn via llvm-commits
- [compiler-rt] [TySan] Intercept malloc_size on Apple platforms. (PR #122133)
Florian Hahn via llvm-commits
- [llvm] VT/test: pre-commit tests to enable samesign optz (PR #120257)
Florian Hahn via llvm-commits
- [compiler-rt] [TySan] Intercept malloc_size on Apple platforms. (PR #122133)
Florian Hahn via llvm-commits
- [llvm] 7ffb691 - [VPlan] Remove dead ToRemove (NFC).
Florian Hahn via llvm-commits
- [clang] [llvm] [Clang] Add __builtin_assume_dereferenceable to encode deref assumption. (PR #121789)
Florian Hahn via llvm-commits
- [clang] [llvm] [Clang] Add __builtin_assume_dereferenceable to encode deref assumption. (PR #121789)
Florian Hahn via llvm-commits
- [clang] [llvm] [Clang] Add __builtin_assume_dereferenceable to encode deref assumption. (PR #121789)
Florian Hahn via llvm-commits
- [clang] [llvm] [Clang] Add __builtin_assume_dereferenceable to encode deref assumption. (PR #121789)
Florian Hahn via llvm-commits
- [clang] [llvm] [Clang] Add __builtin_assume_dereferenceable to encode deref assumption. (PR #121789)
Florian Hahn via llvm-commits
- [clang] [llvm] [Clang] Add __builtin_assume_dereferenceable to encode deref assumption. (PR #121789)
Florian Hahn via llvm-commits
- [llvm] LAA: be more precise on different store sizes (PR #122318)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorize] Enable vectorisation of early exit loops with live-outs (PR #120567)
Florian Hahn via llvm-commits
- [llvm] [LV] Fix FindLastIV reduction for epilogue vectorization. (PR #120395)
Florian Hahn via llvm-commits
- [llvm] [LV] Fix FindLastIV reduction for epilogue vectorization. (PR #120395)
Florian Hahn via llvm-commits
- [llvm] [LV] Fix FindLastIV reduction for epilogue vectorization. (PR #120395)
Florian Hahn via llvm-commits
- [llvm] [LV] Fix FindLastIV reduction for epilogue vectorization. (PR #120395)
Florian Hahn via llvm-commits
- [compiler-rt] [compiler-rt][tysan] adding posix strndup interception. (PR #122255)
Florian Hahn via llvm-commits
- [clang] [llvm] [Clang] Add __builtin_assume_dereferenceable to encode deref assumption. (PR #121789)
Florian Hahn via llvm-commits
- [compiler-rt] [TySan] Fix struct access with different bases (PR #120412)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Update final IV exit value via VPlan. (PR #112147)
Florian Hahn via llvm-commits
- [llvm] [TySan] Skip instrumentation for function declarations (PR #122488)
Florian Hahn via llvm-commits
- [compiler-rt] [TySan] Fix struct access with different bases (PR #120412)
Florian Hahn via llvm-commits
- [compiler-rt] [TySan] Fix struct access with different bases (PR #120412)
Florian Hahn via llvm-commits
- [llvm] [SLP] NFC. Use InstructionsState::valid if users just want to know whether VL has same opcode. (PR #120217)
Florian Hahn via llvm-commits
- [llvm] [SLP] NFC. Use InstructionsState::valid if users just want to know whether VL has same opcode. (PR #120217)
Florian Hahn via llvm-commits
- [llvm] 44058e5 - [LV] Precommit tests for #106441.
Florian Hahn via llvm-commits
- [llvm] [LV][EVL] Disable fixed-order recurrence idiom with EVL tail folding. (PR #122458)
Florian Hahn via llvm-commits
- [llvm] [LV][EVL] Disable fixed-order recurrence idiom with EVL tail folding. (PR #122458)
Florian Hahn via llvm-commits
- [llvm] [LV][EVL] Disable fixed-order recurrence idiom with EVL tail folding. (PR #122458)
Florian Hahn via llvm-commits
- [llvm] 7f59b4e - [VPlan] Skip non-induction phi recipes in legalizeAndOptimizeInductions.
Florian Hahn via llvm-commits
- [llvm] [LV][VPlan] Add fast flags for selectRecipe (PR #121023)
Florian Hahn via llvm-commits
- [llvm] [LV][VPlan] Add fast flags for selectRecipe (PR #121023)
Florian Hahn via llvm-commits
- [llvm] [DSE] Use alias analysis to identify no-op stores (PR #122610)
Florian Hahn via llvm-commits
- [llvm] 1afba19 - [VPlan] Try to narrow wide and replicating recipes to uniform recipes.
Florian Hahn via llvm-commits
- [llvm] 0ebb3ac - Revert "[VPlan] Try to narrow wide and replicating recipes to uniform recipes."
Florian Hahn via llvm-commits
- [llvm] 3ff1d01 - Recommit "[VPlan] Try to narrow wide and replicating recipes to uniform recipes."
Florian Hahn via llvm-commits
- [llvm] [aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (PR #121516)
Florian Hahn via llvm-commits
- [llvm] f5a35a3 - [LV] Add test cases with incorrect IV live-outs.
Florian Hahn via llvm-commits
- [llvm] 8df64ed - [LV] Don't consider IV increments uniform if exit value is used outside.
Florian Hahn via llvm-commits
- [llvm] [VPlan] Update final IV exit value via VPlan. (PR #112147)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Update final IV exit value via VPlan. (PR #112147)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Update final IV exit value via VPlan. (PR #112147)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Update final IV exit value via VPlan. (PR #112147)
Florian Hahn via llvm-commits
- [llvm] [Vectorizer] fix GEPs incorrectly marked as "inbounds" (PR #120730)
Florian Mayer via llvm-commits
- [llvm] [Vectorizer] fix GEPs incorrectly marked as "inbounds" (PR #120730)
Florian Mayer via llvm-commits
- [llvm] [Vectorizer] fix GEPs incorrectly marked as "inbounds" (PR #120730)
Florian Mayer via llvm-commits
- [llvm] [Vectorizer] fix GEPs incorrectly marked as "inbounds" (PR #120730)
Florian Mayer via llvm-commits
- [llvm] [Vectorizer] fix GEPs incorrectly marked as "inbounds" (PR #120730)
Florian Mayer via llvm-commits
- [compiler-rt] [ubsan] Use internal_memcpy to copy ubsan bits size (PR #121586)
Florian Mayer via llvm-commits
- [llvm] [LV] Drop incorrect inbounds for reverse vector pointer when folding tail (PR #120730)
Florian Mayer via llvm-commits
- [llvm] [LV] Drop incorrect inbounds for reverse vector pointer when folding tail (PR #120730)
Florian Mayer via llvm-commits
- [llvm] [MTE] generalize overalignment / size of MTE globals (PR #121957)
Florian Mayer via llvm-commits
- [llvm] [MTE] generalize overalignment / size of MTE globals (PR #121957)
Florian Mayer via llvm-commits
- [llvm] Fix various cl::desc typos and whitespace issues. (PR #121955)
Florian Mayer via llvm-commits
- [llvm] Fix various cl::desc typos and whitespace issues. (PR #121955)
Florian Mayer via llvm-commits
- [compiler-rt] [compiler-rt][rtsan] adding setlinebuf/setbuffer interception. (PR #122018)
Florian Mayer via llvm-commits
- [compiler-rt] [compiler-rt][rtsan] adding setlinebuf/setbuffer interception. (PR #122018)
Florian Mayer via llvm-commits
- [compiler-rt] [compiler-rt][rtsan] adding setlinebuf/setbuffer interception. (PR #122018)
Florian Mayer via llvm-commits
- [compiler-rt] [compiler-rt][rtsan] adding setlinebuf/setbuffer interception. (PR #122018)
Florian Mayer via llvm-commits
- [compiler-rt] [compiler-rt][rtsan] adding setlinebuf/setbuffer interception. (PR #122018)
Florian Mayer via llvm-commits
- [compiler-rt] [compiler-rt][rtsan] adding setlinebuf/setbuffer interception. (PR #122018)
Florian Mayer via llvm-commits
- [compiler-rt] [compiler-rt][rtsan] adding setlinebuf/setbuffer interception. (PR #122018)
Florian Mayer via llvm-commits
- [compiler-rt] [compiler-rt][rtsan] adding setlinebuf/setbuffer interception. (PR #122018)
Florian Mayer via llvm-commits
- [compiler-rt] [TySan] Intercept malloc_size on Apple platforms. (PR #122133)
Florian Mayer via llvm-commits
- [compiler-rt] [TySan] Intercept malloc_size on Apple platforms. (PR #122133)
Florian Mayer via llvm-commits
- [compiler-rt] [TySan] Intercept malloc_size on Apple platforms. (PR #122133)
Florian Mayer via llvm-commits
- [compiler-rt] [TySan] Intercept malloc_size on Apple platforms. (PR #122133)
Florian Mayer via llvm-commits
- [compiler-rt] [TySan] Intercept malloc_size on Apple platforms. (PR #122133)
Florian Mayer via llvm-commits
- [compiler-rt] [TySan] Intercept malloc_size on Apple platforms. (PR #122133)
Florian Mayer via llvm-commits
- [compiler-rt] [compiler-rt][tysan] adding posix strndup interception. (PR #122255)
Florian Mayer via llvm-commits
- [llvm] [hwasan] Omit tag check for null pointers (PR #122206)
Florian Mayer via llvm-commits
- [libcxxabi] [llvm] [libcxxabi][ItaniumDemangle] Demangle DF16b as std::bfloat16_t (PR #120109)
Fraser Cormack via llvm-commits
- [libcxxabi] [llvm] [libcxxabi][ItaniumDemangle] Demangle DF16b as std::bfloat16_t (PR #120109)
Fraser Cormack via llvm-commits
- [clang] [llvm] [BasicAA] Do not decompose past casts with different index width (PR #119365)
Fraser Cormack via llvm-commits
- [llvm] [AMDGPU] Fix spurious NoAlias results (PR #122309)
Fraser Cormack via llvm-commits
- [llvm] [AMDGPU] Fix spurious NoAlias results (PR #122309)
Fraser Cormack via llvm-commits
- [llvm] [AMDGPU] Fix spurious NoAlias results (PR #122309)
Fraser Cormack via llvm-commits
- [llvm] [AMDGPU] Fix spurious NoAlias results (PR #122309)
Fraser Cormack via llvm-commits
- [llvm] [CodeGen] MachineLICM: Do not consider "loop liveins" as loop defs (PR #121769)
Gaëtan Bossu via llvm-commits
- [llvm] [CodeGen] MachineLICM: Do not consider "loop liveins" as loop defs (PR #121769)
Gaëtan Bossu via llvm-commits
- [llvm] [CodeGen] MachineLICM: Do not consider "loop liveins" as loop defs (PR #121769)
Gaëtan Bossu via llvm-commits
- [llvm] [CodeGen] MachineLICM: Do not consider "loop liveins" as loop defs (PR #121769)
Gaëtan Bossu via llvm-commits
- [llvm] [CodeGen] MachineLICM: Do not consider "loop liveins" as loop defs (PR #121769)
Gaëtan Bossu via llvm-commits
- [llvm] [CodeGen] MachineLICM: Do not consider "loop liveins" as loop defs (PR #121769)
Gaëtan Bossu via llvm-commits
- [llvm] [CodeGen] MachineLICM: Do not consider "loop liveins" as loop defs (PR #121769)
Gaëtan Bossu via llvm-commits
- [llvm] [llvm][Docs] add discord bot calendar capability notes (PR #122140)
George Burgess IV via llvm-commits
- [llvm] [LoopUnroll] Ignore inlinable calls if unrolling is forced (PR #88149)
George Burgess IV via llvm-commits
- [llvm] [LoopUnroll] Ignore inlinable calls if unrolling is forced (PR #88149)
George Burgess IV via llvm-commits
- [llvm] [llvm][Docs] add discord bot calendar capability notes (PR #122140)
George Burgess IV via llvm-commits
- [llvm] [llvm][Docs] add discord bot calendar capability notes (PR #122140)
George Burgess IV via llvm-commits
- [llvm] [llvm][Docs] add discord bot calendar capability notes (PR #122140)
George Burgess IV via llvm-commits
- [llvm] [BOLT][AArch64] Support for pointer authentication (v2) (PR #120064)
Gergely Bálint via llvm-commits
- [llvm] [BOLT][AArch64] Support for pointer authentication (v2) (PR #120064)
Gergely Bálint via llvm-commits
- [llvm] [SelectionDAG] Add an ISD node for vector.extract.last.active (PR #118810)
Graham Hunter via llvm-commits
- [llvm] [SelectionDAG] Add an ISD node for vector.extract.last.active (PR #118810)
Graham Hunter via llvm-commits
- [llvm] [SelectionDAG] Add an ISD node for vector.extract.last.active (PR #118810)
Graham Hunter via llvm-commits
- [llvm] [SelectionDAG] Add an ISD node for vector.extract.last.active (PR #118810)
Graham Hunter via llvm-commits
- [llvm] [SelectionDAG] Add an ISD node for vector.extract.last.active (PR #118810)
Graham Hunter via llvm-commits
- [llvm] [GSYM] Add support for querying merged functions in llvm-gsymutil (PR #120991)
Greg Clayton via llvm-commits
- [llvm] [GSYM] Add support for querying merged functions in llvm-gsymutil (PR #120991)
Greg Clayton via llvm-commits
- [llvm] [GSYM] Add support for querying merged functions in llvm-gsymutil (PR #120991)
Greg Clayton via llvm-commits
- [llvm] [GSYM] Add support for querying merged functions in llvm-gsymutil (PR #120991)
Greg Clayton via llvm-commits
- [llvm] [GSYM] Add support for querying merged functions in llvm-gsymutil (PR #120991)
Greg Clayton via llvm-commits
- [llvm] [GSYM] Add support for querying merged functions in llvm-gsymutil (PR #120991)
Greg Clayton via llvm-commits
- [llvm] [GSYM] Add support for querying merged functions in llvm-gsymutil (PR #120991)
Greg Clayton via llvm-commits
- [llvm] [GSYM] Add support for querying merged functions in llvm-gsymutil (PR #120991)
Greg Clayton via llvm-commits
- [llvm] [GSYM] Add support for querying merged functions in llvm-gsymutil (PR #120991)
Greg Clayton via llvm-commits
- [llvm] [GSYM] Add support for querying merged functions in llvm-gsymutil (PR #120991)
Greg Clayton via llvm-commits
- [llvm] [GSYM] Add support for querying merged functions in llvm-gsymutil (PR #120991)
Greg Clayton via llvm-commits
- [llvm] [GSYM] Add support for querying merged functions in llvm-gsymutil (PR #120991)
Greg Clayton via llvm-commits
- [llvm] [GSYM] Add support for querying merged functions in llvm-gsymutil (PR #120991)
Greg Clayton via llvm-commits
- [lldb] [llvm] [LLDB][Minidump] Make workaround for the Dynamic loader issue (PR #120166)
Greg Clayton via llvm-commits
- [lldb] [llvm] [LLDB][Minidump] Make workaround for the Dynamic loader issue (PR #120166)
Greg Clayton via llvm-commits
- [lldb] [llvm] [LLDB][Minidump] Make workaround for the Dynamic loader issue (PR #120166)
Greg Clayton via llvm-commits
- [lldb] [llvm] [LLDB][Minidump] Make workaround for the Dynamic loader issue (PR #120166)
Greg Clayton via llvm-commits
- [llvm] [llvm-gsymutil] Add support for merged functions lookup differentiation (PR #122409)
Greg Clayton via llvm-commits
- [llvm] [llvm-gsymutil] Add support for merged functions lookup differentiation (PR #122409)
Greg Clayton via llvm-commits
- [llvm] [TOOLS][DWARFDUMP][DWARF] Print full DIE offset for a CU or local TU (PR #121877)
Greg Clayton via llvm-commits
- [llvm] [TOOLS][DWARFDUMP][DWARF] Print full DIE offset for a CU or local TU (PR #121877)
Greg Clayton via llvm-commits
- [llvm] [TOOLS][DWARFDUMP][DWARF] Print full DIE offset for a CU or local TU (PR #121877)
Greg Clayton via llvm-commits
- [llvm] [TOOLS][DWARFDUMP][DWARF] Print full DIE offset for a CU or local TU (PR #121877)
Greg Clayton via llvm-commits
- [llvm] [TOOLS][DWARFDUMP][DWARF] Print full DIE offset for a CU or local TU (PR #121877)
Greg Clayton via llvm-commits
- [llvm] [TOOLS][DWARFDUMP][DWARF] Print full DIE offset for a CU or local TU (PR #121877)
Greg Clayton via llvm-commits
- [llvm] [TOOLS][DWARFDUMP][DWARF] Print full DIE offset for a CU or local TU (PR #121877)
Greg Clayton via llvm-commits
- [lldb] [llvm] Debuginfod cache use index cache settings and include real file name (PR #120814)
Greg Clayton via llvm-commits
- [lldb] [llvm] Debuginfod cache use index cache settings and include real file name (PR #120814)
Greg Clayton via llvm-commits
- [lldb] [llvm] Debuginfod cache use index cache settings and include real file name (PR #120814)
Greg Clayton via llvm-commits
- [lldb] [llvm] Debuginfod cache use index cache settings and include real file name (PR #120814)
Greg Clayton via llvm-commits
- [lldb] [llvm] Debuginfod cache use index cache settings and include real file name (PR #120814)
Greg Clayton via llvm-commits
- [clang] [llvm] [HLSL] Move length support out of the DirectX Backend (PR #121611)
Greg Roth via llvm-commits
- [clang] [llvm] [HLSL] Move length support out of the DirectX Backend (PR #121611)
Greg Roth via llvm-commits
- [clang] [llvm] [HLSL] Move length support out of the DirectX Backend (PR #121611)
Greg Roth via llvm-commits
- [clang] [llvm] [HLSL] Move length support out of the DirectX Backend (PR #121611)
Greg Roth via llvm-commits
- [clang] [llvm] [HLSL] Move length support out of the DirectX Backend (PR #121611)
Greg Roth via llvm-commits
- [clang] [llvm] [HLSL] Move length support out of the DirectX Backend (PR #121611)
Greg Roth via llvm-commits
- [clang] [llvm] [HLSL] Move length support out of the DirectX Backend (PR #121611)
Greg Roth via llvm-commits
- [clang] [llvm] [HLSL] Move length support out of the DirectX Backend (PR #121611)
Greg Roth via llvm-commits
- [llvm] [AArch64] Consider MOVaddr* as cheap if fuse-adrp-add (PR #121904)
Guy David via llvm-commits
- [llvm] [AArch64] Consider MOVaddr* as cheap if fuse-adrp-add (PR #121904)
Guy David via llvm-commits
- [llvm] [AArch64] Consider MOVaddr* as cheap if fuse-adrp-add (PR #121904)
Guy David via llvm-commits
- [llvm] [AArch64] Consider MOVaddr* as cheap if fuse-adrp-add (PR #121904)
Guy David via llvm-commits
- [llvm] MachineVerifier: Check stack protector is top-most in frame (PR #121481)
Guy David via llvm-commits
- [llvm] MachineVerifier: Check stack protector is top-most in frame (PR #121481)
Guy David via llvm-commits
- [llvm] MachineVerifier: Check stack protector is top-most in frame (PR #122635)
Guy David via llvm-commits
- [llvm] MachineVerifier: Check stack protector is top-most in frame (PR #122635)
Guy David via llvm-commits
- [llvm] MachineVerifier: Check stack protector is top-most in frame (PR #122635)
Guy David via llvm-commits
- [llvm] MachineVerifier: Check stack protector is top-most in frame (PR #122635)
Guy David via llvm-commits
- [llvm] MachineVerifier: Check stack protector is top-most in frame (PR #122635)
Guy David via llvm-commits
- [llvm] [llvm] Mark scavenging spill-slots as *spilled* stack objects. (PR #122673)
Guy David via llvm-commits
- [llvm] MachineVerifier: Check stack protector is top-most in frame (PR #122635)
Guy David via llvm-commits
- [llvm] MachineVerifier: Check stack protector is top-most in frame (PR #122635)
Guy David via llvm-commits
- [llvm] [SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (PR #120198)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (PR #120198)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (PR #120198)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (PR #120198)
Han-Kuan Chen via llvm-commits
- [llvm] [SLPVectorizer] Refine the scope of RdxOpcode in HorizontalReduction::createOp (NFC) (PR #122239)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Refactor getSameOpcode and reduce for loop iterations. (PR #122241)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (PR #120198)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (PR #120198)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] Normalize debug messages for newTreeEntry. (PR #119514)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] Normalize debug messages for newTreeEntry. (PR #119514)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (PR #120198)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (PR #120198)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Refactor getSameOpcode and reduce for loop iterations. (PR #122241)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (PR #120198)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (PR #120198)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (PR #120198)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Refactor getSameOpcode and reduce for loop iterations. (PR #122241)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Refactor getSameOpcode and reduce for loop iterations. (PR #122241)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (PR #120198)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (PR #120198)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Refactor getSameOpcode and reduce for loop iterations. (PR #122241)
Han-Kuan Chen via llvm-commits
- [llvm] 5454ac2 - Revert "[SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (#120198)"
Han-Kuan Chen via llvm-commits
- [llvm] Revert "[SLP] NFC. Refactor getSameOpcode and reduce for loop iterations." (PR #122407)
Han-Kuan Chen via llvm-commits
- [llvm] Revert "[SLP] NFC. Refactor getSameOpcode and reduce for loop iterations." (PR #122407)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] Normalize debug messages for newTreeEntry. (PR #119514)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Add hasState check. (PR #122443)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Add hasState check. (PR #122443)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] Normalize debug messages for newTreeEntry. (PR #119514)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Use InstructionsState::valid if users just want to know whether VL has same opcode. (PR #120217)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Add hasState check. (PR #122443)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (PR #120198)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Add hasState check. (PR #122443)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Make InstructionsState support default constructor. (PR #121627)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Add hasState check. (PR #122443)
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Use InstructionsState::valid if users just want to know whether VL has same opcode. (PR #120217)
Han-Kuan Chen via llvm-commits
- [llvm] 35e76b6 - Revert "[SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (#120198)"
Han-Kuan Chen via llvm-commits
- [llvm] [SLP] NFC. Use InstructionsState::valid if users just want to know whether VL has same opcode. (PR #120217)
Han-Kuan Chen via llvm-commits
- [llvm] [RISCV] Don't commute with shift if it would break sh{1,2,3}add pattern (PR #119527)
Hans Wennborg via llvm-commits
- [llvm] [RISCV] Don't commute with shift if it would break sh{1,2,3}add pattern (PR #119527)
Hans Wennborg via llvm-commits
- [llvm] 51d7605 - Fix macho-merged-funcs-dwarf.yaml test on Windows
Hans Wennborg via llvm-commits
- [llvm] [GSYM] Add support for querying merged functions in llvm-gsymutil (PR #120991)
Hans Wennborg via llvm-commits
- [compiler-rt] [win/asan] GetInstructionSize: Add test for `8D A4 24 ...`. (PR #119794)
Hans Wennborg via llvm-commits
- [compiler-rt] [win/asan] GetInstructionSize: Add test for `8D A4 24 ...`. (PR #119794)
Hans Wennborg via llvm-commits
- [llvm] Fix dangling IPOAmendableCB function_ref. (PR #120698)
Haojian Wu via llvm-commits
- [llvm] Fix dangling IPOAmendableCB function_ref. (PR #120698)
Haojian Wu via llvm-commits
- [llvm] Fix dangling IPOAmendableCB function_ref. (PR #120698)
Haojian Wu via llvm-commits
- [llvm] Fix dangling IPOAmendableCB function_ref. (PR #120698)
Haojian Wu via llvm-commits
- [llvm] Fix dangling IPOAmendableCB function_ref. (PR #120698)
Haojian Wu via llvm-commits
- [llvm] Add LLVM_GSL_POINTER to llvm::function_ref. (PR #120699)
Haojian Wu via llvm-commits
- [llvm] Add LLVM_GSL_POINTER to llvm::function_ref. (PR #120699)
Haojian Wu via llvm-commits
- [llvm] [DSE] Consider the aliasing through global variable while checking clobber (PR #120044)
Haopeng Liu via llvm-commits
- [llvm] [DSE] Consider the aliasing through global variable while checking clobber (PR #120044)
Haopeng Liu via llvm-commits
- [llvm] [DSE] Consider the aliasing through global variable while checking clobber (PR #120044)
Haopeng Liu via llvm-commits
- [llvm] [DSE] Consider the aliasing through global variable while checking clobber (PR #120044)
Haopeng Liu via llvm-commits
- [llvm] [AArch64] Don't try to sink and(load) (PR #122274)
Hari Limaye via llvm-commits
- [llvm] [IA][RISCV] Support VP intrinsics in InterleavedAccessPass (PR #120490)
Hassnaa Hamdi via llvm-commits
- [llvm] [Analysis]: Allow inlining recursive call IF recursion depth is 1. (PR #119677)
Hassnaa Hamdi via llvm-commits
- [llvm] [IA][RISCV] Support VP intrinsics in InterleavedAccessPass (PR #120490)
Hassnaa Hamdi via llvm-commits
- [llvm] [InterleavedAccessPass]: Ensure that dead nodes get erased only once (PR #122643)
Hassnaa Hamdi via llvm-commits
- [llvm] [Analysis]: Allow inlining recursive call IF recursion depth is 1. (PR #119677)
Hassnaa Hamdi via llvm-commits
- [llvm] [Analysis]: Allow inlining recursive call IF recursion depth is 1. (PR #119677)
Hassnaa Hamdi via llvm-commits
- [llvm] [TTI][AArch64] Detect OperandInfo from scalable splats. (PR #122469)
Hassnaa Hamdi via llvm-commits
- [llvm] [TTI][AArch64] Detect OperandInfo from scalable splats. (PR #122469)
Hassnaa Hamdi via llvm-commits
- [llvm] [WebAssembly] Add -wasm-use-legacy-eh option (PR #122158)
Heejin Ahn via llvm-commits
- [llvm] [WebAssembly] Add -wasm-use-legacy-eh option (PR #122158)
Heejin Ahn via llvm-commits
- [llvm] [WebAssembly] Add -wasm-use-legacy-eh option (PR #122158)
Heejin Ahn via llvm-commits
- [llvm] [WebAssembly] Format WebAssembly ReleaseNote entries (PR #122203)
Heejin Ahn via llvm-commits
- [llvm] [WebAssembly] Format WebAssembly ReleaseNote entries (PR #122203)
Heejin Ahn via llvm-commits
- [llvm] [WebAssembly] Add -wasm-use-legacy-eh option (PR #122158)
Heejin Ahn via llvm-commits
- [llvm] [WebAssembly] Add -wasm-use-legacy-eh option (PR #122158)
Heejin Ahn via llvm-commits
- [llvm] [DirectX] Remove the "checked" variants of `dx.resource.load` (PR #120778)
Helena Kotas via llvm-commits
- [llvm] [DirectX] Add getpointer docs to DXILResources.rst (PR #120779)
Helena Kotas via llvm-commits
- [llvm] HP PA-RISC architecture initial build support (PR #121220)
Helge Deller via llvm-commits
- [clang] [llvm] [HLSL] Adding Flatten and Branch if attributes (PR #116331)
Henry Jiang via llvm-commits
- [clang] [llvm] [HLSL] Adding Flatten and Branch if attributes (PR #116331)
Henry Jiang via llvm-commits
- [llvm] [AIX][AsmPrinter] Fix unsigned subtraction wrap-around (PR #122214)
Henry Jiang via llvm-commits
- [llvm] [MC][Mips] Generate required IMAGE_REL_MIPS_PAIR relocation (PR #120876)
Hervé Poussineau via llvm-commits
- [llvm] [MC][CodeGen][Mips] Add CodeView mapping (PR #120877)
Hervé Poussineau via llvm-commits
- [llvm] [Mips] Handle declspec(dllimport) on mipsel-windows-* triples (PR #120912)
Hervé Poussineau via llvm-commits
- [llvm] [AIX][AsmPrinter] Fix unsigned subtraction wrap-around (PR #122214)
Hubert Tong via llvm-commits
- [llvm] [AIX][AsmPrinter] Fix unsigned subtraction wrap-around (PR #122214)
Hubert Tong via llvm-commits
- [clang] [llvm] [Darwin][Driver][clang] apple-none-macho orders the resource directory after internal-externc-isystem when nostdlibinc is used (PR #120507)
Ian Anderson via llvm-commits
- [clang] [llvm] [Darwin][Driver][clang] apple-none-macho orders the resource directory after internal-externc-isystem when nostdlibinc is used (PR #120507)
Ian Anderson via llvm-commits
- [clang] [llvm] [Darwin][Driver][clang] apple-none-macho orders the resource directory after internal-externc-isystem when nostdlibinc is used (PR #122035)
Ian Anderson via llvm-commits
- [clang] [llvm] [Darwin][Driver][clang] apple-none-macho orders the resource directory after internal-externc-isystem when nostdlibinc is used (PR #122035)
Ian Anderson via llvm-commits
- [clang] [llvm] [Darwin][Driver][clang] apple-none-macho orders the resource directory after internal-externc-isystem when nostdlibinc is used (PR #122035)
Ian Anderson via llvm-commits
- [clang] [llvm] [Darwin][Driver][clang] apple-none-macho orders the resource directory after internal-externc-isystem when nostdlibinc is used (PR #122035)
Ian Anderson via llvm-commits
- [clang] [llvm] [Darwin][Driver][clang] apple-none-macho orders the resource directory after internal-externc-isystem when nostdlibinc is used (PR #122035)
Ian Anderson via llvm-commits
- [llvm] [llvm-objcopy][ELF] Add an option to remove notes (PR #118739)
Igor Kudrin via llvm-commits
- [llvm] Hexagon loop idiom pass segfaults when -debug present (PR #121828)
Ikhlas Ajbar via llvm-commits
- [llvm] [MachinePipeliner] Improve loop carried dependence analysis (PR #94185)
Ikhlas Ajbar via llvm-commits
- [llvm] [MachinePipeliner] Improve loop carried dependence analysis (PR #94185)
Ikhlas Ajbar via llvm-commits
- [llvm] Hexagon loop idiom pass segfaults when -debug present (PR #121828)
Ikhlas Ajbar via llvm-commits
- [llvm] Hexagon loop idiom pass segfaults when -debug present (PR #121828)
Ikhlas Ajbar via llvm-commits
- [llvm] [Hexagon] Add missing pattern for v8i1 type (PR #120703)
Ikhlas Ajbar via llvm-commits
- [llvm] [Hexagon] Add missing pattern for v8i1 type (PR #120703)
Ikhlas Ajbar via llvm-commits
- [clang] [llvm] [AMDGPU][True16][MC] true16 for v_alignbyte_b32 (PR #119750)
Ivan Kosarev via llvm-commits
- [clang] [llvm] [AMDGPU][True16][MC] true16 for v_alignbyte_b32 (PR #119750)
Ivan Kosarev via llvm-commits
- [llvm] [AMDGPU][True16][MC] true16 for v_trunc_f16 (PR #120693)
Ivan Kosarev via llvm-commits
- [llvm] [AMDGPU][True16][MC] true16 for v_not_b16 (PR #120659)
Ivan Kosarev via llvm-commits
- [lld] [LLD][COFF] Sort base relocations (PR #121699)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Emit base relocation for native CHPE metadata pointer on ARM64X (PR #121500)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Silence GCC warning in Arm64XDynamicRelocEntry::getSize (NFC) (PR #122382)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Add basic ARM64X dynamic relocations support (PR #118035)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Use EC load config for ARM64X relocations of load config directory (PR #121337)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Use EC load config for ARM64X relocations of load config directory (PR #121337)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Silence GCC warning in Arm64XDynamicRelocEntry::getSize (NFC) (PR #122382)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Use EC load config for ARM64X relocations of load config directory (PR #121337)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Use EC load config for ARM64X relocations of load config directory (PR #121337)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Use EC load config for ARM64X relocations of load config directory (PR #121337)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Use appropriate symbol table for -include argument on ARM64X (PR #122554)
Jacek Caban via llvm-commits
- [lld] [LLD][COFF] Use appropriate symbol table for -include argument on ARM64X (PR #122554)
Jacek Caban via llvm-commits
- [llvm] [CodeGen][ARM64EC] Mangle EH personality handler names (PR #121652)
Jacek Caban via llvm-commits
- [llvm] [AArch64] Correct position of CFI Instruction for Pointer Authentication (PR #121559)
Jack Styles via llvm-commits
- [llvm] [AArch64] Ensure APAS instruction passes register parameter (PR #121928)
Jack Styles via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Jacob Bramley via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Jacob Bramley via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Jacob Bramley via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Jacob Bramley via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Jacob Bramley via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Jacob Bramley via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Jacob Bramley via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Jacob Bramley via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Jacob Bramley via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Jacob Bramley via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Jacob Bramley via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Jacob Bramley via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Jacob Bramley via llvm-commits
- [llvm] [BOLT][binary-analysis] Add initial pac-ret gadget scanner (PR #122304)
Jacob Bramley via llvm-commits
- [lldb] [llvm] [LLDB][Minidump] Make workaround for the Dynamic loader issue (PR #120166)
Jacob Lalonde via llvm-commits
- [lldb] [llvm] [LLDB][Minidump] Make workaround for the Dynamic loader issue (PR #120166)
Jacob Lalonde via llvm-commits
- [lldb] [llvm] [LLDB][Minidump] Make workaround for the Dynamic loader issue (PR #120166)
Jacob Lalonde via llvm-commits
- [llvm] [InstCombine] fold unsigned predicates on srem result (PR #122520)
Jacob Young via llvm-commits
- [llvm] [InstCombine] fold unsigned predicates on srem result (PR #122520)
Jacob Young via llvm-commits
- [llvm] [InstCombine] fold unsigned predicates on srem result (PR #122520)
Jacob Young via llvm-commits
- [llvm] [InstCombine] fold unsigned predicates on srem result (PR #122520)
Jacob Young via llvm-commits
- [llvm] [InstCombine] fold unsigned predicates on srem result (PR #122520)
Jacob Young via llvm-commits
- [llvm] [InstCombine] fold unsigned predicates on srem result (PR #122520)
Jacob Young via llvm-commits
- [llvm] [InstCombine] fold unsigned predicates on srem result (PR #122520)
Jacob Young via llvm-commits
- [llvm] [InstCombine] fold unsigned predicates on srem result (PR #122520)
Jacob Young via llvm-commits
- [llvm] [InstCombine] fold unsigned predicates on srem result (PR #122520)
Jacob Young via llvm-commits
- [llvm] [InstCombine] fold unsigned predicates on srem result (PR #122520)
Jacob Young via llvm-commits
- [llvm] [InstCombine] fold unsigned predicates on srem result (PR #122520)
Jacob Young via llvm-commits
- [llvm] [InstCombine] fold unsigned predicates on srem result (PR #122520)
Jacob Young via llvm-commits
- [llvm] [InstCombine] fold unsigned predicates on srem result (PR #122520)
Jacob Young via llvm-commits
- [llvm] [InstCombine] fold unsigned predicates on srem result (PR #122520)
Jacob Young via llvm-commits
- [llvm] [InstCombine] fold unsigned predicates on srem result (PR #122520)
Jacob Young via llvm-commits
- [llvm] [InstCombine] fold unsigned predicates on srem result (PR #122520)
Jacob Young via llvm-commits
- [llvm] [InstCombine] fold unsigned predicates on srem result (PR #122520)
Jacob Young via llvm-commits
- [llvm] [InstCombine] fold unsigned predicates on srem result (PR #122520)
Jacob Young via llvm-commits
- [llvm] [AMDGPU] Allow selection of BITOP3 for some 2 opcodes and B32 cases (PR #122267)
Jakub Chlanda via llvm-commits
- [llvm] [AMDGPU] Allow selection of BITOP3 for some 2 opcodes and B32 cases (PR #122267)
Jakub Chlanda via llvm-commits
- [llvm] [AMDGPU] Allow selection of BITOP3 for some 2 opcodes and B32 cases (PR #122267)
Jakub Chlanda via llvm-commits
- [llvm] [AMDGPU] Allow selection of BITOP3 for some 2 opcodes and B32 cases (PR #122267)
Jakub Chlanda via llvm-commits
- [llvm] [AMDGPU] Provide default value in get intrinsic param type (PR #122448)
Jakub Chlanda via llvm-commits
- [llvm] [AMDGPU] Provide default value in get intrinsic param type (PR #122448)
Jakub Chlanda via llvm-commits
- [llvm] [AMDGPU] Provide default value in get intrinsic param type (PR #122448)
Jakub Chlanda via llvm-commits
- [llvm] [AMDGPU] Provide default value in get intrinsic param type (PR #122448)
Jakub Chlanda via llvm-commits
- [llvm] [AMDGPU] Provide default value in get intrinsic param type (PR #122448)
Jakub Chlanda via llvm-commits
- [llvm] [ADT] Make null PointerUnion with different active members compare equal (PR #121847)
Jakub Kuderski via llvm-commits
- [llvm] [ADT] Make null PointerUnion with different active members compare equal (PR #121847)
Jakub Kuderski via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Jakub Kuderski via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Jakub Kuderski via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Jakub Kuderski via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Jakub Kuderski via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Jakub Kuderski via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Jakub Kuderski via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Jakub Kuderski via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Jakub Kuderski via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Jakub Kuderski via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Jakub Kuderski via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Jakub Kuderski via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Jakub Kuderski via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Jakub Kuderski via llvm-commits
- [llvm] [APFloat]extract `fltSemantics::isRepresentableBy` to header (PR #122636)
Jakub Kuderski via llvm-commits
- [llvm] [AArch64][SVE] Add dot product codegen for partial reductions with no binary operation on input (PR #120207)
James Chesterman via llvm-commits
- [llvm] [AArch64][SVE] Add dot product codegen for partial reductions with no binary operation on input (PR #120207)
James Chesterman via llvm-commits
- [llvm] [AArch64][SVE] Add dot product codegen for partial reductions with no binary operation on input (PR #120207)
James Chesterman via llvm-commits
- [llvm] [AArch64][SVE] Add partial reduction SDNodes (PR #117185)
James Chesterman via llvm-commits
- [llvm] [AArch64][SVE] Add partial reduction SDNodes (PR #117185)
James Chesterman via llvm-commits
- [llvm] [AArch64][SVE] Add partial reduction SDNodes (PR #117185)
James Chesterman via llvm-commits
- [llvm] [AArch64][SVE] Add partial reduction SDNodes (PR #117185)
James Chesterman via llvm-commits
- [llvm] [AArch64][SVE] Add partial reduction SDNodes (PR #117185)
James Chesterman via llvm-commits
- [llvm] [SHT_LLVM_BB_ADDR_MAP] Add a new PGOAnalysisMap feature to emit dynamic instruction count (PR #119303)
James Henderson via llvm-commits
- [llvm] [llvm-objdump] Remove leading whitespace for PT_GNU_PROPERTY. (PR #121591)
James Henderson via llvm-commits
- [llvm] [llvm-objdump] Remove leading whitespace for PT_GNU_PROPERTY. (PR #121591)
James Henderson via llvm-commits
- [llvm] [llvm-objdump] Remove leading whitespace for PT_GNU_PROPERTY. (PR #121591)
James Henderson via llvm-commits
- [llvm] [llvm-objdump] Print out xcoff load section of xcoff object file with option private-headers (PR #121226)
James Henderson via llvm-commits
- [llvm] [llvm-objdump] Print out xcoff load section of xcoff object file with option private-headers (PR #121226)
James Henderson via llvm-commits
- [llvm] [llvm-objdump] Remove leading whitespace for PT_GNU_PROPERTY. (PR #121591)
James Henderson via llvm-commits
- [llvm] undo breaking changes from "Reduce AsmPrinterHandlers virt. fn calls" without reverting the performance gains (PR #122297)
Jameson Nash via llvm-commits
- [llvm] [DSE] Consider the aliasing through global variable while checking clobber (PR #120044)
Jan Voung via llvm-commits
- [llvm] [M68k] always use movem for register spills (PR #106715)
Janis Heims via llvm-commits
- [llvm] [M68k] always use movem for register spills (PR #106715)
Janis Heims via llvm-commits
- [llvm] [M68k] Use M68010 cpu as target for SR move test (PR #122452)
Janis Heims via llvm-commits
- [llvm] [M68k] Use M68010 cpu as target for SR move test (PR #122452)
Janis Heims via llvm-commits
- [llvm] [M68k] Use M68010 cpu as target for SR move test (PR #122452)
Janis Heims via llvm-commits
- [llvm] Make AMDGPUCombinerHelper methods const (PR #121740)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Rework getDivNumBits API (PR #119768)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Calculate getDivNumBits' AtLeast using bitwidth (PR #121758)
Jay Foad via llvm-commits
- [llvm] [CodeGen] MachineLICM: Do not consider "loop liveins" as loop defs (PR #121769)
Jay Foad via llvm-commits
- [llvm] [CodeGen] MachineLICM: Do not consider "loop liveins" as loop defs (PR #121769)
Jay Foad via llvm-commits
- [llvm] [CodeGen] MachineLICM: Do not consider "loop liveins" as loop defs (PR #121769)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Rework getDivNumBits API (PR #119768)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Rework getDivNumBits API (PR #119768)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Rework getDivNumBits API (PR #119768)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Rework getDivNumBits API (PR #119768)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Rework getDivNumBits API (PR #119768)
Jay Foad via llvm-commits
- [llvm] [SourceMgr] Clean up handling of line ending characters (PR #120605)
Jay Foad via llvm-commits
- [llvm] [SourceMgr] Clean up handling of line ending characters (PR #120605)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Disallow null for more resource operands (PR #121941)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Disallow null for more resource operands (PR #121941)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Disallow null for more resource operands (PR #121941)
Jay Foad via llvm-commits
- [llvm] [IR][AsmParser] Revamp how floating-point literals in LLVM IR. (PR #121838)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Disallow null for more resource operands (PR #121941)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Rework getDivNumBits API (PR #119768)
Jay Foad via llvm-commits
- [llvm] [AMDGPU][SDAG] Try folding "lshr i64 + mad" to "mad_u64_u32" (PR #119218)
Jay Foad via llvm-commits
- [llvm] [AMDGPU][SDAG] Try folding "lshr i64 + mad" to "mad_u64_u32" (PR #119218)
Jay Foad via llvm-commits
- [llvm] [AMDGPU][SDAG] Try folding "lshr i64 + mad" to "mad_u64_u32" (PR #119218)
Jay Foad via llvm-commits
- [llvm] [SelectionDAG][AMDGPU] Negative offset when selecting scratch sv offsets (PR #122251)
Jay Foad via llvm-commits
- [llvm] [SelectionDAG][AMDGPU] Negative offset when selecting scratch sv offsets (PR #122251)
Jay Foad via llvm-commits
- [llvm] [TableGen] Use assert instead of PrintFatalError in TGLexer. NFC. (PR #122303)
Jay Foad via llvm-commits
- [llvm] [TableGen] Use assert instead of PrintFatalError in TGLexer. NFC. (PR #122303)
Jay Foad via llvm-commits
- [llvm] [TableGen] Use assert instead of PrintFatalError in TGLexer. NFC. (PR #122303)
Jay Foad via llvm-commits
- [llvm] [CodeGen] Add const to getAddrModeArguments argument. NFC. (PR #122335)
Jay Foad via llvm-commits
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- [llvm] [IA][RISCV] Support VP intrinsics in InterleavedAccessPass (PR #120490)
Luke Lau via llvm-commits
- [llvm] [IA][RISCV] Support VP intrinsics in InterleavedAccessPass (PR #120490)
Luke Lau via llvm-commits
- [llvm] [RISCV][VLOPT] Add getOperandInfo for integer and floating point widening reductions (PR #122176)
Luke Lau via llvm-commits
- [llvm] [RISCV] Support vp.{gather,scatter} in RISCVGatherScatterLowering (PR #122232)
Luke Lau via llvm-commits
- [llvm] [RISCV] Support vp.{gather,scatter} in RISCVGatherScatterLowering (PR #122232)
Luke Lau via llvm-commits
- [llvm] [RISCV] Allow non-loop invariant steps in RISCVGatherScatterLowering (PR #122244)
Luke Lau via llvm-commits
- [llvm] [RISCV] Fix masked->unmasked peephole handling masked pseudos with no passthru (PR #122253)
Luke Lau via llvm-commits
- [llvm] [RISCV] Fix masked->unmasked peephole handling masked pseudos with no passthru (PR #122253)
Luke Lau via llvm-commits
- [llvm] [RISCV] Fix masked->unmasked peephole handling masked pseudos with no passthru (PR #122253)
Luke Lau via llvm-commits
- [llvm] [RISCV] Support vp.{gather,scatter} in RISCVGatherScatterLowering (PR #122232)
Luke Lau via llvm-commits
- [llvm] [RISCV] Support vp.{gather,scatter} in RISCVGatherScatterLowering (PR #122232)
Luke Lau via llvm-commits
- [llvm] [VPlan] Preserve underlying value when EVL transforming intrinsics/casts (PR #121552)
Luke Lau via llvm-commits
- [llvm] [VPlan] Preserve underlying value when EVL transforming intrinsics/casts (PR #121552)
Luke Lau via llvm-commits
- [llvm] [RISCV] Attempt to widen SEW before generic shuffle lowering (PR #122311)
Luke Lau via llvm-commits
- [llvm] [RISCV] Attempt to widen SEW before generic shuffle lowering (PR #122311)
Luke Lau via llvm-commits
- [llvm] [RISCV] Attempt to widen SEW before generic shuffle lowering (PR #122311)
Luke Lau via llvm-commits
- [llvm] [VectorCombine] Use getInstructionCost to cost Shuffle. (PR #122068)
Luke Lau via llvm-commits
- [llvm] [LV][EVL] Disable fixed-order recurrence idiom with EVL tail folding. (PR #122458)
Luke Lau via llvm-commits
- [llvm] [LV][EVL] Disable fixed-order recurrence idiom with EVL tail folding. (PR #122458)
Luke Lau via llvm-commits
- [llvm] [RISCV][VLOPT] Add floating point widening and narrowing convert support (PR #122353)
Luke Lau via llvm-commits
- [llvm] [VPlan] Use VPWidenIntrinsicRecipe to support binary and unary operations with EVL-vectorization (PR #114205)
Luke Lau via llvm-commits
- [llvm] [RISCV] GISel custom lowering for G_ADD/G_SUB (PR #121587)
Luke Quinn via llvm-commits
- [llvm] [RISCV] GISel custom lowering for G_ADD/G_SUB (PR #121587)
Luke Quinn via llvm-commits
- [llvm] [RISCV] GISel custom lowering for G_ADD/G_SUB (PR #121587)
Luke Quinn via llvm-commits
- [llvm] [LoopInterchange] Constrain number of load/stores in a loop (PR #118973)
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- [llvm] [LoopInterchange] Constrain number of load/stores in a loop (PR #118973)
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- [llvm] [LoopInterchange] Relax the legality check to accept more patterns (PR #118267)
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- [llvm] [LoopInterchange] Relax the legality check to accept more patterns (PR #118267)
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- [llvm] [LoopInterchange] Relax the legality check to accept more patterns (PR #118267)
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- [llvm] [LoopInterchange] Relax the legality check to accept more patterns (PR #118267)
Madhur Amilkanthwar via llvm-commits
- [llvm] [LoopInterchange] Relax the legality check to accept more patterns (PR #118267)
Madhur Amilkanthwar via llvm-commits
- [llvm] [SLP] Match poison as instruction with the same opcode (PR #115946)
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- [llvm] [SPIRV] Add support for `cl_khr_extended_bit_ops` (PR #120571)
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- [llvm] [AArch64] Eliminate Common Subexpression of CSEL by Reassociation (PR #121350)
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- [llvm] [AArch64] Eliminate Common Subexpression of CSEL by Reassociation (PR #121350)
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- [llvm] [AArch64] Eliminate Common Subexpression of CSEL by Reassociation (PR #121350)
Marius Kamp via llvm-commits
- [llvm] [AArch64] Eliminate Common Subexpression of CSEL by Reassociation (PR #121350)
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- [compiler-rt] [Darwin][CompilerRT] Set compiler ID to 'Clang' for Compiler RT Tests for Apple Clang (PR #121858)
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- [llvm] [mlir] [TableGen] Do not exit in template argument check (PR #121636)
Markus Böck via llvm-commits
- [llvm] [aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (PR #121516)
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- [lld] [LLD][COFF] Sort base relocations (PR #121699)
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- [lld] [LLD][COFF] Emit base relocation for native CHPE metadata pointer on ARM64X (PR #121500)
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- [lld] [LLD][COFF] Emit base relocation for native CHPE metadata pointer on ARM64X (PR #121500)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] Add basic ARM64X dynamic relocations support (PR #118035)
Martin Storsjö via llvm-commits
- [llvm] [LLVM] Update cmake maintainer (PR #120542)
Martin Storsjö via llvm-commits
- [lld] [LLD][COFF] Silence GCC warning in Arm64XDynamicRelocEntry::getSize (NFC) (PR #122382)
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- [lld] [LLD][COFF] Use EC load config for ARM64X relocations of load config directory (PR #121337)
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- [lld] [LLD][COFF] Use EC load config for ARM64X relocations of load config directory (PR #121337)
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- [lld] [llvm] [RISCV][LLD] Add RISCV zcmt optimise in linker relaxation (PR #77884)
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- [flang] [llvm] [FLANG][OpenMP]Add support for ALIGN clause on OMP ALLOCATE (PR #120791)
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- [flang] [llvm] [FLANG][OpenMP]Add frontend support for ASSUME and ASSUMES (PR #120770)
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- [flang] [llvm] [Flang][OpenMP]Add parsing support for DISPATCH construct (PR #121982)
Mats Petersson via llvm-commits
- [llvm] [NVPTX][SelectionDAG] Add IMAD combine rules + infra to disable default SelectionDAG rules for testing (PR #121724)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Enable kernarg preloading by default on gfx940 (PR #110691)
Matt Arsenault via llvm-commits
- [llvm] [Xtensa] Implement Windowed Register Option. (PR #121118)
Matt Arsenault via llvm-commits
- [llvm] [Xtensa] Implement Windowed Register Option. (PR #121118)
Matt Arsenault via llvm-commits
- [llvm] [Xtensa] Implement Windowed Register Option. (PR #121118)
Matt Arsenault via llvm-commits
- [llvm] Make AMDGPUCombinerHelper methods const (PR #121740)
Matt Arsenault via llvm-commits
- [llvm] [Mips] Fix compiler crash when returning fp128 after calling a functi… (PR #117525)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Rework getDivNumBits API (PR #119768)
Matt Arsenault via llvm-commits
- [llvm] select v_sat_pk from two i16 or v2i16 (PR #121124)
Matt Arsenault via llvm-commits
- [llvm] [Mips] Fix compiler crash when returning fp128 after calling a functi… (PR #117525)
Matt Arsenault via llvm-commits
- [llvm] [Mips] Fix compiler crash when returning fp128 after calling a functi… (PR #117525)
Matt Arsenault via llvm-commits
- [llvm] [Mips] Fix compiler crash when returning fp128 after calling a functi… (PR #117525)
Matt Arsenault via llvm-commits
- [llvm] [TableGen][GISel] Create untyped registers during instruction selection (PR #121270)
Matt Arsenault via llvm-commits
- [llvm] [TableGen][GISel] Create untyped registers during instruction selection (PR #121270)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Correct getDivNumBits' AtLeast calculation to be based on bi… (PR #121758)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Implement IR variant of isFMAFasterThanFMulAndFAdd (PR #121465)
Matt Arsenault via llvm-commits
- [llvm] [Coalescer] Move code added in #116191 (PR #121779)
Matt Arsenault via llvm-commits
- [llvm] RegAllocGreedy: Fix use after free during last chance recoloring (PR #120697)
Matt Arsenault via llvm-commits
- [llvm] RegAllocGreedy: Fix use after free during last chance recoloring (PR #120697)
Matt Arsenault via llvm-commits
- [llvm] RegAllocGreedy: Fix use after free during last chance recoloring (PR #120697)
Matt Arsenault via llvm-commits
- [llvm] RegAllocGreedy: Fix subrange based instruction split logic (PR #120199)
Matt Arsenault via llvm-commits
- [llvm] RegAllocGreedy: Fix subrange based instruction split logic (PR #120199)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Catching inconsistencies in load memory, result, and range metadata type (PR #121247)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Catching inconsistencies in load memory, result, and range metadata type (PR #121247)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Catching inconsistencies in load memory, result, and range metadata type (PR #121247)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Catching inconsistencies in load memory, result, and range metadata type (PR #121247)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Catching inconsistencies in load memory, result, and range metadata type (PR #121247)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][True16][MC] true16 for v_cvt_u32_u16 (PR #120646)
Matt Arsenault via llvm-commits
- [llvm] a8f3eba - AMDGPU: Mark test as XFAIL in expensive_checks builds
Matt Arsenault via llvm-commits
- [llvm] RegAllocGreedy: Fix use after free during last chance recoloring (PR #120697)
Matt Arsenault via llvm-commits
- [llvm] 93e6346 - RegAllocGreedy: Un-disable test in expensive_checks builds
Matt Arsenault via llvm-commits
- [llvm] RegAllocGreedy: Fix use after free during last chance recoloring (PR #120697)
Matt Arsenault via llvm-commits
- [llvm] RegisterCoalescer: Fix assert on remat to copy-to-physreg with subregs (PR #121734)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] InstCombine should fold frexp of select to select of frexp (PR #121227)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] InstCombine should fold frexp of select to select of frexp (PR #121227)
Matt Arsenault via llvm-commits
- [llvm] [NVPTX] Remove `NVPTX::IMAD` opcode, and rely on intruction selection only (PR #121724)
Matt Arsenault via llvm-commits
- [llvm] RISCV: Implement isLoadFromStackSlot/isStoreToStackSlot for rvv (PR #120524)
Matt Arsenault via llvm-commits
- [llvm] [Support] Recycler: Implement move constructor (PR #120555)
Matt Arsenault via llvm-commits
- [llvm] [Support] Recycler: Implement move constructor (PR #120555)
Matt Arsenault via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
Matt Arsenault via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
Matt Arsenault via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Simplify FMF propagation. NFC. (PR #121899)
Matt Arsenault via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
Matt Arsenault via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
Matt Arsenault via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
Matt Arsenault via llvm-commits
- [llvm] [NFC] Make AMDGPUCombinerHelper methods const (PR #121903)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Implement IR variant of isFMAFasterThanFMulAndFAdd (PR #121465)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Implement IR variant of isFMAFasterThanFMulAndFAdd (PR #121465)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Implement IR variant of isFMAFasterThanFMulAndFAdd (PR #121465)
Matt Arsenault via llvm-commits
- [llvm] [ADT] Make null PointerUnion with different active members compare equal (PR #121847)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU][True16][MC] true16 for v_alignbyte_b32 (PR #119750)
Matt Arsenault via llvm-commits
- [llvm] [NFC][AMDGPU] Pre-commit tests for IR variant - isFMAFasterThanFMulAdd (PR #121925)
Matt Arsenault via llvm-commits
- [llvm] [NFC][AMDGPU] Pre-commit tests for IR variant - isFMAFasterThanFMulAdd (PR #121925)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Implement IR variant of isFMAFasterThanFMulAndFAdd (PR #121465)
Matt Arsenault via llvm-commits
- [llvm] [NFC][AMDGPU] Pre-commit tests for IR variant - isFMAFasterThanFMulAdd (PR #121925)
Matt Arsenault via llvm-commits
- [llvm] [NFC][AMDGPU] Pre-commit tests for IR variant - isFMAFasterThanFMulAdd (PR #121925)
Matt Arsenault via llvm-commits
- [llvm] [NFC][AMDGPU] Pre-commit tests for IR variant - isFMAFasterThanFMulAdd (PR #121925)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Disallow null for more resource operands (PR #121941)
Matt Arsenault via llvm-commits
- [llvm] [AArch64][CodeGen] Optimize security cookie check with New Fixup Pass (PR #121938)
Matt Arsenault via llvm-commits
- [llvm] [AArch64][CodeGen] Optimize security cookie check with New Fixup Pass (PR #121938)
Matt Arsenault via llvm-commits
- [llvm] [AArch64][CodeGen] Optimize security cookie check with New Fixup Pass (PR #121938)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen] MachineLICM: Do not consider "loop liveins" as loop defs (PR #121769)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen] MachineLICM: Do not consider "loop liveins" as loop defs (PR #121769)
Matt Arsenault via llvm-commits
- [llvm] [IR] Add `llvm.modf` intrinsic (PR #121948)
Matt Arsenault via llvm-commits
- [llvm] MachineVerifier: Check stack protector is top-most in frame (PR #121481)
Matt Arsenault via llvm-commits
- [llvm] MachineVerifier: Check stack protector is top-most in frame (PR #121481)
Matt Arsenault via llvm-commits
- [llvm] MachineVerifier: Check stack protector is top-most in frame (PR #121481)
Matt Arsenault via llvm-commits
- [llvm] [z/OS] Add backtrace support for z/OS. (PR #121826)
Matt Arsenault via llvm-commits
- [llvm] [z/OS] Add backtrace support for z/OS. (PR #121826)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen][NewPM] Port RegAllocEvictionAdvisor analysis to NPM (PR #117309)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen][NewPM] Port RegAllocEvictionAdvisor analysis to NPM (PR #117309)
Matt Arsenault via llvm-commits
- [llvm] select v_sat_pk from two i16 or v2i16 (PR #121124)
Matt Arsenault via llvm-commits
- [llvm] select v_sat_pk from two i16 or v2i16 (PR #121124)
Matt Arsenault via llvm-commits
- [llvm] 7899572 - AMDGPU: Forcibly disable verifier in test
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Fix assert on physreg MUBUF rsrc operand (PR #120815)
Matt Arsenault via llvm-commits
- [llvm] Fix various cl::desc typos and whitespace issues. (PR #121955)
Matt Arsenault via llvm-commits
- [llvm] [z/OS] Add backtrace support for z/OS. (PR #121826)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Add baseline test for add64 with constant test (PR #122048)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Add baseline test for add64 with constant test (PR #122048)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Add baseline test for add64 with constant test (PR #122048)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][True16][CodeGen] Update and/or/xor codegen pattern for i16 (PR #121835)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen][NewPM] Use proper NPM AtomicExpandPass in AMDGPU (PR #122086)
Matt Arsenault via llvm-commits
- [llvm] Fix unreachable reg bit width (PR #122107)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add commute for some VOP3 inst (PR #121326)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add commute for some VOP3 inst (PR #121326)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add commute for some VOP3 inst (PR #121326)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add commute for some VOP3 inst (PR #121326)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Simplify FMF propagation. NFC. (PR #121899)
Matt Arsenault via llvm-commits
- [llvm] SplitKit: Fix rematerialization undoing subclass based split (PR #122110)
Matt Arsenault via llvm-commits
- [llvm] SplitKit: Fix rematerialization undoing subclass based split (PR #122110)
Matt Arsenault via llvm-commits
- [llvm] SplitKit: Fix rematerialization undoing subclass based split (PR #122110)
Matt Arsenault via llvm-commits
- [llvm] select v_sat_pk from two i16 or v2i16 (PR #121124)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen][NewPM] Port RegAllocEvictionAdvisor analysis to NPM (PR #117309)
Matt Arsenault via llvm-commits
- [llvm] [TableGen][GISel] Create untyped registers during instruction selection (PR #121270)
Matt Arsenault via llvm-commits
- [llvm] [z/OS] Add backtrace support for z/OS. (PR #121826)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Add baseline test for add64 with constant test (PR #122048)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Add baseline test for add64 with constant test (PR #122048)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Add baseline test for add64 with constant test (PR #122048)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Reduce 64-bit add width if low bits are known 0 (PR #122049)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Reduce 64-bit add width if low bits are known 0 (PR #122049)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Reduce 64-bit add width if low bits are known 0 (PR #122049)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][True16][CodeGen] true16 codegen pattern for v_mul_f16 (PR #122000)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][True16][CodeGen] Update codegen pattern for v_med3_f16 (PR #121992)
Matt Arsenault via llvm-commits
- [llvm] SplitKit: Fix rematerialization undoing subclass based split (PR #122110)
Matt Arsenault via llvm-commits
- [llvm] SplitKit: Fix rematerialization undoing subclass based split (PR #122110)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Expand remaining system atomic operations (PR #122137)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Expand remaining system atomic operations (PR #122137)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Expand remaining system atomic operations (PR #122137)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Expand remaining system atomic operations (PR #80798)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Expand remaining system atomic operations (PR #80798)
Matt Arsenault via llvm-commits
- [llvm] IR: Add attribute negated (PR #121027)
Matt Arsenault via llvm-commits
- [llvm] [NVPTX] Lower bfloat16 add/mul/sub as fma on SM80 (PR #121065)
Matt Arsenault via llvm-commits
- [llvm] [NVPTX] Lower bfloat16 add/mul/sub as fma on SM80 (PR #121065)
Matt Arsenault via llvm-commits
- [clang] [compiler-rt] [llvm] [SystemZ] Add support for half (fp16) (PR #109164)
Matt Arsenault via llvm-commits
- [llvm] [AVR] Force relocations for non-encodable jumps (PR #121498)
Matt Arsenault via llvm-commits
- [llvm] [AVR] Force relocations for non-encodable jumps (PR #121498)
Matt Arsenault via llvm-commits
- [llvm] [AVR] Force relocations for non-encodable jumps (PR #121498)
Matt Arsenault via llvm-commits
- [llvm] [AVR] Force relocations for non-encodable jumps (PR #121498)
Matt Arsenault via llvm-commits
- [llvm] [MachineLICM] Use `RegisterClassInfo::getRegPressureSetLimit` (PR #119826)
Matt Arsenault via llvm-commits
- [llvm] [NFC][AMDGPU] Pre-commit tests for IR variant - isFMAFasterThanFMulAdd (PR #121925)
Matt Arsenault via llvm-commits
- [llvm] [AVR] Force relocations for non-encodable jumps (PR #121498)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Catching inconsistencies in load memory, result, and range metadata type (PR #121247)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Implement IR variant of isFMAFasterThanFMulAndFAdd (PR #121465)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Add gfx940 run line to shuffle vector test (PR #122252)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Add gfx940 run line to shuffle vector test (PR #122252)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Custom lower bf16 shuffles (PR #122252)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Custom lower bf16 shuffles (PR #122252)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Custom lower bf16 shuffles (PR #122252)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Implement IR variant of isFMAFasterThanFMulAndFAdd (PR #121465)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Implement IR variant of isFMAFasterThanFMulAndFAdd (PR #121465)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][NewPM] Port AMDGPURemoveIncompatibleFunctions to NPM (PR #122261)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Allow selection of BITOP3 for some 2 opcodes and B32 cases (PR #122267)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Allow selection of BITOP3 for some 2 opcodes and B32 cases (PR #122267)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Implement IR variant of isFMAFasterThanFMulAndFAdd (PR #121465)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Implement IR variant of isFMAFasterThanFMulAndFAdd (PR #121465)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Implement IR variant of isFMAFasterThanFMulAndFAdd (PR #121465)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Implement IR variant of isFMAFasterThanFMulAndFAdd (PR #121465)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU] Remove s_wakeup_barrier instruction (PR #122277)
Matt Arsenault via llvm-commits
- [llvm] [TableGen][GISel] Create untyped registers during instruction selection (PR #121270)
Matt Arsenault via llvm-commits
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- [llvm] DAG: Fix vector bin op scalarize defining a partially undef vector (PR #122459)
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- [llvm] [MLIR] Fix triple mismatch warning for embedded libdevice (PR #121447)
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- [llvm] [LV] Limits the splat operations be hoisted must not be defined by a recipe. (PR #117138)
Mel Chen via llvm-commits
- [llvm] [LV] Limits the splat operations be hoisted must not be defined by a recipe. (PR #117138)
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- [llvm] [VPlan] Handle some VPInstructions in may{Read,Write}FromMemory (PR #120058)
Mel Chen via llvm-commits
- [llvm] [VPlan] Handle some VPInstructions in may{Read,Write}FromMemory (PR #120058)
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- [llvm] [LV] Fix FindLastIV reduction for epilogue vectorization. (PR #120395)
Mel Chen via llvm-commits
- [llvm] [LV] Fix FindLastIV reduction for epilogue vectorization. (PR #120395)
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- [llvm] [SLPVectorizer] Refactor HorizontalReduction::createOp (NFC) (PR #121549)
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- [llvm] [SLPVectorizer] Refactor HorizontalReduction::createOp (NFC) (PR #121549)
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- [llvm] [SLPVectorizer] Refactor HorizontalReduction::createOp (NFC) (PR #121549)
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- [llvm] [LV] Fix FindLastIV reduction for epilogue vectorization. (PR #120395)
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- [llvm] [SLPVectorizer] Refactor HorizontalReduction::createOp (NFC) (PR #121549)
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- [llvm] [SLPVectorizer] Refactor HorizontalReduction::createOp (NFC) (PR #121549)
Mel Chen via llvm-commits
- [llvm] [LV][VPlan] Change the inheritance of class VPWidenSelectRecipe to class VPRecipeWithIRFlags, which allows recipe of the select to pass the fastmath flags (PR #121023)
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- [llvm] [LV][EVL] Pre-commit test case for fixed-order recurrence with EVL tail folding. (NFC) (PR #122456)
Mel Chen via llvm-commits
- [llvm] [LV][EVL] Disable fixed-order recurrence idiom with EVL tail folding. (PR #122458)
Mel Chen via llvm-commits
- [llvm] [LV][EVL] Pre-commit test case for fixed-order recurrence with EVL tail folding. (NFC) (PR #122456)
Mel Chen via llvm-commits
- [llvm] [LV][EVL] Disable fixed-order recurrence idiom with EVL tail folding. (PR #122458)
Mel Chen via llvm-commits
- [llvm] [LV][EVL] Disable fixed-order recurrence idiom with EVL tail folding. (PR #122458)
Mel Chen via llvm-commits
- [llvm] [X86] Correct the cdisp8 encoding for VSCATTER/VGATHER prefetch (PR #122051)
Michael Clark via llvm-commits
- [libc] [llvm] [libc] Improve qsort (PR #120450)
Michael Jones via llvm-commits
- [llvm] [libc][bazel] Remove customization from several libc BUILD rules. (PR #121843)
Michael Jones via llvm-commits
- [libc] [llvm] [libc] add basic arena allocator (PR #121173)
Michael Jones via llvm-commits
- [libc] [llvm] [libc] Add hardening for FixedVector data structure and fix exposed bug. (PR #122159)
Michael Jones via llvm-commits
- [libc] [llvm] [libc] Add hardening for FixedVector data structure and fix exposed bug. (PR #122159)
Michael Jones via llvm-commits
- [libc] [llvm] [libc] Add hardening for FixedVector data structure and fix exposed bug. (PR #122159)
Michael Jones via llvm-commits
- [flang] [llvm] [mlir] [flang][OpenMP] Extend delayed privatization for `omp.simd` (PR #122156)
Michael Klemm via llvm-commits
- [flang] [llvm] [Flang][NFC] Move runtime library files to flang-rt. (PR #110298)
Michael Kruse via llvm-commits
- [llvm] [LoopInterchange] Bail out for Scalar Dependencies (PR #119345)
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- [clang] [llvm] [OpenMP][OMPIRBuilder] Handle non-failing calls properly (PR #115863)
Michael Kruse via llvm-commits
- [clang] [flang] [lld] [Flang] Remove FortranDecimal library (PR #121997)
Michael Kruse via llvm-commits
- [llvm] [LoopInterchange] Bail out for Scalar Dependencies (PR #119345)
Michael Kruse via llvm-commits
- [clang] [flang] [lld] [Flang] Remove FortranDecimal library (PR #121997)
Michael Kruse via llvm-commits
- [clang] [flang] [lld] [llvm] [Flang][NFC] Move runtime library files to flang-rt. (PR #110298)
Michael Kruse via llvm-commits
- [flang] [llvm] [Flang][NFC] Move runtime library files to flang-rt. (PR #110298)
Michael Kruse via llvm-commits
- [clang] [flang] [lld] [Flang] Remove FortranDecimal library (PR #121997)
Michael Kruse via llvm-commits
- [clang] [flang] [lld] [Flang] Don't use FortranDecimal for runtime (PR #121997)
Michael Kruse via llvm-commits
- [clang] [flang] [lld] [Flang] Don't use FortranDecimal for runtime (PR #121997)
Michael Kruse via llvm-commits
- [clang] [flang] [lld] [Flang] Don't use FortranDecimal for runtime (PR #121997)
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- [polly] [Polly] Add vectorize metadata to loops identified as vectorizable by polly (PR #113994)
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- [polly] [Polly] Add vectorize metadata to loops identified as vectorizable by polly (PR #113994)
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- [polly] [Polly] Add vectorize metadata to loops identified as vectorizable by polly (PR #113994)
Michael Kruse via llvm-commits
- [clang] [flang] [lld] [Flang] Don't use FortranDecimal for runtime (PR #121997)
Michael Kruse via llvm-commits
- [clang] [flang] [lld] [Flang] Don't use FortranDecimal for runtime (PR #121997)
Michael Kruse via llvm-commits
- [clang] [flang] [lld] [Flang] Don't use FortranDecimal for runtime (PR #121997)
Michael Kruse via llvm-commits
- [clang] [flang] [lld] [Flang] Don't use FortranDecimal for runtime (PR #121997)
Michael Kruse via llvm-commits
- [llvm] [RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (PR #121705)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (PR #121705)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (PR #121705)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (PR #121705)
Michael Maitland via llvm-commits
- [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #121222)
Michael Maitland via llvm-commits
- [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #121222)
Michael Maitland via llvm-commits
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Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (PR #121705)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (PR #121705)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for checkUsers when UserMI is a Single-Width Integer Reduction (PR #120345)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for checkUsers when UserMI is a Single-Width Integer Reduction (PR #120345)
Michael Maitland via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (PR #121705)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (PR #121705)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (PR #121705)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (PR #121705)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (PR #121705)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (PR #121705)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (PR #121705)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for checkUsers when UserMI is a Single-Width Integer Reduction (PR #120345)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (PR #121705)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (PR #121705)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOpt] Kill all uses of and remove twoTimesVLMUL [NFC] (PR #122003)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for checkUsers when UserMI is a Single-Width Integer Reduction (PR #120345)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for checkUsers when UserMI is a Single-Width Integer Reduction (PR #120345)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOpt] Consolidate EMUL=SEW/EEW*LMUL logic [NFC] (PR #122021)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add masked load to isSupported and getOperandInfo (PR #122030)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add masked load to isSupported and getOperandInfo (PR #122030)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add vector fp-conversion instruction to isSupportedInstr (PR #122033)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add mask load to isSupported and getOperandInfo (PR #122030)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add mask load to isSupported and getOperandInfo (PR #122030)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add mask load to isSupported and getOperandInfo (PR #122030)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add mask load to isSupported and getOperandInfo (PR #122030)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add mask load to isSupported and getOperandInfo (PR #122030)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add mask load to isSupported and getOperandInfo (PR #122030)
Michael Maitland via llvm-commits
- [llvm] [ReachingDefAnalysis][NFC] Rename `PhysReg` to `Reg`. (PR #122112)
Michael Maitland via llvm-commits
- [llvm] [ReachingDefAnalysis][NFC] Rename `PhysReg` to `Reg`. (PR #122112)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add vector fp-conversion instruction to isSupportedInstr (PR #122033)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add vector fp-conversion instruction to isSupportedInstr (PR #122033)
Michael Maitland via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOpt] Consolidate EMUL=SEW/EEW*LMUL logic [NFC] (PR #122021)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add vector fp-conversion instruction to isSupportedInstr (PR #122033)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add fp-reductions to getOperandInfo (PR #122151)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOpt] Remove State field from OperandInfo [nfc] (PR #122160)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add getOperandInfo for integer and floating point widening reductions (PR #122176)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add getOperandInfo for integer and floating point widening reductions (PR #122176)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add getOperandInfo for integer and floating point widening reductions (PR #122176)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add fp-reductions to getOperandInfo (PR #122151)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add vfirst and vcpop to getOperandInfo (PR #122295)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for more floating point instructions (PR #122326)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for more floating point instructions (PR #122326)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add vfirst and vcpop to getOperandInfo (PR #122295)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add vfirst and vcpop to getOperandInfo (PR #122295)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for more floating point instructions (PR #122326)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add fp-reductions to getOperandInfo (PR #122151)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Fix VCFCT incompatible EEW test (PR #122327)
Michael Maitland via llvm-commits
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Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for more floating point instructions (PR #122326)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for more floating point instructions (PR #122326)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for more floating point instructions (PR #122326)
Michael Maitland via llvm-commits
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Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for more floating point instructions (PR #122326)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for more floating point instructions (PR #122326)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Fix VCFCT incompatible EEW test (PR #122327)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add vfirst and vcpop to getOperandInfo (PR #122295)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Simplify code by removing extra temporary variables. NFC (PR #122333)
Michael Maitland via llvm-commits
- [llvm] c036a9a - [RISCV][VLOPT] Add vector single width floating point add subtract instructions to isSupportedInstr
Michael Maitland via llvm-commits
- [llvm] 8beb9d3 - [RISCV][VLOPT] Add vector widening floating point add subtract instructions to isSupportedInstr
Michael Maitland via llvm-commits
- [llvm] a484fa1 - [RISCV][VLOPT] Add floating point multiply divide instructions to getSupportedInstr
Michael Maitland via llvm-commits
- [llvm] b419ede - [RISCV][VLOPT] Add widening floating point multiply to isSupportedInstr
Michael Maitland via llvm-commits
- [llvm] 5f70fea - [RISCV][VLOPT] Add Vector Floating-Point Compare Instructions to getSupportedInstr
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for more floating point instructions (PR #122326)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for more floating point instructions (PR #122326)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add vmerge to isSupportedInstr (PR #122340)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add vadcto isSupportedInstr (PR #122345)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add vadc to isSupportedInstr (PR #122345)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add vadc to isSupportedInstr (PR #122345)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add floating point widening and narrowing convert support (PR #122353)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add floating point widening and narrowing convert support (PR #122353)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add floating point widening and narrowing convert support (PR #122353)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add floating point widening and narrowing convert support (PR #122353)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add vmerge to isSupportedInstr (PR #122340)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add Vector Single-Width Averaging Add and Subtract to isSupportedInstr (PR #122351)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add Vector Single-Width Averaging Add and Subtract to isSupportedInstr (PR #122351)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add Vector Single-Width Averaging Add and Subtract to isSupportedInstr (PR #122351)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add vadc to isSupportedInstr (PR #122345)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add vadc to isSupportedInstr (PR #122345)
Michael Maitland via llvm-commits
- [llvm] [RISCV][VLOPT] Add vadc to isSupportedInstr (PR #122345)
Michael Maitland via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Michael Maitland via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Michael Maitland via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Michael Maitland via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Michael Maitland via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Michael Maitland via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Michael Maitland via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Michael Maitland via llvm-commits
- [clang] [llvm] [Driver][SYCL] Add initial SYCL offload compilation support (PR #117268)
Michael Toguchi via llvm-commits
- [clang] [llvm] [Driver][SYCL] Add initial SYCL offload compilation support (PR #117268)
Michael Toguchi via llvm-commits
- [llvm] [SPIR-V] Add SPIRV to LLVM_ALL_TARGETS (PR #119653)
Michal Paszkowski via llvm-commits
- [llvm] [SPIR-V] Add SPIRV to LLVM_ALL_TARGETS (PR #119653)
Michal Paszkowski via llvm-commits
- [llvm] [SPIR-V] Add pre-commit CI workflow (PR #74092)
Michal Paszkowski via llvm-commits
- [llvm] [SPIR-V] Overhaul module analysis to improve translation speed and simplify the underlying logics (PR #120415)
Michal Paszkowski via llvm-commits
- [llvm] [SPIR-V] Fix OpName and LinkageAttributes decoration of global variables (PR #120492)
Michal Paszkowski via llvm-commits
- [llvm] [LoadStoreVectorizer] Postprocess and merge equivalence classes (PR #121861)
Michal Paszkowski via llvm-commits
- [llvm] [LoadStoreVectorizer] Postprocess and merge equivalence classes (PR #121861)
Michal Paszkowski via llvm-commits
- [llvm] [LoadStoreVectorizer] Postprocess and merge equivalence classes (PR #121861)
Michal Paszkowski via llvm-commits
- [llvm] [LoadStoreVectorizer] Postprocess and merge equivalence classes (PR #121861)
Michal Paszkowski via llvm-commits
- [llvm] [SPIR-V] Prefer SPV_INTEL_optnone over SPV_EXT_optnone when both extensions are available (PR #122082)
Michal Paszkowski via llvm-commits
- [llvm] [M68k] Use M68010 cpu as target for SR move test (PR #122452)
Michał Górny via llvm-commits
- [lldb] [llvm] Debuginfod cache use index cache settings and include real file name (PR #120814)
Michał Górny via llvm-commits
- [lldb] [llvm] Debuginfod cache use index cache settings and include real file name (PR #120814)
Michał Górny via llvm-commits
- [lld] [llvm] [Support][LLD] .time-trace.json Default File Extension (PR #122207)
Miguel A. Arroyo via llvm-commits
- [llvm] Reapply [APInt] Enable APInt ctor assertion by default (PR #114539)
Mikael Holmén via llvm-commits
- [clang] [llvm] [Darwin][Driver][clang] apple-none-macho orders the resource directory after internal-externc-isystem when nostdlibinc is used (PR #120507)
Mikael Holmén via llvm-commits
- [clang] [llvm] [Darwin][Driver][clang] apple-none-macho orders the resource directory after internal-externc-isystem when nostdlibinc is used (PR #120507)
Mikael Holmén via llvm-commits
- [llvm] AMDGPU: Fix assert on physreg MUBUF rsrc operand (PR #120815)
Mikael Holmén via llvm-commits
- [llvm] Reapply [APInt] Enable APInt ctor assertion by default (PR #114539)
Mikael Holmén via llvm-commits
- [llvm] [SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (PR #120198)
Mikael Holmén via llvm-commits
- [llvm] [SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (PR #120198)
Mikael Holmén via llvm-commits
- [llvm] [TableGen] Avoid repeated hash lookups (NFC) (PR #122586)
Mikael Holmén via llvm-commits
- [llvm] [Coverage] Speed up function record iteration (PR #122050)
Mike Hommey via llvm-commits
- [llvm] [Coverage] Speed up function record iteration (PR #122050)
Mike Hommey via llvm-commits
- [llvm] [DAG] Allow AssertZExt to scalarize. (PR #122463)
Mike Hommey via llvm-commits
- [llvm] [DAG] Allow AssertZExt to scalarize. (PR #122463)
Mike Hommey via llvm-commits
- [llvm] [ReachingDefAnalysis][NFC] Rename `PhysReg` to `Reg`. (PR #122112)
Mikhail Gudim via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Mikhail Gudim via llvm-commits
- [llvm] [ReachingDefAnalysis][NFC] Rename `PhysReg` to `Reg`. (PR #122112)
Mikhail Gudim via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Mikhail Gudim via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Mikhail Gudim via llvm-commits
- [llvm] [ReachingDefAnalysis][NFC] Rename `PhysReg` to `Reg`. (PR #122112)
Mikhail Gudim via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Mikhail Gudim via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Mikhail Gudim via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Mikhail Gudim via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Mikhail Gudim via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine] Fold binary op of reductions. (PR #121567)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine] Fold binary op of reductions. (PR #121567)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine] Fold binary op of reductions. (PR #121567)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine] Fold binary op of reductions. (PR #121567)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine] Fold binary op of reductions. (PR #121567)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine] Fold binary op of reductions. (PR #121567)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine] Fold binary op of reductions. (PR #121567)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine] Fold binary op of reductions. (PR #121567)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine] Fold binary op of reductions. (PR #121567)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine][NFC] Precommit a test for folding a binary op of reductions. (PR #121568)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine][NFC] Precommit a test for folding a binary op of reductions. (PR #121568)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine][NFC] Precommit a test for folding a binary op of reductions. (PR #121568)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine][NFC] Precommit a test for folding a binary op of reductions. (PR #121568)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine][NFC] Precommit a test for folding a binary op of reductions. (PR #121568)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine][NFC] Precommit a test for folding a binary op of reductions. (PR #121568)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine] Fold binary op of reductions. (PR #121567)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine] Fold binary op of reductions. (PR #121567)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine][NFC] Precommit a test for folding a binary op of reductions. (PR #121568)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine][NFC] Precommit a test for folding a binary op of reductions. (PR #121568)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine][NFC] Precommit a test for folding a binary op of reductions. (PR #121568)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine][NFC] Precommit a test for folding a binary op of reductions. (PR #121568)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine][NFC] Precommit a test for folding a binary op of reductions. (PR #121568)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine][NFC] Precommit a test for folding a binary op of reductions. (PR #121568)
Mikhail Gudim via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Mikhail Gudim via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine][NFC] Precommit a test for folding a binary op of reductions. (PR #121568)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine][NFC] Precommit a test for folding a binary op of reductions. (PR #121568)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine][NFC] Precommit a test for folding a binary op of reductions. (PR #121568)
Mikhail Gudim via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine] Fold binary op of reductions. (PR #121567)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine] Fold binary op of reductions. (PR #121567)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine] Fold binary op of reductions. (PR #121567)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine] Fold binary op of reductions. (PR #121567)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine] Fold binary op of reductions. (PR #121567)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine] Fold binary op of reductions. (PR #121567)
Mikhail Gudim via llvm-commits
- [llvm] [InstCombine] Fold binary op of reductions. (PR #121567)
Mikhail Gudim via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Mikhail Gudim via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Mikhail Gudim via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Mikhail Gudim via llvm-commits
- [llvm] [ReachingDefAnalysis] Extend the analysis to stack objects. (PR #118097)
Mikhail Gudim via llvm-commits
- [llvm] [RISCV] Add missing check before accessing pointer (PR #121816)
Mikhail R. Gadelha via llvm-commits
- [llvm] [RISCV] Add missing check before accessing pointer (PR #121816)
Mikhail R. Gadelha via llvm-commits
- [llvm] [RISCV] Add missing check before accessing pointer (PR #121816)
Mikhail R. Gadelha via llvm-commits
- [llvm] [RISCV] Add missing check before accessing pointer (PR #121816)
Mikhail R. Gadelha via llvm-commits
- [llvm] [RISCV] Add missing check before accessing pointer (PR #121816)
Mikhail R. Gadelha via llvm-commits
- [llvm] [RISCV] Add missing check before accessing pointer (PR #121816)
Mikhail R. Gadelha via llvm-commits
- [llvm] [RISCV] Add missing check before accessing pointer (PR #121816)
Mikhail R. Gadelha via llvm-commits
- [llvm] [RISCV] Add missing check before accessing pointer (PR #121816)
Mikhail R. Gadelha via llvm-commits
- [llvm] [RISCV] Add missing check before accessing pointer (PR #121816)
Mikhail R. Gadelha via llvm-commits
- [llvm] [RISCV] Add missing check before accessing pointer (PR #121816)
Mikhail R. Gadelha via llvm-commits
- [llvm] [RISCV] Added test case for PR119527. NFC (PR #121816)
Mikhail R. Gadelha via llvm-commits
- [llvm] [RISCV] Added test case for PR119527. NFC (PR #121816)
Mikhail R. Gadelha via llvm-commits
- [llvm] [RISCV] Update matchSplatAsGather to use the index of extract_elt if in-bounds (PR #118873)
Mikhail R. Gadelha via llvm-commits
- [llvm] Add SD matchers and unit test coverage for ISD::VECTOR_SHUFFLE (PR #119592)
Min-Yih Hsu via llvm-commits
- [clang] [llvm] [RISCV] Add a generic OOO CPU (PR #120712)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV][llvm-exegesis] Add default Pfm cycle counter. (PR #121866)
Min-Yih Hsu via llvm-commits
- [clang] [llvm] [IR][AsmParser] Revamp how floating-point literals in LLVM IR. (PR #121838)
Min-Yih Hsu via llvm-commits
- [clang] [llvm] [IR][AsmParser] Revamp how floating-point literals in LLVM IR. (PR #121838)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV] Fold vector shift of sext/zext to widening multiply (PR #121563)
Min-Yih Hsu via llvm-commits
- [llvm] [Exegesis] Add `--dry-run-measurement` (PR #121991)
Min-Yih Hsu via llvm-commits
- [llvm] [Exegesis] Add supports to serialize/deserialize object files into benchmarks (PR #121993)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV] Fold vector shift of sext/zext to widening multiply (PR #121563)
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV] Update the latencies of MUL and CPOP in SiFive P400 scheduling model (PR #122007)
Min-Yih Hsu via llvm-commits
- [llvm] b225513 - [RISCV] Add missing SiFive P400 scheduling model test for divisions. NFC
Min-Yih Hsu via llvm-commits
- [llvm] [RISCV] Update the latencies of MUL and CPOP in SiFive P400 scheduling model (PR #122007)
Min-Yih Hsu via llvm-commits
- [llvm] [Exegesis] Add `--dry-run-measurement` (PR #121991)
Min-Yih Hsu via llvm-commits
- [llvm] [Exegesis] Add the ability to dry-run the measurement phase (PR #121991)
Min-Yih Hsu via llvm-commits
- [llvm] [Exegesis] Add the ability to dry-run the measurement phase (PR #121991)
Min-Yih Hsu via llvm-commits
- [llvm] [Exegesis] Add the ability to dry-run the measurement phase (PR #121991)
Min-Yih Hsu via llvm-commits
- [llvm] [Exegesis] Add the ability to dry-run the measurement phase (PR #121991)
Min-Yih Hsu via llvm-commits
- [llvm] [Exegesis] Add the ability to dry-run the measurement phase (PR #121991)
Min-Yih Hsu via llvm-commits
- [llvm] [M68k] implement move to and from sr (PR #111145)
Min-Yih Hsu via llvm-commits
- [llvm] [M68k] always use movem for register spills (PR #106715)
Min-Yih Hsu via llvm-commits
- [llvm] [M68k] always use movem for register spills (PR #106715)
Min-Yih Hsu via llvm-commits
- [llvm] [M68k] always use movem for register spills (PR #106715)
Min-Yih Hsu via llvm-commits
- [llvm] [M68k] always use movem for register spills (PR #106715)
Min-Yih Hsu via llvm-commits
- [llvm] [SDPatternMatch] Add matchers m_ExtractSubvector and m_InsertSubvector (PR #120212)
Min-Yih Hsu via llvm-commits
- [llvm] [Exegesis] Add the ability to dry-run the measurement phase (PR #121991)
Min-Yih Hsu via llvm-commits
- [llvm] [IA][RISCV] Support VP intrinsics in InterleavedAccessPass (PR #120490)
Min-Yih Hsu via llvm-commits
- [llvm] Revert "[Exegesis] Add the ability to dry-run the measurement phase (… (PR #122371)
Min-Yih Hsu via llvm-commits
- [llvm] Revert "[Exegesis] Add the ability to dry-run the measurement phase (… (PR #122371)
Min-Yih Hsu via llvm-commits
- [llvm] [SDPatternMatch] Add matchers m_ExtractSubvector and m_InsertSubvector (PR #120212)
Min-Yih Hsu via llvm-commits
- [llvm] [SDPatternMatch] Add matchers m_ExtractSubvector and m_InsertSubvector (PR #120212)
Min-Yih Hsu via llvm-commits
- [llvm] [SDPatternMatch] Add Matcher m_Undef (PR #122521)
Min-Yih Hsu via llvm-commits
- [llvm] [SDPatternMatch] Add Matcher m_Undef (PR #122521)
Min-Yih Hsu via llvm-commits
- [llvm] [SDPatternMatch] Add Matcher m_Undef (PR #122521)
Min-Yih Hsu via llvm-commits
- [clang] [llvm] [tysan] Convert TySan from function+module pass to just module pass (PR #120667)
Mingjie Xu via llvm-commits
- [compiler-rt] [TySan] Intercept malloc_size on Apple platforms. (PR #122133)
Mingjie Xu via llvm-commits
- [compiler-rt] [TySan] Intercept malloc_size on Apple platforms. (PR #122133)
Mingjie Xu via llvm-commits
- [clang] [compiler-rt] [llvm] [TySan] A Type Sanitizer (Runtime Library) (PR #76261)
Mingjie Xu via llvm-commits
- [llvm] [TySan] Skip instrumentation for function declarations (PR #122488)
Mingjie Xu via llvm-commits
- [llvm] [TySan] Skip instrumentation for function declarations (PR #122488)
Mingjie Xu via llvm-commits
- [llvm] [TySan] Skip instrumentation for function declarations (PR #122488)
Mingjie Xu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [NFC][AsmPrinter] Pass MJTI by const reference instead of const pointer (PR #122365)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [AsmPrinter][TargetLowering]Place a hot jump table into a hot-suffixed section (PR #122215)
Mingming Liu via llvm-commits
- [llvm] [CodeGen] Introduce Static Data Splitter pass (PR #122183)
Mingming Liu via llvm-commits
- [llvm] [nfc][thinlto] remove unused return from `renameModuleForThinLTO` (PR #121851)
Mircea Trofin via llvm-commits
- [llvm] [nfc][thinlto] remove unused return from `renameModuleForThinLTO` (PR #121851)
Mircea Trofin via llvm-commits
- [llvm] [nfc][thinlto] remove unused return from `renameModuleForThinLTO` (PR #121851)
Mircea Trofin via llvm-commits
- [llvm] [nfc][thinlto] remove unnecessary return from `renameModuleForThinLTO` (PR #121851)
Mircea Trofin via llvm-commits
- [llvm] [nfc][thinlto] remove unnecessary return from `renameModuleForThinLTO` (PR #121851)
Mircea Trofin via llvm-commits
- [llvm] [nfc][thinlto] remove unnecessary return from `renameModuleForThinLTO` (PR #121851)
Mircea Trofin via llvm-commits
- [llvm] [nfc] Update header in llvm-ctxprof-utils (PR #122544)
Mircea Trofin via llvm-commits
- [llvm] [nfc] Update header in llvm-ctxprof-utils (PR #122544)
Mircea Trofin via llvm-commits
- [llvm] [nfc] Update header in llvm-ctxprof-utils (PR #122544)
Mircea Trofin via llvm-commits
- [llvm] [nfc] Update header in llvm-ctxprof-utils (PR #122544)
Mircea Trofin via llvm-commits
- [llvm] [nfc] Update header in llvm-ctxprof-utils (PR #122544)
Mircea Trofin via llvm-commits
- [llvm] [ctxprof] Move test serialization to yaml (PR #122545)
Mircea Trofin via llvm-commits
- [llvm] [ctxprof] Move test serialization to yaml (PR #122545)
Mircea Trofin via llvm-commits
- [llvm] [ctxprof] Move test serialization to yaml (PR #122545)
Mircea Trofin via llvm-commits
- [llvm] [ctxprof] Move test serialization to yaml (PR #122545)
Mircea Trofin via llvm-commits
- [clang] [llvm] [AMDGPU] Remove s_wakeup_barrier instruction (PR #122277)
Mirko Brkušanin via llvm-commits
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Nick Desaulniers via llvm-commits
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- [llvm] [LangRef] Add some documentation for ABI / call-site attributes (PR #121930)
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- [llvm] [LLVM] Update inlining maintainers (PR #120579)
Nikita Popov via llvm-commits
- [llvm] [LLVM] Update inlining maintainers (PR #120579)
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- [llvm] [IRBuilder] Add a helper function to intersect FMFs from two instructions (PR #122059)
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- [llvm] [ValueTracking] Move `getFlippedStrictnessPredicateAndConstant` into ValueTracking. NFC. (PR #122064)
Nikita Popov via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
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- [llvm] Fix various cl::desc typos and whitespace issues. (PR #121955)
Nikita Popov via llvm-commits
- [llvm] [LLVM] Fix various cl::desc typos and whitespace issues (NFC) (PR #121955)
Nikita Popov via llvm-commits
- [llvm] [LLVM] Fix various cl::desc typos and whitespace issues (NFC) (PR #121955)
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- [llvm] [InstCombine] move foldAndOrOfICmpsOfAndWithPow2 into foldLogOpOfMaskedICmps (PR #121970)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] move foldAndOrOfICmpsOfAndWithPow2 into foldLogOpOfMaskedICmps (PR #121970)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] move foldAndOrOfICmpsOfAndWithPow2 into foldLogOpOfMaskedICmps (PR #121970)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] move foldAndOrOfICmpsOfAndWithPow2 into foldLogOpOfMaskedICmps (PR #121970)
Nikita Popov via llvm-commits
- [llvm] bfa711a - [InstCombine] Use combineMetadataForCSE in phi of loads fold
Nikita Popov via llvm-commits
- [llvm] [Local] Make combineAAMetadata() more principled (PR #122091)
Nikita Popov via llvm-commits
- [llvm] [LVI] Learn value ranges from ctpop/ctlz/cttz results (PR #121945)
Nikita Popov via llvm-commits
- [llvm] [LVI] Learn value ranges from ctpop/ctlz/cttz results (PR #121945)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Fold `(select (icmp eq (and x, y), 0), (add/xor x, y), F)` (PR #121841)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Remove foldSelectICmpEq() fold (PR #122098)
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- [llvm] [SPIR-V] Add SPIRV to LLVM_ALL_TARGETS (PR #119653)
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- [llvm] [InstCombine] Return `nsw` when convert `shl` to `mul` if its on the RHS (PR #121671)
Nikita Popov via llvm-commits
- [llvm] [InstCombine][NFC] Precommit a test for folding a binary op of reductions. (PR #121568)
Nikita Popov via llvm-commits
- [llvm] [CodeGenPrepare] Replace deleted ext instr with the promoted value. (PR #71058)
Nikita Popov via llvm-commits
- [llvm] [ValueTracking] Handle flipped strictness cases in `matchSelectPattern` (PR #121958)
Nikita Popov via llvm-commits
- [llvm] [polly] [Polly][CMake] Fix exports (PR #122123)
Nikita Popov via llvm-commits
- [llvm] [polly] [Polly][CMake] Fix exports (PR #122123)
Nikita Popov via llvm-commits
- [llvm] [polly] [Polly][CMake] Fix exports (PR #122123)
Nikita Popov via llvm-commits
- [llvm] [Local] Make combineAAMetadata() more principled (PR #122091)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Handle commuted patterns in `foldBinOpShiftWithShift` (PR #122126)
Nikita Popov via llvm-commits
- [llvm] a5c3cbf - [Loads] Drop dead Offset argument (NFC)
Nikita Popov via llvm-commits
- [llvm] [Loads] Also consider getPointerAlignment when checking assumptions. (PR #120916)
Nikita Popov via llvm-commits
- [llvm] [Local] Make combineAAMetadata() more principled (PR #122091)
Nikita Popov via llvm-commits
- [llvm] [Local] Make combineAAMetadata() more principled (PR #122091)
Nikita Popov via llvm-commits
- [llvm] [Loads] Also consider getPointerAlignment when checking assumptions. (PR #120916)
Nikita Popov via llvm-commits
- [llvm] [Lint] Lint mismatch in ABI attributes (PR #121929)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Remove redundant fptrunc of select fold (NFCI) (PR #117182)
Nikita Popov via llvm-commits
- [clang] [llvm] [BasicAA] Do not decompose past casts with different index width (PR #119365)
Nikita Popov via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Nikita Popov via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Nikita Popov via llvm-commits
- [clang] [compiler-rt] [Clang] Adjust pointer-overflow sanitizer for N3322 (PR #120719)
Nikita Popov via llvm-commits
- [llvm] [Local] Make combineAAMetadata() more principled (PR #122091)
Nikita Popov via llvm-commits
- [llvm] [LangRef] Add some documentation for ABI / call-site attributes (PR #121930)
Nikita Popov via llvm-commits
- [llvm] [LLVM] Update windows codegen maintainer (PR #119576)
Nikita Popov via llvm-commits
- [llvm] [LLVM] Update windows codegen maintainer (PR #119576)
Nikita Popov via llvm-commits
- [clang] [llvm] [BasicAA] Do not decompose past casts with different index width (PR #119365)
Nikita Popov via llvm-commits
- [llvm] [SDPatternMatch] Add matchers m_ExtractSubvector and m_InsertSubvector (PR #120212)
Nikita Popov via llvm-commits
- [llvm] [InstCombine][NFC] Precommit a test for folding a binary op of reductions. (PR #121568)
Nikita Popov via llvm-commits
- [llvm] [ValueTracking] Add rotate idiom to haveNoCommonBitsSet special cases (PR #122165)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Remove foldSelectICmpEq() fold (PR #122098)
Nikita Popov via llvm-commits
- [llvm] Adding change to IndVarSimplify pass to optimize IVs stuck in trivial vector operations (PR #122248)
Nikita Popov via llvm-commits
- [llvm] Adding change to IndVarSimplify pass to optimize IVs stuck in trivial vector operations (PR #122248)
Nikita Popov via llvm-commits
- [clang] [llvm] [BasicAA] Do not decompose past casts with different index width (PR #119365)
Nikita Popov via llvm-commits
- [llvm] [SDAG] Set IsPostTypeLegalization flag in LegalizeDAG (PR #122278)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Add one-use check when folding fabs over selects (PR #122270)
Nikita Popov via llvm-commits
- [llvm] [DSE] Consider the aliasing through global variable while checking clobber (PR #120044)
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- [llvm] [DSE] Consider the aliasing through global variable while checking clobber (PR #120044)
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- [llvm] [DSE] Consider the aliasing through global variable while checking clobber (PR #120044)
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- [llvm] [DSE] Consider the aliasing through global variable while checking clobber (PR #120044)
Nikita Popov via llvm-commits
- [llvm] [DSE] Consider the aliasing through global variable while checking clobber (PR #120044)
Nikita Popov via llvm-commits
- [llvm] [AMDGPU] Fix spurious NoAlias results (PR #122309)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Convert fshl(x, 0, y) to shl(x, y) or shl(X, and(Y, BitWidth - 1)) (PR #122362)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Convert fshl(x, 0, y) to shl(x, y) or shl(X, and(Y, BitWidth - 1)) (PR #122362)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Fold `X udiv Y` to `X lshr cttz(Y)` if Y is a power of 2 (PR #121386)
Nikita Popov via llvm-commits
- [llvm] eeac0ff - Revert "[MachineLICM] Use `RegisterClassInfo::getRegPressureSetLimit` (#119826)"
Nikita Popov via llvm-commits
- [llvm] [MachineLICM] Use `RegisterClassInfo::getRegPressureSetLimit` (PR #119826)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] InstCombine should fold frexp of select to select of frexp (PR #121227)
Nikita Popov via llvm-commits
- [llvm] [LLVM] Update windows codegen maintainer (PR #119576)
Nikita Popov via llvm-commits
- [llvm] [AMDGPU] Fix spurious NoAlias results (PR #122309)
Nikita Popov via llvm-commits
- [llvm] [ValueTracking] Add rotate idiom to haveNoCommonBitsSet special cases (PR #122165)
Nikita Popov via llvm-commits
- [llvm] [GVN] MemorySSA for GVN: add optional `AllowMemorySSA` (PR #120982)
Nikita Popov via llvm-commits
- [llvm] [SDAG] Set IsPostTypeLegalization flag in LegalizeDAG (PR #122278)
Nikita Popov via llvm-commits
- [llvm] eca8ec0 - [LLVM][Maintainers] Remove disclaimer
Nikita Popov via llvm-commits
- [llvm] c39500f - Revert "[GVN] MemorySSA for GVN: add optional `AllowMemorySSA`"
Nikita Popov via llvm-commits
- [llvm] [GVN] MemorySSA for GVN: add optional `AllowMemorySSA` (PR #120982)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Support gep nuw in icmp folds (PR #118472)
Nikita Popov via llvm-commits
- [llvm] [CodeGen] Add MachineRegisterClassInfo analysis pass (PR #120690)
Nikita Popov via llvm-commits
- [llvm] VT: teach implied-cond-cr about samesign (PR #122447)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Prepare foldLogOpOfMaskedICmps to handle trunc to i1. (NFC) (PR #122179)
Nikita Popov via llvm-commits
- [llvm] [LangRef] Fix code segment and numbering issue in the 'call' instruction section (PR #122294)
Nikita Popov via llvm-commits
- [llvm] [LangRef] Fix code segment and numbering issue in the 'call' instruction section (PR #122294)
Nikita Popov via llvm-commits
- [llvm] [Loads] Check loop-varying pointer in isDereferenceableAndAlignedInLoop. (PR #120962)
Nikita Popov via llvm-commits
- [clang] [llvm] [Clang] Add __builtin_assume_dereferenceable to encode deref assumption. (PR #121789)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Support gep nuw in icmp folds (PR #118472)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Fold `X udiv Y` to `X lshr cttz(Y)` if Y is a power of 2 (PR #121386)
Nikita Popov via llvm-commits
- [llvm] [Loads] Check loop-varying pointer in isDereferenceableAndAlignedInLoop. (PR #120962)
Nikita Popov via llvm-commits
- [llvm] [Loads] Check loop-varying pointer in isDereferenceableAndAlignedInLoop. (PR #120962)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Make `takeLog2` usable throughout InstCombine; NFC (PR #122498)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Make `takeLog2` usable throughout InstCombine; NFC (PR #122498)
Nikita Popov via llvm-commits
- [llvm] [ADT] Fix specialization of ValueIsPresent for PointerUnion (PR #121847)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Make `takeLog2` usable throughout InstCombine; NFC (PR #122498)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Make `takeLog2` usable throughout InstCombine; NFC (PR #122498)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Make `takeLog2` usable throughout InstCombine; NFC (PR #122498)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Convert fshl(x, 0, y) to shl(x, and(y, BitWidth - 1)) when BitWidth is pow2 (PR #122362)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Convert fshl(x, 0, y) to shl(x, and(y, BitWidth - 1)) when BitWidth is pow2 (PR #122362)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Convert fshl(x, 0, y) to shl(x, and(y, BitWidth - 1)) when BitWidth is pow2 (PR #122362)
Nikita Popov via llvm-commits
- [llvm] VT: teach isImpliedCondMatchingOperands about samesign (PR #122474)
Nikita Popov via llvm-commits
- [llvm] [ValueTracking] Take into account whether zero is poison when computing CR for `ct{t,l}z` (PR #122548)
Nikita Popov via llvm-commits
- [llvm] [ValueTracking] Take into account whether zero is poison when computing CR for `ct{t,l}z` (PR #122548)
Nikita Popov via llvm-commits
- [llvm] [ValueTracking] Take into account whether zero is poison when computing CR for `ct{t,l}z` (PR #122548)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Convert fshl(x, 0, y) to shl(x, and(y, BitWidth - 1)) when BitWidth is pow2 (PR #122362)
Nikita Popov via llvm-commits
- [llvm] [InstSimpify] Simplifying `(xor (sub C_Mask, X), C_Mask)` -> `X` (PR #122552)
Nikita Popov via llvm-commits
- [llvm] [InstSimpify] Simplifying `(xor (sub C_Mask, X), C_Mask)` -> `X` (PR #122552)
Nikita Popov via llvm-commits
- [llvm] [InstSimpify] Simplifying `(xor (sub C_Mask, X), C_Mask)` -> `X` (PR #122552)
Nikita Popov via llvm-commits
- [llvm] [TableGen] Avoid repeated hash lookups (NFC) (PR #122586)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Convert fshl(x, 0, y) to shl(x, and(y, BitWidth - 1)) when BitWidth is pow2 (PR #122362)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Canonicalize `(sub nuw Mask, X)` -> `(xor Mask, X)` (PR #122542)
Nikita Popov via llvm-commits
- [llvm] [DAG] Allow AssertZExt to scalarize. (PR #122463)
Nikita Popov via llvm-commits
- [llvm] [DAG] Allow AssertZExt to scalarize. (PR #122463)
Nikita Popov via llvm-commits
- [llvm] [DSE] Use alias analysis to identify no-op stores (PR #122610)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Fold `(ct{t, l}z Pow2)` -> `Log2(Pow2)` (PR #122620)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Fold `(ct{t, l}z Pow2)` -> `Log2(Pow2)` (PR #122620)
Nikita Popov via llvm-commits
- [lld] [wasm] Avoid repeated hash lookups (NFC) (PR #122626)
Nikita Popov via llvm-commits
- [lld] [ELF] Avoid repeated hash lookups (NFC) (PR #122628)
Nikita Popov via llvm-commits
- [llvm] [ADT] Deprecate PointerUnion::{is,get} (NFC) (PR #122623)
Nikita Popov via llvm-commits
- [llvm] [memprof] Migrate away from PointerUnion::is (NFC) (PR #122622)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Fold (add (add A, 1), (sext (icmp ne A, 0))) to call umax(A, 1) (PR #122491)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Fold (add (add A, 1), (sext (icmp ne A, 0))) to call umax(A, 1) (PR #122491)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Fold (add (add A, 1), (sext (icmp ne A, 0))) to call umax(A, 1) (PR #122491)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Fold `(ct{t, l}z Pow2)` -> `Log2(Pow2)` (PR #122620)
Nikita Popov via llvm-commits
- [llvm] [ValueTracking] Return `poison` for zero-sized types (PR #122647)
Nikita Popov via llvm-commits
- [llvm] [ValueTracking] Return `poison` for zero-sized types (PR #122647)
Nikita Popov via llvm-commits
- [llvm] [FunctionAttrs] Treat byval calls as only reading ptrs (PR #122618)
Nikita Popov via llvm-commits
- [llvm] VT: teach a special-case optz about samesign (PR #122590)
Nikita Popov via llvm-commits
- [llvm] VT: teach a special-case optz about samesign (PR #122590)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Fold `(ct{t, l}z Pow2)` -> `Log2(Pow2)` (PR #122620)
Nikita Popov via llvm-commits
- [clang] [llvm] [Clang] Add __builtin_assume_dereferenceable to encode deref assumption. (PR #121789)
Nikolas Klauser via llvm-commits
- [clang] [llvm] [Clang] Add __builtin_assume_dereferenceable to encode deref assumption. (PR #121789)
Nikolas Klauser via llvm-commits
- [clang] [llvm] [Clang] Add __builtin_assume_dereferenceable to encode deref assumption. (PR #121789)
Nikolas Klauser via llvm-commits
- [clang] [llvm] [Clang] Add __builtin_assume_dereferenceable to encode deref assumption. (PR #121789)
Nikolas Klauser via llvm-commits
- [clang] [llvm] [Clang] Add __builtin_assume_dereferenceable to encode deref assumption. (PR #121789)
Nikolas Klauser via llvm-commits
- [llvm] 0d9c027 - [InstCombine] Make `takeLog2` visible in all of InstCombine; NFC
Noah Goldstein via llvm-commits
- [llvm] [llvm] Remove `br i1 undef` from regression tests (PR #121733)
Nuno Lopes via llvm-commits
- [clang] [llvm] [Clang] restrict use of attribute names reserved by the C++ standard (PR #106036)
Oleksandr T. via llvm-commits
- [llvm] [AArch64] Correct position of CFI Instruction for Pointer Authentication (PR #121559)
Oliver Stannard via llvm-commits
- [clang] [llvm] [LLVM][Clang][AArch64] Implement AArch64 build attributes (PR #118771)
Oliver Stannard via llvm-commits
- [llvm] [MachineCP] Correctly handle register masks and sub-registers (PR #122472)
Oliver Stannard via llvm-commits
- [llvm] [MachineCP] Correctly handle register masks and sub-registers (PR #122472)
Oliver Stannard via llvm-commits
- [llvm] [MachineCP] Correctly handle register masks and sub-registers (PR #122472)
Oliver Stannard via llvm-commits
- [compiler-rt] [TySan] Added a 'print_stacktrace' flag for more detailed errors (PR #121756)
Oliver Stöneberg via llvm-commits
- [compiler-rt] [TySan] Added a 'print_stacktrace' flag for more detailed errors (PR #121756)
Oliver Stöneberg via llvm-commits
- [llvm] [llvm][Docs] Update supported hardware (PR #121743)
Omair Javaid via llvm-commits
- [llvm] [llvm][Docs] Update supported hardware (PR #121743)
Omair Javaid via llvm-commits
- [llvm] [llvm][Docs] Update supported hardware (PR #121743)
Omair Javaid via llvm-commits
- [llvm] [AArch64][CodeGen] Optimize security cookie check with New Fixup Pass (PR #121938)
Omair Javaid via llvm-commits
- [llvm] [AArch64][CodeGen] Optimize security cookie check with New Fixup Pass (PR #121938)
Omair Javaid via llvm-commits
- [llvm] [AArch64][CodeGen] Optimize security cookie check with New Fixup Pass (PR #121938)
Omair Javaid via llvm-commits
- [llvm] [WIP][AMDGPU] combine uniform AMDGPU lane Intrinsics (PR #116953)
Pankaj Dwivedi via llvm-commits
- [lld] [LLD] [ELF] Add support for linker script unary plus operator (PR #121508)
Parth Arora via llvm-commits
- [lld] [LLD] [ELF] Add support for linker script unary plus operator (PR #121508)
Parth Arora via llvm-commits
- [llvm] [AVR] Force relocations for non-encodable jumps (PR #121498)
Patryk Wychowaniec via llvm-commits
- [llvm] [AVR] Force relocations for non-encodable jumps (PR #121498)
Patryk Wychowaniec via llvm-commits
- [llvm] [AVR] Force relocations for non-encodable jumps (PR #121498)
Patryk Wychowaniec via llvm-commits
- [llvm] [AVR] Force relocations for non-encodable jumps (PR #121498)
Patryk Wychowaniec via llvm-commits
- [llvm] [AVR] Force relocations for non-encodable jumps (PR #121498)
Patryk Wychowaniec via llvm-commits
- [llvm] [AVR] Force relocations for non-encodable jumps (PR #121498)
Patryk Wychowaniec via llvm-commits
- [llvm] [AVR] Force relocations for non-encodable jumps (PR #121498)
Patryk Wychowaniec via llvm-commits
- [llvm] [AVR] Force relocations for non-encodable jumps (PR #121498)
Patryk Wychowaniec via llvm-commits
- [llvm] [AVR] Force relocations for non-encodable jumps (PR #121498)
Patryk Wychowaniec via llvm-commits
- [llvm] [AVR] Force relocations for non-encodable jumps (PR #121498)
Patryk Wychowaniec via llvm-commits
- [llvm] [AVR] Force relocations for non-encodable jumps (PR #121498)
Patryk Wychowaniec via llvm-commits
- [llvm] [AVR] Force relocations for non-encodable jumps (PR #121498)
Patryk Wychowaniec via llvm-commits
- [llvm] [AVR] Force relocations for non-encodable jumps (PR #121498)
Patryk Wychowaniec via llvm-commits
- [llvm] [AVR] Force relocations for non-encodable jumps (PR #121498)
Patryk Wychowaniec via llvm-commits
- [llvm] Fix for invalid JSON produced by ELFAttributeParser. (PR #120592)
Paul Bowen-Huggett via llvm-commits
- [llvm] Make AMDGPUCombinerHelper methods const (PR #121740)
Paul Bowen-Huggett via llvm-commits
- [llvm] Make AMDGPUCombinerHelper methods const (PR #121740)
Paul Bowen-Huggett via llvm-commits
- [clang] [compiler-rt] [flang] [libc] [libclc] [libcxx] [lldb] [llvm] [mlir] [polly] Make AMDGPUCombinerHelper methods const (PR #121740)
Paul Bowen-Huggett via llvm-commits
- [clang] [compiler-rt] [flang] [libc] [libclc] [libcxx] [lldb] [llvm] [mlir] [polly] Make AMDGPUCombinerHelper methods const (PR #121740)
Paul Bowen-Huggett via llvm-commits
- [clang] [compiler-rt] [flang] [libc] [libclc] [libcxx] [lldb] [llvm] [mlir] [polly] Make AMDGPUCombinerHelper methods const (PR #121740)
Paul Bowen-Huggett via llvm-commits
- [llvm] [NFC] Make AMDGPUCombinerHelper methods const (PR #121903)
Paul Bowen-Huggett via llvm-commits
- [llvm] [NFC] Make AMDGPUCombinerHelper methods const (PR #121903)
Paul Bowen-Huggett via llvm-commits
- [llvm] [NFC] Make AMDGPUCombinerHelper methods const (PR #121903)
Paul Bowen-Huggett via llvm-commits
- [llvm] Fix for invalid JSON produced by ELFAttributeParser. (PR #120592)
Paul Bowen-Huggett via llvm-commits
- [clang] [llvm] [Driver][SYCL] Add initial SYCL offload compilation support (PR #117268)
Paul Kirth via llvm-commits
- [compiler-rt] [ubsan] Use internal_memcpy to copy ubsan bits size (PR #121586)
Paul Kirth via llvm-commits
- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
Paul Kirth via llvm-commits
- [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)
Paul Kirth via llvm-commits
- [compiler-rt] [rtsan][test] Prevent test check from being optimized out in LTO builds (PR #122524)
Paul Kirth via llvm-commits
- [compiler-rt] [rtsan][test] Prevent test check from being optimized out in LTO builds (PR #122524)
Paul Kirth via llvm-commits
- [compiler-rt] [rtsan][test] Prevent test check from being optimized out in LTO builds (PR #122524)
Paul Kirth via llvm-commits
- [compiler-rt] [rtsan][test] Prevent test check from being optimized out in LTO builds (PR #122524)
Paul Kirth via llvm-commits
- [compiler-rt] [rtsan][test] Prevent test check from being optimized out in LTO builds (PR #122524)
Paul Kirth via llvm-commits
- [compiler-rt] [rtsan][test] Prevent test check from being optimized out in LTO builds (PR #122524)
Paul Kirth via llvm-commits
- [llvm] [SLP] NFC. Use InstructionsState::valid if users just want to know whether VL has same opcode. (PR #120217)
Paul Osmialowski via llvm-commits
- [llvm] [SLP] NFC. Use InstructionsState::valid if users just want to know whether VL has same opcode. (PR #120217)
Paul Osmialowski via llvm-commits
- [llvm] [BOLT] Enable hugify for AArch64 (PR #117158)
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Pengcheng Wang via llvm-commits
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Pengcheng Wang via llvm-commits
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Pengcheng Wang via llvm-commits
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Pengcheng Wang via llvm-commits
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Pengcheng Wang via llvm-commits
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Pengcheng Wang via llvm-commits
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Pengcheng Wang via llvm-commits
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Pengcheng Wang via llvm-commits
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Pengcheng Wang via llvm-commits
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Pengcheng Wang via llvm-commits
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Petr Vesely via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Phoebe Wang via llvm-commits
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Phoebe Wang via llvm-commits
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Phoebe Wang via llvm-commits
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Phoebe Wang via llvm-commits
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Phoebe Wang via llvm-commits
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Phoebe Wang via llvm-commits
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Phoebe Wang via llvm-commits
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Phoebe Wang via llvm-commits
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Phoebe Wang via llvm-commits
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Phoebe Wang via llvm-commits
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Phoebe Wang via llvm-commits
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Phoebe Wang via llvm-commits
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Phoebe Wang via llvm-commits
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Phoebe Wang via llvm-commits
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Phoebe Wang via llvm-commits
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Pierre van Houtryve via llvm-commits
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Piotr Fusik via llvm-commits
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Piotr Fusik via llvm-commits
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Piotr Fusik via llvm-commits
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Piotr Fusik via llvm-commits
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Piotr Fusik via llvm-commits
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Piotr Fusik via llvm-commits
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Piotr Fusik via llvm-commits
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Piotr Fusik via llvm-commits
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Piotr Fusik via llvm-commits
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Piotr Fusik via llvm-commits
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Piotr Fusik via llvm-commits
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Piotr Fusik via llvm-commits
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Piotr Fusik via llvm-commits
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Piotr Fusik via llvm-commits
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Piotr Fusik via llvm-commits
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Piotr Fusik via llvm-commits
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- [llvm] LAA: add missed swap when inverting src, sink (NFC) (PR #122254)
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- [llvm] LAA: add missed swap when inverting src, sink (PR #122254)
Ramkumar Ramachandra via llvm-commits
- [llvm] LAA: add missed swap when inverting src, sink (PR #122254)
Ramkumar Ramachandra via llvm-commits
- [llvm] LAA: refactor dependence class to prep for scaled strides (NFC) (PR #122113)
Ramkumar Ramachandra via llvm-commits
- [llvm] LAA: refactor dependence class to prep for scaled strides (NFC) (PR #122113)
Ramkumar Ramachandra via llvm-commits
- [llvm] LAA: be more precise on different store sizes (PR #122318)
Ramkumar Ramachandra via llvm-commits
- [llvm] VPlan/Builder: refine return types (NFC) (PR #108858)
Ramkumar Ramachandra via llvm-commits
- [llvm] VPlan: prepare to recursively simplify recipes (NFC) (PR #105699)
Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
- [llvm] VT/test: pre-commit tests to enable samesign optz (PR #120257)
Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
- [llvm] DSE: lift limitation on sizes being non-scalable (PR #110670)
Ramkumar Ramachandra via llvm-commits
- [llvm] LAA: be more precise on different store sizes (PR #122318)
Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
- [llvm] LAA: be more precise on different store sizes (PR #122318)
Ramkumar Ramachandra via llvm-commits
- [llvm] VT: teach isImpliedCondOperands about samesign (PR #120263)
Ramkumar Ramachandra via llvm-commits
- [llvm] IVDesc: unify RecurKinds IAnyOf and FAnyOf (PR #118393)
Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
- [llvm] VT: teach isImpliedCondMatchingOperands about samesign (PR #122474)
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Ramkumar Ramachandra via llvm-commits
- [llvm] IR: introduce ICmpInst::isImpliedByMatchingCmp (PR #122597)
Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
- [llvm] [WIP] Consider datalayout sentinel pointer value for isKnownNonZero check (PR #91769)
Rana Pratap Reddy via llvm-commits
- [llvm] [RISCV] Add stack clash vector support (PR #119458)
Raphael Moreira Zinsly via llvm-commits
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Raphael Moreira Zinsly via llvm-commits
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Raphael Moreira Zinsly via llvm-commits
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Raphael Moreira Zinsly via llvm-commits
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Raphael Moreira Zinsly via llvm-commits
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Reid Kleckner via llvm-commits
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Reid Kleckner via llvm-commits
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Renat Idrisov via llvm-commits
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Renat Idrisov via llvm-commits
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Renat Idrisov via llvm-commits
- [llvm] [GlobalISel] Catching inconsistencies in load memory, result, and range metadata type (PR #121247)
Renat Idrisov via llvm-commits
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Renat Idrisov via llvm-commits
- [llvm] [GlobalISel] Catching inconsistencies in load memory, result, and range metadata type (PR #121247)
Renat Idrisov via llvm-commits
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Renat Idrisov via llvm-commits
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Renat Idrisov via llvm-commits
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Renat Idrisov via llvm-commits
- [llvm] [GlobalISel] Catching inconsistencies in load memory, result, and range metadata type (PR #121247)
Renat Idrisov via llvm-commits
- [llvm] [GlobalISel] Catching inconsistencies in load memory, result, and range metadata type (PR #121247)
Renat Idrisov via llvm-commits
- [llvm] [GlobalISel] Catching inconsistencies in load memory, result, and range metadata type (PR #121247)
Renat Idrisov via llvm-commits
- [llvm] Fix various cl::desc typos and whitespace issues. (PR #121955)
Ryan Mansfield via llvm-commits
- [llvm] Fix various cl::desc typos and whitespace issues. (PR #121955)
Ryan Mansfield via llvm-commits
- [llvm] Fix various cl::desc typos and whitespace issues. (PR #121955)
Ryan Mansfield via llvm-commits
- [llvm] Fix various cl::desc typos and whitespace issues. (PR #121955)
Ryan Mansfield via llvm-commits
- [llvm] [llvm-objdump] Remove leading whitespace for PT_GNU_PROPERTY. (PR #121591)
Ryan Mansfield via llvm-commits
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Ryan Mansfield via llvm-commits
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Ryotaro Kasuga via llvm-commits
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Ryotaro Kasuga via llvm-commits
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Ryotaro Kasuga via llvm-commits
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- [llvm] [DirectX] Propagate shader flags mask of callees to callers (PR #118306)
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S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [DirectX] Propagate shader flags mask of callees to callers (PR #118306)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [DirectX] Propagate shader flags mask of callees to callers (PR #118306)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [DirectX] Propagate shader flags mask of callees to callers (PR #118306)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [DirectX] Propagate shader flags mask of callees to callers (PR #118306)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [DirectX] Propagate shader flags mask of callees to callers (PR #118306)
S. Bharadwaj Yadavalli via llvm-commits
- [compiler-rt] [Darwin][CompilerRT] Set compiler ID to 'Clang' for Compiler RT Tests for Apple Clang (PR #121858)
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Saleem Abdulrasool via llvm-commits
- [llvm] [RISCV] Support Parsing Nonstandard Relocations (PR #119909)
Sam Elliott via llvm-commits
- [llvm] [RISCV] Support Parsing Nonstandard Relocations (PR #119909)
Sam Elliott via llvm-commits
- [llvm] [RISCV] Support Parsing Nonstandard Relocations (PR #119909)
Sam Elliott via llvm-commits
- [llvm] [RISCV] Support Parsing Nonstandard Relocations (PR #119909)
Sam Elliott via llvm-commits
- [clang] [llvm] [RISCV] Add Qualcomm uC Xqcicm (Conditional Move) extension (PR #121752)
Sam Elliott via llvm-commits
- [llvm] [RISCV] Support Parsing Nonstandard Relocations (PR #119909)
Sam Elliott via llvm-commits
- [llvm] [RISCV] Support .option (no)autocompress (PR #122483)
Sam Elliott via llvm-commits
- [llvm] [RISCV] Support .option (no)autocompress (PR #122483)
Sam Elliott via llvm-commits
- [clang] [llvm] [RISCV] Add Qualcomm uC Xqciint (Interrupts) extension (PR #122256)
Sam Elliott via llvm-commits
- [llvm] [RISCV] Support .option (no)autocompress (PR #122483)
Sam Elliott via llvm-commits
- [llvm] Reland "[LoopVectorizer] Add support for partial reductions" with non-phi operand fix. (PR #121744)
Sam Tebbs via llvm-commits
- [llvm] [AArch64] Fold swapped sub/SUBS conditions (PR #121412)
Sam Tebbs via llvm-commits
- [llvm] Reland "[LoopVectorizer] Add support for partial reductions" with non-phi operand fix. (PR #121744)
Sam Tebbs via llvm-commits
- [llvm] Reland "[LoopVectorizer] Add support for partial reductions" with non-phi operand fix. (PR #121744)
Sam Tebbs via llvm-commits
- [llvm] [llvm] Fix crash caused by reprocessing complex reductions (PR #122077)
Sam Tebbs via llvm-commits
- [llvm] Reland "[LoopVectorizer] Add support for partial reductions" with non-phi operand fix. (PR #121744)
Sam Tebbs via llvm-commits
- [llvm] Reland "[LoopVectorizer] Add support for partial reductions" with non-phi operand fix. (PR #121744)
Sam Tebbs via llvm-commits
- [llvm] Reland "[LoopVectorizer] Add support for partial reductions" with non-phi operand fix. (PR #121744)
Sam Tebbs via llvm-commits
- [llvm] Reland "[LoopVectorizer] Add support for partial reductions" with non-phi operand fix. (PR #121744)
Sam Tebbs via llvm-commits
- [llvm] Reland "[LoopVectorizer] Add support for partial reductions" with non-phi operand fix. (PR #121744)
Sam Tebbs via llvm-commits
- [llvm] Reland "[LoopVectorizer] Add support for partial reductions" with non-phi operand fix. (PR #121744)
Sam Tebbs via llvm-commits
- [llvm] Reland "[LoopVectorizer] Add support for partial reductions" with non-phi operand fix. (PR #121744)
Sam Tebbs via llvm-commits
- [llvm] Reland "[LoopVectorizer] Add support for partial reductions" with non-phi operand fix. (PR #121744)
Sam Tebbs via llvm-commits
- [llvm] Reland "[LoopVectorizer] Add support for partial reductions" with non-phi operand fix. (PR #121744)
Sam Tebbs via llvm-commits
- [llvm] Reland "[LoopVectorizer] Add support for partial reductions" with non-phi operand fix. (PR #121744)
Sam Tebbs via llvm-commits
- [llvm] Reland "[LoopVectorizer] Add support for partial reductions" with non-phi operand fix. (PR #121744)
Sam Tebbs via llvm-commits
- [llvm] [SPIRV] convergence anchor intrinsic does not have a parent token (PR #122230)
Sameer Sahasrabuddhe via llvm-commits
- [llvm] [SPIRV] convergence anchor intrinsic does not have a parent token (PR #122230)
Sameer Sahasrabuddhe via llvm-commits
- [llvm] [SPIRV] convergence anchor intrinsic does not have a parent token (PR #122230)
Sameer Sahasrabuddhe via llvm-commits
- [llvm] [SPIRV] convergence anchor intrinsic does not have a parent token (PR #122230)
Sameer Sahasrabuddhe via llvm-commits
- [llvm] [SPIRV] convergence anchor intrinsic does not have a parent token (PR #122230)
Sameer Sahasrabuddhe via llvm-commits
- [llvm] [SPIRV] convergence anchor intrinsic does not have a parent token (PR #122230)
Sameer Sahasrabuddhe via llvm-commits
- [clang] [llvm] [X86] Extend kCFI with a 3-bit arity indicator (PR #121070)
Sami Tolvanen via llvm-commits
- [compiler-rt] [AArch64][SME] Fix broken compiler check for SME2 support in compiler-rt (PR #121625)
Sander de Smalen via llvm-commits
- [clang] [llvm] [AArch64][SME] Disable inlining of callees with new ZT0 state (PR #121338)
Sander de Smalen via llvm-commits
- [llvm] [AArch64][SVE] Add dot product codegen for partial reductions with no binary operation on input (PR #120207)
Sander de Smalen via llvm-commits
- [llvm] [Coalescer] Move code added in #116191 (PR #121779)
Sander de Smalen via llvm-commits
- [llvm] [Coalescer] Move code added in #116191 (PR #121779)
Sander de Smalen via llvm-commits
- [llvm] [Coalescer] Consider NewMI's subreg index when updating lanemask. (PR #121780)
Sander de Smalen via llvm-commits
- [llvm] [Coalescer] Consider NewMI's subreg index when updating lanemask. (PR #121780)
Sander de Smalen via llvm-commits
- [llvm] [Coalescer] Consider NewMI's subreg index when updating lanemask. (PR #121780)
Sander de Smalen via llvm-commits
- [llvm] [Coalescer] Consider NewMI's subreg index when updating lanemask. (PR #121780)
Sander de Smalen via llvm-commits
- [llvm] [Coalescer] Consider NewMI's subreg index when updating lanemask. (PR #121780)
Sander de Smalen via llvm-commits
- [llvm] [Coalescer] Consider NewMI's subreg index when updating lanemask. (PR #121780)
Sander de Smalen via llvm-commits
- [llvm] [AArch64] Simplify ExactFPImm GenericTable. NFC (PR #121827)
Sander de Smalen via llvm-commits
- [llvm] [Hexagon] Add missing pattern for v8i1 type (PR #120703)
Santanu Das via llvm-commits
- [llvm] [MachinePipeliner] Improve loop carried dependence analysis (PR #94185)
Santanu Das via llvm-commits
- [llvm] [Hexagon] Add missing pattern for v8i1 type (PR #120703)
Santanu Das via llvm-commits
- [llvm] [HLSL] [DirectX] translate llvm fast math flags to llvm 3.7 fast math flags (PR #122025)
Sarah Spall via llvm-commits
- [clang] [llvm] [HLSL] Implement elementwise firstbitlow builtin (PR #116858)
Sarah Spall via llvm-commits
- [clang] [llvm] [HLSL] Implement elementwise firstbitlow builtin (PR #116858)
Sarah Spall via llvm-commits
- [clang] [llvm] [HLSL] Implement elementwise firstbitlow builtin (PR #116858)
Sarah Spall via llvm-commits
- [clang] [llvm] [HLSL] Implement elementwise firstbitlow builtin (PR #116858)
Sarah Spall via llvm-commits
- [llvm] [HLSL] [DirectX] translate llvm fast math flags to llvm 3.7 fast math flags (PR #122025)
Sarah Spall via llvm-commits
- [llvm] [HLSL] [DirectX] translate llvm fast math flags to llvm 3.7 fast math flags (PR #122025)
Sarah Spall via llvm-commits
- [llvm] [HLSL] [DirectX] translate llvm fast math flags to llvm 3.7 fast math flags (PR #122025)
Sarah Spall via llvm-commits
- [clang] [llvm] [X86] Extend kCFI with a 3-bit arity indicator (PR #121070)
Scott Constable via llvm-commits
- [clang] [llvm] [X86] Extend kCFI with a 3-bit arity indicator (PR #121070)
Scott Constable via llvm-commits
- [clang] [llvm] [X86] Extend kCFI with a 3-bit arity indicator (PR #121070)
Scott Constable via llvm-commits
- [compiler-rt] [TySan] Intercept malloc_size on Apple platforms. (PR #122133)
Sean McBride via llvm-commits
- [compiler-rt] [TySan] Intercept malloc_size on Apple platforms. (PR #122133)
Sean McBride via llvm-commits
- [compiler-rt] [TySan] Intercept malloc_size on Apple platforms. (PR #122133)
Sean McBride via llvm-commits
- [clang] [compiler-rt] [llvm] [TySan] A Type Sanitizer (Runtime Library) (PR #76261)
Sean McBride via llvm-commits
- [compiler-rt] [TySan] Fixed false positive when accessing offset member variables (PR #120406)
Sean McBride via llvm-commits
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Sean McBride via llvm-commits
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Sean McBride via llvm-commits
- [clang] [llvm] Implement operand bundles for floating-point operations (PR #109798)
Serge Pavlov via llvm-commits
- [llvm] [TableGen][GISel] Create untyped registers during instruction selection (PR #121270)
Sergei Barannikov via llvm-commits
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Sergei Barannikov via llvm-commits
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Sergei Barannikov via llvm-commits
- [llvm] [TableGen][GISel] Create untyped registers during instruction selection (PR #121270)
Sergei Barannikov via llvm-commits
- [llvm] [TableGen][GISel] Create untyped registers during instruction selection (PR #121270)
Sergei Barannikov via llvm-commits
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Sergei Barannikov via llvm-commits
- [llvm] [TableGen][GlobalISel] Reorder atomic predicate to preserve the order (PR #121806)
Sergei Barannikov via llvm-commits
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Sergei Barannikov via llvm-commits
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Sergei Barannikov via llvm-commits
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Sergei Barannikov via llvm-commits
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Sergei Barannikov via llvm-commits
- [llvm] [ADT] Make null PointerUnion with different active members compare equal (PR #121847)
Sergei Barannikov via llvm-commits
- [llvm] [ADT] Make null PointerUnion with different active members compare equal (PR #121847)
Sergei Barannikov via llvm-commits
- [llvm] [ADT] Make null PointerUnion with different active members compare equal (PR #121847)
Sergei Barannikov via llvm-commits
- [llvm] [ADT] Make null PointerUnion with different active members compare equal (PR #121847)
Sergei Barannikov via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Sergei Barannikov via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Sergei Barannikov via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Sergei Barannikov via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Sergei Barannikov via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Sergei Barannikov via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Sergei Barannikov via llvm-commits
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Sergei Barannikov via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Sergei Barannikov via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Sergei Barannikov via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Sergei Barannikov via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Sergei Barannikov via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Sergei Barannikov via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Sergei Barannikov via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Sergei Barannikov via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Sergei Barannikov via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Sergei Barannikov via llvm-commits
- [llvm] [ADT] Specialize ValueIsPresent for PointerUnion (PR #121847)
Sergei Barannikov via llvm-commits
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Sergei Barannikov via llvm-commits
- [llvm] [TableGen][GISel] Create untyped registers during instruction selection (PR #121270)
Sergei Barannikov via llvm-commits
- [llvm] [TableGen][GISel] Create untyped registers during instruction selection (PR #121270)
Sergei Barannikov via llvm-commits
- [llvm] [TableGen][GISel] Create untyped registers during instruction selection (PR #121270)
Sergei Barannikov via llvm-commits
- [llvm] [TableGen] Use assert instead of PrintFatalError in TGLexer. NFC. (PR #122303)
Sergei Barannikov via llvm-commits
- [llvm] [TableGen] Use assert instead of PrintFatalError in TGLexer. NFC. (PR #122303)
Sergei Barannikov via llvm-commits
- [llvm] [TableGen][GlobalISel] Reorder atomic predicate to preserve the order (PR #121806)
Sergei Barannikov via llvm-commits
- [llvm] [ADT] Fix specialization of ValueIsPresent for PointerUnion (PR #121847)
Sergei Barannikov via llvm-commits
- [llvm] [ADT] Fix specialization of ValueIsPresent for PointerUnion (PR #121847)
Sergei Barannikov via llvm-commits
- [llvm] [ADT] Fix specialization of ValueIsPresent for PointerUnion (PR #121847)
Sergei Barannikov via llvm-commits
- [llvm] [TableGen][GISel] Create untyped registers during instruction selection (PR #121270)
Sergei Barannikov via llvm-commits
- [llvm] [TableGen][GISel] Create untyped registers during instruction selection (PR #121270)
Sergei Barannikov via llvm-commits
- [llvm] [M68k] implement move to and from sr (PR #111145)
Sergei Barannikov via llvm-commits
- [llvm] [TableGen][GISel] Learn to import patterns with physreg defs (PR #120343)
Sergei Barannikov via llvm-commits
- [llvm] [TableGen] Use assert instead of PrintFatalError in TGLexer. NFC. (PR #122303)
Sergei Barannikov via llvm-commits
- [llvm] [ADT] Fix specialization of ValueIsPresent for PointerUnion (PR #121847)
Sergei Barannikov via llvm-commits
- [llvm] Revert "[ADT] Fix specialization of ValueIsPresent for PointerUnion" (PR #122557)
Sergei Barannikov via llvm-commits
- [llvm] Revert "[ADT] Fix specialization of ValueIsPresent for PointerUnion" (PR #122557)
Sergei Barannikov via llvm-commits
- [llvm] [TableGen] Avoid repeated hash lookups (NFC) (PR #122586)
Sergei Barannikov via llvm-commits
- [clang] [llvm] [OpenMP][OMPIRBuilder] Handle non-failing calls properly (PR #115863)
Sergio Afonso via llvm-commits
- [clang] [llvm] [OpenMP][OMPIRBuilder] Handle non-failing calls properly (PR #115863)
Sergio Afonso via llvm-commits
- [clang] [llvm] [OpenMP][OMPIRBuilder] Handle non-failing calls properly (PR #115863)
Sergio Afonso via llvm-commits
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Shao-Ce SUN via llvm-commits
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Shao-Ce SUN via llvm-commits
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Shao-Ce SUN via llvm-commits
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Shao-Ce SUN via llvm-commits
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Shao-Ce SUN via llvm-commits
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Shengchen Kan via llvm-commits
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- [llvm] [X86] Use loaded/stored element size when parsing/printing gather/scatter pointer size in Intel syntax. (PR #122530)
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Shilei Tian via llvm-commits
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Shilei Tian via llvm-commits
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Shilei Tian via llvm-commits
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Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Fix an invalid cast in `AMDGPULateCodeGenPrepare::visitLoadInst` (PR #122494)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Fix an invalid cast in `AMDGPULateCodeGenPrepare::visitLoadInst` (PR #122494)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Fix an invalid cast in `AMDGPULateCodeGenPrepare::visitLoadInst` (PR #122494)
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Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
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- [llvm] 67652a3 - [PhaseOrdering][X86] Add horizontal-sub test coverage for #34072
Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
- [llvm] d993b11 - [VectorCombine] Remove superfluous whitespace from debug log comment. NFC.
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- [llvm] [CostModel][X86] Attempt to match cheap v4f32 shuffles that map to SHUFPS instruction (PR #121778)
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Simon Pilgrim via llvm-commits
- [llvm] [SLP]Improved reduction cost/codegen (PR #118293)
Simon Pilgrim via llvm-commits
- [llvm] [SLP]Improved reduction cost/codegen (PR #118293)
Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
Simon Pilgrim via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
Simon Pilgrim via llvm-commits
- [llvm] 4a42658 - [VectorCombine][X86] shuffle-of-cmps.ll - tweak shuf_fcmp_oeq_v4i32 shuffle to be not so cheap
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Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
- [llvm] [DAG] SDPatternMatch - add matchers for reassociatable binops (PR #119985)
Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
- [llvm] [X86] Lower CTTZ/CTLZ vXi8 vectors using GF2P8AFFINEQB (PR #118012)
Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
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- [llvm] [X86] widenSubVector - widen from smaller build vector if the upper elements are already the same padding elements (PR #122445)
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Snehasish Kumar via llvm-commits
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Snehasish Kumar via llvm-commits
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Sushant Gokhale via llvm-commits
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Sushant Gokhale via llvm-commits
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Sushant Gokhale via llvm-commits
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Sushant Gokhale via llvm-commits
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Tarun Prabhu via llvm-commits
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Teresa Johnson via llvm-commits
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Teresa Johnson via llvm-commits
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Teresa Johnson via llvm-commits
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Teresa Johnson via llvm-commits
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Teresa Johnson via llvm-commits
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Teresa Johnson via llvm-commits
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Teresa Johnson via llvm-commits
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Teresa Johnson via llvm-commits
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Teresa Johnson via llvm-commits
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Teresa Johnson via llvm-commits
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Teresa Johnson via llvm-commits
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Teresa Johnson via llvm-commits
- [lld] [llvm] [ThinLTO] Skip opt pipeline and summary wrapper pass on empty modules (PR #120143)
Teresa Johnson via llvm-commits
- [lld] [llvm] [ThinLTO] Skip opt pipeline and summary wrapper pass on empty modules (PR #120143)
Teresa Johnson via llvm-commits
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Tex Riddell via llvm-commits
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Thor Preimesberger via llvm-commits
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Thor Preimesberger via llvm-commits
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Thor Preimesberger via llvm-commits
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Thor Preimesberger via llvm-commits
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Thor Preimesberger via llvm-commits
- [llvm] [hwasan] Add test case for null pointer dereference (PR #122186)
Thurston Dang via llvm-commits
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Thurston Dang via llvm-commits
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Thurston Dang via llvm-commits
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Thurston Dang via llvm-commits
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Thurston Dang via llvm-commits
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Thurston Dang via llvm-commits
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Thurston Dang via llvm-commits
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Tim Gymnich via llvm-commits
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Tim Gymnich via llvm-commits
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Tim Gymnich via llvm-commits
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Tom Stellard via llvm-commits
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Tom Stellard via llvm-commits
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Tom Stellard via llvm-commits
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Tom Stellard via llvm-commits
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Tom Stellard via llvm-commits
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Tom Stellard via llvm-commits
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Tom Stellard via llvm-commits
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Tom Stellard via llvm-commits
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Tom Stellard via llvm-commits
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Tom Stellard via llvm-commits
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Tom Stellard via llvm-commits
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Tom Stellard via llvm-commits
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Tom Stellard via llvm-commits
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Tom Stellard via llvm-commits
- [llvm] Add pre-merge workflow for HLSL testing (PR #122184)
Tom Stellard via llvm-commits
- [clang] [llvm] [HLSL][SPIRV][DXIL] Implement `WaveActiveSum` intrinsic (PR #118580)
Tom Stellard via llvm-commits
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Tom Stellard via llvm-commits
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Tom Stellard via llvm-commits
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Tom Stellard via llvm-commits
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Tom Stellard via llvm-commits
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Tom Stellard via llvm-commits
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Tom Stellard via llvm-commits
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Tom Stellard via llvm-commits
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Tom Stellard via llvm-commits
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Tom Stellard via llvm-commits
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Tom Stellard via llvm-commits
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Tristan Ross via llvm-commits
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Tristan Ross via llvm-commits
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Tristan Ross via llvm-commits
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Tristan Ross via llvm-commits
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Tristan Ross via llvm-commits
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Tristan Ross via llvm-commits
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Tristan Ross via llvm-commits
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Tristan Ross via llvm-commits
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Tristan Ross via llvm-commits
- [llvm] [SandboxVectorizer][NFCI] Fix use of possibly-uninitialized scalar. (PR #122201)
Tyler Lanphear via llvm-commits
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Tyler Lanphear via llvm-commits
- [llvm] [SandboxVectorizer][NFCI] Fix use of possibly-uninitialized scalar. (PR #122201)
Tyler Lanphear via llvm-commits
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Tyler Lanphear via llvm-commits
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Tyler Lanphear via llvm-commits
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Tyler Lanphear via llvm-commits
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Tyler Lanphear via llvm-commits
- [llvm] [SandboxVectorizer][NFCI] Fix use of possibly-uninitialized scalar. (PR #122201)
Tyler Lanphear via llvm-commits
- [llvm] [SandboxVectorizer][NFCI] Fix use of possibly-uninitialized scalar. (PR #122201)
Tyler Lanphear via llvm-commits
- [llvm] [SandboxVectorizer][NFCI] Fix use of possibly-uninitialized scalar. (PR #122201)
Tyler Lanphear via llvm-commits
- [llvm] [SandboxVectorizer][NFCI] Fix use of possibly-uninitialized scalar. (PR #122201)
Tyler Lanphear via llvm-commits
- [llvm] [SandboxVectorizer][NFCI] Fix use of possibly-uninitialized scalar. (PR #122201)
Tyler Lanphear via llvm-commits
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Tyler Lanphear via llvm-commits
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Tyler Nowicki via llvm-commits
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Tyler Nowicki via llvm-commits
- [llvm] [Coroutines][LazyCallGraph] resumes are not really SCC (PR #116285)
Tyler Nowicki via llvm-commits
- [llvm] [Coroutines][LazyCallGraph] resumes are not really SCC (PR #116285)
Tyler Nowicki via llvm-commits
- [llvm] [Coroutines][LazyCallGraph] resumes are not really SCC (PR #116285)
Tyler Nowicki via llvm-commits
- [llvm] [Coroutines][LazyCallGraph] resumes are not really SCC (PR #116285)
Tyler Nowicki via llvm-commits
- [llvm] [Coroutines][LazyCallGraph] resumes are not really SCC (PR #116285)
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- [llvm] [AArch664] Replace uaddlv with addv for popcount operation (PR #121934)
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- [llvm] [AArch664] Replace uaddlv with addv for popcount operation (PR #121934)
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- [llvm] [AArch664] Replace uaddlv with addv for popcount operation (PR #121934)
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- [llvm] [AArch664] Replace uaddlv with addv for popcount operation (PR #121934)
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- [llvm] [AArch664] Replace uaddlv with addv for popcount operation (PR #121934)
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- [llvm] [AArch64] Replace uaddlv with addv for popcount operation (PR #121934)
Usha Gupta via llvm-commits
- [llvm] [AArch64] Replace uaddlv with addv for popcount operation (PR #121934)
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- [llvm] [AArch64] Replace uaddlv with addv for popcount operation (PR #121934)
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- [llvm] [NVPTX] Fix segfault with i128 types in arrays (PR #120562)
Valery Chernov via llvm-commits
- [llvm] [NVPTX] Fix segfault with i128 types in arrays (PR #120562)
Valery Chernov via llvm-commits
- [llvm] [NVPTX] Fix segfault with i128 types in arrays (PR #120562)
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- [llvm] [SLP] NFC. Refactor getSameOpcode and reduce for loop iterations. (PR #122241)
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- [llvm] Revert "[SLP] NFC. Refactor getSameOpcode and reduce for loop iterations." (PR #122407)
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Vitaly Buka via llvm-commits
- [llvm] [BoundsChecking] Add guard= pass parameter (PR #122575)
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- [clang] [llvm] [SPIRV] Add Target Builtins using Distance ext as an example (PR #121598)
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- [clang] [llvm] [Modules] Fix modular build. (PR #122034)
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- [clang] [llvm] [Modules] Fix modular build. (PR #122034)
Volodymyr Sapsai via llvm-commits
- [clang] [llvm] [Modules] Fix modular build. (PR #122034)
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- [llvm] [SPIR-V] Prefer SPV_INTEL_optnone over SPV_EXT_optnone when both extensions are available (PR #122082)
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- [llvm] [InstCombine] Handle commuted pattern for `((X s/ C1) << C2) + X` (PR #121737)
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- [llvm] [RISCV] Don't commute with shift if it would break sh{1,2,3}add pattern (PR #119527)
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- [llvm] [InstCombine] Handle commuted pattern for `((X s/ C1) << C2) + X` (PR #121737)
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- [llvm] [InstCombine] Fold (trunc X to i1) & !iszero(X & Pow2)) -> (X & (1 | Pow2)) == (1 | Pow2) (PR #119196)
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Yingwei Zheng via llvm-commits
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Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold `(select (icmp eq (and x, y), 0), (add/xor x, y), F)` (PR #121841)
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- [llvm] [InstCombine] Simplify FMF propagation. NFC. (PR #121899)
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- [llvm] [InstCombine] Handle commuted patterns in `foldSelectWithSRem` (PR #121896)
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- [llvm] [DevPolicy] Add guidelines for fuzzer-generated issue reports (PR #112372)
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- [llvm] [PatternMatch] Match commuted patterns in `Signum_match` (PR #121911)
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- [llvm] [DevPolicy] Add guidelines for fuzzer-generated issue reports (PR #112372)
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- [llvm] [InstCombine] Fold `(A | B) ^ (A & C) --> A ? ~C : B` (PR #121906)
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- [llvm] [PatternMatch] Match commuted patterns in `Signum_match` (PR #121911)
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- [llvm] [ValueTracking] Handle flipped strictness cases in `matchSelectPattern` (PR #121958)
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- [llvm] [ValueTracking] Handle flipped strictness cases in `matchSelectPattern` (PR #121958)
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- [llvm] [InstCombine] Simplify FMF propagation. NFC. (PR #121899)
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- [llvm] [IRBuilder] Add a helper function to intersect FMFs from two instructions (PR #122059)
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- [llvm] [ValueTracking] Move `getFlippedStrictnessPredicateAndConstant` into ValueTracking. NFC. (PR #122064)
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- [llvm] [LangRef] Add some documentation for ABI / call-site attributes (PR #121930)
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- [llvm] [InstCombine] move foldAndOrOfICmpsOfAndWithPow2 into foldLogOpOfMaskedICmps (PR #121970)
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- [llvm] [EarlyCSE] Fix improper icmp simplification (PR #122043)
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- [llvm] [EarlyCSE] Fix improper icmp simplification (PR #122043)
Yingwei Zheng via llvm-commits
- [llvm] [EarlyCSE] Fix improper icmp simplification (PR #122043)
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- [llvm] [LVI] Learn value ranges from ctpop/ctlz/cttz results (PR #121945)
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- [llvm] [LVI] Learn value ranges from ctpop/ctlz/cttz results (PR #121945)
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- [llvm] [LVI] Learn value ranges from ctpop/ctlz/cttz results (PR #121945)
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- [llvm] [LangRef] Add some documentation for ABI / call-site attributes (PR #121930)
Yingwei Zheng via llvm-commits
- [llvm] [EarlyCSE] Fix improper icmp simplification (PR #122043)
Yingwei Zheng via llvm-commits
- [llvm] [IRBuilder] Add a helper function to intersect FMFs from two instructions (PR #122059)
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- [llvm] [Lint] Lint mismatch in ABI attributes (PR #121929)
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- [llvm] [CodeGenPrepare] Replace deleted sext instr with the promoted value. (PR #71058)
Yingwei Zheng via llvm-commits
- [llvm] [CodeGenPrepare] Replace deleted sext instr with the promoted value. (PR #71058)
Yingwei Zheng via llvm-commits
- [llvm] [CodeGenPrepare] Replace deleted ext instr with the promoted value. (PR #71058)
Yingwei Zheng via llvm-commits
- [llvm] [CodeGenPrepare] Replace deleted ext instr with the promoted value. (PR #71058)
Yingwei Zheng via llvm-commits
- [llvm] [CodeGenPrepare] Replace deleted ext instr with the promoted value. (PR #71058)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Bail out on inner disjoint or in `foldSelectICmpEq` (PR #121635)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Bail out on inner disjoint or in `foldSelectICmpEq` (PR #121635)
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- [llvm] [ValueTracking] Move `getFlippedStrictnessPredicateAndConstant` into ValueTracking. NFC. (PR #122064)
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- [llvm] [CodeGenPrepare] Regenerate test `X86/codegen-prepare-addrmode-sext.ll` (PR #122101)
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- [llvm] [CodeGenPrepare] Regenerate test `X86/codegen-prepare-addrmode-sext.ll` (PR #122101)
Yingwei Zheng via llvm-commits
- [llvm] [CodeGenPrepare] Replace deleted ext instr with the promoted value. (PR #71058)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Handle flipped strictness cases in `matchSelectPattern` (PR #121958)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Handle commuted patterns in `foldBinOpShiftWithShift` (PR #122126)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Simplify FMF propagation. NFC. (PR #121899)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine][NFC] Precommit a test for folding a binary op of reductions. (PR #121568)
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- [llvm] [InstCombine][NFC] Precommit a test for folding a binary op of reductions. (PR #121568)
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- [llvm] [InstCombine][NFC] Precommit a test for folding a binary op of reductions. (PR #121568)
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- [llvm] [InstCombine][NFC] Precommit a test for folding a binary op of reductions. (PR #121568)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine][NFC] Precommit a test for folding a binary op of reductions. (PR #121568)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine][NFC] Precommit a test for folding a binary op of reductions. (PR #121568)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold binary op of reductions. (PR #121567)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold binary op of reductions. (PR #121567)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold binary op of reductions. (PR #121567)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Add rotate idiom to haveNoCommonBitsSet special cases (PR #122165)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Add rotate idiom to haveNoCommonBitsSet special cases (PR #122165)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Move foldLogOpOfMaskedICmps to make it possible to handle trunc to i1. (PR #122179)
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- [llvm] [InstCombine] Remove foldSelectICmpEq() fold (PR #122098)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Handle ceil division idiom (PR #100977)
Yingwei Zheng via llvm-commits
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via llvm-commits
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via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
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- [llvm] db88071 - [CostModel][X86] Attempt to match cheap v4f32 shuffles that map to SHUFPS instruction (#121778)
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- [llvm] d40235a - [TableGen] Remove unused functionality from OpInit class. NFC (#121680)
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- [llvm] 6b0807f - [AArch64][GlobalISel] Add support for lowering trunc stores of vector bools.
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via llvm-commits
- [llvm] [GSYM] Add support for querying merged functions in llvm-gsymutil (PR #120991)
via llvm-commits
- [llvm] [RISCV] Use ISD::XOR instead of RISCVISD::VMXOR_VL in lowerVectorMaskVecReduction of scalable ISD::VECREDUCE_AND (PR #121812)
via llvm-commits
- [llvm] [VectorCombine] Allow shuffling between vectors the same type but different element sizes (PR #121216)
via llvm-commits
- [llvm] [VectorCombine] Allow shuffling between vectors the same type but different element sizes (PR #121216)
via llvm-commits
- [llvm] [RISCV] Add missing check before accessing pointer (PR #121816)
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- [llvm] f3bc8c3 - Add SD matchers and unit test coverage for ISD::VECTOR_SHUFFLE (#119592)
via llvm-commits
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- [llvm] 7d53762 - [AArch64] Migrate from SearchableTable to GenericTable/Enum. NFC (#121661)
via llvm-commits
- [llvm] [InstSimplify] Use multi-op replacement when simplify `select` (PR #121708)
via llvm-commits
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via llvm-commits
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via llvm-commits
- [llvm] [InstSimplify] Use multi-op replacement when simplify `select` (PR #121708)
via llvm-commits
- [llvm] [VPlan][Coverity] Fix coverity CID1579964. (PR #121805)
via llvm-commits
- [llvm] [VPlan][Coverity] Fix coverity CID1579964. (PR #121805)
via llvm-commits
- [llvm] [VPlan][Coverity] Fix coverity CID1579964. (PR #121805)
via llvm-commits
- [llvm] [GSYM] Add support for querying merged functions in llvm-gsymutil (PR #120991)
via llvm-commits
- [llvm] [InstSimplify] Use multi-op replacement when simplify `select` (PR #121708)
via llvm-commits
- [llvm] [InstSimplify] Use multi-op replacement when simplify `select` (PR #121708)
via llvm-commits
- [llvm] dc0e258 - [AMDGPU] Remove Dwarf encodings for subregisters (#117891)
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- [llvm] 6f28b4b - [GSYM] Add support for querying merged functions in llvm-gsymutil (#120991)
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via llvm-commits
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via llvm-commits
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- [llvm] [ARM] Migrate from SearachableTable to GenericTable. NFC (PR #121840)
via llvm-commits
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via llvm-commits
- [llvm] 3f1a391 - [llvm-gsymutil] Fix broken tests (#121837)
via llvm-commits
- [llvm] [llvm-gsymutil] Fix broken tests (PR #121837)
via llvm-commits
- [llvm] goldsteinn/select and eq 0 (PR #121841)
via llvm-commits
- [llvm] goldsteinn/select and eq 0 (PR #121841)
via llvm-commits
- [llvm] [InstCombine] Fold `(select (icmp eq (and x, y), 0), (add/xor x, y), F)` (PR #121841)
via llvm-commits
- [llvm] [ARM] Migrate from SearachableTable to GenericTable. NFC (PR #121840)
via llvm-commits
- [llvm] [InstSimplify] Use multi-op replacement when simplify `select` (PR #121708)
via llvm-commits
- [llvm] [InstSimplify] Use multi-op replacement when simplify `select` (PR #121708)
via llvm-commits
- [clang] [llvm] [HLSL] Adding Flatten and Branch if attributes (PR #116331)
via llvm-commits
- [llvm] [llvm-gsymutil] Fix broken tests (PR #121837)
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- [clang] [llvm] [NFC] fix up typos (PR #121842)
via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
via llvm-commits
- [llvm] 32d761b - [AArch64][machine-scheduler][Neoverse-N2] fdiv is blocking (#119206)
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- [llvm] [FMV][GlobalOpt] Statically resolve calls to versioned functions. (PR #87939)
via llvm-commits
- [llvm] [libc][bazel] Remove customization from several libc BUILD rules. (PR #121843)
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- [llvm] [NFC][SandboxVectorizer] Disable default copy CTOR/assigment for SchedBundle. (PR #121846)
via llvm-commits
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via llvm-commits
- [llvm] [ADT] Make null PointerUnion with different active members compare equal (PR #121847)
via llvm-commits
- [llvm] [ADT] Make null PointerUnion with different active members compare equal (PR #121847)
via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
via llvm-commits
- [llvm] [InstSimplify] Use multi-op replacement when simplify `select` (PR #121708)
via llvm-commits
- [llvm] [InstSimplify] Use multi-op replacement when simplify `select` (PR #121708)
via llvm-commits
- [llvm] [InstSimplify] Use multi-op replacement when simplify `select` (PR #121708)
via llvm-commits
- [llvm] c8d435f - [RISCV] Use ISD::XOR instead of RISCVISD::VMXOR_VL in lowerVectorMaskVecReduction of scalable ISD::VECREDUCE_AND (#121812)
via llvm-commits
- [llvm] [InstSimplify] Use multi-op replacement when simplify `select` (PR #121708)
via llvm-commits
- [llvm] [nfc][thinlto] remove unused return from `renameModuleForThinLTO` (PR #121851)
via llvm-commits
- [llvm] [nfc][thinlto] remove unused return from `renameModuleForThinLTO` (PR #121851)
via llvm-commits
- [clang] [llvm] [llvm][NFC] Rework Timer.cpp globals to ensure valid lifetimes (PR #121663)
via llvm-commits
- [clang] [llvm] [llvm][NFC] Rework Timer.cpp globals to ensure valid lifetimes (PR #121663)
via llvm-commits
- [clang] [llvm] [llvm][NFC] Rework Timer.cpp globals to ensure valid lifetimes (PR #121663)
via llvm-commits
- [clang] [llvm] [llvm][NFC] Rework Timer.cpp globals to ensure valid lifetimes (PR #121663)
via llvm-commits
- [llvm] 4312075 - [nfc][thinlto] remove unnecessary return from `renameModuleForThinLTO` (#121851)
via llvm-commits
- [llvm] [LLVM][DWARF] Create debug names entry for non-tu top level DIE (PR #121856)
via llvm-commits
- [llvm] 9709795 - [Coverage] MCDC: Move findIndependencePairs deferred into MCDCRecord (#121188)
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- [compiler-rt] [Darwin][CompilerRT] Set compiler ID to 'Clang' for Compiler RT Tests for Apple Clang (PR #121858)
via llvm-commits
- [compiler-rt] [compiler-rt] Don't detect a versioned clang test compiler as GCC (PR #117812)
via llvm-commits
- [llvm] 90b04bf - [NFC] fix up typos (#121842)
via llvm-commits
- [llvm] [RISCV][llvm-exegesis] Add default Pfm cycle counter. (PR #121866)
via llvm-commits
- [compiler-rt] [Darwin][CompilerRT] Set compiler ID to 'Clang' for Compiler RT Tests for Apple Clang (PR #121858)
via llvm-commits
- [llvm] [Mips] Fix compiler crash when returning fp128 after calling a functi… (PR #117525)
via llvm-commits
- [compiler-rt] [Darwin][CompilerRT] Set compiler ID to 'Clang' for Compiler RT Tests for Apple Clang (PR #121858)
via llvm-commits
- [llvm] 737d6ca - [RISCV] Add Qualcomm uC Xqcicm (Conditional Move) extension (#121752)
via llvm-commits
- [llvm] [CSSPGO]Add a flag to limit unsymbolized context depth (PR #121531)
via llvm-commits
- [llvm] [CSSPGO]Add a flag to limit unsymbolized context depth (PR #121531)
via llvm-commits
- [llvm] [CSSPGO]Add a flag to limit unsymbolized context depth (PR #121531)
via llvm-commits
- [clang] [lldb] [llvm] Extending LLDB to work on AIX (PR #102601)
via llvm-commits
- [llvm] [Mips] Support llvm.readcyclecounter intrinsic (PR #114953)
via llvm-commits
- [llvm] [NFC][SandboxVectorizer] Disable default copy CTOR/assigment for SchedBundle. (PR #121846)
via llvm-commits
- [llvm] [NFC][SandboxVectorizer] Disable default copy CTOR/assigment for SchedBundle. (PR #121846)
via llvm-commits
- [llvm] [NFC][SandboxVectorizer] Disable default copy CTOR/assigment for SchedBundle. (PR #121846)
via llvm-commits
- [llvm] select v_sat_pk from two i16 or v2i16 (PR #121124)
via llvm-commits
- [compiler-rt] [Darwin][CompilerRT] Set compiler ID to 'Clang' for Compiler RT Tests for Apple Clang (PR #121858)
via llvm-commits
- [flang] [llvm] [flang][openmp] Adds Parser and Semantic Support for Interop Construct, and Init and Use Clauses. (PR #120584)
via llvm-commits
- [llvm] 8c0483b - RegisterCoalescer: Fix assert on remat to copy-to-physreg with subregs (#121734)
via llvm-commits
- [llvm] [AMDGPU] Add target hook to isGlobalMemoryObject (PR #112781)
via llvm-commits
- [flang] [llvm] [flang][openmp] Adds Parser and Semantic Support for Interop Construct, and Init and Use Clauses. (PR #120584)
via llvm-commits
- [lld] [lld-macho,BalancedPartition] Simplify relocation hash and avoid xxHash (PR #121729)
via llvm-commits
- [llvm] 653a547 - [Darwin][Driver][clang] apple-none-macho orders the resource directory after internal-externc-isystem when nostdlibinc is used (#120507)
via llvm-commits
- [compiler-rt] [gwp_asan] Soft-transition ZXTEST_USE_STREAMABLE_MACROS removal (PR #121887)
via llvm-commits
- [lld] [lld-macho,BalancedPartition] Simplify relocation hash and avoid xxHash (PR #121729)
via llvm-commits
- [llvm] [NVPTX][SelectionDAG] Add IMAD combine rules + infra to disable default SelectionDAG rules for testing (PR #121724)
via llvm-commits
- [llvm] [NVPTX][SelectionDAG] Add IMAD combine rules + infra to disable default SelectionDAG rules for testing (PR #121724)
via llvm-commits
- [llvm] [NVPTX][SelectionDAG] Add IMAD combine rules + infra to disable default SelectionDAG rules for testing (PR #121724)
via llvm-commits
- [llvm] [NVPTX] Remove `NVPTX::IMAD` opcode, and rely on intruction selection only (PR #121724)
via llvm-commits
- [llvm] [NVPTX] Remove `NVPTX::IMAD` opcode, and rely on intruction selection only (PR #121724)
via llvm-commits
- [llvm] select v_sat_pk from two i16 or v2i16 (PR #121124)
via llvm-commits
- [llvm] [NVPTX] Remove `NVPTX::IMAD` opcode, and rely on intruction selection only (PR #121724)
via llvm-commits
- [llvm] 8d2e611 - [AMDGPU] Calculate getDivNumBits' AtLeast using bitwidth (#121758)
via llvm-commits
- [llvm] [AMDGPU] Calculate getDivNumBits' AtLeast using bitwidth (PR #121758)
via llvm-commits
- [llvm] [NVPTX] Remove `NVPTX::IMAD` opcode, and rely on intruction selection only (PR #121724)
via llvm-commits
- [llvm] [NVPTX] Remove `NVPTX::IMAD` opcode, and rely on intruction selection only (PR #121724)
via llvm-commits
- [llvm] [NVPTX] Remove `NVPTX::IMAD` opcode, and rely on intruction selection only (PR #121724)
via llvm-commits
- [llvm] [InstCombine] Fold `(select (icmp eq (and x, y), 0), (add/xor x, y), F)` (PR #121841)
via llvm-commits
- [llvm] [InstCombine] Check nowrap flags when folding comparison of GEPs with the same base pointer (PR #121892)
via llvm-commits
- [llvm] [llvm-exegesis] Use TestBase for TargetTest (PR #121895)
via llvm-commits
- [llvm] [InstCombine] Handle commuted patterns in `foldSelectWithSRem` (PR #121896)
via llvm-commits
- [llvm] [InstCombine] Handle commuted patterns in `foldSelectWithSRem` (PR #121896)
via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
via llvm-commits
- [llvm] [LV] Don't simplify wide binops to constants if non-uniform (PR #121898)
via llvm-commits
- [llvm] [LV] Don't simplify wide binops to constants if non-uniform (PR #121898)
via llvm-commits
- [llvm] [cmake] Serialize native builds for Make generator (PR #121021)
via llvm-commits
- [llvm] [cmake] Serialize native builds for Make generator (PR #121021)
via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
via llvm-commits
- [llvm] a8072a0 - [InstCombine] Eliminate icmp+zext pairs over phis more aggressively (#121767)
via llvm-commits
- [llvm] 9c1fecf - [LLVM] Update debuginfo maintainers (#120231)
via llvm-commits
- [llvm] [InstCombine] Simplify FMF propagation. NFC. (PR #121899)
via llvm-commits
- [llvm] [AMDGPU] Add commute for some VOP3 inst (PR #121326)
via llvm-commits
- [llvm] [NFC] Make AMDGPUCombinerHelper methods const (PR #121903)
via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
via llvm-commits
- [llvm] [AArch64] Consider MOVaddr* as cheap if fuse-adrp-add (PR #121904)
via llvm-commits
- [llvm] 21b531e - [clang][llvm][aarch64] Add aarch64_sme_in_streaming_mode intrinsic (#120265)
via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
via llvm-commits
- [llvm] [InstCombine] Fold `(A | B) ^ (A & C) --> A ? ~C : B` (PR #121906)
via llvm-commits
- [llvm] 231d113 - [InstCombine] Handle commuted patterns in `foldSelectWithSRem` (#121896)
via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
via llvm-commits
- [llvm] 0fa59c6 - [llvm][Docs] Update supported hardware (#121743)
via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
via llvm-commits
- [llvm] select v_sat_pk from two i16 or v2i16 (PR #121124)
via llvm-commits
- [llvm] [Mips] Support llvm.readcyclecounter intrinsic (PR #114953)
via llvm-commits
- [llvm] select v_sat_pk from two i16 or v2i16 (PR #121124)
via llvm-commits
- [llvm] [MachinePipeliner] Fix loop-carried dependencies analysis (PR #121907)
via llvm-commits
- [llvm] [MachinePipeliner] Fix loop-carried dependencies analysis (PR #121907)
via llvm-commits
- [llvm] [MachinePipeliner] Fix loop-carried dependencies analysis (PR #121907)
via llvm-commits
- [clang] [lldb] [llvm] Extending LLDB to work on AIX (PR #102601)
via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
via llvm-commits
- [llvm] 2db7b31 - [AArch64] Add BF16 fpext and fptrunc costs. (#119524)
via llvm-commits
- [llvm] select v_sat_pk from two i16 or v2i16 (PR #121124)
via llvm-commits
- [llvm] 83c1d00 - [SPIR-V] Overhaul module analysis to improve translation speed and simplify the underlying logics (#120415)
via llvm-commits
- [llvm] [AMDGPU] Rework getDivNumBits API (PR #119768)
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- [llvm] 5514865 - [Coalescer] Move code added in #116191 (#121779)
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- [llvm] a774e7f - [SPIR-V] Fix OpName and LinkageAttributes decoration of global variables (#120492)
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- [llvm] bc51a2e - [Support] Recycler: Implement move constructor (#120555)
via llvm-commits
- [llvm] [RISCV][CostModel] Add cost for fabs/fsqrt of type bf16/f16 (PR #118608)
via llvm-commits
- [llvm] [PatternMatch] Match commuted patterns in `Signum_match` (PR #121911)
via llvm-commits
- [llvm] [PatternMatch] Match commuted patterns in `Signum_match` (PR #121911)
via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
via llvm-commits
- [compiler-rt] [TySan] Added a 'print_stacktrace' flag for more detailed errors (PR #121756)
via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
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- [compiler-rt] [TySan] Added a 'print_stacktrace' flag for more detailed errors (PR #121756)
via llvm-commits
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via llvm-commits
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- [clang] [llvm] [FMV][AArch64] Simplify version selection according to ACLE. (PR #121921)
via llvm-commits
- [compiler-rt] [TySan] Added a 'print_stacktrace' flag for more detailed errors (PR #121756)
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- [compiler-rt] [TySan] Added a 'print_stacktrace' flag for more detailed errors (PR #121756)
via llvm-commits
- [compiler-rt] [TySan] Added a 'print_stacktrace' flag for more detailed errors (PR #121756)
via llvm-commits
- [llvm] [Coalescer] Consider NewMI's subreg index when updating lanemask. (PR #121780)
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- [llvm] [NFC][AMDGPU] Pre-commit tests for IR variant - isFMAFasterThanFMulAdd (PR #121925)
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- [llvm] 882df05 - [InstCombine] Fold `(A | B) ^ (A & C) --> A ? ~C : B` (#121906)
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- [llvm] 525f526 - [RISCV] Support Parsing Nonstandard Relocations (#119909)
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- [llvm] Prevent negative index in VRMap to avoid segfault (PR #121926)
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- [llvm] Prevent negative index in VRMap to avoid segfault (PR #121926)
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- [llvm] [AArch64] Ensure APAS instruction passes register parameter (PR #121928)
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- [llvm] [AArch64] Ensure APAS instruction passes register parameter (PR #121928)
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- [llvm] [Lint] Lint mismatch in ABI attributes (PR #121929)
via llvm-commits
- [compiler-rt] [TySan] Added a 'print_stacktrace' flag for more detailed errors (PR #121756)
via llvm-commits
- [llvm] [Attributor] Pack out arguments into a struct (PR #119267)
via llvm-commits
- [compiler-rt] [TySan] Added a 'print_stacktrace' flag for more detailed errors (PR #121756)
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- [llvm] a629d9e - [NVPTX] Constant-folding for f2i, d2ui, f2ll etc. (#118965)
via llvm-commits
- [compiler-rt] [TySan] Added a 'print_stacktrace' flag for more detailed errors (PR #121756)
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- [clang] [compiler-rt] [llvm] [ASan] Add metadata to renamed instructions so ASan doesn't use the i… (PR #119387)
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- [llvm] 4e066b6 - [PatternMatch] Match commuted patterns in `Signum_match` (#121911)
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- [clang] [compiler-rt] [llvm] [ASan] Add metadata to renamed instructions so ASan doesn't use the i… (PR #119387)
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- [llvm] [BOLT] Fix --pad-funcs{, -before} state misinteraction (PR #121918)
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- [clang] [compiler-rt] [llvm] [ASan] Add metadata to renamed instructions so ASan doesn't use the i… (PR #119387)
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- [llvm] [AArch664] Replace uaddlv with addv for popcount operation (PR #121934)
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- [llvm] [AArch664] Replace uaddlv with addv for popcount operation (PR #121934)
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- [clang] [llvm] [LLVM][AArch64] Add new feature +sme-mop4 and +sme-tmop (PR #121935)
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- [clang] [llvm] [LLVM][AArch64] Add new feature +sme-mop4 and +sme-tmop (PR #121935)
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- [clang] [llvm] [LLVM][AArch64] Add new feature +sme-mop4 and +sme-tmop (PR #121935)
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- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
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- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
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- [llvm] [Bolt][CMake] Don't export bolt libraries in LLVMExports.cmake (PR #121936)
via llvm-commits
- [llvm] ef391db - [LV] Drop incorrect inbounds for reverse vector pointer when folding tail (#120730)
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via llvm-commits
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- [clang] [llvm] [Clang][LLVM][AArch64]Add new feature SSVE-BitPerm (PR #121947)
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- [compiler-rt] [compiler-rt][rtsan] Reland posix part of #121616 setbuf, setvbuf. (PR #121658)
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- [llvm] 8178d3c - [DirectX] Add getpointer docs to DXILResources.rst (#120779)
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- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
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- [llvm] 17c8c1c - [AMDGPU] Do not fold into v_accvpr_mov/write/read (#120475)
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- [llvm] [AMDGPU] Do not fold into v_accvpr_mov/write/read (PR #120475)
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- [llvm] d0812db - [AMDGPU][True16][MC] true16 for v_minmax/maxmin_f16 and v_minmax/maxmin_num_f16 (#120617)
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- [llvm] Fix parentheses for clarity in X86ISelLowering.cpp (PR #121954)
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- [llvm] Fix parentheses for clarity in X86ISelLowering.cpp (PR #121954)
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- [llvm] Fix parentheses for clarity in X86ISelLowering.cpp (PR #121954)
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- [llvm] 4e36d5b - [NFC][Coroutines] Remove invalid coroutine intrinsic name (#114543)
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- [llvm] [NFC][Coroutines] Remove invalid coroutine intrinsic name (PR #114543)
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- [llvm] 785b16a - [RISCV][GISel] Support G_MERGE_VALUES/G_UNMERGE_VALUES with Zfa. (#120379)
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- [llvm] Fix parentheses for clarity in X86ISelLowering.cpp (PR #121954)
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- [llvm] Fix various cl::desc typos and whitespace issues. (PR #121955)
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- [llvm] Fix various cl::desc typos and whitespace issues. (PR #121955)
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- [llvm] Fix various cl::desc typos and whitespace issues. (PR #121955)
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- [llvm] Fix various cl::desc typos and whitespace issues. (PR #121955)
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- [compiler-rt] b7a6e9d - [ubsan] Use internal_memcpy to copy ubsan bits size (#121586)
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- [compiler-rt] [ubsan] Use internal_memcpy to copy ubsan bits size (PR #121586)
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- [clang] [compiler-rt] [llvm] [ASan] Add metadata to renamed instructions so ASan doesn't use the i… (PR #119387)
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- [llvm] [ValueTracking] Handle flipped strictness cases in `matchSelectPattern` (PR #121958)
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- [llvm] [ValueTracking] Handle flipped strictness cases in `matchSelectPattern` (PR #121958)
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- [compiler-rt] 9374453 - [compiler-rt][rtsan] Reland posix part of #121616 setbuf, setvbuf. (#121658)
via llvm-commits
- [clang] [llvm] [HLSL] Explicitly set the SPIR-V version with spv-target-env (PR #121961)
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- [clang] [llvm] [HLSL] Explicitly set the SPIR-V version with spv-target-env (PR #121961)
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- [llvm] 51c9c82 - [RISCV] Added test case for PR119527. NFC (#121816)
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- [clang] [llvm] [HLSL] Add SPIR-V version of getPointer. (PR #121963)
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- [clang] [compiler-rt] [llvm] [ASan] Add metadata to renamed instructions so ASan doesn't use the i… (PR #119387)
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- [llvm] [UpdateTestChecks][NFC] - Fix typos (PR #121964)
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- [clang] [compiler-rt] [llvm] [ASan] Add metadata to renamed instructions so ASan doesn't use the i… (PR #119387)
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- [clang] [compiler-rt] [llvm] [ASan] Add metadata to renamed instructions so ASan doesn't use the i… (PR #119387)
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- [clang] [compiler-rt] [llvm] [ASan] Add metadata to renamed instructions so ASan doesn't use the i… (PR #119387)
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- [llvm] [NVPTX] Constant fold NVVM fmin and fmax (PR #121966)
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- [llvm] [NVPTX] Constant fold NVVM fmin and fmax (PR #121966)
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- [llvm] [NVPTX] Constant fold NVVM fmin and fmax (PR #121966)
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- [llvm] [NVPTX] Constant fold NVVM fmin and fmax (PR #121966)
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- [compiler-rt] [Darwin][CompilerRT] Set compiler ID to 'Clang' for Compiler RT Tests for Apple Clang (PR #121858)
via llvm-commits
- [llvm] 6192faf - [InstSimplify] Use multi-op replacement when simplify `select` (#121708)
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- [llvm] [InstSimplify] Use multi-op replacement when simplify `select` (PR #121708)
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- [llvm] [AMDGPU][True16][CodeGen] Update and/or/xor codegen pattern for i16 (PR #121835)
via llvm-commits
- [llvm] [InstCombine] move foldAndOrOfICmpsOfAndWithPow2 in to foldLogOpOfMaskedICmps (PR #121970)
via llvm-commits
- [llvm] afa8aee - [RISCV][llvm-exegesis] Add default Pfm cycle counter. (#121866)
via llvm-commits
- [llvm] 5c7a696 - [ARM] Migrate from SearchableTable to GenericTable. NFC (#121840)
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- [compiler-rt] 478648e - [gwp_asan] Soft-transition ZXTEST_USE_STREAMABLE_MACROS removal (#121887)
via llvm-commits
- [libcxx] [llvm] [ci] Bump the version of clang-format used in the CI (PR #119915)
via llvm-commits
- [llvm] 49357b2 - [AMDGPU][True16][CodeGen] true16 codegen pattern for v_med3_u/i16 (#121850)
via llvm-commits
- [llvm] 6c3c90b - [CSSPGO]Add a flag to limit unsymbolized context depth (#121531)
via llvm-commits
- [llvm] [AMDGPU] Rework getDivNumBits API (PR #119768)
via llvm-commits
- [llvm] AMDGPU: Use getSignedTargetConstant for ImmOffset in SelectScratchSVAddr (PR #121978)
via llvm-commits
- [llvm] AMDGPU: Use getSignedTargetConstant for ImmOffset in SelectScratchSVAddr (PR #121978)
via llvm-commits
- [llvm] [InstCombine] move foldAndOrOfICmpsOfAndWithPow2 in to foldLogOpOfMaskedICmps (PR #121970)
via llvm-commits
- [lld] [lld-macho] Include branch extension thunks in linker map (PR #120496)
via llvm-commits
- [flang] [llvm] [Flang][OpenMP]Add parsing support for DISPATCH construct (PR #121982)
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- [flang] [llvm] [Flang][OpenMP]Add parsing support for DISPATCH construct (PR #121982)
via llvm-commits
- [flang] [llvm] [Flang][OpenMP]Add parsing support for DISPATCH construct (PR #121982)
via llvm-commits
- [llvm] [MemProf] Allow cloning of callsites in recursive cycles (PR #121985)
via llvm-commits
- [llvm] 6869425 - AMDGPU: Use getSignedTargetConstant for ImmOffset in SelectScratchSVAddr (#121978)
via llvm-commits
- [llvm] [NVPTX] Do not run the NVVMReflect pass as part of the normal pipeline (PR #121834)
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- [llvm] UEFI backend for x86_64 (PR #109320)
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- [llvm] UEFI backend for x86_64 (PR #109320)
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- [llvm] [Exegesis] Add `--dry-run-measurement` (PR #121991)
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- [llvm] [Exegesis] Add `--dry-run-measurement` (PR #121991)
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- [llvm] 29b5c18 - [NVPTX] Do not run the NVVMReflect pass as part of the normal pipeline (#121834)
via llvm-commits
- [llvm] [Exegesis] Add supports to serialize/deserialize object files into benchmarks (PR #121993)
via llvm-commits
- [llvm] [Exegesis] Add supports to serialize/deserialize object files into benchmarks (PR #121993)
via llvm-commits
- [llvm] 2ab447a - Fix dangling IPOAmendableCB function_ref. (#120698)
via llvm-commits
- [llvm] [LV] Only check isVectorizableEarlyExitLoop with multiple exits. (PR #121994)
via llvm-commits
- [llvm] [LV] Only check isVectorizableEarlyExitLoop with multiple exits. (PR #121994)
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- [compiler-rt] 75325c6 - [Darwin][CompilerRT] Set compiler ID to 'Clang' for Compiler RT Tests for Apple Clang (#121858)
via llvm-commits
- [compiler-rt] [Darwin][CompilerRT] Set compiler ID to 'Clang' for Compiler RT Tests for Apple Clang (PR #121858)
via llvm-commits
- [llvm] UEFI backend for x86_64 (PR #109320)
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- [clang] [flang] [lld] [Flang] Remove FortranDecimal library (PR #121997)
via llvm-commits
- [llvm] UEFI backend for x86_64 (PR #109320)
via llvm-commits
- [llvm] [AArch64] Use GenericTable PrimaryKey to remove one of the SearchIndexes for SysRegs. NFC (PR #122001)
via llvm-commits
- [lld] [lld-macho] Fix branch extension thunk estimation logic (PR #120529)
via llvm-commits
- [llvm] [RISCV][VLOpt] Kill all uses of and remove twoTimesVLMUL [NFC] (PR #122003)
via llvm-commits
- [llvm] Boundary condition check hidden under assert (PR #122005)
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- [llvm] [RISCV] Update the latencies of MUL and CPOP in SiFive P400 scheduling model (PR #122007)
via llvm-commits
- [llvm] 36e4176 - [RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (#121705)
via llvm-commits
- [llvm] 142787d - [RISCV][VLOPT] Add support for checkUsers when UserMI is a Single-Width Integer Reduction (#120345)
via llvm-commits
- [llvm] 90d79ca - [RISCV] Update the latencies of MUL and CPOP in SiFive P400 scheduling model (#122007)
via llvm-commits
- [llvm] 4c43648 - [RISCV][VLOpt] Kill all uses of and remove twoTimesVLMUL [NFC] (#122003)
via llvm-commits
- [llvm] [GSYM] Add support for querying merged functions in llvm-gsymutil (PR #120991)
via llvm-commits
- [lld] [lld-macho] Fix branch extension thunk estimation logic (PR #120529)
via llvm-commits
- [llvm] Boundary condition check hidden under assert (PR #122009)
via llvm-commits
- [compiler-rt] [compiler-rt][rtsan] adding setlinebuf/setbuffer interception. (PR #122018)
via llvm-commits
- [compiler-rt] [compiler-rt][rtsan] adding setlinebuf/setbuffer interception. (PR #122018)
via llvm-commits
- [llvm] [CodeGen][DebugValues] Fix unhandled error condition in VarLoc (PR #122019)
via llvm-commits
- [llvm] select v_sat_pk from two i16 or v2i16 (PR #121124)
via llvm-commits
- [llvm] [RISCV][VLOpt] Consolidate EMUL=SEW/EEW*LMUL logic [NFC] (PR #122021)
via llvm-commits
- [llvm] [GSYM] Add support for querying merged functions in llvm-gsymutil (PR #120991)
via llvm-commits
- [clang] [llvm] [Fuchsia][CMake] Add a modular Fuchsia toolchain configuration (PR #122023)
via llvm-commits
- [lld] [lld-macho] Fix branch extension thunk estimation logic (PR #120529)
via llvm-commits
- [clang] [llvm] [Fuchsia][CMake] Add a modular Fuchsia toolchain configuration (PR #122023)
via llvm-commits
- [llvm] [HLSL] [DirectX] translate llvm fast math flags to llvm 3.7 fast math flags (PR #122025)
via llvm-commits
- [llvm] [RISCV][VLOPT] Add masked load to isSupported and getOperandInfo (PR #122030)
via llvm-commits
- [llvm] [NFC][SandboxVectorizer] Disable default copy CTOR/assigment for SchedBundle. (PR #121846)
via llvm-commits
- [llvm] 45d4698 - [NVPTX] designate fabs and fneg as free (#121513)
via llvm-commits
- [llvm] b8ad6fb - [MemProf] Allow cloning of callsites in recursive cycles (#121985)
via llvm-commits
- [llvm] c438758 - [NFC][SandboxVectorizer] Disable default copy CTOR/assigment for SchedBundle. (#121846)
via llvm-commits
- [llvm] [NFC][SandboxVectorizer] Disable default copy CTOR/assigment for SchedBundle. (PR #121846)
via llvm-commits
- [llvm] [RISCV][VLOPT] Add vector fp-conversion instruction to isSupportedInstr (PR #122033)
via llvm-commits
- [clang] [llvm] [Modules] Fix modular build. (PR #122034)
via llvm-commits
- [llvm] 9184c42 - [LoadStoreVectorizer] Postprocess and merge equivalence classes (#121861)
via llvm-commits
- [clang] [llvm] [Darwin][Driver][clang] apple-none-macho orders the resource directory after internal-externc-isystem when nostdlibinc is used (PR #122035)
via llvm-commits
- [lldb] [llvm] Debuginfod cache use index cache settings and include real file name. (PR #120814)
via llvm-commits
- [llvm] [Github] Add sudo to CI container (PR #122036)
via llvm-commits
- [lld] [lld-macho] Fix branch extension thunk estimation logic (PR #120529)
via llvm-commits
- [llvm] [AArch64] Fix a corner case with large stack allocation (PR #122038)
via llvm-commits
- [llvm] db408ac - [Modules] Fix modular build. (#122034)
via llvm-commits
- [llvm] [Offload][PGO] Fix dump of array in ProfData (PR #122039)
via llvm-commits
- [llvm] 4583f6d - [NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
via llvm-commits
- [llvm] [NVPTX] Support address offsets added with disjoint or (PR #122042)
via llvm-commits
- [llvm] select v_sat_pk from two i16 or v2i16 (PR #121124)
via llvm-commits
- [llvm] [EarlyCSE] Fix improper icmp simplification (PR #122043)
via llvm-commits
- [llvm] [EarlyCSE] Fix improper icmp simplification (PR #122043)
via llvm-commits
- [llvm] [EarlyCSE] Fix improper icmp simplification (PR #122043)
via llvm-commits
- [llvm] dde5546 - [RISCV] GISel custom lowering for G_ADD/G_SUB (#121587)
via llvm-commits
- [llvm] [Mips] Support llvm.readcyclecounter intrinsic (PR #114953)
via llvm-commits
- [llvm] b253a80 - [RISCV][VLOPT] Add mask load to isSupported and getOperandInfo (#122030)
via llvm-commits
- [lld] 162814a - [lld-macho] Include branch extension thunks in linker map (#120496)
via llvm-commits
- [lld] [lld-macho] Include branch extension thunks in linker map (PR #120496)
via llvm-commits
- [llvm] d6bfe10 - [Darwin][Driver][clang] apple-none-macho orders the resource directory after internal-externc-isystem when nostdlibinc is used (#122035)
via llvm-commits
- [llvm] AMDGPU: Add baseline test for add64 with constant test (PR #122048)
via llvm-commits
- [llvm] [Coverage] Speed up function record iteration (PR #122050)
via llvm-commits
- [llvm] [X86] Correct the cdisp8 encoding for VSCATTER/VGATHER prefetch (PR #122051)
via llvm-commits
- [llvm] [Coverage] Speed up function record iteration (PR #122050)
via llvm-commits
- [llvm] [X86] Correct the cdisp8 encoding for VSCATTER/VGATHER prefetch (PR #122051)
via llvm-commits
- [llvm] Fix/dxil test issue (PR #122052)
via llvm-commits
- [llvm] [DirectX] FIX 'tools/dxil-dis/debug-info.ll' test (PR #122052)
via llvm-commits
- [llvm] [DirectX] FIX 'tools/dxil-dis/debug-info.ll' test (PR #122052)
via llvm-commits
- [llvm] [LoongArch] Add debug location for register reload (PR #122057)
via llvm-commits
- [llvm] [LoongArch] Add debug location for register reload (PR #122057)
via llvm-commits
- [llvm] [LoongArch] Add debug location for register reload (PR #122057)
via llvm-commits
- [llvm] [IRBuilder] Add a helper function to intersect FMFs from two instructions (PR #122059)
via llvm-commits
- [llvm] f0d5104 - [VPlan] Handle some VPInstructions in may{Read,Write}FromMemory (#120058)
via llvm-commits
- [llvm] [Github] Add sccache to CI container (PR #122063)
via llvm-commits
- [llvm] [ValueTracking] Move `getFlippedStrictnessPredicateAndConstant` into ValueTracking. NFC. (PR #122064)
via llvm-commits
- [llvm] [EarlyCSE] Fix improper icmp simplification (PR #122043)
via llvm-commits
- [clang] [lldb] [llvm] Extending LLDB to work on AIX (PR #102601)
via llvm-commits
- [llvm] [LoongArch] Add debug location for register reload (PR #122057)
via llvm-commits
- [llvm] [LoongArch] Add relax relocations for tls_le code sequence (PR #121329)
via llvm-commits
- [llvm] [LoongArch] Add relax relocations for tls_le code sequence (PR #121329)
via llvm-commits
- [llvm] [EarlyCSE] Fix improper icmp simplification (PR #122043)
via llvm-commits
- [llvm] 457f302 - [AMDGPU] Disallow null for more resource operands (#121941)
via llvm-commits
- [llvm] [EarlyCSE] Fix improper icmp simplification (PR #122043)
via llvm-commits
- [llvm] a8dab1a - [AArch64] Add a subvector extract cost. (#121472)
via llvm-commits
- [llvm] [cmake] Serialize native builds for Make generator (PR #121021)
via llvm-commits
- [llvm] [EarlyCSE] Fix improper icmp simplification (PR #122043)
via llvm-commits
- [polly] 49668d5 - [Polly] Switch DT/LI in RegionGenerator for parallel subfn (#120413)
via llvm-commits
- [llvm] [EarlyCSE] Fix improper icmp simplification (PR #122043)
via llvm-commits
- [llvm] e7244d8 - [BOLT][CMake] Don't export bolt libraries in LLVMExports.cmake (#121936)
via llvm-commits
- [llvm] [VectorCombine] Use getInstructionCost to cost Shuffle. (PR #122068)
via llvm-commits
- [llvm] [VectorCombine] Use getInstructionCost to cost Shuffle. (PR #122068)
via llvm-commits
- [llvm] 366e62a - [X86] Combine `uitofp <v x i32> to <v x half>` (#121809)
via llvm-commits
- [llvm] [X86] Combine `uitofp <v x i32> to <v x half>` (PR #121809)
via llvm-commits
- [llvm] e534178 - [LLVM] Update inlining maintainers (#120579)
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via llvm-commits
- [llvm] 70ab81b - [AArch64] Ensure APAS instruction passes register parameter (#121928)
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- [clang] [lldb] [llvm] Extending LLDB to work on AIX (PR #102601)
via llvm-commits
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via llvm-commits
- [llvm] [LoongArch] Add debug location for register reload (PR #122057)
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- [llvm] [SPIR-V] Implementation of DebugLine for DI (PR #113541)
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- [llvm] [RISCV][CostModel] Add cost for fabs/fsqrt of type bf16/f16 (PR #118608)
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- [llvm] [RISCV][CostModel] Add cost for fabs/fsqrt of type bf16/f16 (PR #118608)
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- [llvm] [EarlyCSE] Fix improper icmp simplification (PR #122043)
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- [llvm] [llvm] Fix crash caused by reprocessing complex reductions (PR #122077)
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- [llvm] [cmake] Serialize native builds for Make generator (PR #121021)
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- [llvm] [SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (PR #120198)
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- [llvm] 67efbd0 - [LLVM] Fix various cl::desc typos and whitespace issues (NFC) (#121955)
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- [compiler-rt] [TySan] Added a 'print_stacktrace' flag for more detailed errors (PR #121756)
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- [llvm] [CodeGenPrepare] Replace deleted sext instr with the promoted value. (PR #71058)
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- [compiler-rt] [compiler-rt][rtsan] adding setlinebuf/setbuffer interception. (PR #122018)
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- [llvm] [Local] Make combineAAMetadata() more principled (PR #122091)
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- [llvm] [Local] Make combineAAMetadata() more principled (PR #122091)
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- [llvm] [InstCombine] Remove foldSelectICmpEq() fold (PR #122098)
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- [llvm] 03e7862 - [ValueTracking] Move `getFlippedStrictnessPredicateAndConstant` into ValueTracking. NFC. (#122064)
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- [llvm] [CodeGenPrepare] Regenerate test `X86/codegen-prepare-addrmode-sext.ll` (PR #122101)
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- [clang] [llvm] [Clang] Add __builtin_assume_dereferenceable to encode deref assumption. (PR #121789)
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- [llvm] [CodeGenPrepare] Regenerate test `X86/codegen-prepare-addrmode-sext.ll` (PR #122101)
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- [llvm] [ExecutionEngine] reinstate necessary include for building with `-DLLVM_USE_INTEL_JITEVENTS` (PR #117949)
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- [llvm] 7060d2a - [CodeGenPrepare] Regenerate test `X86/codegen-prepare-addrmode-sext.ll` (#122101)
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- [llvm] [X86] Added support for 16bit LEA instruction (PR #122102)
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- [llvm] [X86] Added support for 16bit LEA instruction (PR #122102)
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- [llvm] [X86] Added support for 16bit LEA instruction (PR #122102)
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- [llvm] [X86] Added support for 16bit LEA instruction (PR #122102)
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- [llvm] [GSYM] Add support for querying merged functions in llvm-gsymutil (PR #120991)
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- [clang] [llvm] Revert #116331 & #121852 (PR #122105)
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- [clang] [llvm] Revert #116331 & #121852 (PR #122105)
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- [llvm] [AMDGPU] Add commute for some VOP3 inst (PR #121326)
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- [llvm] [AMDGPU] Add commute for some VOP3 inst (PR #121326)
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- [llvm] [Local] Make combineAAMetadata() more principled (PR #122091)
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- [llvm] Fix unreachable reg bit width (PR #122107)
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- [llvm] Fix unreachable reg bit width (PR #122107)
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- [llvm] Fix unreachable reg bit width (PR #122107)
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- [llvm] [AMDGPU] Add commute for some VOP3 inst (PR #121326)
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- [llvm] select v_sat_pk from two i16 or v2i16 (PR #121124)
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- [llvm] Fix unreachable reg bit width (PR #122107)
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- [compiler-rt] 7004d68 - [compiler-rt][rtsan] adding setlinebuf/setbuffer interception. (#122018)
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- [llvm] d07762e - [UpdateTestChecks][NFC] - Fix typos (#121964)
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- [llvm] Fix unreachable reg bit width (PR #122107)
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- [llvm] SplitKit: Fix rematerialization undoing subclass based split (PR #122110)
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- [llvm] [ReachingDefAnalysis][NFC] Rename `PhysReg` to `Reg`. (PR #122112)
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- [llvm] LAA: rearrange in preparation to scale strides (NFC) (PR #122113)
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- [llvm] [RISCV][VLOPT] Add vector fp-conversion instruction to isSupportedInstr (PR #122033)
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- [llvm] [VectorCombine] foldPermuteOfBinops - fold "shuffle (binop (shuffle, other)), undef" --> "binop (shuffle), (shuffle)". (PR #122118)
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- [llvm] [VectorCombine] foldPermuteOfBinops - fold "shuffle (binop (shuffle, other)), undef" --> "binop (shuffle), (shuffle)". (PR #122118)
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- [clang] [llvm] [Arm] Generate explicit bitcasts in NeonEmitter (PR #121802)
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- [clang] [llvm] [Arm] Generate explicit bitcasts in NeonEmitter (PR #121802)
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- [clang] [llvm] [Arm] Generate explicit bitcasts in NeonEmitter (PR #121802)
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- [llvm] b66f6b2 - Revert #116331 & #121852 (#122105)
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- [llvm] f37bee1 - [ReachingDefAnalysis][NFC] Rename `PhysReg` to `Reg`. (#122112)
via llvm-commits
- [clang] [llvm] [llvm][NFC] Rework Timer.cpp globals to ensure valid lifetimes (PR #121663)
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- [llvm] [InstCombine] Handle commuted patterns in `foldBinOpShiftWithShift` (PR #122126)
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- [llvm] 6376418 - AMDGPU: Add baseline test for add64 with constant test (#122048)
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- [llvm] [NFC][AArch64] Explicitly define undefined bits for instructions (PR #122129)
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- [llvm] 09583de - AMDGPU: Reduce 64-bit add width if low bits are known 0 (#122049)
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- [compiler-rt] [TySan] Fixed false positive when accessing offset member variables (PR #120406)
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- [llvm] 92e575d - [HLSL] Add SPIR-V version of getPointer. (#121963)
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- [compiler-rt] [TySan] Intercept malloc_size on Apple platforms. (PR #122133)
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- [llvm] [AMDGPU][True16][CodeGen] Update codegen pattern for v_med3_f16 (PR #121992)
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- [llvm] [AMDGPU][True16][CodeGen] true16 codegen pattern for v_mul_f16 (PR #122000)
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- [compiler-rt] [TySan] Intercept malloc_size on Apple platforms. (PR #122133)
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- [compiler-rt] [win/asan] GetInstructionSize: Add test for `8D A4 24 ...`. (PR #119794)
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- [llvm] f993a8b - [Lint] Lint mismatch in ABI attributes (#121929)
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- [llvm] [AArch664] Replace uaddlv with addv for popcount operation (PR #121934)
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- [llvm] [X86] Added support for 16bit LEA instruction (PR #122102)
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- [llvm] Hexagon loop idiom pass segfaults when -debug present (PR #121828)
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- [llvm] Hexagon loop idiom pass segfaults when -debug present (PR #121828)
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- [llvm] e540546 - [OptTable] Fix typo VALUE => VALUES (NFCI) (#121523)
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- [llvm] AMDGPU: Fix handling of negative scratch offset (PR #122135)
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- [llvm] AMDGPU: Fix handling of negative scratch offset (PR #122135)
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- [llvm] [InstCombine] Fold `(select (icmp eq (and x, y), 0), (add/xor x, y), F)` (PR #121841)
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- [llvm] AMDGPU: Expand remaining system atomic operations (PR #122137)
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- [llvm] [InstCombine] Remove foldSelectICmpEq() fold (PR #122098)
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- [llvm] [InstCombine] Modify `foldSelectICmpEq` to only handle more useful and simple cases. (PR #121672)
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- [llvm] 1a830aa - [ObjCopy] Respect requirements of LC_ENCRYPTION_INFO commands (#120995)
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- [llvm] [InstCombine] Return `nsw` when convert `shl` to `mul` if its on the RHS (PR #121671)
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- [llvm] d4182f1 - [InstCombine] move foldAndOrOfICmpsOfAndWithPow2 into foldLogOpOfMaskedICmps (#121970)
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- [clang] [lldb] [llvm] Extending LLDB to work on AIX (PR #102601)
via llvm-commits
- [llvm] [InstCombine] Fold binary op of reductions. (PR #121567)
via llvm-commits
- [llvm] Fix parentheses for clarity in X86ISelLowering.cpp (PR #121954)
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- [llvm] b05be2a - [AArch64] Use GenericTable PrimaryKey to remove one of the SearchIndexes for SysRegs. NFC (#122001)
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- [llvm] 29ed600 - [AArch64] Simplify ExactFPImm GenericTable. NFC (#121827)
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- [llvm] AMDGPU: Fix handling of negative scratch offset (PR #122135)
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- [llvm] AMDGPU: Fix handling of negative scratch offset (PR #122135)
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- [llvm] [DirectX] FIX 'tools/dxil-dis/debug-info.ll' test (PR #122052)
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- [llvm] [InstCombine] Fold binary op of reductions. (PR #121567)
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- [llvm] [MachinePipeliner] Improve loop carried dependence analysis (PR #94185)
via llvm-commits
- [clang] [lldb] [llvm] Extending LLDB to work on AIX (PR #102601)
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- [llvm] [InstCombine] Fold `(select (icmp eq (and x, y), 0), (add/xor x, y), F)` (PR #121841)
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- [llvm] [InstCombine] Fold `(select (icmp eq (and x, y), 0), (add/xor x, y), F)` (PR #121841)
via llvm-commits
- [llvm] [X86] Added support for 16bit LEA instruction (PR #122102)
via llvm-commits
- [llvm] ae6a780 - [HLSL] [DirectX] translate llvm fast math flags to llvm 3.7 fast math flags (#122025)
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- [llvm] [SelectionDAG] Use SDNode::op_iterator instead of SDNodeIterator. NFC (PR #122147)
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- [llvm] [LV]Fix max safe elements calculations (PR #122148)
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- [llvm] e93181b - [RISCV][VLOPT] Add vector fp-conversion instruction to isSupportedInstr (#122033)
via llvm-commits
- [llvm] Fix parentheses for clarity in X86ISelLowering.cpp (PR #121954)
via llvm-commits
- [llvm] [RISCV][VLOPT] Add fp-reductions to getOperandInfo (PR #122151)
via llvm-commits
- [llvm] Fix parentheses for clarity in X86ISelLowering.cpp (PR #121954)
via llvm-commits
- [llvm] 983a957 - [RISCV][VLOpt] Consolidate EMUL=SEW/EEW*LMUL logic [NFC] (#122021)
via llvm-commits
- [llvm] 8e65940 - [FMV][AArch64] Simplify version selection according to ACLE. (#121921)
via llvm-commits
- [llvm] Fix parentheses for clarity in X86ISelLowering.cpp (PR #121954)
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- [flang] [llvm] [mlir] [flang][OpenMP] Extend delayed privatization for `omp.simd` (PR #122156)
via llvm-commits
- [clang] [llvm] [HLSL] Adding Flatten and Branch if attributes with test fixes (PR #122157)
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- [clang] [llvm] [HLSL] Adding Flatten and Branch if attributes with test fixes (PR #122157)
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- [clang] [llvm] [HLSL] Adding Flatten and Branch if attributes with test fixes (PR #122157)
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- [clang] [llvm] [HLSL] Adding Flatten and Branch if attributes with test fixes (PR #122157)
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- [clang] [llvm] [HLSL] Adding Flatten and Branch if attributes with test fixes (PR #122157)
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- [llvm] [WebAssembly] Add -wasm-use-legacy-eh option (PR #122158)
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- [compiler-rt] [compiler-rt][rtsan] fseek api interception. (PR #122163)
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- [llvm] 75781fa - Hexagon loop idiom pass segfaults when -debug present (#121828)
via llvm-commits
- [compiler-rt] [compiler-rt][rtsan] fseek api interception. (PR #122163)
via llvm-commits
- [llvm] Hexagon loop idiom pass segfaults when -debug present (PR #121828)
via llvm-commits
- [clang] [llvm] [RISCV] Add -mcpu=sifive-p550. (PR #122164)
via llvm-commits
- [llvm] [ValueTracking] Add rotate idiom to haveNoCommonBitsSet special cases (PR #122165)
via llvm-commits
- [llvm] 0b4fca5 - [RISCV][VLOpt] Remove State field from OperandInfo [nfc] (#122160)
via llvm-commits
- [llvm] 676c641 - [VectorCombine] Use getInstructionCost to cost Shuffle. (#122068)
via llvm-commits
- [llvm] [RISCV][VLOPT] Add getOperandInfo for integer and floating point widening reductions (PR #122176)
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- [llvm] [AArch64] Fix the size passed to __trampoline_setup (PR #118234)
via llvm-commits
- [llvm] Update cloning of the DirectXShaderCompiler repo to not include DXC tests (PR #122178)
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- [llvm] [InstCombine] Move foldLogOpOfMaskedICmps to make it possible to handle trunc to i1. (PR #122179)
via llvm-commits
- [llvm] 560b72c - [NVPTX] Support address offsets added with disjoint or (#122042)
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- [libcxx] [libcxxabi] [llvm] Adding OpenMP Offloading Backend for C++ Parallel Algorithms (Rebased #66968) (PR #122180)
via llvm-commits
- [llvm] [InstCombine] Fold binary op of reductions. (PR #121567)
via llvm-commits
- [libcxx] [libcxxabi] [llvm] Adding OpenMP Offloading Backend for C++ Parallel Algorithms (Rebased #66968) (PR #122180)
via llvm-commits
- [libcxx] [libcxxabi] [llvm] Adding OpenMP Offloading Backend for C++ Parallel Algorithms (Rebased #66968) (PR #122180)
via llvm-commits
- [llvm] [ValueTracking] Add rotate idiom to haveNoCommonBitsSet special cases (PR #122165)
via llvm-commits
- [llvm] [RISCV] Add call preserved regmask to tail calls. (PR #122181)
via llvm-commits
- [llvm] [CodeGen][DebugValues] Fix unhandled error condition in VarLoc (PR #122019)
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- [llvm] Add pre-merge workflow for HLSL testing (PR #122184)
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- [llvm] [OpenMP] Update atomic helpers to just use headers (PR #122185)
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- [llvm] [OpenMP] Update atomic helpers to just use headers (PR #122185)
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- [llvm] [hwasan] Add test case for null pointer dereference (PR #122186)
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- [llvm] b48b99f - [hwasan] Add test case for null pointer dereference (#122186)
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- [llvm] b0f11df - [RISCV] Add call preserved regmask to tail calls. (#122181)
via llvm-commits
- [llvm] cba9bd5 - [DirectX] Implement the resource.load.rawbuffer intrinsic (#121012)
via llvm-commits
- [llvm] [VPlan] Add transformation to narrow interleave groups. (PR #106441)
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- [llvm] [VPlan] Add transformation to narrow interleave groups. (PR #106441)
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- [llvm] [VPlan] Add transformation to narrow interleave groups. (PR #106441)
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- [llvm] [VPlan] Add transformation to narrow interleave groups. (PR #106441)
via llvm-commits
- [llvm] [VPlan] Add transformation to narrow interleave groups. (PR #106441)
via llvm-commits
- [llvm] [VPlan] Add transformation to narrow interleave groups. (PR #106441)
via llvm-commits
- [llvm] [VPlan] Add transformation to narrow interleave groups. (PR #106441)
via llvm-commits
- [llvm] [VPlan] Add transformation to narrow interleave groups. (PR #106441)
via llvm-commits
- [llvm] [VPlan] Add transformation to narrow interleave groups. (PR #106441)
via llvm-commits
- [llvm] [VPlan] Add transformation to narrow interleave groups. (PR #106441)
via llvm-commits
- [llvm] [VPlan] Add transformation to narrow interleave groups. (PR #106441)
via llvm-commits
- [llvm] [VPlan] Add transformation to narrow interleave groups. (PR #106441)
via llvm-commits
- [llvm] [VPlan] Add transformation to narrow interleave groups. (PR #106441)
via llvm-commits
- [llvm] [VPlan] Add transformation to narrow interleave groups. (PR #106441)
via llvm-commits
- [llvm] [VPlan] Add transformation to narrow interleave groups. (PR #106441)
via llvm-commits
- [llvm] [VPlan] Add transformation to narrow interleave groups. (PR #106441)
via llvm-commits
- [llvm] [VPlan] Add transformation to narrow interleave groups. (PR #106441)
via llvm-commits
- [llvm] [VPlan] Add transformation to narrow interleave groups. (PR #106441)
via llvm-commits
- [llvm] [VPlan] Add transformation to narrow interleave groups. (PR #106441)
via llvm-commits
- [llvm] [VPlan] Add transformation to narrow interleave groups. (PR #106441)
via llvm-commits
- [llvm] [VPlan] Add transformation to narrow interleave groups. (PR #106441)
via llvm-commits
- [llvm] [VPlan] Add transformation to narrow interleave groups. (PR #106441)
via llvm-commits
- [llvm] [AMDGPU] Fix unreachable reg bit width (PR #122107)
via llvm-commits
- [llvm] fce0314 - [LLVM][DWARF] Create debug names entry for non-tu top level DIE (#121856)
via llvm-commits
- [llvm] 5ae44bf - [LoongArch] Add debug location for register reload
via llvm-commits
- [llvm] [LoongArch] Add debug location for register reload (PR #122057)
via llvm-commits
- [llvm] [SandboxVectorizer][NFCI] Fix use of possibly-uninitialized scalar. (PR #122201)
via llvm-commits
- [llvm] [AMDGPU] Rework getDivNumBits API (PR #119768)
via llvm-commits
- [llvm] [AMDGPU] select v_sat_pk from two i16 or v2i16 (PR #121124)
via llvm-commits
- [llvm] [hwasan] Omit tag check for null pointers (PR #122206)
via llvm-commits
- [lld] [llvm] [Support][LLD] .time-trace.json Default File Extension (PR #122207)
via llvm-commits
- [lld] [llvm] [Support][LLD] .time-trace.json Default File Extension (PR #122207)
via llvm-commits
- [lld] [llvm] [Support][LLD] .time-trace.json Default File Extension (PR #122207)
via llvm-commits
- [lld] [lld][LoongArch] Relax PCHi20Lo12: R_LARCH_{PCALA,GOT_PC}_{HI20,LO12} (PR #122209)
via llvm-commits
- [llvm] [AMDGPU] Add commute for some VOP3 inst (PR #121326)
via llvm-commits
- [llvm] [AMDGPU] Add commute for some VOP3 inst (PR #121326)
via llvm-commits
- [llvm] [AMDGPU] Add commute for some VOP3 inst (PR #121326)
via llvm-commits
- [llvm] [AMDGPU] Add commute for some VOP3 inst (PR #121326)
via llvm-commits
- [compiler-rt] 783dc59 - [compiler-rt] Check codesign in path before using (#99837)
via llvm-commits
- [llvm] [InstCombine] Fold binary op of reductions. (PR #121567)
via llvm-commits
- [llvm] [AMDGPU] select v_sat_pk from two i16 or v2i16 (PR #121124)
via llvm-commits
- [llvm] [AIX][AsmPrinter] Fix unsigned subtraction wrap-around (PR #122214)
via llvm-commits
- [llvm] e438513 - [AIX][AsmPrinter] Fix unsigned subtraction wrap-around (#122214)
via llvm-commits
- [llvm] [llvm-gsymutil] Don't warn about non-increasing line tables with merged functions (PR #122217)
via llvm-commits
- [llvm] 5d03235 - [RISCV] Add -mcpu=sifive-p550. (#122164)
via llvm-commits
- [clang] [lldb] [llvm] Extending LLDB to work on AIX (PR #102601)
via llvm-commits
- [llvm] [Github] Fix LLVM Project Tests Workflow on Linux (PR #122221)
via llvm-commits
- [llvm] [RISCV][CostModel] Add cost for @llvm.experimental.vp.splice (PR #122223)
via llvm-commits
- [llvm] [RISCV][CostModel] Add cost for @llvm.experimental.vp.splice (PR #122223)
via llvm-commits
- [llvm] [RISCV][CostModel] Add cost for @llvm.experimental.vp.splice (PR #122223)
via llvm-commits
- [llvm] [RISCV][CostModel] Add cost for @llvm.experimental.vp.splice (PR #122223)
via llvm-commits
- [llvm] [LV][VPlan] Change the inheritance of class VPWidenSelectRecipe to class VPRecipeWithIRFlags, which allows recipe of the select to pass the fastmath flags (PR #121023)
via llvm-commits
- [llvm] 61b294a - Introduce CounterExpressionBuilder::subst(C, Map) (#112698)
via llvm-commits
- [llvm] [Mips] Support llvm.readcyclecounter intrinsic (PR #114953)
via llvm-commits
- [llvm] d30a5fc - [NFC][AArch64] Explicitly define undefined bits for instructions (#122129)
via llvm-commits
- [llvm] [SPIRV] convergence anchor intrinsic does not have a parent token (PR #122230)
via llvm-commits
- [compiler-rt] 4847395 - [Clang] Adjust pointer-overflow sanitizer for N3322 (#120719)
via llvm-commits
- [llvm] [RISCV] Support vp.{gather,scatter} in RISCVGatherScatterLowering (PR #122232)
via llvm-commits
- [llvm] 1b29435 - [llvm] Fix crash caused by reprocessing complex reductions (#122077)
via llvm-commits
- [llvm] 71f7b97 - [Local] Make combineAAMetadata() more principled (#122091)
via llvm-commits
- [llvm] 38565da - [LangRef] Add some documentation for ABI / call-site attributes (#121930)
via llvm-commits
- [llvm] Add matchers m_ExtractSubvector and m_InsertSubvector (PR #120212)
via llvm-commits
- [llvm] f07b10b - [Support] Recycler: Match dealloc size and enforce min size (#121889)
via llvm-commits
- [llvm] [AArch64] Improve urem by constant costs (PR #122236)
via llvm-commits
- [llvm] [AArch64] Improve urem by constant costs (PR #122236)
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- [llvm] f88ef1b - [LV] Teach LoopVectorizationLegality about struct vector calls (#119221)
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- [llvm] [SLPVectorizer] Refine the scope of RdxOpcode in HorizontalReduction::createOp (NFC) (PR #122239)
via llvm-commits
- [llvm] [SLPVectorizer] Refine the scope of RdxOpcode in HorizontalReduction::createOp (NFC) (PR #122239)
via llvm-commits
- [llvm] [Mips] Fix compiler crash when returning fp128 after calling a functi… (PR #117525)
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- [llvm] [Mips] Fix compiler crash when returning fp128 after calling a functi… (PR #117525)
via llvm-commits
- [llvm] [Mips] Fix compiler crash when returning fp128 after calling a functi… (PR #117525)
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- [llvm] [LangRef] Fix code segment and numbering issue in the 'call' instruction section (PR #122294)
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- [llvm] [LangRef] Fix code segment and numbering issue in the 'call' instruction section (PR #122294)
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- [llvm] [InstCombine] Fold `X udiv Y` to `X lshr cttz(Y)` if Y is a power of 2 (PR #121386)
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- [llvm] [InstCombine] Fold `X udiv Y` to `X lshr cttz(Y)` if Y is a power of 2 (PR #121386)
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- [llvm] [InstCombine] Fold `X udiv Y` to `X lshr cttz(Y)` if Y is a power of 2 (PR #121386)
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- [llvm] [InstCombine] Fold `X udiv Y` to `X lshr cttz(Y)` if Y is a power of 2 (PR #121386)
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- [llvm] [InstCombine] Fold `X udiv Y` to `X lshr cttz(Y)` if Y is a power of 2 (PR #121386)
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- [llvm] [InstCombine] Fold `X udiv Y` to `X lshr cttz(Y)` if Y is a power of 2 (PR #121386)
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- [llvm] [AMDGPU] Fix spurious NoAlias results (PR #122309)
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- [llvm] [AMDGPU][True16][MC][NFC] add true16/fake16 test for gfx12 vop3c/3cx (PR #122316)
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- [llvm] [AMDGPU][True16][MC][NFC] add true16/fake16 test for gfx12 vop3c/3cx (PR #122316)
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- [llvm] 89499c6 - [BoundsChecking][test] Reorder RUN lines (#122229)
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- [llvm] a7cbd41 - [BoundsChecking][test] Remove duplicate RUNS
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- [llvm] e2449f1 - [SelectionDAG] Use SDNode::op_iterator instead of SDNodeIterator. NFC (#122147)
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- [llvm] c87ef14 - [InstCombine][NFC] Precommit a test for folding a binary op of reductions. (#121568)
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- [llvm] [llvm-gsymutil] Don't warn about non-increasing line tables with merged functions (PR #122217)
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- [llvm] f8f8598 - [Exegesis] Add the ability to dry-run the measurement phase (#121991)
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- [llvm] Remove unexisting targets from bolt dockerfile (PR #122321)
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- [clang] [llvm] [OpenMP] Replace nvvm.annotation usage with kernel calling conventions (PR #122320)
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- [llvm] [SandboxVec][BottomUpVec] Use SeedCollector and slice seeds (PR #120826)
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- [llvm] [SandboxVec][BottomUpVec] Use SeedCollector and slice seeds (PR #120826)
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- [llvm] [SelectionDAG][AMDGPU] Negative offset when selecting scratch sv offsets (PR #122251)
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- [llvm] [OpenMP] Use __builtin_bit_cast instead of UB type punning (PR #122325)
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- [llvm] [InstCombine] Further relax one-use constraint in `foldICmpBinOp` (PR #122266)
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- [llvm] [InstCombine] Fold `X udiv Y` to `X lshr cttz(Y)` if Y is a power of 2 (PR #121386)
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- [llvm] [RISCV][VLOPT] Add support for more floating point instructions (PR #122326)
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- [llvm] a6b7181 - [HLSL] Move length support out of the DirectX Backend (#121611)
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- [llvm] [InstCombine] InstCombine should fold frexp of select to select of frexp (PR #121227)
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- [llvm] d514571 - [RISCV][VLOPT] Add vfirst and vcpop to getOperandInfo (#122295)
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- [llvm] ca10dea - [z/OS] Add backtrace support for z/OS. (#121826)
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- [llvm] [CodeGen] Add const to getAddrModeArguments argument. NFC. (PR #122335)
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- [llvm] [RISCV][VLOPT] Add vmerge to isSupportedInstr (PR #122340)
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- [llvm] [AMDGPU] Update PromoteAlloca to handle GEPs with variable offset. (PR #122342)
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- [llvm] [AMDGPU] Update PromoteAlloca to handle GEPs with variable offset. (PR #122342)
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- [llvm] [llvm-gsymutil] Don't warn about non-increasing line tables with merged functions (PR #122217)
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- [llvm] [llvm-gsymutil] Address merged-funcs test non-determinism (PR #122308)
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- [llvm] [llvm-gsymutil] Don't warn about non-increasing line tables with merged functions (PR #122217)
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- [llvm] [llvm-gsymutil] Address merged-funcs test non-determinism (PR #122308)
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- [llvm] [CodeGen][Spill2Reg] Initial patch (PR #118832)
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- [llvm] [RISCV][VLOPT] Add vadcto isSupportedInstr (PR #122345)
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- [llvm] [SandboxVectorizer][NFCI] Fix use of possibly-uninitialized scalar. (PR #122201)
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- [llvm] [RISCV][VLOPT] Add floating point widening and narrowing convert support (PR #122353)
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- [llvm] 6312bee - [SandboxVec][BottomUpVec] Use SeedCollector and slice seeds (#120826)
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- [llvm] [MemProf] Disable cloning of callsites in recursive cycles by default (PR #122354)
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- [llvm] [llvm-gsymutil] Don't warn about non-increasing line tables with merged functions (PR #122217)
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- [llvm] [llvm-gsymutil] Address merged-funcs test non-determinism (PR #122308)
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- [llvm] 3055e86 - [MemProf] Disable cloning of callsites in recursive cycles by default (#122354)
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- [llvm] 9d5299e - VT/test: pre-commit tests to enable samesign optz (#120257)
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- [llvm] [AMDGPU][True16][MC][NFC]update vopc dasm test with latest update script (PR #122360)
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- [lld] 8408722 - [LLD][COFF] Emit base relocation for native CHPE metadata pointer on ARM64X (#121500)
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- [llvm] Revert "[Exegesis] Add the ability to dry-run the measurement phase (… (PR #122371)
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- [llvm] 328c3a8 - [RISCV][VLOPT] Add vmerge to isSupportedInstr (#122340)
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- [llvm] 4f42e16 - [hwasan] Omit tag check for null pointers (#122206)
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- [clang] [llvm] [HLSL] Reapply Move length support out of the DirectX Backend (#121611) (PR #122337)
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- [lld] 156e605 - [lld-macho] Fix branch extension thunk estimation logic (#120529)
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- [lld] [lld-macho] Fix branch extension thunk estimation logic (PR #120529)
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- [llvm] [AMDGPU][True16][CodeGen] true16 codegen pattern for v_pack_b32_f16 (PR #121988)
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- [llvm] [NVPTX] Select bfloat16 add/mul/sub as fma on SM80 (PR #121065)
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- [lld] [LLD][COFF] Silence GCC warning in Arm64XDynamicRelocEntry::getSize (NFC) (PR #122382)
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- [lld] [LLD][COFF] Silence GCC warning in Arm64XDynamicRelocEntry::getSize (NFC) (PR #122382)
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- [llvm] [NVPTX] Select bfloat16 add/mul/sub as fma on SM80 (PR #121065)
via llvm-commits
- [llvm] [NVPTX] Select bfloat16 add/mul/sub as fma on SM80 (PR #121065)
via llvm-commits
- [llvm] [NVPTX] Select bfloat16 add/mul/sub as fma on SM80 (PR #121065)
via llvm-commits
- [llvm] [CodeGen][Spill2Reg] Initial patch (PR #118832)
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- [llvm] [CodeGen][Spill2Reg] Initial patch (PR #118832)
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- [llvm] [CodeGen][Spill2Reg] Initial patch (PR #118832)
via llvm-commits
- [llvm] [NVPTX] Select bfloat16 add/mul/sub as fma on SM80 (PR #121065)
via llvm-commits
- [llvm] [NVPTX] Select bfloat16 add/mul/sub as fma on SM80 (PR #121065)
via llvm-commits
- [llvm] [CodeGen][Spill2Reg] Initial patch (PR #118832)
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- [llvm] ba704d5 - [llvm-gsymutil] Address merged-funcs test non-determinism (#122308)
via llvm-commits
- [llvm] [llvm-gsymutil] Address merged-funcs test non-determinism (PR #122308)
via llvm-commits
- [llvm] [SandboxVectorizer][NFCI] Fix use of possibly-uninitialized scalar. (PR #122201)
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- [llvm] [SandboxVectorizer][NFCI] Fix use of possibly-uninitialized scalar. (PR #122201)
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- [llvm] [SandboxVectorizer][NFCI] Fix use of possibly-uninitialized scalar. (PR #122201)
via llvm-commits
- [llvm] [SandboxVectorizer][NFCI] Fix use of possibly-uninitialized scalar. (PR #122201)
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- [llvm] c1c50c7 - [SDPatternMatch] Add matchers m_ExtractSubvector and m_InsertSubvector (#120212)
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- [llvm] [SDPatternMatch] Add matchers m_ExtractSubvector and m_InsertSubvector (PR #120212)
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- [llvm] [NVPTX] Select bfloat16 add/mul/sub as fma on SM80 (PR #121065)
via llvm-commits
- [llvm] a6aa936 - [NFC][AsmPrinter] Pass MJTI by const reference instead of const pointer (#122365)
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- [llvm] [NVPTX] Select bfloat16 add/mul/sub as fma on SM80 (PR #121065)
via llvm-commits
- [llvm] [SandboxVectorizer][NFCI] Fix use of possibly-uninitialized scalar. (PR #122201)
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- [lldb] [llvm] Debuginfod cache use index cache settings and include real file name (PR #120814)
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- [lldb] [llvm] Debuginfod cache use index cache settings and include real file name (PR #120814)
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- [llvm] 04e54cc - [RISCV][VLOPT] Add Vector Single-Width Averaging Add and Subtract to isSupportedInstr (#122351)
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- [llvm] d0373db - [RISCV][VLOPT] Add vadc to isSupportedInstr (#122345)
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- [llvm] 760f550 - [SLP] NFC. Replace MainOp and AltOp in TreeEntry with InstructionsState. (#120198)
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- [llvm] 36b423e - [SLP] NFC. Refactor getSameOpcode and reduce for loop iterations. (#122241)
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- [llvm] [Github] Explicitly requesting Ubuntu 22.04 for SPIRV test (PR #122395)
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- [llvm] [DXIL] Adding support to RootSignatureFlags generation to DXContainer (PR #122396)
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- [llvm] [OpenMP] Add explicit attributes to every function declaration (PR #122399)
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- [llvm] b11fe33 - [RISCV] Correct the cost model for the i1 reduce.add and reduce.or. (#122349)
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- [llvm] 211bcf6 - [AMDGPU] Implement IR variant of isFMAFasterThanFMulAndFAdd (#121465)
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- [llvm] a4472c7 - [AArch64] Fix the size passed to __trampoline_setup (#118234)
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- [llvm] 6829f30 - [RISCV] Add a default common assignment of Inst{6-2} to the RVInst16CI base class. NFC (#122377)
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- [llvm] a531800 - Spiller: Detach legacy pass and supply analyses instead (#119181)
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- [llvm] 01a7d4e - [AMDGPU] Allow selection of BITOP3 for some 2 opcodes and B32 cases (#122267)
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- [llvm] 0895550 - Revert "Spiller: Detach legacy pass and supply analyses instead (#119… (#122426)
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- [llvm] [RISCV][CostModel] Add cost for fabs/fsqrt of type bf16/f16 (PR #118608)
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- [llvm] 98e5962 - [RISCV][CostModel] Add cost for fabs/fsqrt of type bf16/f16 (#118608)
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- [llvm] 4c853be - [AArch64] Replace uaddlv with addv for popcount operation (#121934)
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- [llvm] [AArch64] Replace uaddlv with addv for popcount operation (PR #121934)
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- [clang] [llvm] [Clang][AArch64] Allow FP8 Neon vector types to be used by __builtin_shufflevector (PR #119031)
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- [llvm] 3def49c - [AMDGPU] Remove s_wakeup_barrier instruction (#122277)
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- [clang] [llvm] [AArch64] Add Neon FP8 conversion intrinsics (PR #119033)
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- [clang] [llvm] [AArch64] Add Neon FP8 conversion intrinsics (PR #119033)
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- [llvm] [AMDGPU]precommit-tests-#121124 (PR #122438)
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- [llvm] e9e7b2a - [SDAG] Set IsPostTypeLegalization flag in LegalizeDAG (#122278)
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- [llvm] [CodeGen] Add MachineRegisterClassInfo analysis pass (PR #120690)
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- [clang] [llvm] [AArch64] Add FP8 Neon intrinsics for dot-product (PR #119911)
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- [clang] [llvm] [AArch64] Add FP8 Neon intrinsics for dot-product (PR #119911)
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- [clang] [llvm] [AArch64] Add FP8 Neon intrinsics for dot-product (PR #119911)
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- [llvm] 5a069ea - [AArch64] Don't try to sink and(load) (#122274)
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- [llvm] [AMDGPU]precommit-tests-#121124 (PR #122438)
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- [llvm] [SLP] NFC. Add hasState check. (PR #122443)
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- [llvm] [SLP] NFC. Add hasState check. (PR #122443)
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- [compiler-rt] [TySan] Fixed false positive when accessing offset member variables (PR #120406)
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- [llvm] b53e794 - VT: teach isImpliedCondOperands about samesign (#120263)
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- [llvm] 9b49da2 - Revert 86b1b0671cafd "MachineVerifier: Check stack protector is top-most in frame" (#122444)
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- [llvm] [AMDGPU] precommit tests #121124 (PR #122438)
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- [llvm] [X86] widenSubVector - widen from smaller build vector if the upper elements are already the same padding elements (PR #122445)
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- [llvm] [X86] widenSubVector - widen from smaller build vector if the upper elements are already the same padding elements (PR #122445)
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- [llvm] [MachineLICM] Recognize registers clobbered at EH landing pad entry (PR #122446)
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- [llvm] VT: teach implied-cond-cr about samesign (PR #122447)
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- [llvm] [AMDGPU] Provide default value in get intrinsic param type (PR #122448)
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- [llvm] [AMDGPU] Fix unreachable reg bit width (PR #122107)
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- [llvm] [AMDGPU] Fix unreachable reg bit width (PR #122107)
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- [llvm] [AMDGPU] Fix unreachable reg bit width (PR #122107)
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- [llvm] [AMDGPU] Fix unreachable reg bit width (PR #122107)
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- [clang] [llvm] [AArch64] Implement NEON FP8 fused multiply-add intrinsics (non-indexed) (PR #120273)
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- [clang] [llvm] [AArch64] Implement NEON FP8 fused multiply-add intrinsics (non-indexed) (PR #120273)
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- [llvm] [M68k] implement move to and from sr (PR #111145)
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- [lld] 799e988 - [LLD][COFF] Silence GCC warning in Arm64XDynamicRelocEntry::getSize (NFC) (#122382)
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- [llvm] [LV][EVL] Pre-commit test case for fixed-order recurrence with EVL tail folding. (NFC) (PR #122456)
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- [llvm] DAG: Fix vector bin op scalarize defining a partially undef vector (PR #122459)
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- [llvm] DAG: Fix vector bin op scalarize defining a partially undef vector (PR #122459)
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- [llvm] [M68k] Use M68010 cpu as target for SR move test (PR #122452)
via llvm-commits
- [llvm] [M68k] Use M68010 cpu as target for SR move test (PR #122452)
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- [llvm] cfee344 - VT: teach implied-cond-cr about samesign (#122447)
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- [llvm] c575a7d - [AMDGPU] Provide default value in get intrinsic param type (#122448)
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- [llvm] a2995cb - [LangRef] Fix code segment and numbering issue in the 'call' instruction section (#122294)
via llvm-commits
- [llvm] [Support] Drop mtg:: from #121663 to Timer.cpp (PR #122429)
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- [llvm] [LangRef] Fix code segment and numbering issue in the 'call' instruction section (PR #122294)
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- [llvm] [DAG] Allow AssertZExt to scalarize. (PR #122463)
via llvm-commits
- [llvm] [DAG] Allow AssertZExt to scalarize. (PR #122463)
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- [clang] [llvm] [llvm][NFC] Rework Timer.cpp globals to ensure valid lifetimes (PR #121663)
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- [llvm] 9c85cde - [AMDGPU][True16][MC][NFC]update vopc dasm test with latest update script (#122360)
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- [llvm] [AMDGPU] precommit tests #121124 (PR #122438)
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- [llvm] [AMDGPU] precommit tests #121124 (PR #122438)
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- [llvm] [TTI][AArch64] Detect OperandInfo from scalable splats. (PR #122469)
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- [llvm] 24bb180 - [RISCV] Attempt to widen SEW before generic shuffle lowering (#122311)
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- [llvm] 35a3925 - [X86] widenSubVector - widen from smaller build vector if the upper elements are already the same padding elements (#122445)
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- [llvm] [MachineCP] Correctly handle register masks and sub-registers (PR #122472)
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- [llvm] [MachineCP] Correctly handle register masks and sub-registers (PR #122472)
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- [compiler-rt] [TySan] Fix struct access with different bases (PR #120412)
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- [llvm] [MachineCP] Correctly handle register masks and sub-registers (PR #122472)
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- [llvm] VT: teach isImpliedCondMatchingOperands about samesign (PR #122474)
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- [clang] [llvm] [LLVM][Clang][AArch64] Implement AArch64 build attributes (PR #118771)
via llvm-commits
- [llvm] bbb53d1 - [NFC] Make AMDGPUCombinerHelper methods const (#121903)
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- [llvm] [OMPIRBuilder] Simplify error handling while emitting target calls, NFC (PR #122477)
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- [llvm] 9d7df23 - [Hexagon] Add missing pattern for v8i1 type (#120703)
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- [llvm] Reapply "[GVN] MemorySSA for GVN: add optional AllowMemorySSA" (PR #122482)
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- [compiler-rt] [TySan] Fix struct access with different bases (PR #120412)
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- [compiler-rt] [TySan] Fix struct access with different bases (PR #120412)
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- [llvm] [X86] Fold VPERMV3(X, M, Y) -> VPERMV(CONCAT(X, Y), WIDEN(M)) iff the CONCAT is free (PR #122485)
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- [compiler-rt] [TySan] Fix struct access with different bases (PR #120412)
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- [llvm] machinebackend pass test (PR #122487)
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- [llvm] machinebackend pass test (PR #122487)
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- [llvm] [TySan] Skip instrumentation for function declarations (PR #122488)
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- [llvm] [InstCombine] Further relax one-use constraint in `foldICmpBinOp` (PR #122266)
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- [llvm] [InstCombine] Fold `X udiv Y` to `X lshr cttz(Y)` if Y is a power of 2 (PR #121386)
via llvm-commits
- [llvm] [CodeGen][Spill2Reg] Initial patch (PR #118832)
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- [llvm] [InstCombine] Fold (add (add A, 1), (sext (icmp ne A, 0))) to call umax(A, 1) (PR #122491)
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- [llvm] [InstCombine] Fold (add (add A, 1), (sext (icmp ne A, 0))) to call umax(A, 1) (PR #122491)
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- [llvm] [InstCombine] Fold (add (add A, 1), (sext (icmp ne A, 0))) to call umax(A, 1) (PR #122491)
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- [llvm] [AMDGPU] Fix an invalid cast in `AMDGPULateCodeGenPrepare::visitLoadInst` (PR #122494)
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- [llvm] 372044e - [NVPTX] Add TMA Bulk Copy intrinsics (#122344)
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- [llvm] [InstCombine] Fold `X udiv Y` to `X lshr cttz(Y)` if Y is a power of 2 (PR #121386)
via llvm-commits
- [llvm] [InstCombine] Fold `X udiv Y` to `X lshr cttz(Y)` if Y is a power of 2 (PR #121386)
via llvm-commits
- [llvm] [InstCombine] Fold `X udiv Y` to `X lshr cttz(Y)` if Y is a power of 2 (PR #121386)
via llvm-commits
- [llvm] 59ced72 - [ValueTracking] Add rotate idiom to haveNoCommonBitsSet special cases (#122165)
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- [llvm] 986f2ac - [SLPVectorizer] minor tweaks around lambdas for compatibility with older compilers (#122348)
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- [lld] cc88a5e - [lld-macho,NFC] Switch to increasing priorities
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- [llvm] goldsteinn/takelog2 nfc (PR #122498)
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- [llvm] goldsteinn/takelog2 nfc (PR #122498)
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- [llvm] [InstCombine] Make `takeLog2` usable throughout InstCombine; NFC (PR #122498)
via llvm-commits
- [llvm] [InstCombine] Make `takeLog2` usable throughout InstCombine; NFC (PR #122498)
via llvm-commits
- [clang] [llvm] [LLVM][Clang][AArch64] Implement AArch64 build attributes (PR #118771)
via llvm-commits
- [llvm] 6f53886 - [RISCV] Add stack clash vector support (#119458)
via llvm-commits
- [llvm] [InstCombine] Make `takeLog2` usable throughout InstCombine; NFC (PR #122498)
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- [llvm] [GlobalISel][AMDGPU] Implement FPInfo for LLT (PR #122503)
via llvm-commits
- [llvm] [InstCombine] Make `takeLog2` usable throughout InstCombine; NFC (PR #122498)
via llvm-commits
- [llvm] [RISCV] Stack clash protection for dynamic alloca (PR #122508)
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- [llvm] [RISCV] Stack clash protection for dynamic alloca (PR #122508)
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- [llvm] [InstCombine] InstCombine should fold frexp of select to select of frexp (PR #121227)
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- [llvm] b900379 - [HLSL] Reapply Move length support out of the DirectX Backend (#121611) (#122337)
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- [llvm] [TOOLS][DWARFDUMP][DWARF] Print full DIE offset for a CU or local TU (PR #121877)
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- [llvm] goldsteinn/cttz ctlz with p2 (PR #122512)
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- [llvm] goldsteinn/cttz ctlz with p2 (PR #122512)
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- [llvm] goldsteinn/cttz ctlz with p2 (PR #122512)
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- [llvm] goldsteinn/cttz ctlz with p2 (PR #122512)
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- [llvm] 2e5c298 - [AMDGPU] Add backward compatibility layer for kernarg preloading (#119167)
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- [llvm] [MachinePipeliner] Improve loop carried dependence analysis (PR #94185)
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- [llvm] [InstCombine] fold unsigned predicates on srem result (PR #122520)
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- [llvm] [InstCombine] fold unsigned predicates on srem result (PR #122520)
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- [llvm] [hlsl] Pin hlsl-test-all resusable workflow to main branch (PR #122518)
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- [llvm] [AMDGPU][True16][MC] true16 for v_cmp_lt_f16 (PR #122499)
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- [lld] 3b0daff - [LLD][COFF] Use EC load config for ARM64X relocations of load config directory (#121337)
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- [llvm] [X86] Use loaded/stored element size when parsing/printing gather/scatter pointer size in Intel syntax. (PR #122530)
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- [llvm] [X86] Use loaded/stored element size when parsing/printing gather/scatter pointer size in Intel syntax. (PR #122530)
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- [llvm] [X86] Use loaded/stored element size when parsing/printing gather/scatter pointer size in Intel syntax. (PR #122530)
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- [llvm] 9248428 - [SandboxVec][DAG][NFC] Refactor setNextNode() and setPrevNode() (#122363)
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- [llvm] [SandboxVec][DAG][NFC] Refactor setNextNode() and setPrevNode() (PR #122363)
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- [llvm] [SandboxVec][BottomUpVec] Clean up dead address instrs (PR #122536)
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- [llvm] [SandboxVec][BottomUpVec] Clean up dead address instrs (PR #122536)
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- [llvm] [RISCV] Update matchSplatAsGather to use the index of extract_elt if in-bounds (PR #118873)
via llvm-commits
- [llvm] [NFC][NVPTX] Small style cleanup for NVPTXISelDAGToDAG.* (PR #122538)
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- [llvm] [InstCombine] Make `takeLog2` usable throughout InstCombine; NFC (PR #122498)
via llvm-commits
- [llvm] [InstCombine] Canonicalize `(sub nuw Mask, X)` -> `(xor Mask, X)` (PR #122542)
via llvm-commits
- [llvm] [InstCombine] Canonicalize `(sub nuw Mask, X)` -> `(xor Mask, X)` (PR #122542)
via llvm-commits
- [llvm] [InstCombine] Canonicalize `(sub nuw Mask, X)` -> `(xor Mask, X)` (PR #122542)
via llvm-commits
- [llvm] [mlir] [TOSA] Add Tosa_Shape type and ConstShapeOp (PR #122547)
via llvm-commits
- [llvm] [mlir] [TOSA] Add Tosa_Shape type and ConstShapeOp (PR #122547)
via llvm-commits
- [llvm] [mlir] [TOSA] Add Tosa_Shape type and ConstShapeOp (PR #122547)
via llvm-commits
- [llvm] [DXIL] Adding support to RootSignatureFlags generation to DXContainer (PR #122396)
via llvm-commits
- [llvm] [DXIL] Adding support to RootSignatureFlags generation to DXContainer (PR #122396)
via llvm-commits
- [llvm] [mlir] [TOSA] Add Tosa_Shape type and ConstShapeOp (PR #122547)
via llvm-commits
- [llvm] [DXIL] Adding support to RootSignatureFlags generation to DXContainer (PR #122396)
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- [llvm] [DXIL] Adding support to RootSignatureFlags generation to DXContainer (PR #122396)
via llvm-commits
- [llvm] [DXIL] Adding support to RootSignatureFlags generation to DXContainer (PR #122396)
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- [lld] [lld][ELF] Handle archive special casing in Input Sections (PR #119293)
via llvm-commits
- [llvm] [DXIL] Adding support to RootSignatureFlags generation to DXContainer (PR #122396)
via llvm-commits
- [llvm] [mlir] [TOSA] Add Tosa_Shape type and ConstShapeOp (PR #122547)
via llvm-commits
- [llvm] [aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (PR #121516)
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- [llvm] [ValueTracking] Take into account wether zero is poison when computing CR for `ct{t,l}z` (PR #122548)
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- [llvm] [ValueTracking] Take into account wether zero is poison when computing CR for `ct{t,l}z` (PR #122548)
via llvm-commits
- [llvm] [InstCombine] Canonicalize `(sub nuw Mask, X)` -> `(xor Mask, X)` (PR #122542)
via llvm-commits
- [llvm] 37f42cf - [nfc] Update header in llvm-ctxprof-utils (#122544)
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- [llvm] goldsteinn/subnuw xor simp (PR #122552)
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- [llvm] goldsteinn/subnuw xor simp (PR #122552)
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- [llvm] [InstSimpify] Simplifying `(xor (sub C_Mask, X), C_Mask)` -> `X` (PR #122552)
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- [llvm] [InstSimpify] Simplifying `(xor (sub C_Mask, X), C_Mask)` -> `X` (PR #122552)
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- [llvm] [InstSimpify] Simplifying `(xor (sub C_Mask, X), C_Mask)` -> `X` (PR #122552)
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- [llvm] [DAGCombiner] Enable constant folding of (bitcast int_c0) -> fp_c0 (PR #82289)
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- [lld] [LLD][COFF] Use appropriate symbol table for -include argument on ARM64X (PR #122554)
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- [llvm] [InstCombine] Canonicalize `(sub nuw Mask, X)` -> `(xor Mask, X)` (PR #122542)
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- [llvm] a475ae0 - Revert "[ADT] Fix specialization of ValueIsPresent for PointerUnion" (#122557)
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- [llvm] 515946b - [NFC][NVPTX] Small style cleanup for NVPTXISelDAGToDAG.* (#122538)
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- [lld] 1807860 - [lld][ELF] Handle archive special casing in Input Sections (#119293)
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- [clang] [lldb] [llvm] Extending LLDB to work on AIX (PR #102601)
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- [llvm] [InstCombine] Fold `X udiv Y` to `X lshr cttz(Y)` if Y is a power of 2 (PR #121386)
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- [llvm] [InstCombine] Fold `X udiv Y` to `X lshr cttz(Y)` if Y is a power of 2 (PR #121386)
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- [llvm] [InstCombine] Fold (add (add A, 1), (sext (icmp ne A, 0))) to call umax(A, 1) (PR #122491)
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- [llvm] [InstCombine] Canonicalize `(sub nuw Mask, X)` -> `(xor Mask, X)` (PR #122542)
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- [llvm] [ValueTracking] Take into account whether zero is poison when computing CR for `ct{t,l}z` (PR #122548)
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- [llvm] [BoundsChecking] Add guard= pass parameter (PR #122575)
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- [llvm] 2d5f07c - [InstCombine] Fold `X udiv Y` to `X lshr cttz(Y)` if Y is a power of 2 (#121386)
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- [llvm] [InstCombine] Fold (add (add A, 1), (sext (icmp ne A, 0))) to call umax(A, 1) (PR #122491)
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- [llvm] [LibCallShrinkWrap] Added ilogb in performCallErrors() (PR #122582)
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- [llvm] [LibCallShrinkWrap] Added ilogb in performCallErrors() (PR #122582)
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- [lld] [lld-macho] Include branch extension thunks in linker map (PR #120496)
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- [llvm] [LibCallShrinkWrap] Added ilogb in performCallErrors() (PR #122582)
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- [llvm] [LibCallShrinkWrap] Added ilogb in performCallErrors() (PR #122582)
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- [llvm] 212cba0 - [X86] Correct the cdisp8 encoding for VSCATTER/VGATHER prefetch (#122051)
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- [llvm] [X86] Correct the cdisp8 encoding for VSCATTER/VGATHER prefetch (PR #122051)
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- [llvm] f38c40b - VT: teach isImpliedCondMatchingOperands about samesign (#122474)
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- [llvm] [TableGen] Avoid repeated hash lookups (NFC) (PR #122586)
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- [llvm] 642e493 - [InstCombine] Convert fshl(x, 0, y) to shl(x, and(y, BitWidth - 1)) when BitWidth is pow2 (#122362)
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- [llvm] 876fa60 - [TySan] Skip instrumentation for function declarations (#122488)
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- [llvm] ba58d35 - [M68k] Use M68010 cpu as target for SR move test (#122452)
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- [llvm] 1eed469 - [AArch64] Eliminate Common Subexpression of CSEL by Reassociation (#121350)
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- [llvm] IR: introduce ICmpInst::isImpliedByMatchingCmp (PR #122597)
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- [llvm] IR: introduce ICmpInst::isImpliedByMatchingCmp (PR #122597)
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- [llvm] ab9a80a - [DAG] Allow AssertZExt to scalarize. (#122463)
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- [llvm] [X86] X86FixupVectorConstantsPass - use VPMOVSX/ZX extensions for PS/PD domain moves (PR #122601)
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- [compiler-rt] 9a9e41c - [win/asan] GetInstructionSize: Add test for `8D A4 24 ...`. (#119794)
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- [llvm] 657fb44 - [AMDGPU] Add target hook to isGlobalMemoryObject (#112781)
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- [llvm] Add to/from SR instr usage and SR uses/defs (PR #122605)
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- [llvm] [ValueTracking] Take into account whether zero is poison when computing CR for `ct{t,l}z` (PR #122548)
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- [llvm] [ValueTracking] Take into account whether zero is poison when computing CR for `ct{t,l}z` (PR #122548)
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- [llvm] [InstSimpify] Simplifying `(xor (sub C_Mask, X), C_Mask)` -> `X` (PR #122552)
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- [llvm] [InstCombine] Remove `sub nuw C_Mask, X` -> `xor X, C_Mask` canoncalization (PR #122607)
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- [llvm] [InstCombine] Remove `sub nuw C_Mask, X` -> `xor X, C_Mask` canoncalization (PR #122607)
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- [llvm] [InstCombine] Remove `sub nuw C_Mask, X` -> `xor X, C_Mask` canoncalization (PR #122607)
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- [llvm] [DSE] Use alias analysis to identify no-op stores (PR #122610)
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- [llvm] [InstCombine] InstCombine should fold frexp of select to select of frexp (PR #121227)
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- [llvm] [DAG] Allow AssertZExt to scalarize. (PR #122463)
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- [llvm] [InstCombine] Fold (add (add A, 1), (sext (icmp ne A, 0))) to call umax(A, 1) (PR #122491)
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- [llvm] [InstCombine] Fold (add (add A, 1), (sext (icmp ne A, 0))) to call umax(A, 1) (PR #122491)
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- [llvm] cc995ad - [InstSimpify] Simplifying `(xor (sub C_Mask, X), C_Mask)` -> `X` (#122552)
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- [llvm] [InstSimpify] Simplifying `(xor (sub C_Mask, X), C_Mask)` -> `X` (PR #122552)
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- [llvm] 17ef436 - [ValueTracking] Take into account whether zero is poison when computing CR for `ct{t,l}z` (#122548)
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- [llvm] [ValueTracking] Take into account whether zero is poison when computing CR for `ct{t,l}z` (PR #122548)
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- [llvm] 07ff786 - [TableGen] Avoid repeated hash lookups (NFC) (#122586)
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- [llvm] [InstCombine] Remove `sub nuw C_Mask, X` -> `xor X, C_Mask` canoncalization (PR #122607)
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- [llvm] [InstCombine] Remove `sub nuw C_Mask, X` -> `xor X, C_Mask` canoncalization (PR #122607)
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- [llvm] [FunctionAttrs] Treat byval calls as only reading ptrs (PR #122618)
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- [compiler-rt] [libFuzzer] Add missing space in FuzzerFlags.def (PR #122619)
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- [compiler-rt] [libFuzzer] Add missing space in FuzzerFlags.def (PR #122619)
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- [llvm] goldsteinn/cttz ctlz of p2 (PR #122620)
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- [llvm] goldsteinn/cttz ctlz of p2 (PR #122620)
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- [llvm] goldsteinn/cttz ctlz of p2 (PR #122620)
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- [llvm] [InstCombine] Fold `(ct{t, l}z Pow2)` -> `Log2(Pow2)` (PR #122620)
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- [llvm] [memprof] Migrate away from PointerUnion::is (NFC) (PR #122622)
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- [llvm] [ADT] Deprecate PointerUnion::{is,get} (NFC) (PR #122623)
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- [lld] [wasm] Avoid repeated hash lookups (NFC) (PR #122626)
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- [lld] [ELF] Avoid repeated hash lookups (NFC) (PR #122628)
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- [llvm] [RISCV][CostModel] Add cost for @llvm.experimental.vp.splice (PR #122223)
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- [llvm] [RISCV][CostModel] Add cost for @llvm.experimental.vp.splice (PR #122223)
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- [llvm] [RISCV][CostModel] Add cost for @llvm.experimental.vp.splice (PR #122223)
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- [llvm] [RISCV][CostModel] Add cost for @llvm.experimental.vp.splice (PR #122223)
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- [llvm] [LV][VPlan] Change the inheritance of class VPWidenSelectRecipe to class VPRecipeWithIRFlags, which allows recipe of the select to pass the fastmath flags (PR #121023)
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- [llvm] [LV][VPlan] Change the inheritance of class VPWidenSelectRecipe to class VPRecipeWithIRFlags, which allows recipe of the select to pass the fastmath flags (PR #121023)
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- [llvm] [LV][VPlan] Change the inheritance of class VPWidenSelectRecipe to class VPRecipeWithIRFlags, which allows recipe of the select to pass the fastmath flags (PR #121023)
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- [llvm] [LV][VPlan] Add fast flags for selectRecipe (PR #121023)
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- [llvm] [LV][VPlan] Add fast flags for selectRecipe (PR #121023)
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- [llvm] [LV][VPlan] Add fast flags for selectRecipe (PR #121023)
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- [llvm] 5ee0a71 - [aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (#121516)
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- [llvm] d997a72 - Fix build break in MIRPrinter (#122630)
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- [llvm] 42da120 - [flang][OpenMP] Extend delayed privatization for `omp.simd` (#122156)
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- [llvm] [InstCombine] Fold (add (add A, 1), (sext (icmp ne A, 0))) to call umax(A, 1) (PR #122491)
via llvm-commits
- [llvm] [InstCombine] Fold (add (add A, 1), (sext (icmp ne A, 0))) to call umax(A, 1) (PR #122491)
via llvm-commits
- [llvm] [InstCombine] Fold (add (add A, 1), (sext (icmp ne A, 0))) to call umax(A, 1) (PR #122491)
via llvm-commits
- [llvm] [InstCombine] Fold (add (add A, 1), (sext (icmp ne A, 0))) to call umax(A, 1) (PR #122491)
via llvm-commits
- [llvm] [RISCV] Support [mh]edelegh (PR #121634)
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- [libc] [llvm] [libc][complex] Testing infra for MPC (PR #121261)
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- [llvm] MachineVerifier: Check stack protector is top-most in frame (PR #122635)
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- [llvm] [APFloat]extract `fltSemantics::isRepresentableBy` to header (PR #122636)
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- [llvm] [InstCombine] Fold (add (add A, 1), (sext (icmp ne A, 0))) to call umax(A, 1) (PR #122491)
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- [llvm] 26b4a0a - Add 'unifiedlto' option to gold plugin (#121336)
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- [llvm] Add 'unifiedlto' option to gold plugin (PR #121336)
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- [llvm] 66badf2 - VT: teach a special-case optz about samesign (#122590)
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- [llvm] Add function merger to be run during LTO link with gold plugin (PR #121343)
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- [llvm] 4f7dc1b - [InstCombine] Fold (add (add A, 1), (sext (icmp ne A, 0))) to call umax(A, 1) (#122491)
via llvm-commits
- [llvm] [InstCombine] Fold (add (add A, 1), (sext (icmp ne A, 0))) to call umax(A, 1) (PR #122491)
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- [llvm] be6c752 - [X86] X86FixupVectorConstantsPass - use VPMOVSX/ZX extensions for PS/PD domain moves (#122601)
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- [llvm] [InstCombine] Fold `(ct{t, l}z Pow2)` -> `Log2(Pow2)` (PR #122620)
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- [llvm] [InstCombine] Fold `(ct{t, l}z Pow2)` -> `Log2(Pow2)` (PR #122620)
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- [clang] [llvm] [AArch64] Change feature dependencies of fp8 features (PR #122280)
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- [llvm] [InstCombine] fold unsigned predicates on srem result (PR #122520)
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- [clang] [llvm] [Clang][LLVM][AArch64]Add new feature SSVE-BitPerm (PR #121947)
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- [clang] [llvm] [Clang][LLVM][AArch64]Add new feature SSVE-BitPerm (PR #121947)
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- [llvm] [InstCombine] Fold `(ct{t, l}z Pow2)` -> `Log2(Pow2)` (PR #122620)
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- [llvm] [InstCombine] Fold `(ct{t, l}z Pow2)` -> `Log2(Pow2)` (PR #122620)
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- [llvm] d047dbd - Add function merger to be run during LTO link with gold plugin (#121343)
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- [llvm] Add function merger to be run during LTO link with gold plugin (PR #121343)
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- [llvm] [InstCombine] fold unsigned predicates on srem result (PR #122520)
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- [clang] [llvm] [Clang][LLVM][AArch64]Add new feature SSVE-BitPerm (PR #121947)
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- [llvm] [PatternMatch] Add `m_c_XorLike` matcher; NFC (PR #122642)
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- [llvm] [PatternMatch] Add `m_c_XorLike` matcher; NFC (PR #122642)
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- [llvm] [InstCombine] Remove `sub nuw C_Mask, X` -> `xor X, C_Mask` canoncalization (PR #122607)
via llvm-commits
- [llvm] [PatternMatch] Add `m_c_XorLike` matcher; NFC (PR #122642)
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- [llvm] [PatternMatch] Add `m_c_XorLike` matcher; NFC (PR #122642)
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- [llvm] [InterleavedAccessPass]: Ensure that dead nodes get erased only once (PR #122643)
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- [llvm] [WIP] Add missed optimization remark if LLVM inserts a branch when optimizing sqrt calls (PR #122644)
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- [llvm] [WIP] Add missed optimization remark if LLVM inserts a branch when optimizing sqrt calls (PR #122644)
via llvm-commits
- [llvm] [WIP] Add missed optimization remark if LLVM inserts a branch when optimizing sqrt calls (PR #122644)
via llvm-commits
- [llvm] [WIP] Add missed optimization remark if LLVM inserts a branch when optimizing sqrt calls (PR #122644)
via llvm-commits
- [llvm] [WIP] Add missed optimization remark if LLVM inserts a branch when optimizing sqrt calls (PR #122644)
via llvm-commits
- [llvm] 43fdd6e - [memprof] Migrate away from PointerUnion::is (NFC) (#122622)
via llvm-commits
- [lld] fd87188 - [wasm] Avoid repeated hash lookups (NFC) (#122626)
via llvm-commits
- [lld] 16aa400 - [ELF] Avoid repeated hash lookups (NFC) (#122628)
via llvm-commits
- [llvm] [WIP] Add missed optimization remark if LLVM inserts a branch when optimizing sqrt calls (PR #122644)
via llvm-commits
- [llvm] [ValueTracking] Return `poison` for zero-sized types (PR #122647)
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- [llvm] [ValueTracking] Return `poison` for zero-sized types (PR #122647)
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- [llvm] [AArch64] Fix a corner case with large stack allocation (PR #122038)
via llvm-commits
- [llvm] [WIP] Add missed optimization remark if LLVM inserts a branch when optimizing sqrt calls (PR #122644)
via llvm-commits
- [llvm] [X86][AVX-VNNI] Fix VNNI intrinsics argument types (PR #122649)
via llvm-commits
- [llvm] [X86][AVX-VNNI] Fix VNNI intrinsics argument types (PR #122649)
via llvm-commits
- [llvm] [WIP] Add missed optimization remark if LLVM inserts a branch when optimizing sqrt calls (PR #122644)
via llvm-commits
- [llvm] [WIP] Add missed optimization remark if LLVM inserts a branch when optimizing sqrt calls (PR #122644)
via llvm-commits
- [llvm] [X86][AVX-VNNI] Fix VNNI intrinsics argument types (PR #122649)
via llvm-commits
- [llvm] [WIP] Add missed optimization remark if LLVM inserts a branch when optimizing sqrt calls (PR #122644)
via llvm-commits
- [llvm] [WIP] Add missed optimization remark if LLVM inserts a branch when optimizing sqrt calls (PR #122644)
via llvm-commits
- [llvm] [WIP] Add infrastructure for emitting optimization remarks from PartiallyInlineLibCalls (PR #122644)
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- [llvm] [PartiallyInlineLibCalls] Add infrastructure for emitting optimization remarks from PartiallyInlineLibCalls (PR #122644)
via llvm-commits
- [llvm] [PartiallyInlineLibCalls] Add infrastructure for emitting optimization remarks from PartiallyInlineLibCalls (PR #122644)
via llvm-commits
- [llvm] [X86][AVX-VNNI] Fix VNNI intrinsics argument types (PR #122649)
via llvm-commits
- [llvm] [X86][AVX-VNNI] Fix VNNI intrinsics argument types (PR #122649)
via llvm-commits
- [llvm] [X86][AVX-VNNI] Fix VNNI intrinsics argument types (PR #122649)
via llvm-commits
- [compiler-rt] [win/asan] GetInstructionSize: Support some more 2 byte instructions. (PR #120235)
via llvm-commits
- [llvm] [PartiallyInlineLibCalls] Add infrastructure for emitting optimization remarks from PartiallyInlineLibCalls (PR #122644)
via llvm-commits
- [llvm] Nvptx port LowerBITCAST to SelectionDAG (PR #120903)
via llvm-commits
- [llvm] [PartiallyInlineLibCalls] Add infrastructure for emitting optimization remarks from PartiallyInlineLibCalls (PR #122644)
via llvm-commits
- [llvm] [branch abandoned, ignore] (PR #122644)
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- [llvm] [PartiallyInlineLibCalls] Add infrastructure for emitting optimization remarks from PartiallyInlineLibCalls (PR #122654)
via llvm-commits
- [llvm] [PartiallyInlineLibCalls] Add infrastructure for emitting optimization remarks from PartiallyInlineLibCalls (PR #122654)
via llvm-commits
- [llvm] [PartiallyInlineLibCalls] Add infrastructure for emitting optimization remarks from PartiallyInlineLibCalls (PR #122654)
via llvm-commits
- [llvm] [PartiallyInlineLibCalls] Add infrastructure for emitting optimization remarks from PartiallyInlineLibCalls (PR #122654)
via llvm-commits
- [llvm] [PartiallyInlineLibCalls] Add infrastructure for emitting optimization remarks from PartiallyInlineLibCalls (PR #122654)
via llvm-commits
- [llvm] [PartiallyInlineLibCalls] Add infrastructure for emitting optimization remarks from PartiallyInlineLibCalls (PR #122654)
via llvm-commits
- [llvm] [PartiallyInlineLibCalls] Add infrastructure for emitting optimization remarks from PartiallyInlineLibCalls (PR #122654)
via llvm-commits
- [llvm] [PartiallyInlineLibCalls] Add infrastructure for emitting optimization remarks from PartiallyInlineLibCalls (PR #122654)
via llvm-commits
- [clang] [llvm] Handle leading underscores in update_cc_test_checks.py (PR #121800)
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- [clang] [llvm] Handle leading underscores in update_cc_test_checks.py (PR #121800)
via llvm-commits
- [flang] [llvm] [mlir] [Flang][OpenMP][OpenACC] Handle atomic read/capture when lhs and rhs … (PR #93776)
via llvm-commits
- [flang] [llvm] [mlir] [Flang][OpenMP][OpenACC] Handle atomic read/capture when lhs and rhs … (PR #93776)
via llvm-commits
- [llvm] [RISCV] Support [mh]edelegh (PR #121634)
via llvm-commits
- [llvm] 0e51b54 - [DirectX] Implement the resource.store.rawbuffer intrinsic (#121282)
via llvm-commits
- [llvm] [mlir] [mlir][OpenMP] Add __atomic_store to AtomicInfo (PR #121055)
via llvm-commits
- [llvm] [mlir] [TOSA] Add Tosa_Shape type and ConstShapeOp (PR #122547)
via llvm-commits
- [llvm] [mlir] [TOSA] Add Tosa_Shape type and ConstShapeOp (PR #122547)
via llvm-commits
- [llvm] [mlir] [TOSA] Add Tosa_Shape type and ConstShapeOp (PR #122547)
via llvm-commits
- [llvm] [LV][VPlan] Add fast flags for selectRecipe (PR #121023)
via llvm-commits
- [llvm] [LV][VPlan] Add fast flags for selectRecipe (PR #121023)
via llvm-commits
- [compiler-rt] [builtins] Support building the 128-bit float functions on i386 (PR #122658)
via llvm-commits
- [compiler-rt] [builtins] Support building the 128-bit float functions on i386 (PR #122658)
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- [llvm] [Mips] Add the missing judgment when processing function handleMFLOSlot (PR #121463)
via llvm-commits
- [llvm] [LV][VPlan] Add fast flags for selectRecipe (PR #121023)
via llvm-commits
- [llvm] [Mips] Fix compiler crash when returning fp128 after calling a functi… (PR #117525)
via llvm-commits
- [llvm] [LV][VPlan] Add fast flags for selectRecipe (PR #121023)
via llvm-commits
- [llvm] [LV][VPlan] Add fast flags for selectRecipe (PR #121023)
via llvm-commits
- [llvm] [LV][VPlan] Add fast flags for selectRecipe (PR #121023)
via llvm-commits
- [llvm] AMDGPU: Add gfx9 run line to scalar_to_vector test (PR #122659)
via llvm-commits
- [llvm] [AMDGPU] Add commute for some VOP3 inst (PR #121326)
via llvm-commits
- [llvm] [AMDGPU] Fix unreachable reg bit width (PR #122107)
via llvm-commits
- [llvm] [AMDGPU] select v_sat_pk from two i16 or v2i16 (PR #121124)
via llvm-commits
- [llvm] [AMDGPU] precommit tests #121124 (PR #122438)
via llvm-commits
- [compiler-rt] [builtins] Support building the 128-bit float functions on i386 (PR #122658)
via llvm-commits
- [llvm] 59bba39 - [RISCV] Rework memcpy test (#120364)
via llvm-commits
- [llvm] 4637c77 - Revert "[RISCV] Rework memcpy test" (#122662)
via llvm-commits
- [llvm] [cmake] Serialize native builds for Make generator (PR #121021)
via llvm-commits
- [compiler-rt] [builtins] Support building the 128-bit float functions on i386 (PR #122658)
via llvm-commits
- [clang] [lldb] [llvm] Extending LLDB to work on AIX (PR #102601)
via llvm-commits
- [llvm] 77e6f43 - [SPIRV] convergence anchor intrinsic does not have a parent token (#122230)
via llvm-commits
- [llvm] [AMDGPU] Add commute for some VOP3 inst (PR #121326)
via llvm-commits
- [llvm] [Spiller] Deatach legacy pass and supply analyses instead (PR #122665)
via llvm-commits
- [llvm] [AMDGPU] precommit tests #121124 (PR #122438)
via llvm-commits
- [llvm] [AMDGPU] precommit tests #121124 (PR #122438)
via llvm-commits
- [llvm] [DirectX] Set the EnableRawAndStructuredBuffers shader flag (PR #122667)
via llvm-commits
- [llvm] [DirectX] Set the EnableRawAndStructuredBuffers shader flag (PR #122667)
via llvm-commits
- [llvm] [AArch64] Fix a corner case with large stack allocation (PR #122038)
via llvm-commits
- [llvm] f15da5f - [AMDGPU] Fix an invalid cast in `AMDGPULateCodeGenPrepare::visitLoadInst` (#122494)
via llvm-commits
- [llvm] [AMDGPU] precommit tests #121124 (PR #122438)
via llvm-commits
- [llvm] 7bf1cb7 - [AMDGPU][NewPM] Port AMDGPURemoveIncompatibleFunctions to NPM (#122261)
via llvm-commits
- [llvm] f431f93 - [CodeGen][NewPM] Use proper NPM AtomicExpandPass in AMDGPU (#122086)
via llvm-commits
- [llvm] [RISCV][CostModel] Add cost for @llvm.experimental.vp.splice (PR #122223)
via llvm-commits
- [llvm] [RISCV][CostModel] Add cost for @llvm.experimental.vp.splice (PR #122223)
via llvm-commits
- [llvm] [RISCV][CostModel] Add cost for @llvm.experimental.vp.splice (PR #122223)
via llvm-commits
- [llvm] [AMDGPU] precommit tests #121124 (PR #122438)
via llvm-commits
- [llvm] [AMDGPU] precommit tests #121124 (PR #122438)
via llvm-commits
- [llvm] [AMDGPU] precommit tests #121124 (PR #122438)
via llvm-commits
- [compiler-rt] [builtins] Support building the 128-bit float functions on i386 (PR #122658)
via llvm-commits
- [llvm] DAG: Move scalarizeExtractedVectorLoad to TargetLowering (PR #122670)
via llvm-commits
- [clang] [lldb] [llvm] Extending LLDB to work on AIX (PR #102601)
via llvm-commits
- [compiler-rt] [builtins] Support building the 128-bit float functions on i386 (PR #122658)
via llvm-commits
- [compiler-rt] [builtins] Support building the 128-bit float functions on i386 (PR #122658)
via llvm-commits
- [llvm] [AMDGPU] Add commute for some VOP3 inst (PR #121326)
via llvm-commits
- [llvm] [llvm] Mark scavenging spill-slots as *spilled* stack objects. (PR #122673)
via llvm-commits
Last message date:
Sun Jan 12 23:59:03 PST 2025
Archived on: Sun Jan 12 23:59:05 PST 2025
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