[llvm] [AMDGPU] Add commute for some VOP3 inst (PR #121326)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 8 05:36:07 PST 2025


================
@@ -2762,6 +2762,54 @@ static MachineInstr *swapInlineConstOperands(MachineInstr &MI,
   return &MI;
 }
 
+bool SIInstrInfo::isLegalToSwap(const MachineInstr &MI, 
+                                unsigned OpIdx0, const MachineOperand *MO0,
+                                unsigned OpIdx1, const MachineOperand *MO1) const {
+  const MCInstrDesc &InstDesc = MI.getDesc();
+  const MCOperandInfo &OpInfo0 = InstDesc.operands()[OpIdx0];
+  const MCOperandInfo &OpInfo1 = InstDesc.operands()[OpIdx1];
+  const TargetRegisterClass *DefinedRC1 =
+      OpInfo1.RegClass != -1 ? RI.getRegClass(OpInfo1.RegClass) : nullptr;
+  const TargetRegisterClass *DefinedRC0 =
+      OpInfo1.RegClass != -1 ? RI.getRegClass(OpInfo0.RegClass) : nullptr;
+  
+  unsigned Opc = MI.getOpcode();
+  int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0);
+  if (Src0Idx == -1) {
+    // VOPD V_DUAL_* instructions use different operand names.
+    Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0X);
+  }
+
+  // Swap doesn't breach constantbus or literal limits
+  // It may move literal to position other than src0, this is not allowed pre-gfx10
+  // However, most test cases need literals in Src0 for VOP
+  // FIX-ME: After gfx9, literal can be in place other than Src0
+  if (isVALU(MI)){
+    if ((int)OpIdx0 == Src0Idx &&
+        !MO0->isReg() && !isInlineConstant(*MO0, OpInfo1))
+      return false;
+    if ((int)OpIdx1 == Src0Idx &&
+        !MO1->isReg() && !isInlineConstant(*MO1, OpInfo0))
+      return false;
+  }
+
+  if (OpIdx1 != Src0Idx && MO0->isReg()) {
+    if (!DefinedRC1)
+      return OpInfo1.OperandType == MCOI::OPERAND_UNKNOWN;
+    return isLegalRegOperand(MI, OpIdx1, *MO0);
+  } 
+  if (OpIdx0 != Src0Idx && MO1->isReg()) {
+    if (!DefinedRC0)
+      return OpInfo0.OperandType == MCOI::OPERAND_UNKNOWN;
+    return isLegalRegOperand(MI, OpIdx0, *MO1);
+  }
+  
+  // No need to check 64bit literals since swapping does not bring new 
+  // 64bit literals into current instruction to fold to 32bit
----------------
arsenm wrote:

```suggestion
  // No need to check 64-bit literals since swapping does not bring new 
  // 64-bit literals into current instruction to fold to 32-bit
```

https://github.com/llvm/llvm-project/pull/121326


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