[lld] [llvm] [RISCV][LLD] Add RISCV zcmt optimise in linker relaxation (PR #77884)
Mathieu Gouttenoire via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 7 01:02:52 PST 2025
================
@@ -1234,3 +1291,215 @@ TargetInfo *elf::getRISCVTargetInfo() {
static RISCV target;
return ⌖
}
+
+TableJumpSection::TableJumpSection()
+ : SyntheticSection(SHF_ALLOC | SHF_EXECINSTR, SHT_PROGBITS,
+ config->wordsize, ".riscv.jvt") {}
----------------
math-gout wrote:
According to the RISC-V unprivileged specification (27.14.3. jvt CSR) the jvt section should be aligned to 64 bytes.
"If jvt is writable, the set of values the register may hold can vary by implementation. The value in the
BASE field must always be aligned on a 64-byte boundary."
https://github.com/llvm/llvm-project/pull/77884
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