[llvm] [AMDGPU][True16][CodeGen] true16 codegen pattern for v_med3_u/i16 (PR #121850)

Brox Chen via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 7 10:18:35 PST 2025

Previous message: [llvm] [AMDGPU][True16][CodeGen] true16 codegen pattern for v_med3_u/i16 (PR #121850)
Next message: [llvm] c8d435f - [RISCV] Use ISD::XOR instead of RISCVISD::VMXOR_VL in lowerVectorMaskVecReduction of scalable ISD::VECREDUCE_AND (#121812)
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

https://github.com/broxigarchen closed https://github.com/llvm/llvm-project/pull/121850

Previous message: [llvm] [AMDGPU][True16][CodeGen] true16 codegen pattern for v_med3_u/i16 (PR #121850)
Next message: [llvm] c8d435f - [RISCV] Use ISD::XOR instead of RISCVISD::VMXOR_VL in lowerVectorMaskVecReduction of scalable ISD::VECREDUCE_AND (#121812)
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list