[llvm] [NVPTX] Add float to tf32 conversion intrinsics (PR #121507)
Artem Belevich via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 9 12:49:46 PST 2025
================
@@ -725,6 +728,12 @@ let hasSideEffects = false in {
def CVT_f16x2_e4m3x2 : CVT_f16x2_fp8<"e4m3">;
def CVT_f16x2_e5m2x2 : CVT_f16x2_fp8<"e5m2">;
+
+ // Float to TF32 conversions.
+ def CVT_tf32_f32 : NVPTXInst<(outs Int32Regs:$dst),
+ (ins Float32Regs:$src, CvtMode:$mode),
+ !strconcat("cvt${mode:base}${mode:relu}${mode:satfinite}.",
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Artem-B wrote:
For this limited use case, instead of implementing a separate mode printer, you could just pass the necessary relu/satfinite modifier string for the instruction directly, as the record argument. E.g. instead of `CVT_tf32_f32 $a, CvtRN_RELU` you would use `CVT_tf32_f32 $a, ".relu"` and instead of `CvtRNA_SATFINITE` you'd pass `".rna.satfinite"`.
The extra mode here just complicates things without buying you anything.
https://github.com/llvm/llvm-project/pull/121507
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