[llvm] True16 codegen pattern for v_pack_b32_f16 (PR #121988)
Brox Chen via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 7 12:06:41 PST 2025
https://github.com/broxigarchen created https://github.com/llvm/llvm-project/pull/121988
None
>From f7dc7115fd7a878d3458b16478c123644fc9376c Mon Sep 17 00:00:00 2001
From: guochen2 <guochen2 at amd.com>
Date: Tue, 7 Jan 2025 15:05:56 -0500
Subject: [PATCH] True16 codegen pattern for v_pack_b32_f16
---
llvm/lib/Target/AMDGPU/SIInstructions.td | 3 +
llvm/test/CodeGen/AMDGPU/v_pack.ll | 408 +++++++++++++++++++++++
2 files changed, 411 insertions(+)
diff --git a/llvm/lib/Target/AMDGPU/SIInstructions.td b/llvm/lib/Target/AMDGPU/SIInstructions.td
index e388efe73cddbb..b98c3799332a13 100644
--- a/llvm/lib/Target/AMDGPU/SIInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SIInstructions.td
@@ -3390,6 +3390,9 @@ let SubtargetPredicate = isGFX9Plus in {
let True16Predicate = NotHasTrue16BitInsts in
def : PackB32Pat<V_PACK_B32_F16_e64>;
+let True16Predicate = UseRealTrue16Insts in
+ def : PackB32Pat<V_PACK_B32_F16_t16_e64>;
+
let True16Predicate = UseFakeTrue16Insts in
def : PackB32Pat<V_PACK_B32_F16_fake16_e64>;
} // End SubtargetPredicate = isGFX9Plus
diff --git a/llvm/test/CodeGen/AMDGPU/v_pack.ll b/llvm/test/CodeGen/AMDGPU/v_pack.ll
index 2eba67b06bae1d..072151dd6f5a08 100644
--- a/llvm/test/CodeGen/AMDGPU/v_pack.ll
+++ b/llvm/test/CodeGen/AMDGPU/v_pack.ll
@@ -1,6 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1010 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
; RUN: llc -global-isel -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1010 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GISEL %s
+; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=-flat-for-global,-real-true16 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GFX11-GCN-FAKE16 %s
+; RUN: llc -global-isel -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=-flat-for-global,-real-true16 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GFX11-GISEL-FAKE16 %s
+; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=-flat-for-global,+real-true16 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GFX11-GCN-REAL16 %s
+; RUN: llc -global-isel -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=-flat-for-global,+real-true16 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GFX11-GISEL-REAL16 %s
declare i32 @llvm.amdgcn.workitem.id.x() #1
@@ -38,6 +42,89 @@ define amdgpu_kernel void @v_pack_b32_v2f16(ptr addrspace(1) %in0, ptr addrspace
; GISEL-NEXT: ; use v0
; GISEL-NEXT: ;;#ASMEND
; GISEL-NEXT: s_endpgm
+;
+; GFX11-GCN-FAKE16-LABEL: v_pack_b32_v2f16:
+; GFX11-GCN-FAKE16: ; %bb.0:
+; GFX11-GCN-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-GCN-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX11-GCN-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GCN-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
+; GFX11-GCN-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-GCN-FAKE16-NEXT: global_load_u16 v1, v0, s[0:1] glc dlc
+; GFX11-GCN-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GCN-FAKE16-NEXT: global_load_u16 v0, v0, s[2:3] glc dlc
+; GFX11-GCN-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GCN-FAKE16-NEXT: v_add_f16_e32 v1, 2.0, v1
+; GFX11-GCN-FAKE16-NEXT: v_add_f16_e32 v0, 2.0, v0
+; GFX11-GCN-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GCN-FAKE16-NEXT: v_pack_b32_f16 v0, v1, v0
+; GFX11-GCN-FAKE16-NEXT: ;;#ASMSTART
+; GFX11-GCN-FAKE16-NEXT: ; use v0
+; GFX11-GCN-FAKE16-NEXT: ;;#ASMEND
+; GFX11-GCN-FAKE16-NEXT: s_endpgm
+;
+; GFX11-GISEL-FAKE16-LABEL: v_pack_b32_v2f16:
+; GFX11-GISEL-FAKE16: ; %bb.0:
+; GFX11-GISEL-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
+; GFX11-GISEL-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-GISEL-FAKE16-NEXT: global_load_u16 v1, v0, s[0:1] glc dlc
+; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GISEL-FAKE16-NEXT: global_load_u16 v0, v0, s[2:3] glc dlc
+; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GISEL-FAKE16-NEXT: v_add_f16_e32 v1, 2.0, v1
+; GFX11-GISEL-FAKE16-NEXT: v_add_f16_e32 v0, 2.0, v0
+; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-FAKE16-NEXT: v_pack_b32_f16 v0, v1, v0
+; GFX11-GISEL-FAKE16-NEXT: ;;#ASMSTART
+; GFX11-GISEL-FAKE16-NEXT: ; use v0
+; GFX11-GISEL-FAKE16-NEXT: ;;#ASMEND
+; GFX11-GISEL-FAKE16-NEXT: s_endpgm
+;
+; GFX11-GCN-REAL16-LABEL: v_pack_b32_v2f16:
+; GFX11-GCN-REAL16: ; %bb.0:
+; GFX11-GCN-REAL16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-GCN-REAL16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX11-GCN-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GCN-REAL16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
+; GFX11-GCN-REAL16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-GCN-REAL16-NEXT: global_load_u16 v1, v0, s[0:1] glc dlc
+; GFX11-GCN-REAL16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GCN-REAL16-NEXT: global_load_u16 v2, v0, s[2:3] glc dlc
+; GFX11-GCN-REAL16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GCN-REAL16-NEXT: v_mov_b16_e32 v0.l, v1.l
+; GFX11-GCN-REAL16-NEXT: v_mov_b16_e32 v0.h, v2.l
+; GFX11-GCN-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-GCN-REAL16-NEXT: v_add_f16_e32 v0.l, 2.0, v0.l
+; GFX11-GCN-REAL16-NEXT: v_add_f16_e32 v0.h, 2.0, v0.h
+; GFX11-GCN-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GCN-REAL16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h
+; GFX11-GCN-REAL16-NEXT: ;;#ASMSTART
+; GFX11-GCN-REAL16-NEXT: ; use v0
+; GFX11-GCN-REAL16-NEXT: ;;#ASMEND
+; GFX11-GCN-REAL16-NEXT: s_endpgm
+;
+; GFX11-GISEL-REAL16-LABEL: v_pack_b32_v2f16:
+; GFX11-GISEL-REAL16: ; %bb.0:
+; GFX11-GISEL-REAL16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-GISEL-REAL16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX11-GISEL-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-REAL16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
+; GFX11-GISEL-REAL16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-GISEL-REAL16-NEXT: global_load_u16 v1, v0, s[0:1] glc dlc
+; GFX11-GISEL-REAL16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GISEL-REAL16-NEXT: global_load_u16 v2, v0, s[2:3] glc dlc
+; GFX11-GISEL-REAL16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GISEL-REAL16-NEXT: v_add_f16_e32 v0.l, 2.0, v1.l
+; GFX11-GISEL-REAL16-NEXT: v_add_f16_e32 v0.h, 2.0, v2.l
+; GFX11-GISEL-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-REAL16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h
+; GFX11-GISEL-REAL16-NEXT: ;;#ASMSTART
+; GFX11-GISEL-REAL16-NEXT: ; use v0
+; GFX11-GISEL-REAL16-NEXT: ;;#ASMEND
+; GFX11-GISEL-REAL16-NEXT: s_endpgm
%tid = call i32 @llvm.amdgcn.workitem.id.x()
%tid.ext = sext i32 %tid to i64
%in0.gep = getelementptr inbounds half, ptr addrspace(1) %in0, i64 %tid.ext
@@ -87,6 +174,89 @@ define amdgpu_kernel void @v_pack_b32_v2f16_sub(ptr addrspace(1) %in0, ptr addrs
; GISEL-NEXT: ; use v0
; GISEL-NEXT: ;;#ASMEND
; GISEL-NEXT: s_endpgm
+;
+; GFX11-GCN-FAKE16-LABEL: v_pack_b32_v2f16_sub:
+; GFX11-GCN-FAKE16: ; %bb.0:
+; GFX11-GCN-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-GCN-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX11-GCN-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GCN-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
+; GFX11-GCN-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-GCN-FAKE16-NEXT: global_load_u16 v1, v0, s[0:1] glc dlc
+; GFX11-GCN-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GCN-FAKE16-NEXT: global_load_u16 v0, v0, s[2:3] glc dlc
+; GFX11-GCN-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GCN-FAKE16-NEXT: v_subrev_f16_e32 v1, 2.0, v1
+; GFX11-GCN-FAKE16-NEXT: v_add_f16_e32 v0, 2.0, v0
+; GFX11-GCN-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GCN-FAKE16-NEXT: v_pack_b32_f16 v0, v1, v0
+; GFX11-GCN-FAKE16-NEXT: ;;#ASMSTART
+; GFX11-GCN-FAKE16-NEXT: ; use v0
+; GFX11-GCN-FAKE16-NEXT: ;;#ASMEND
+; GFX11-GCN-FAKE16-NEXT: s_endpgm
+;
+; GFX11-GISEL-FAKE16-LABEL: v_pack_b32_v2f16_sub:
+; GFX11-GISEL-FAKE16: ; %bb.0:
+; GFX11-GISEL-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
+; GFX11-GISEL-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-GISEL-FAKE16-NEXT: global_load_u16 v1, v0, s[0:1] glc dlc
+; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GISEL-FAKE16-NEXT: global_load_u16 v0, v0, s[2:3] glc dlc
+; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GISEL-FAKE16-NEXT: v_subrev_f16_e32 v1, 2.0, v1
+; GFX11-GISEL-FAKE16-NEXT: v_add_f16_e32 v0, 2.0, v0
+; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-FAKE16-NEXT: v_pack_b32_f16 v0, v1, v0
+; GFX11-GISEL-FAKE16-NEXT: ;;#ASMSTART
+; GFX11-GISEL-FAKE16-NEXT: ; use v0
+; GFX11-GISEL-FAKE16-NEXT: ;;#ASMEND
+; GFX11-GISEL-FAKE16-NEXT: s_endpgm
+;
+; GFX11-GCN-REAL16-LABEL: v_pack_b32_v2f16_sub:
+; GFX11-GCN-REAL16: ; %bb.0:
+; GFX11-GCN-REAL16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-GCN-REAL16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX11-GCN-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GCN-REAL16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
+; GFX11-GCN-REAL16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-GCN-REAL16-NEXT: global_load_u16 v1, v0, s[0:1] glc dlc
+; GFX11-GCN-REAL16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GCN-REAL16-NEXT: global_load_u16 v2, v0, s[2:3] glc dlc
+; GFX11-GCN-REAL16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GCN-REAL16-NEXT: v_mov_b16_e32 v0.l, v1.l
+; GFX11-GCN-REAL16-NEXT: v_mov_b16_e32 v0.h, v2.l
+; GFX11-GCN-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-GCN-REAL16-NEXT: v_subrev_f16_e32 v0.l, 2.0, v0.l
+; GFX11-GCN-REAL16-NEXT: v_add_f16_e32 v0.h, 2.0, v0.h
+; GFX11-GCN-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GCN-REAL16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h
+; GFX11-GCN-REAL16-NEXT: ;;#ASMSTART
+; GFX11-GCN-REAL16-NEXT: ; use v0
+; GFX11-GCN-REAL16-NEXT: ;;#ASMEND
+; GFX11-GCN-REAL16-NEXT: s_endpgm
+;
+; GFX11-GISEL-REAL16-LABEL: v_pack_b32_v2f16_sub:
+; GFX11-GISEL-REAL16: ; %bb.0:
+; GFX11-GISEL-REAL16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-GISEL-REAL16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX11-GISEL-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-REAL16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
+; GFX11-GISEL-REAL16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-GISEL-REAL16-NEXT: global_load_u16 v1, v0, s[0:1] glc dlc
+; GFX11-GISEL-REAL16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GISEL-REAL16-NEXT: global_load_u16 v2, v0, s[2:3] glc dlc
+; GFX11-GISEL-REAL16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GISEL-REAL16-NEXT: v_subrev_f16_e32 v0.l, 2.0, v1.l
+; GFX11-GISEL-REAL16-NEXT: v_add_f16_e32 v0.h, 2.0, v2.l
+; GFX11-GISEL-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-REAL16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h
+; GFX11-GISEL-REAL16-NEXT: ;;#ASMSTART
+; GFX11-GISEL-REAL16-NEXT: ; use v0
+; GFX11-GISEL-REAL16-NEXT: ;;#ASMEND
+; GFX11-GISEL-REAL16-NEXT: s_endpgm
%tid = call i32 @llvm.amdgcn.workitem.id.x()
%tid.ext = sext i32 %tid to i64
%in0.gep = getelementptr inbounds half, ptr addrspace(1) %in0, i64 %tid.ext
@@ -136,6 +306,78 @@ define amdgpu_kernel void @fptrunc(
; GISEL-NEXT: v_pack_b32_f16 v0, v0, v1
; GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GISEL-NEXT: s_endpgm
+;
+; GFX11-GCN-FAKE16-LABEL: fptrunc:
+; GFX11-GCN-FAKE16: ; %bb.0:
+; GFX11-GCN-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-GCN-FAKE16-NEXT: s_mov_b32 s6, -1
+; GFX11-GCN-FAKE16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX11-GCN-FAKE16-NEXT: s_mov_b32 s10, s6
+; GFX11-GCN-FAKE16-NEXT: s_mov_b32 s11, s7
+; GFX11-GCN-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-GCN-FAKE16-NEXT: s_mov_b32 s8, s2
+; GFX11-GCN-FAKE16-NEXT: s_mov_b32 s9, s3
+; GFX11-GCN-FAKE16-NEXT: s_mov_b32 s4, s0
+; GFX11-GCN-FAKE16-NEXT: buffer_load_b64 v[0:1], off, s[8:11], 0
+; GFX11-GCN-FAKE16-NEXT: s_mov_b32 s5, s1
+; GFX11-GCN-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GCN-FAKE16-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX11-GCN-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX11-GCN-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GCN-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v1
+; GFX11-GCN-FAKE16-NEXT: buffer_store_b32 v0, off, s[4:7], 0
+; GFX11-GCN-FAKE16-NEXT: s_endpgm
+;
+; GFX11-GISEL-FAKE16-LABEL: fptrunc:
+; GFX11-GISEL-FAKE16: ; %bb.0:
+; GFX11-GISEL-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-GISEL-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-GISEL-FAKE16-NEXT: s_load_b64 s[2:3], s[2:3], 0x0
+; GFX11-GISEL-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-GISEL-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, s2
+; GFX11-GISEL-FAKE16-NEXT: v_cvt_f16_f32_e32 v1, s3
+; GFX11-GISEL-FAKE16-NEXT: s_mov_b32 s2, -1
+; GFX11-GISEL-FAKE16-NEXT: s_mov_b32 s3, 0x31016000
+; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v1
+; GFX11-GISEL-FAKE16-NEXT: buffer_store_b32 v0, off, s[0:3], 0
+; GFX11-GISEL-FAKE16-NEXT: s_endpgm
+;
+; GFX11-GCN-REAL16-LABEL: fptrunc:
+; GFX11-GCN-REAL16: ; %bb.0:
+; GFX11-GCN-REAL16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-GCN-REAL16-NEXT: s_mov_b32 s6, -1
+; GFX11-GCN-REAL16-NEXT: s_mov_b32 s7, 0x31016000
+; GFX11-GCN-REAL16-NEXT: s_mov_b32 s10, s6
+; GFX11-GCN-REAL16-NEXT: s_mov_b32 s11, s7
+; GFX11-GCN-REAL16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-GCN-REAL16-NEXT: s_mov_b32 s8, s2
+; GFX11-GCN-REAL16-NEXT: s_mov_b32 s9, s3
+; GFX11-GCN-REAL16-NEXT: s_mov_b32 s4, s0
+; GFX11-GCN-REAL16-NEXT: buffer_load_b64 v[1:2], off, s[8:11], 0
+; GFX11-GCN-REAL16-NEXT: s_mov_b32 s5, s1
+; GFX11-GCN-REAL16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GCN-REAL16-NEXT: v_cvt_f16_f32_e32 v0.l, v2
+; GFX11-GCN-REAL16-NEXT: v_cvt_f16_f32_e32 v0.h, v1
+; GFX11-GCN-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GCN-REAL16-NEXT: v_pack_b32_f16 v0, v0.h, v0.l
+; GFX11-GCN-REAL16-NEXT: buffer_store_b32 v0, off, s[4:7], 0
+; GFX11-GCN-REAL16-NEXT: s_endpgm
+;
+; GFX11-GISEL-REAL16-LABEL: fptrunc:
+; GFX11-GISEL-REAL16: ; %bb.0:
+; GFX11-GISEL-REAL16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-GISEL-REAL16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-GISEL-REAL16-NEXT: s_load_b64 s[2:3], s[2:3], 0x0
+; GFX11-GISEL-REAL16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-GISEL-REAL16-NEXT: v_cvt_f16_f32_e32 v0.l, s2
+; GFX11-GISEL-REAL16-NEXT: v_cvt_f16_f32_e32 v0.h, s3
+; GFX11-GISEL-REAL16-NEXT: s_mov_b32 s2, -1
+; GFX11-GISEL-REAL16-NEXT: s_mov_b32 s3, 0x31016000
+; GFX11-GISEL-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-REAL16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h
+; GFX11-GISEL-REAL16-NEXT: buffer_store_b32 v0, off, s[0:3], 0
+; GFX11-GISEL-REAL16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a) {
%a.val = load <2 x float>, ptr addrspace(1) %a
@@ -178,6 +420,89 @@ define amdgpu_kernel void @v_pack_b32.fabs(ptr addrspace(1) %in0, ptr addrspace(
; GISEL-NEXT: ; use v0
; GISEL-NEXT: ;;#ASMEND
; GISEL-NEXT: s_endpgm
+;
+; GFX11-GCN-FAKE16-LABEL: v_pack_b32.fabs:
+; GFX11-GCN-FAKE16: ; %bb.0:
+; GFX11-GCN-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-GCN-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX11-GCN-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GCN-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
+; GFX11-GCN-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-GCN-FAKE16-NEXT: global_load_u16 v1, v0, s[0:1] glc dlc
+; GFX11-GCN-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GCN-FAKE16-NEXT: global_load_u16 v0, v0, s[2:3] glc dlc
+; GFX11-GCN-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GCN-FAKE16-NEXT: v_add_f16_e32 v1, 2.0, v1
+; GFX11-GCN-FAKE16-NEXT: v_add_f16_e32 v0, 2.0, v0
+; GFX11-GCN-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GCN-FAKE16-NEXT: v_pack_b32_f16 v0, |v1|, |v0|
+; GFX11-GCN-FAKE16-NEXT: ;;#ASMSTART
+; GFX11-GCN-FAKE16-NEXT: ; use v0
+; GFX11-GCN-FAKE16-NEXT: ;;#ASMEND
+; GFX11-GCN-FAKE16-NEXT: s_endpgm
+;
+; GFX11-GISEL-FAKE16-LABEL: v_pack_b32.fabs:
+; GFX11-GISEL-FAKE16: ; %bb.0:
+; GFX11-GISEL-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
+; GFX11-GISEL-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-GISEL-FAKE16-NEXT: global_load_u16 v1, v0, s[0:1] glc dlc
+; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GISEL-FAKE16-NEXT: global_load_u16 v0, v0, s[2:3] glc dlc
+; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GISEL-FAKE16-NEXT: v_add_f16_e32 v1, 2.0, v1
+; GFX11-GISEL-FAKE16-NEXT: v_add_f16_e32 v0, 2.0, v0
+; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-FAKE16-NEXT: v_pack_b32_f16 v0, |v1|, |v0|
+; GFX11-GISEL-FAKE16-NEXT: ;;#ASMSTART
+; GFX11-GISEL-FAKE16-NEXT: ; use v0
+; GFX11-GISEL-FAKE16-NEXT: ;;#ASMEND
+; GFX11-GISEL-FAKE16-NEXT: s_endpgm
+;
+; GFX11-GCN-REAL16-LABEL: v_pack_b32.fabs:
+; GFX11-GCN-REAL16: ; %bb.0:
+; GFX11-GCN-REAL16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-GCN-REAL16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX11-GCN-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GCN-REAL16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
+; GFX11-GCN-REAL16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-GCN-REAL16-NEXT: global_load_u16 v1, v0, s[0:1] glc dlc
+; GFX11-GCN-REAL16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GCN-REAL16-NEXT: global_load_u16 v2, v0, s[2:3] glc dlc
+; GFX11-GCN-REAL16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GCN-REAL16-NEXT: v_mov_b16_e32 v0.l, v1.l
+; GFX11-GCN-REAL16-NEXT: v_mov_b16_e32 v0.h, v2.l
+; GFX11-GCN-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-GCN-REAL16-NEXT: v_add_f16_e32 v0.l, 2.0, v0.l
+; GFX11-GCN-REAL16-NEXT: v_add_f16_e32 v0.h, 2.0, v0.h
+; GFX11-GCN-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GCN-REAL16-NEXT: v_pack_b32_f16 v0, |v0.l|, |v0.h|
+; GFX11-GCN-REAL16-NEXT: ;;#ASMSTART
+; GFX11-GCN-REAL16-NEXT: ; use v0
+; GFX11-GCN-REAL16-NEXT: ;;#ASMEND
+; GFX11-GCN-REAL16-NEXT: s_endpgm
+;
+; GFX11-GISEL-REAL16-LABEL: v_pack_b32.fabs:
+; GFX11-GISEL-REAL16: ; %bb.0:
+; GFX11-GISEL-REAL16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-GISEL-REAL16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX11-GISEL-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-REAL16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
+; GFX11-GISEL-REAL16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-GISEL-REAL16-NEXT: global_load_u16 v1, v0, s[0:1] glc dlc
+; GFX11-GISEL-REAL16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GISEL-REAL16-NEXT: global_load_u16 v2, v0, s[2:3] glc dlc
+; GFX11-GISEL-REAL16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GISEL-REAL16-NEXT: v_add_f16_e32 v0.l, 2.0, v1.l
+; GFX11-GISEL-REAL16-NEXT: v_add_f16_e32 v0.h, 2.0, v2.l
+; GFX11-GISEL-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-REAL16-NEXT: v_pack_b32_f16 v0, |v0.l|, |v0.h|
+; GFX11-GISEL-REAL16-NEXT: ;;#ASMSTART
+; GFX11-GISEL-REAL16-NEXT: ; use v0
+; GFX11-GISEL-REAL16-NEXT: ;;#ASMEND
+; GFX11-GISEL-REAL16-NEXT: s_endpgm
%tid = call i32 @llvm.amdgcn.workitem.id.x()
%tid.ext = sext i32 %tid to i64
%in0.gep = getelementptr inbounds half, ptr addrspace(1) %in0, i64 %tid.ext
@@ -229,6 +554,89 @@ define amdgpu_kernel void @v_pack_b32.fneg(ptr addrspace(1) %in0, ptr addrspace(
; GISEL-NEXT: ; use v0
; GISEL-NEXT: ;;#ASMEND
; GISEL-NEXT: s_endpgm
+;
+; GFX11-GCN-FAKE16-LABEL: v_pack_b32.fneg:
+; GFX11-GCN-FAKE16: ; %bb.0:
+; GFX11-GCN-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-GCN-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX11-GCN-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GCN-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
+; GFX11-GCN-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-GCN-FAKE16-NEXT: global_load_u16 v1, v0, s[0:1] glc dlc
+; GFX11-GCN-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GCN-FAKE16-NEXT: global_load_u16 v0, v0, s[2:3] glc dlc
+; GFX11-GCN-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GCN-FAKE16-NEXT: v_add_f16_e32 v1, 2.0, v1
+; GFX11-GCN-FAKE16-NEXT: v_add_f16_e32 v0, 2.0, v0
+; GFX11-GCN-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GCN-FAKE16-NEXT: v_pack_b32_f16 v0, -v1, -v0
+; GFX11-GCN-FAKE16-NEXT: ;;#ASMSTART
+; GFX11-GCN-FAKE16-NEXT: ; use v0
+; GFX11-GCN-FAKE16-NEXT: ;;#ASMEND
+; GFX11-GCN-FAKE16-NEXT: s_endpgm
+;
+; GFX11-GISEL-FAKE16-LABEL: v_pack_b32.fneg:
+; GFX11-GISEL-FAKE16: ; %bb.0:
+; GFX11-GISEL-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
+; GFX11-GISEL-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-GISEL-FAKE16-NEXT: global_load_u16 v1, v0, s[0:1] glc dlc
+; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GISEL-FAKE16-NEXT: global_load_u16 v0, v0, s[2:3] glc dlc
+; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GISEL-FAKE16-NEXT: v_add_f16_e32 v1, 2.0, v1
+; GFX11-GISEL-FAKE16-NEXT: v_add_f16_e32 v0, 2.0, v0
+; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-FAKE16-NEXT: v_pack_b32_f16 v0, -v1, -v0
+; GFX11-GISEL-FAKE16-NEXT: ;;#ASMSTART
+; GFX11-GISEL-FAKE16-NEXT: ; use v0
+; GFX11-GISEL-FAKE16-NEXT: ;;#ASMEND
+; GFX11-GISEL-FAKE16-NEXT: s_endpgm
+;
+; GFX11-GCN-REAL16-LABEL: v_pack_b32.fneg:
+; GFX11-GCN-REAL16: ; %bb.0:
+; GFX11-GCN-REAL16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-GCN-REAL16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX11-GCN-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GCN-REAL16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
+; GFX11-GCN-REAL16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-GCN-REAL16-NEXT: global_load_u16 v1, v0, s[0:1] glc dlc
+; GFX11-GCN-REAL16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GCN-REAL16-NEXT: global_load_u16 v2, v0, s[2:3] glc dlc
+; GFX11-GCN-REAL16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GCN-REAL16-NEXT: v_mov_b16_e32 v0.l, v1.l
+; GFX11-GCN-REAL16-NEXT: v_mov_b16_e32 v0.h, v2.l
+; GFX11-GCN-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-GCN-REAL16-NEXT: v_add_f16_e32 v0.l, 2.0, v0.l
+; GFX11-GCN-REAL16-NEXT: v_add_f16_e32 v0.h, 2.0, v0.h
+; GFX11-GCN-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GCN-REAL16-NEXT: v_pack_b32_f16 v0, -v0.l, -v0.h
+; GFX11-GCN-REAL16-NEXT: ;;#ASMSTART
+; GFX11-GCN-REAL16-NEXT: ; use v0
+; GFX11-GCN-REAL16-NEXT: ;;#ASMEND
+; GFX11-GCN-REAL16-NEXT: s_endpgm
+;
+; GFX11-GISEL-REAL16-LABEL: v_pack_b32.fneg:
+; GFX11-GISEL-REAL16: ; %bb.0:
+; GFX11-GISEL-REAL16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX11-GISEL-REAL16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX11-GISEL-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-REAL16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
+; GFX11-GISEL-REAL16-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-GISEL-REAL16-NEXT: global_load_u16 v1, v0, s[0:1] glc dlc
+; GFX11-GISEL-REAL16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GISEL-REAL16-NEXT: global_load_u16 v2, v0, s[2:3] glc dlc
+; GFX11-GISEL-REAL16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GISEL-REAL16-NEXT: v_add_f16_e32 v0.l, 2.0, v1.l
+; GFX11-GISEL-REAL16-NEXT: v_add_f16_e32 v0.h, 2.0, v2.l
+; GFX11-GISEL-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-REAL16-NEXT: v_pack_b32_f16 v0, -v0.l, -v0.h
+; GFX11-GISEL-REAL16-NEXT: ;;#ASMSTART
+; GFX11-GISEL-REAL16-NEXT: ; use v0
+; GFX11-GISEL-REAL16-NEXT: ;;#ASMEND
+; GFX11-GISEL-REAL16-NEXT: s_endpgm
%tid = call i32 @llvm.amdgcn.workitem.id.x()
%tid.ext = sext i32 %tid to i64
%in0.gep = getelementptr inbounds half, ptr addrspace(1) %in0, i64 %tid.ext
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